A method for dynamically simulating EDID to implement display output control

Abstract

This invention discloses a method for dynamically simulating EDID to control display output, comprising: reading the original EDID of the display device through an MCU, parsing its parameters and detecting compatibility issues, including timing conflicts, SCDC anomalies, and HDCP missing; based on the analysis results, dynamically generating or correcting EDID data blocks, wherein the EDID data blocks include a basic block and an extended block, and ensuring compliance with the video source requirements. The MCU dynamically updates the EDID data blocks through an intermediate layer, and simultaneously connects the DDC interface of the video source and the display device to achieve real-time simulation and signal pass-through of EDID, improve the compatibility of the display device, and ensure normal video display.

Description

Technical Field

[0001] This invention relates to the field of display device compatibility control technology, and more specifically, to a method for dynamically simulating EDID to achieve display output control. Background Technology

[0002] EDID (Extended Display Identification Data) is a core standard data structure for parameter interaction between display devices and video sources. Following the specifications defined by VESA (Video Electronics Standards Association), its core function is to enable display devices to proactively transmit their hardware parameters to video sources (such as OPS computers, industrial hosts, video matrix output terminals, etc.). These parameters include key information such as supported resolutions, refresh rates, color formats, color gamut, audio output capabilities, HDCP encryption protocol support status, and interface type. After acquiring the EDID data, the video source automatically matches its output strategy based on these parameters, achieving adaptive output of the display signal, which is the fundamental guarantee for "plug-and-play" display functionality.

[0003] However, when the monitor's EDID data is corrupted, non-standard in format, or missing key parameters (such as HDCP support), the video source may fail to output a signal properly, resulting in black screens, distorted images, flickering, etc. Mismatches between the monitor's and the video source's supported resolution / refresh rate often cause output anomalies. Traditional solutions rely on pre-stored static EDIDs (such as EEPROM or display chip FW), supporting only fixed data and unable to cope with diverse display devices, resulting in poor compatibility. Furthermore, if display correction is achieved by changing the monitor's resolution, it needs to be configured in the host operating system and will not take effect during startup (such as BIOS / UEFI), leading to poor usability. Summary of the Invention

[0004] This invention overcomes the shortcomings of existing technologies and proposes a method for dynamically simulating EDID to control display output. It relates to display device compatibility control technology, and particularly to a scheme for dynamically simulating Extended Display Identification Data (EDID) using a microcontroller unit (MCU). It provides a system and method for resolving issues such as black screens, distorted screens, and abnormal resolution caused by EDID incompatibility between OPS computers, conference terminals, and other devices and display devices.

[0005] The first aspect of this invention provides a method for dynamically simulating EDID to control display output, comprising: S1: When a display device is connected, the MCU reads its original EDID and analyzes the validity of the data block; S2: If the EDID is abnormal, the pre-stored basic EDID template will be called to replace it; S3: Analyze the output parameters of the video source, dynamically optimize the output parameters, and dynamically generate matching EDID data blocks; S4: When the host starts reading the EDID, the MCU completes the DDC response and sends the generated EDID to the video source through I2CSlave, controlling the HPD signal to trigger the re-identification of the display device; S5: Monitor video output status. If there is no signal, switch to low-resolution security mode and control the HPD signal to trigger re-identification of the display device.

[0006] In this scheme, S1-S3 includes: Through the MCU DDC interface, the validity of data blocks is analyzed, the format standard of the original EDID is determined and whether the necessary video source parameters are missing, and standard timing descriptors or protocol support identifiers are automatically injected. The dynamically generated matching EDID data block is stored in the MCU's internal EDID cache block, waiting for the source to retrieve it.

[0007] In this solution, the EDID anomalies include missing key fields, timing conflicts, SCDC anomalies, and missing HDCP. The basic EDID template includes basic resolution parameters and a VESA standard compatible protocol.

[0008] In this scheme, S4 includes: By simulating the DDC slave device through the MCU IO interface and external interrupts, when the host starts reading EDID, the HDMI DDC bus is disconnected, and the MCU completes the DDC response. The new EDID data block in S3 is reported to the host device via I2CSlave based on the DDC bus, thus completing the dynamic simulation of EDID function.

[0009] In this solution, S5 further includes: Restore the HDMI DDC bus and monitor the DDC bus data in real time. Record and generate log information in a timely manner when the bus is abnormal.

[0010] In this scheme, the dynamically generated matching EDID data blocks support multi-channel independent EDID simulation and multi-channel EDID data block generation, and HPD control and DDC management are independent of each other.

[0011] A second aspect of the present invention also provides a system for dynamically simulating EDID to achieve display output control. The system includes a memory and a processor. The memory includes a program for dynamically simulating EDID to achieve display output control. When the processor executes the program for dynamically simulating EDID to achieve display output control, it performs the following steps: S1: When a display device is connected, the MCU reads its original EDID and analyzes the validity of the data block; S2: If the EDID is abnormal, the pre-stored basic EDID template will be called to replace it; S3: Analyze the output parameters of the video source, dynamically optimize the output parameters, and dynamically generate matching EDID data blocks; S4: When the host starts reading the EDID, the MCU completes the DDC response and sends the generated EDID to the video source through I2CSlave, controlling the HPD signal to trigger the re-identification of the display device; S5: Monitor video output status. If there is no signal, switch to low-resolution security mode and control the HPD signal to trigger re-identification of the display device.

[0012] A third aspect of the present invention also provides a computer-readable storage medium comprising a program for dynamically simulating EDID to implement display output control, wherein when the program for dynamically simulating EDID to implement display output control is executed by a processor, it implements the steps of the method for dynamically simulating EDID to implement display output control as described in any of the preceding claims.

[0013] This invention dynamically simulates EDID using an MCU, generates an EDID data stream matching the display device in real time, and transmits it to the video source device, achieving "plug-and-play" and "dynamic modification" compatibility control. The core components include: EDID dynamic analysis engine: The MCU reads the original EDID of the display device, parses its parameters and detects compatibility issues (such as timing conflicts, SCDC anomalies, HDCP missing, etc.). Intelligent EDID Generator: Based on analysis results, dynamically generates or corrects EDID data blocks (including basic blocks and extended blocks) to ensure compliance with video source requirements.

[0014] Two-way communication control: The MCU acts as an "intermediary agent" and connects to the DDC interface of both the video source (such as HDMI input) and the display device (such as HDMI output) to realize real-time simulation and signal pass-through of EDID.

[0015] Fault recovery mechanism: When a display anomaly is detected, automatically switch to the backup EDID template or force the activation of a safe resolution (such as 1920*1080@60Hz). The present invention can achieve the following technical effects: Real-time parameter correction: inject missing standard timing descriptors (such as CVT, GTF) or remove conflicting parameters (such as overclocked refresh rate) into the original EDID; protocol compatibility extension: dynamically add extension blocks such as HDCP support identifier, SCDC, HDR, and Audio Block metadata to resolve compatibility issues caused by missing protocols.

[0016] An adaptive resolution negotiation mechanism is adopted. When the resolution requested by the video source is not supported by the display, the MCU automatically generates an EDID containing alternative timing to guide the video source to output the optimal resolution supported by the display (such as downgrading the 4K@60Hz request to 4K@30Hz).

[0017] With its hardware-level implementation that is independent of the operating system, the MCU can take over EDID communication during the device startup phase (before the OS is loaded) or immediately after the device is powered on (before the BIOS starts), thus avoiding black screen issues during the startup process. For example, the BIOS page may have black screen or flickering issues on 4K monitors in some cases. After the MCU takes over, it forcibly limits the resolution to 1080P, which can effectively solve the problem. Attached Figure Description

[0018] Figure 1 The system structure diagram of the display output control method for dynamically simulating EDID according to the present invention is shown. Figure 2 The flowchart of the dynamic EDID generation process of the present invention is shown; Figure 3 A schematic diagram of the DDC data bit logic of the present invention is shown; Figure 4 This invention illustrates the EDID format specification 1; Figure 5 This invention illustrates the EDID format specification 2; Figure 6 This invention illustrates the EDID format specification 3; Figure 7 A block diagram of a system for display output control based on dynamic analog EDID is shown. Detailed Implementation

[0019] To better understand the above-mentioned objectives, features, and advantages of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0020] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore the scope of protection of the invention is not limited to the specific embodiments disclosed below.

[0021] Figure 1 The diagram shows a system structure of a method for dynamically simulating EDID to achieve display output control according to the present invention.

[0022] like Figure 1 The diagram shown is a system structure diagram for implementing the method. The first aspect of this invention provides a method for dynamically simulating EDID to achieve display output control, comprising: S1: When a display device is connected, the MCU reads its original EDID and analyzes the validity of the data block; S2: If the EDID is abnormal, the pre-stored basic EDID template will be called to replace it; S3: Analyze the output parameters of the video source, dynamically optimize the output parameters, and dynamically generate matching EDID data blocks; S4: When the host starts reading the EDID, the MCU completes the DDC response and sends the generated EDID to the video source through I2CSlave, controlling the HPD signal to trigger the re-identification of the display device; S5: Monitor video output status. If there is no signal, switch to low-resolution security mode and control the HPD signal to trigger re-identification of the display device.

[0023] Here, in S1, the HDMI HPD signal is detected by MCU IO to confirm whether the HDMI display is connected, and to dynamically identify the hot-plug status of each HDMI TV.

[0024] It is worth mentioning that, This invention's dynamic EDID simulation is applicable to scenarios requiring frequent display device switching, such as OPS computer modules, industrial computers (IPCs), conference all-in-one machines, and video matrix switchers. It quickly resolves display compatibility issues, reducing problems like black screens, screen flickering, and resolution abnormalities caused by EDID incompatibility, significantly improving system stability. Simulated EDID can also proactively remove audio-related information from secondary displays in multi-screen scenarios, ensuring sound output from the main screen. In some video matrices, KVMs, and other devices, dynamic EDID simulation technology can significantly improve device compatibility.

[0025] Meanwhile, the system of this invention can also monitor the DDC communication process between the graphics card driver and the monitor in real time. When the bus malfunctions, it can record relevant information in a timely manner to assist R&D personnel in debugging.

[0026] Figure 2 The flowchart of the dynamic generation of EDID according to the present invention is shown. For the sake of simplification, the specific process is as described in S1-S5 above.

[0027] Figure 3The diagram shows a logical schematic of the DDC data bits of the present invention, specifically a schematic diagram of the data bit changes during the dynamic simulation of EDID.

[0028] According to an embodiment of the present invention, S1-S3 includes: Through the MCU DDC interface, the validity of data blocks is analyzed, the format standard of the original EDID is determined and whether the necessary video source parameters are missing, and standard timing descriptors or protocol support identifiers are automatically injected. The dynamically generated matching EDID data block is stored in the MCU's internal EDID cache block, waiting for the source to retrieve it.

[0029] It should be noted that the dynamic generation module is responsible for detecting EDID anomalies and generating EDID data blocks. When the video source output is abnormal, it forcibly enables the preset low-resolution EDID template and restarts the video output link. Through hardware-level dynamic EDID simulation, compatibility issues are resolved at their root. For example, it eliminates resolution anomalies; such as automatically adapting unsupported 1440p to 1080p.

[0030] In S2, the original EDID of the display is captured through the HDMI DDC bus, the original EDID data of the display device is parsed and compatibility issues (such as timing conflicts, SCDC anomalies, HDCP missing, etc.) are detected.

[0031] According to an embodiment of the present invention, the EDID anomalies include missing key fields, timing conflicts, SCDC anomalies, and missing HDCP, and the basic EDID template includes basic resolution parameters and a VESA standard compatible protocol.

[0032] It should be noted that when the video source output is abnormal, a preset low-resolution EDID template can be forcibly enabled and the video output link can be restarted. This hardware-level dynamic EDID simulation addresses compatibility issues at their root.

[0033] In S3, the EDID dynamic generation module reconstructs EDIDs that meet the requirements of the video source based on the analysis results, and dynamically generates new EDIDs or corrects EDID data blocks (including basic blocks and extended blocks) to ensure compliance with the requirements of the video source.

[0034] According to an embodiment of the present invention, S4 includes: By simulating the DDC slave device through the MCU IO interface and external interrupts, when the host starts reading EDID, the HDMI DDC bus is disconnected, and the MCU completes the DDC response. The new EDID data block in S3 is reported to the host device via I2CSlave based on the DDC bus, thus completing the dynamic simulation of EDID function.

[0035] It should be noted that the HPD signal is controlled to trigger the re-identification of the display device and complete the dynamic simulation of the EDID function and the correct display process.

[0036] According to an embodiment of the present invention, step S5 further includes: Restore the HDMI DDC bus and monitor the DDC bus data in real time. Record and generate log information in a timely manner when the bus is abnormal.

[0037] According to an embodiment of the present invention, the dynamically generated matching EDID data block supports multi-channel independent EDID simulation and multi-channel EDID data block generation, and HPD control and DDC management are independent of each other.

[0038] It should be noted that the aforementioned multi-channel independent EDID simulation refers to the independent simulation of multiple display devices.

[0039] According to an embodiment of the present invention, it further includes: The MCU unit is simultaneously connected to multiple display devices and monitors HPD status via the DDC bus. Real-time acquisition of EDID dynamic matching latency and screen output display latency for each display device; A time window is set independently for each display device, and various transmission fluctuation coefficients are collected within the time window; Multiple transmission fluctuation coefficients include the number of consecutive EDID rematches, resolution switching time, HPD jump count, DDC communication anomaly count, and signal stabilization duration; Within each time window, the linear variation coefficients of various transmission fluctuation coefficients are calculated through linear regression, and the delay fluctuation patterns and complex trends of multiple display devices within the time window are analyzed. By using linear variation coefficients and combining them with the assessment of overall display compatibility and display switching stability across multiple display devices, the EDID generation strategy and compatibility scheme are adjusted.

[0040] It should be noted that the dynamic matching delay refers to the time required to analyze and match the EDID and update the EDID data block. The time window length is generally 3-10 milliseconds. The linear variation coefficient is introduced into a univariate linear regression equation (y=kx+b) to fit the fluctuation coefficient under multi-window conditions. Based on the linear coefficient k, the changes in fluctuation coefficients such as the number of EDID rematches, resolution switching time, HPD jumps, DDC communication anomalies, and signal stabilization time are judged. For example, if fluctuation parameters such as the number of rematches and resolution switching time need to decrease linearly or remain unchanged, and the signal stabilization time needs to increase linearly (k>=0) or remain unchanged, it indicates that the transmission stability and compatibility are within the expected range and the probability of anomalies is low. Conversely, it indicates that there is instability in display transmission and a high risk of data loss, requiring adjustment of the EDID strategy.

[0041] It is worth mentioning that in multi-display devices, due to the increased number of displays, the dynamic matching compatibility of EDID has a certain probability of anomalies. Traditional technologies lack corresponding anomaly assessment methods. Therefore, this invention uses an MCU to evaluate the reliability of the current dynamic matching EDID scheme by combining video monitoring data and analysis results. Specifically, it considers the switching timing, resolution differences, and protocol support differences between various display devices to comprehensively judge the overall display compatibility and display switching stability of the multi-display devices. When risks such as frequent re-matching, switching jitter, latency exceeding limits, or repeated resolution jumps are detected in single or multiple display devices... In this process, the strategy for dynamically generated EDIDs is automatically adjusted, including: optimizing resolution adaptation priority, tightening the timing parameter range, reducing HPD re-trigger frequency, extending stable recognition time, enabling more conservative compatible EDID templates, and reducing the frequency of dynamic modification of extension blocks. This reduces communication conflicts and switching disturbances in multi-device parallel scenarios, improves system robustness in scenarios with multiple screens online simultaneously, frequent switching, and hot-plugging, makes dynamic EDID simulation more stable and more adaptable to complex multi-display device environments, further improves system practicality and industrial application value, and effectively supports parallel control and latency collaborative optimization of multi-display devices.

[0042] In a preferred embodiment, it further includes: After the dynamic EDID data block is generated and the display device is re-identified, the MCU starts the EDID effect verification process. It reads the actual output parameters of the video source in real time through the DDC bus, and at the same time collects the actual display parameters of the display device. The actual output parameters and the actual display parameters are used to establish a verification parameter dataset. The actual jitter time T of data transmission between the display device and the video source is collected in real time by the MCU. In each time window, calculate the difference P between the output and displayed parameters in the validation parameter dataset, and calculate the corresponding parameter T; The compatibility of the display is evaluated by determining the values ​​of P and T. In multiple time windows, calculate whether there is a linear correlation between P and T. If it exists, determine that a warning state is displayed and dynamically adjust the EDID generation strategy of multiple display devices.

[0043] Here, the actual output parameters of the video source include resolution, refresh rate, color format, audio parameters, HDCP protocol status, etc.; the actual display parameters of the display device include image sharpness, brightness, contrast, signal synchronization status, etc. The difference between output and display parameters can be described by the averaged difference of one or more video parameters, such as the difference between resolution and refresh rate.

[0044] In evaluating the compatibility display effect by judging the values ​​of P and T, the following settings can be used: set three levels: excellent, qualified, and unqualified. The excellent standard is: the deviation P between the video source output parameters and the preset parameters of the dynamically generated EDID is ≤5%, the display device has no black screen, screen distortion, or flickering, the picture synchronization is good, and the audio output is normal. The qualified standard is: the parameter deviation is between 5% and 10%, the display device has no obvious abnormalities, and only occasional slight picture jitter occurs (the duration of a single jitter is T≤100ms, and it does not exceed 3 times per hour). The unqualified standard is: the parameter deviation is >10%, or any abnormal phenomenon such as black screen, screen distortion, continuous flickering, or audio loss occurs, or the duration of a single jitter is T>100ms.

[0045] Furthermore, in calculating whether a linear correlation exists between P and T, specifically, if P and T show linear growth across multiple time windows, it indicates a linear correlation that poses a risk to device display control. In this case, the currently dynamically generated EDID can be immediately deactivated, and a pre-stored, highly compatible backup EDID template can be switched to. The generation, reporting, and verification process can then be re-executed, while recording abnormal parameters and the reasons for deviations for subsequent EDID generation algorithm optimization. Here, the effect verification cycle can be adjusted by setting the time window length; for example, it can be adjusted according to the application scenario, with a default setting of verification every 30 minutes.

[0046] This invention enables continuous monitoring and dynamic optimization of EDID simulation effects, ensuring that EDID simulation is always in the optimal state, avoiding the long-term existence of hidden display problems, and enabling real-time monitoring of existing display control risks, early checking of display devices, display modes and status, and reducing the risk of video stream data loss.

[0047] Figure 4-6 This is the reference format specification for EDID in this invention.

[0048] Figure 7 A block diagram of a system for display output control based on dynamic analog EDID is shown.

[0049] A second aspect of the present invention also provides a system for dynamically simulating EDID to achieve display output control. The system includes a memory and a processor. The memory includes a program for dynamically simulating EDID to achieve display output control. When the processor executes the program for dynamically simulating EDID to achieve display output control, it performs the following steps: S1: When a display device is connected, the MCU reads its original EDID and analyzes the validity of the data block; S2: If the EDID is abnormal, the pre-stored basic EDID template will be called to replace it; S3: Analyze the output parameters of the video source, dynamically optimize the output parameters, and dynamically generate matching EDID data blocks; S4: When the host starts reading the EDID, the MCU completes the DDC response and sends the generated EDID to the video source through I2CSlave, controlling the HPD signal to trigger the re-identification of the display device; S5: Monitor video output status. If there is no signal, switch to low-resolution security mode and control the HPD signal to trigger re-identification of the display device.

[0050] Specifically, in S3, for devices that adapt to EDID, the required output video format can be set in the BIOS options for the video source, and then the MCU will modify the EDID accordingly.

[0051] In S5, users can monitor the video output status and enter safe mode through BIOS options.

[0052] When the system is running, it can implement one or more steps of the method described above for dynamically simulating EDID to control display output.

[0053] A third aspect of the present invention also provides a computer-readable storage medium comprising a program for dynamically simulating EDID to implement display output control, wherein when the program for dynamically simulating EDID to implement display output control is executed by a processor, it implements the steps of the method for dynamically simulating EDID to implement display output control as described in any of the preceding claims.

[0054] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application can be generated, in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic cable, data subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., digital universal optical disc), or a semiconductor medium (e.g., solid-state drive). In the various embodiments of this application, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments are consistent and can be mutually referenced. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0055] In the embodiments of this application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone, where A and B can be singular or plural. In the textual description of the embodiments of this application, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. In this application, "first," "second," and various numerical designations are only for the convenience of description and are not used to limit the scope of the embodiments of this application. For example, they are used to distinguish different messages, rather than to describe a specific order or sequence.

[0056] It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The order of the process numbers does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.

[0057] Finally, it should be noted that the above description is only a specific implementation of this application, but the protection scope of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be covered within the protection scope of this application.

Claims

1. A method for dynamically simulating EDID to achieve display output control, characterized in that, include: S1: When a display device is connected, the MCU reads its original EDID and analyzes the validity of the data block; S2: If the EDID is abnormal, the pre-stored basic EDID template will be called to replace it; S3: Analyze the output parameters of the video source, dynamically optimize the output parameters, and dynamically generate matching EDID data blocks; S4: When the host starts reading the EDID, the MCU completes the DDC response and sends the generated EDID to the video source through the I2C Slave, controlling the HPD signal to trigger the re-identification of the display device; S5: Monitor video output status. If there is no signal, switch to low-resolution safe mode and control the HPD signal to trigger re-identification of the display device. It also includes: the MCU unit is simultaneously connected to multiple display devices and monitors the HPD status via the DDC bus; Real-time acquisition of EDID dynamic matching latency and screen output display latency for each display device; A time window is set independently for each display device, and various transmission fluctuation coefficients are collected within the time window; Multiple transmission fluctuation coefficients include the number of consecutive EDID rematches, resolution switching time, HPD jump count, DDC communication anomaly count, and signal stabilization duration; Within each time window, the linear variation coefficients of various transmission fluctuation coefficients are calculated through linear regression, and the delay fluctuation patterns and complex trends of multiple display devices within the time window are analyzed. By using linear variation coefficients and combining them with the assessment of overall display compatibility and display switching stability across multiple display devices, the EDID generation strategy and compatibility scheme are adjusted.

2. The method for dynamically simulating EDID to control display output according to claim 1, characterized in that, S1-S3 include: Through the MCU DDC interface, the validity of data blocks is analyzed, the format standard of the original EDID is determined and whether the necessary video source parameters are missing, and standard timing descriptors or protocol support identifiers are automatically injected. The dynamically generated matching EDID data block is stored in the MCU's internal EDID cache block, waiting for the source to retrieve it.

3. The method for dynamically simulating EDID to control display output according to claim 1, characterized in that, The EDID anomalies include missing key fields, timing conflicts, SCDC anomalies, and missing HDCP. The basic EDID template includes basic resolution parameters and VESA standard protocol compatibility.

4. The method for dynamically simulating EDID to control display output according to claim 1, characterized in that, S4 includes: By simulating the DDC slave device through the MCU IO interface and external interrupts, when the host starts reading EDID, the HDMI DDC bus is disconnected, and the MCU completes the DDC response. The new EDID data block in S3 is reported to the host device via I2C Slave based on the DDC bus, thus completing the dynamic EDID simulation function.

5. The method for dynamically simulating EDID to control display output according to claim 1, characterized in that, The S5 also includes: Restore the HDMI DDC bus and monitor the DDC bus data in real time. Record and generate log information in a timely manner when the bus is abnormal.

6. The method for dynamically simulating EDID to control display output according to claim 1, characterized in that, The dynamically generated matching EDID data blocks support multi-channel independent EDID simulation and multi-channel EDID data block generation, and HPD control and DDC management are independent of each other.

7. A system for dynamically simulating EDID to achieve display output control, characterized in that, The system includes: a memory and a processor. The memory includes a program for dynamically simulating EDID to implement display output control. When the program for dynamically simulating EDID to implement display output control is executed by the processor, it implements the steps of the method for dynamically simulating EDID to implement display output control as described in any one of claims 1 to 6.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a program for dynamically simulating EDID to implement display output control. When the program for dynamically simulating EDID to implement display output control is executed by a processor, it implements the steps of the method for dynamically simulating EDID to implement display output control as described in any one of claims 1 to 6.

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