PWM pulse power supply peak control method and device, equipment and storage medium

Abstract

This application provides a method, apparatus, device, and storage medium for peak control of a PWM pulse power supply. The method includes: synchronously acquiring a set of electrical characteristic parameters during the high-level period of each output pulse of the PWM power supply; performing a two-level collaborative analysis based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of the current peak generated by the next pulse; outputting a drive adjustment command according to the risk level and a preset strategy matrix; executing the drive adjustment command to control the drive waveform of the next pulse, and acquiring the adjusted current waveform after the next pulse ends for performance verification; if the performance verification is successful, the peak suppression is determined to be successful; if the performance verification fails, the parameters of the preset strategy matrix are optimized according to the verification result. The method of this application can effectively control the output peaks of the PWM pulse power supply, so as to recover the energy output by the PWM pulse power supply during aging and testing to energy-saving load devices.

Description

Technical Field

[0001] This application relates to the field of pulse power supply technology, and in particular to a method, apparatus, device and storage medium for peak control of a PWM pulse power supply. Background Technology

[0002] Currently, when driving capacitive or dynamic loads, PWM pulse power supplies are prone to transient current spikes at the leading edge of the output pulse. This not only threatens the safety of power devices but also restricts the application of efficient testing techniques such as energy-saving loads. To adapt to efficient testing techniques such as energy-saving loads, passive filtering circuit mechanisms relying on fixed parameters often face the dilemma of balancing suppression effectiveness and system efficiency because they cannot sense and adapt to dynamic changes in the load in real time: either insufficient suppression leads to excessive stress on devices, or excessive suppression affects the efficiency of normal pulse energy transmission and recovery. Summary of the Invention

[0003] This application provides a peak control method, apparatus, device, and storage medium for a PWM pulse power supply, used to balance the pulse energy transmission and recovery efficiency of the PWM pulse power supply, so as to recover the energy output by the PWM pulse power supply during aging and testing to energy-saving load devices.

[0004] In a first aspect, embodiments of this application provide a spike control method for a PWM pulse power supply, the method comprising: During the high level of each output pulse of the PWM power supply, a set of electrical characteristic parameters are synchronously acquired; A two-level collaborative analysis is performed based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of the current spike generated by the next pulse. Based on the risk level, a drive suppression scheme is selected from a preset strategy matrix, and a drive adjustment instruction is generated based on the drive suppression scheme. The drive adjustment command is executed to control the drive waveform of the next pulse, and the adjusted current waveform is collected after the next pulse ends for performance verification. If the performance verification is successful, peak suppression is determined to be successful; if the performance verification fails, the parameters of the preset strategy matrix are optimized based on the verification result.

[0005] Secondly, embodiments of this application provide a spike control device for a PWM pulse power supply, the spike control device for the PWM pulse power supply comprising: The parameter acquisition module is used to synchronously acquire a set of electrical characteristic parameters during the high level of each output pulse of the PWM power supply; The risk prediction module is used to perform a two-level collaborative analysis based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of the current spike generated by the next pulse. The drive adjustment module is used to select a drive suppression scheme from a preset strategy matrix according to the risk level, and generate a drive adjustment instruction according to the drive suppression scheme. The waveform adjustment module is used to execute the drive adjustment command to control the drive waveform of the next pulse, and to collect the adjusted current waveform after the next pulse ends for performance verification. The result verification module is used to determine that peak suppression is successful if the performance verification is successful, and to optimize the parameters of the preset strategy matrix based on the verification result if the performance verification fails.

[0006] Thirdly, embodiments of this application provide an electronic device, which includes a memory and a processor; The memory is used to store computer programs; The processor is configured to execute the computer program and, when executing the computer program, implement the spike control method for the PWM pulse power supply as described in any of the embodiments of this application.

[0007] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to implement the spike control method for a PWM pulse power supply as described in any of the embodiments of this application.

[0008] This application provides a method, apparatus, device, and storage medium for peak control of a PWM pulse power supply. The method includes: synchronously acquiring a set of electrical characteristic parameters during the high-level period of each output pulse of the PWM power supply; performing a two-level collaborative analysis based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of a current peak generated by the next pulse; selecting a drive suppression scheme from a preset strategy matrix according to the risk level, and generating a drive adjustment command according to the drive suppression scheme; executing the drive adjustment command to control the drive waveform of the next pulse, and acquiring the adjusted current waveform after the next pulse ends for performance verification; if the performance verification is successful, the peak suppression is determined to be successful; if the performance verification fails, the parameters of the preset strategy matrix are optimized according to the verification result of the performance verification. In the above method, by synchronously acquiring electrical characteristic parameters reflecting the transient characteristics of the load during the high-level period of each pulse, and performing a two-level collaborative analysis based on the continuous pulse sequence to predict the peak risk level in advance, and then dynamically matching and executing a preset drive suppression scheme according to the risk level, a closed-loop parameter optimization can be formed through the real-time performance verification of the next pulse. This can significantly improve the operating efficiency and test safety of the PWM power supply under complex test conditions while ensuring the safety of power devices. Attached Figure Description

[0009] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 A schematic flowchart illustrating a spike control method for a PWM pulse power supply provided in an embodiment of this application; Figure 2 A circuit diagram of an interface circuit provided in an embodiment of this application; Figure 3 This is a schematic block diagram of a spike control device for a PWM pulse power supply provided in an embodiment of this application. Detailed Implementation

[0011] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described below with reference to the accompanying drawings.

[0012] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0013] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0014] It should be understood that in this application, "at least one (item)" means one or more, "more than one" means two or more, "at least two (items)" means two or three or more, and "and / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0015] Please see Figure 1 , Figure 1 This is a schematic flowchart illustrating a spike control method for a PWM pulse power supply provided in an embodiment of this application. Figure 1 As shown, the specific steps of the spike control method for the PWM pulse power supply include: S101-S105.

[0016] S101. During the high level of each output pulse of the PWM power supply, a set of electrical characteristic parameters are synchronously acquired.

[0017] It should be noted that synchronous sampling ensures that voltage and current data are aligned on the time axis. The acquired data stream, after preliminary filtering and calibration, is used to calculate in real time a set of electrical characteristic parameters to describe the dynamic characteristics of the pulse leading edge, thus reflecting the response characteristics of the load circuit when receiving a voltage step excitation from different perspectives.

[0018] Specifically, the calculation of electrical characteristic parameters directly applies to the pre-processed voltage and current sampling sequences. By performing a differential operation on the current sampling sequence, a current change rate sequence can be obtained, and the maximum value extracted from it represents the intensity of the current change at the pulse leading edge. Simultaneously, point-by-point division is performed on the voltage and current sampling values ​​at the same moment to obtain a dynamic impedance sequence. The minimum value of this sequence at the pulse initiation stage reveals the instantaneous impedance characteristics of the circuit under the maximum current surge. In addition, the time taken for the current to rise from the pulse initiation moment to a specific proportion (e.g., 90%) of its steady-state value within that pulse period is recorded. This synchronous acquisition and real-time calculation of this set of electrical characteristic parameters provides data input for assessing the impact intensity and potential risks of the pulse leading edge.

[0019] S102. Based on the electrical characteristic parameters of multiple consecutive pulses, perform two-level collaborative analysis to predict the risk level of the current spike generated by the next pulse.

[0020] For example, the first-level analysis, as a rapid screening mechanism, compares the maximum current rise rate and the minimum value of the leading-edge dynamic impedance calculated for the current pulse with a short table of high-risk characteristic thresholds preset based on historical fault data or theoretical boundaries. If both key parameters exceed their respective thresholds, it indicates that the electrical state of the current pulse clearly meets the high-risk pattern, and the prediction mechanism will skip subsequent complex calculations and directly output the highest level of risk warning.

[0021] If the first-level analysis does not trigger a direct alarm, a more refined second-level trend prediction analysis is activated. This analysis uses a historical window of electrical characteristic parameters containing the most recent dozens of consecutive pulses as base data. For the maximum current rise rate sequence and the leading-edge dynamic impedance minimum value sequence within the window, a weighted moving average algorithm is applied, with more recent data given higher weights, to extrapolate and obtain the predicted estimate of the parameters corresponding to the next pulse. Linear regression analysis is performed on the historical sequence of leading-edge dynamic impedance minimum values ​​to calculate the slope of its trend, used to determine whether the impedance characteristics are deteriorating or improving.

[0022] The predicted maximum current rise rate, the minimum value of the leading-edge dynamic impedance, and the slope of their changing trends are input into a pre-defined fuzzy logic decision-maker. This decision-maker embeds a rule base formed from expert experience or experimental data. By evaluating the membership degree of these input quantities to fuzzy sets such as "high," "medium," and "low," and after defuzzification operations, it outputs a quantitative risk level, for example, classifying it into three levels: "low risk," "medium risk," and "high risk," thus completing the inference from historical data to future risks.

[0023] S103. Based on the risk level, select a driving suppression scheme from the preset strategy matrix and generate driving adjustment instructions based on the driving suppression scheme.

[0024] For example, when the risk level is determined to be "low risk," the mapping result is the selection of a baseline suppression scheme. This scheme does not substantially change the original standard pulse drive signal, that is, it does not apply any active suppression, aiming to maintain normal operation without affecting system efficiency. This selection reflects the principle of intervening only when necessary, avoiding unnecessary disturbances to normal operation.

[0025] When the risk level is "medium risk," the strategy matrix points to a slope suppression scheme. The core intervention of this scheme is to reshape the rising edge of the drive voltage waveform at the start of the next pulse. Specifically, this involves adjusting the voltage ramp-up slope to a specific proportional coefficient, such as 0.6 times, of the standard slope. This proportional coefficient is a pre-set but adjustable parameter that can be optimized later. By reducing the initial rise rate of the drive voltage, the voltage step intensity applied to the load circuit at the moment the power switching device turns on can be effectively slowed down, thereby suppressing excessively rapid current growth at the source. If the risk level reaches "high risk," a more complex but more effective multi-step pre-charge scheme will be employed. This scheme requires a pre-charge pulse with designed amplitude and duration to be inserted before the main pulse. The amplitude of this pre-charge pulse is typically significantly lower than the rated voltage, and its function is to gently partially charge the capacitive components in the load circuit. After a brief no-output dead time, the complete standard main pulse is then emitted. The process of generating drive adjustment instructions involves calculating the timing, level, and slope of the target drive waveform based on the selected scheme and its parameters.

[0026] S104. Execute the drive adjustment command to control the drive waveform of the next pulse, and collect the adjusted current waveform after the next pulse ends to verify the performance.

[0027] For example, the drive adjustment command is transmitted to the waveform generation unit of the PWM controller, directly modulating the gate drive signal of the next pulse cycle. For the slope suppression scheme, the controller adjusts the parameters of the internal reference ramp generator or directly modifies the counting clock of the digital pulse width modulator to achieve precise control of the leading edge slope of the output pulse. For the multi-step pre-charge scheme, the controller needs to generate two stages of drive signals within one pulse cycle and precisely control their amplitude, width, and the interval of the intermediate dead time. The direct result is a change in the conduction behavior of the power switching devices, reflected in the shape of the pulse voltage waveform at the power supply output.

[0028] To evaluate the actual effectiveness of the implemented suppression scheme, the adjusted pulse must be measured in real time. During the high level of the next pulse, the output current waveform of that pulse is resynchronized and acquired using the same configuration as the initial acquisition phase. Based on the newly acquired current waveform data, a set of actual electrical characteristic parameters of the pulse are recalculated, particularly the actual maximum current rise rate. The core of performance verification lies in comparing the actual effect after suppression with the predicted risk before implementation. By calculating the deviation ratio of the actual maximum current rise rate from the predicted value, and combining it with changes in other parameters, a quantitative performance index is formed. This performance index is compared with a preset threshold to objectively determine whether the suppression action successfully controlled the risk within the expected range or failed to achieve the predetermined goal.

[0029] S105. If the performance verification is successful, the peak suppression is considered successful. If the performance verification fails, the parameters of the preset strategy matrix are optimized based on the performance verification results.

[0030] For example, when performance verification fails, it indicates that the selected suppression scheme or its parameters have failed to produce the expected suppression effect, and the actual current spike risk remains higher than acceptable. In this case, the optimization process needs to be guided by the specific performance indicator deviations in the verification results. The analysis focuses on identifying which electrical characteristic parameters(s) have significantly deviated from their predictions in actual performance and determining their dominant contribution to the performance failure. For example, if the actual maximum current rise rate far exceeds the predicted value, it may mean that the slope suppression scheme is insufficient. The optimization process will make targeted adjustments to the scheme parameters corresponding to the current risk level in the strategy matrix. For slope suppression schemes, the slope adjustment coefficient may be reduced by a fixed step size to further smooth the voltage rise; for multi-step pre-charge schemes, the amplitude of the pre-charge pulse may be increased or its duration extended. The adjusted new parameters will be updated to the corresponding positions in the strategy matrix and immediately applied to subsequent pulse suppression of the same risk level. This process achieves adaptive learning and iterative improvement of strategy parameters based on actual operational feedback, enabling the system to gradually approach the optimal suppression parameter configuration for different load characteristics.

[0031] This application provides a method, apparatus, device, and storage medium for peak control of a PWM pulse power supply. The method includes: synchronously acquiring a set of electrical characteristic parameters during the high-level period of each output pulse of the PWM power supply; performing a two-level collaborative analysis based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of a current peak generated by the next pulse; selecting a drive suppression scheme from a preset strategy matrix according to the risk level, and generating a drive adjustment command according to the drive suppression scheme; executing the drive adjustment command to control the drive waveform of the next pulse, and acquiring the adjusted current waveform after the next pulse ends for performance verification; if the performance verification is successful, the peak suppression is determined to be successful; if the performance verification fails, the parameters of the preset strategy matrix are optimized according to the verification result of the performance verification. In the above method, by synchronously acquiring electrical characteristic parameters reflecting the transient characteristics of the load during the high-level period of each pulse, and performing a two-level collaborative analysis based on the continuous pulse sequence to predict the peak risk level in advance, and then dynamically matching and executing a preset drive suppression scheme according to the risk level, a closed-loop parameter optimization can be formed through the real-time performance verification of the next pulse. This can significantly improve the operating efficiency and test safety of the PWM power supply under complex test conditions while ensuring the safety of power devices.

[0032] To more clearly illustrate the technical solution of this application, the technical solution of this application will be described below through specific embodiments. It should be noted that the specific embodiments are used to expand the description of the technical solution of this application, and are not intended to limit this application.

[0033] In some embodiments, the electrical characteristic parameters include: instantaneous voltage values ​​and instantaneous current values. During the high level of each output pulse of the PWM power supply, a set of electrical characteristic parameters is synchronously acquired, including: calculating the change in the instantaneous current value at each sampling interval to obtain a current differential sequence, extracting the maximum value of the current differential sequence at the pulse leading edge as the maximum current rise rate; calculating the ratio of the instantaneous voltage value to the instantaneous current value at the same moment to obtain a dynamic impedance sequence, extracting the minimum value of the dynamic impedance sequence at the pulse leading edge as the minimum leading edge impedance value; recording the time from the pulse start moment to the instantaneous current value first reaching 90% of the steady-state current value within this pulse as the current ramp-up time; and determining the electrical characteristic parameters based on the maximum current rise rate, the minimum leading edge impedance value, and the current ramp-up time.

[0034] For example, starting from the instantaneous current value sequence, a discrete current differential sequence is obtained by calculating the difference between adjacent sampling points and dividing it by the sampling interval. When analyzing the current differential sequence, the focus is on a time window after the pulse voltage jumps from a low level to a high level, i.e., the pulse leading-out phase. Within this phase, the current differential sequence is traversed to find its maximum value, defined as the maximum current rise rate. This maximum value directly quantifies the maximum possible rate of change of current and is used to predict the intensity of current spikes. Simultaneously, at the same sampling moment, the synchronously acquired instantaneous voltage value is divided by the instantaneous current value to calculate a dynamic impedance sequence. In a real circuit containing parasitic inductance and capacitance, this impedance value is not constant, especially during the pulse leading-out phase, where the inductive reactance component significantly affects the dynamic impedance value due to the drastic change in current. The minimum value of the dynamic impedance sequence appearing during the pulse leading-out phase is extracted as the minimum leading-out impedance value. This value reflects the minimum impedance characteristic exhibited by the circuit when subjected to the most severe current surge; the lower the impedance, the greater the potential surge current under the same voltage.

[0035] The current ramp-up time can be obtained by monitoring the time interval from the start of the pulse when the instantaneous current value increases until it reaches and first exceeds 90% of the stable current value within that pulse cycle. A shorter current ramp-up time is usually accompanied by a steeper current front and a higher rate of current rise.

[0036] Through the above calculation process, electrical characteristic parameters were obtained, including: maximum current rise rate, minimum leading-edge impedance, and current ramp-up time, which are used to characterize the electrical stress state at the leading edge of a single pulse.

[0037] In some embodiments, the two-level collaborative analysis includes: a first-level fast matching and a second-level trend prediction. Based on the electrical characteristic parameters of multiple consecutive pulses, the two-level collaborative analysis predicts the risk level of the current spike generated by the next pulse. This includes: performing the first-level fast matching, comparing whether the maximum current rise rate and the minimum leading-edge impedance of the pulse both exceed the corresponding thresholds in a pre-stored high-risk feature table; if so, it is directly determined to be a high-risk level; if not, the second-level trend prediction is performed, calculating a weighted moving average of the maximum current rise rate and the minimum leading-edge impedance of the most recent N pulses to predict the corresponding value of the next pulse; predicting the linear regression slope of the minimum leading-edge impedance; and combining the predicted maximum current rise rate, the predicted minimum leading-edge impedance, and the predicted linear regression slope to perform fuzzy logic decision-making and output the risk level.

[0038] For example, if the first level does not trigger a high-risk assessment, the process proceeds to the second level of trend prediction. This level of analysis is based on historical data from the most recent N consecutive pulses (N is typically between 10 and 100), applying weighted moving average algorithms to the maximum current rise rate and the minimum leading-edge impedance sequence, respectively. Recent data is given higher weight and used to extrapolate the predicted parameter values ​​for the next pulse. This method captures the trend of parameter evolution over time, improving prediction accuracy.

[0039] Furthermore, a first-order linear regression analysis was performed on the historical sequence of the lowest leading-edge impedance values ​​to calculate the slope of the regression line. This slope reflects the direction of impedance change: a positive value indicates an increase in impedance, while a negative value indicates a potential deterioration in loop conditions. A persistent negative slope often foreshadows the risk of increased intensity in subsequent pulse impacts.

[0040] The second stage takes three predicted outputs—the predicted maximum current rise rate, the predicted minimum leading-edge impedance, and the impedance change slope—as input variables and feeds them into a pre-defined fuzzy logic decision-maker. This decision-maker has a built-in membership function and an "IF-THEN" rule base, and outputs discrete risk levels (such as "low risk," "medium risk," or "high risk") through fuzzy reasoning and defuzzification.

[0041] This two-level mechanism, while ensuring real-time performance, incorporates historical trend information, significantly improving the ability to identify potential current spike risks, and is especially suitable for scenarios where load characteristics are slowly degrading or environmental disturbances are accumulating.

[0042] In some embodiments, a preset strategy matrix stores at least three suppression schemes. Based on the risk level, a drive suppression scheme is selected from the preset strategy matrix, including: when the risk level is "low," no adjustment is made to the drive signal; when the risk level is "medium," the drive voltage ramp-up slope at the start of the next pulse is adjusted to K1 times the standard value; when the risk level is "high," the driver is controlled to first issue a pre-charge pulse of fixed duration and fixed amplitude before issuing the complete main pulse, followed by a dead time interval, and then issue the main pulse; wherein K1, fixed duration, and fixed amplitude are adjustable parameters in the strategy matrix associated with the risk level.

[0043] For example, the suppression strategy is implemented by a pre-defined strategy matrix that stores at least three suppression schemes and selects the appropriate action based on the risk level.

[0044] When the risk level is "low," the system makes no adjustments to the drive signal, maintaining the original pulse waveform to ensure that power efficiency and performance are not affected. When the risk level is "medium," the system activates a slope suppression scheme: the drive voltage ramp-up slope at the start of the next pulse is adjusted to K1 times the standard value (K1 is usually between 0 and 1, such as 0.7). This operation reduces the voltage step intensity experienced by the switching devices by slowing down the rate of increase of the drive voltage, thereby suppressing the rate of change of current and achieving a "soft start" effect. For the "high risk" level, the system executes a multi-step pre-charge scheme: a pre-charge pulse with a fixed amplitude (e.g., 3V, when the rated voltage is 15V) and a fixed duration is issued before the main pulse, followed by a dead time period before the complete main pulse is issued. This pre-charge process initially charges the load parasitic capacitance, reduces the voltage difference during the main pulse phase, and effectively suppresses inrush current spikes.

[0045] In the strategy matrix, K1, the fixed duration and amplitude of the pre-charge pulse are all adjustable parameters, which can be calibrated or learned online according to the actual hardware platform and load characteristics. This parameterized design gives the suppression strategy good adaptability and scalability.

[0046] In some embodiments, a drive adjustment command is executed to control the drive waveform of the next pulse, and the adjusted current waveform is acquired after the next pulse ends for performance verification, including: determining the adjusted maximum current rise rate, the adjusted minimum leading-edge impedance, and the adjusted current ramp-up time based on the adjusted current waveform; calculating the first deviation ratio of the adjusted maximum current rise rate, the second deviation ratio of the actual minimum leading-edge impedance, and the third deviation ratio of the actual current ramp-up time, respectively; weighting and summing the first deviation ratio, the second deviation ratio, and the third deviation ratio to obtain a comprehensive suppression evaluation value; comparing the comprehensive suppression evaluation value with a preset performance threshold: if the comprehensive suppression evaluation value is less than the performance threshold, the performance verification is deemed successful; if the comprehensive suppression evaluation value is greater than or equal to the performance threshold, the performance verification is deemed unsuccessful.

[0047] For example, after executing the drive adjustment command, the adjusted current waveform is acquired after the next pulse ends for performance verification. The acquisition process uses the same sampling configuration as the initial feature extraction, synchronously acquiring voltage and current data during the high level of the pulse, and recalculating the adjusted maximum current rise rate, the minimum leading-edge impedance, and the current ramp-up time.

[0048] Three deviation ratios are calculated separately: the first deviation ratio is the relative error of the adjusted maximum current rise rate relative to the predicted value; the second deviation ratio is the relative error of the adjusted lowest leading-edge impedance value relative to the predicted value; and the third deviation ratio is the relative rate of change of the adjusted current rise time relative to the previous unsuppressed pulse. These three deviation ratios are then weighted and summed according to preset weights (e.g., 0.5, 0.3, 0.2) to obtain the comprehensive suppression evaluation value. This value is a dimensionless scalar; the smaller the value, the closer the suppression effect is to the expectation.

[0049] The comprehensive suppression evaluation value is compared with a preset effectiveness threshold: if it is less than the threshold, the effectiveness verification is considered successful; otherwise, it is considered a failure. This determination directly determines whether the suppression strategy parameters need to be optimized, forming a closed-loop feedback mechanism.

[0050] In some embodiments, the parameters of the preset strategy matrix are optimized based on the verification results of the performance verification, including: when the performance verification fails, determining the dominant deviation component that caused the verification failure based on the verification results, wherein the dominant deviation component is the electrical characteristic parameter corresponding to the largest value among the first deviation ratio, the second deviation ratio, and the third deviation ratio; adjusting the adjustable parameters in the preset strategy matrix according to the dominant deviation component to obtain the adjusted parameters; updating the adjusted parameters in the preset strategy matrix and applying them to subsequent pulse suppression of the same risk level.

[0051] For example, when performance verification fails, an optimization process for the strategy matrix parameters is initiated. The values ​​of the first, second, and third deviation ratios are compared, and the electrical characteristic parameter corresponding to the largest deviation is identified as the dominant deviation component. This component indicates the weakest link in the suppression strategy, such as insufficient current rise rate control or impedance estimation bias. Based on the type of dominant deviation component, the adjustable parameters in the strategy matrix corresponding to the risk level are adjusted accordingly. If the dominant component is the maximum current rise rate, the suppression strength is enhanced: for slope suppression schemes, the K1 value is reduced (e.g., from 0.7 to 0.6); for pre-charge schemes, the pre-charge amplitude is increased or its duration is extended. If the dominant component is the lowest leading-edge impedance, it may be necessary to further reduce the drive slope or adjust the pre-charge parameters to match a lower impedance state; if it is the current ramp-up time, the focus is on optimizing pulse setup dynamics, such as fine-tuning the pre-charge timing.

[0052] Parameter adjustments are made in preset steps or proportional steps based on the deviation ratio, ensuring a gradual and controllable process. After adjustment, the new parameters are written to the corresponding position in the strategy matrix in non-volatile memory and applied to subsequent pulse suppression of the same risk level. This adaptive mechanism can continuously adapt to changes in actual operating conditions such as load aging, temperature drift, or component parameter dispersion, maintaining efficient spike suppression capabilities throughout the product's entire lifecycle.

[0053] Furthermore, during the aging and reliability testing of PWM power supplies, the power supply under test needs to output high-frequency, high-amplitude pulse signals for extended periods. If this output energy is directly dissipated in a dummy load or resistor array, it not only wastes energy but also increases the heat dissipation burden. Recovering this energy to energy-efficient load devices (such as energy storage capacitor banks, battery management systems, or auxiliary power supply modules) improves the energy efficiency and carbon reduction of the testing process. However, as the aging process progresses, the on-resistance of the internal switching devices increases, the driving capability decreases, and parasitic parameters drift, causing a slow but continuous change in the output pulse leading-edge characteristics, which in turn affects the current surge characteristics in the recovery loop. If the suppression strategy remains unchanged, two extremes are likely to occur: either over-suppression, reducing energy transfer efficiency; or under-suppression, causing current spikes and threatening the safety of the recovery load.

[0054] The above mechanism, through a closed-loop performance verification, continuously monitors the actual electrical characteristics (such as maximum current rise rate and minimum leading-edge impedance) after each pulse of energy recovery, compares them with predicted values, identifies the dominant deviation component, and adjusts key parameters in the strategy matrix (such as K1 and pre-charge amplitude) accordingly. For example, in the early stages of aging, the power supply output impedance is low, and a weaker pre-charge strategy is adopted; as aging intensifies and output impedance fluctuations increase, if the minimum leading-edge impedance is detected to be continuously declining and a large deviation still exists after suppression, the pre-charge intensity is automatically increased or the drive slope is further smoothed. This closed-loop iteration ensures that the energy recovery process operates within safe boundaries while maximizing energy transfer efficiency.

[0055] More importantly, this mechanism requires no manual intervention or offline calibration, enabling online learning and parameter evolution during continuous aging tests, significantly improving the intelligence level and long-term operational stability of the testing system. For aging platforms requiring hundreds or even thousands of hours of continuous operation, this adaptive capability not only ensures the safety of the recovered load but also avoids test interruptions caused by frequent shutdowns to adjust strategies, thus achieving an optimal balance in terms of safety, energy efficiency, and automation. It is an indispensable intelligent control core for achieving efficient energy recovery.

[0056] In some embodiments, the method further includes: providing an interface circuit between the PWM pulse power supply and the energy-saving load device. For example... Figure 2 As shown, the interface circuit includes: a suppression inductor L1, a freewheeling diode D1, and an input capacitor C1. The first output electrode of the PWM pulse power supply is connected to the first end of the suppression inductor L1 and the cathode of the freewheeling diode D1, respectively. The second end of the suppression inductor L1 is connected to the first end of the input capacitor C1 and the first input terminal of the energy-saving load device, respectively. The second output electrode of the PWM pulse power supply is connected to the second end of the suppression inductor L1, the anode of the freewheeling diode D1, and the second input terminal of the energy-saving load device, respectively.

[0057] For example, in some embodiments, an interface circuit is added between the PWM pulse power supply and the energy-saving load device as a physical defense against current spikes. This circuit consists of a suppression inductor L1, a freewheeling diode D1, and an input capacitor C1, forming a passive topology similar to a buck converter.

[0058] The specific connection relationship is as follows: the first output electrode of the PWM power supply is connected to the first terminal of the suppression inductor L1 and the cathode of the freewheeling diode D1; the second terminal of the suppression inductor L1 is connected to the first terminal of the input capacitor C1 and the first input terminal of the load; the second output electrode of the PWM power supply is connected together with the second terminal of the input capacitor C1, the anode of the freewheeling diode D1 and the second input terminal of the load to form a common reference ground.

[0059] The working principle of this interface circuit is based on the characteristic that inductor current cannot change abruptly. When the PWM output is high, the inductor L1 is suppressed to limit the current rise slope, avoiding surge current to capacitive loads; the freewheeling diode D1 is reverse-biased and cut off during this stage. When the PWM is off, the inductor-induced electromotive force causes the diode to be forward-biased and conduct, providing a freewheeling path for the inductor current and preventing voltage spikes; the input capacitor C1 plays a role in local voltage regulation and high-frequency filtering.

[0060] The process of recovering energy generated by a PWM pulse power supply during testing to an energy-saving load device can lead to two major problems if a proper front-end interface is not available. First, energy-saving loads typically contain large-capacity input capacitors, and the steep voltage jump at the leading edge of the PWM pulse can trigger a large capacitive surge current, which may damage the power switch transistor or trigger protection. Second, when the pulse is turned off, the loop inductance (including wiring parasitic inductance) resonates with the capacitor, which may generate high-voltage oscillations, endangering the electronic equipment on the recovery side.

[0061] The interface circuit of this application limits the rate of change of current by suppressing inductor L1, fundamentally suppressing the peak value of surge current and allowing energy to be injected into the reclaimed load at a controllable rate. The freewheeling diode D1 provides a low-impedance freewheeling path for the inductor's energy storage during pulse turn-off, preventing induced voltage from breaking down the device. The input capacitor C1 locally smooths voltage fluctuations, absorbs high-frequency noise, and provides a stable DC bus for the energy-saving load.

[0062] The interface circuit of this application is suitable for deployment in high-density, multi-channel aging test systems, forming a "hardware-software synergy" with intelligent suppression strategies at the software level (such as in Example 5). The hardware provides basic current limiting and freewheeling capabilities, ensuring that the system still has a basic safety margin even in extreme cases where the strategy fails or parameters are not updated in time. The software strategy then finely adjusts the system based on this safety, further optimizing the energy transfer waveform and improving recovery efficiency. This layered protection architecture enables the entire energy recovery system to possess both robust fault tolerance and efficient dynamic adjustment performance. In long-term, high-intensity aging test environments, this hardware interface is not only a "bridge" for energy recovery but also a "safety valve" that ensures the continuous, safe, and efficient operation of the system, thus constituting an indispensable physical foundation for achieving the technical objectives of this application.

[0063] The technical solution of this application constitutes a suppression scheme in which hardware structure and software algorithm work together. The hardware provides basic passive smoothing, while the algorithm realizes intelligent active adjustment. The combination of the two forms a multi-layered protection system, which significantly improves the robustness and reliability of the system to current spikes.

[0064] Please see Figure 3 , Figure 3 This is a schematic block diagram of a PWM pulse power supply spike control device 200 provided in an embodiment of this application. The PWM pulse power supply spike control device 200 is used to execute the aforementioned PWM pulse power supply spike control method. The PWM pulse power supply spike control device 200 can be configured in a server.

[0065] The server can be a standalone server, a server cluster, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDN), and big data and artificial intelligence platforms.

[0066] like Figure 3 As shown, the spike control device 200 for PWM pulse power supply includes: a parameter collection module 201, a risk prediction module 202, a drive adjustment module 203, a waveform adjustment module 204, and a result verification module 205.

[0067] The parameter collection module 201 is used to synchronously collect a set of electrical characteristic parameters during the high level of each output pulse of the PWM power supply.

[0068] The risk prediction module 202 is used to perform two-level collaborative analysis based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of the current spike generated by the next pulse.

[0069] The drive adjustment module 203 is used to select a drive suppression scheme from a preset strategy matrix according to the risk level, and generate a drive adjustment instruction according to the drive suppression scheme.

[0070] The waveform adjustment module 204 is used to execute drive adjustment commands to control the drive waveform of the next pulse, and to collect the adjusted current waveform after the next pulse ends for performance verification.

[0071] The result verification module 205 is used to determine that peak suppression is successful if the performance verification is successful, and to optimize the parameters of the preset strategy matrix based on the performance verification result if the performance verification fails.

[0072] This application provides an electronic device, which includes a memory and a processor; the memory is used to store a computer program; the processor is used to execute the computer program and, when executing the computer program, implement the spike control method of the PWM pulse power supply as described in any of the embodiments of this application.

[0073] This application provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it causes the processor to implement a PWM pulse power supply spike control method as described in any of the embodiments of this application.

[0074] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A spike control method for a PWM pulse power supply, characterized in that, The method includes: During the high level of each output pulse of the PWM power supply, a set of electrical characteristic parameters are synchronously acquired; A two-level collaborative analysis is performed based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of the current spike generated by the next pulse. Based on the risk level, a drive suppression scheme is selected from a preset strategy matrix, and a drive adjustment instruction is generated based on the drive suppression scheme. The drive adjustment command is executed to control the drive waveform of the next pulse, and the adjusted current waveform is collected after the next pulse ends for performance verification. If the performance verification is successful, peak suppression is determined to be successful; if the performance verification fails, the parameters of the preset strategy matrix are optimized based on the verification result.

2. The spike control method for PWM pulse power supply as described in claim 1, characterized in that, The electrical characteristic parameters include: instantaneous voltage values ​​and instantaneous current values. During the high-level period of each output pulse of the PWM power supply, a set of electrical characteristic parameters is synchronously acquired, including: The change in the instantaneous current value at each sampling interval is calculated to obtain the current differential sequence. The maximum value of the current differential sequence at the pulse leading edge is extracted as the maximum current rise rate. Calculate the ratio of the instantaneous voltage value to the instantaneous current value at the same moment to obtain the dynamic impedance sequence, and extract the minimum value of the dynamic impedance sequence at the leading edge of the pulse as the minimum value of the leading edge impedance. Record the time elapsed from the start of the pulse to the moment when the instantaneous current value first reaches a preset proportion of the steady-state current value within the pulse, as the current ramp-up time; The electrical characteristic parameters are determined based on the maximum current rise rate, the minimum leading-edge impedance, and the current ramp-up time.

3. The spike control method for PWM pulse power supply as described in claim 2, characterized in that, The two-level collaborative analysis includes: a first-level rapid matching and a second-level trend prediction. Based on the electrical characteristic parameters of multiple consecutive pulses, the two-level collaborative analysis predicts the risk level of a current spike in the next pulse, including: Perform the first-level fast matching and compare whether the maximum current rise rate of the pulse and the minimum value of the leading edge impedance both exceed the corresponding threshold in the pre-stored high-risk feature table. If so, it is directly determined to be a high-risk level. If not, then perform the second-level trend prediction, and calculate a weighted moving average for the maximum current rise rate and the minimum leading-edge impedance of the most recent N pulses to predict the corresponding value of the next pulse. The linear regression slope that predicts the minimum value of the leading edge impedance; The risk level is output by combining the predicted maximum current rise rate, the predicted minimum fronting impedance, and the predicted linear regression slope to make a fuzzy logic decision.

4. The spike control method for PWM pulse power supply according to claim 1, characterized in that, The preset strategy matrix stores at least three suppression schemes. The step of selecting a driving suppression scheme from the preset strategy matrix based on the risk level includes: When the risk level is "low", no adjustment is made to the drive signal; When the risk level is "medium", the driving voltage ramp-up slope at the start of the next pulse is adjusted to K1 times the standard value. When the risk level is "high", the control driver first sends a pre-charge pulse of fixed duration and fixed amplitude before sending the complete main pulse, and then sends the main pulse after a dead time interval. Wherein, K1, the fixed duration, and the fixed amplitude are adjustable parameters in the strategy matrix that are associated with the risk level.

5. The spike control method for PWM pulse power supply according to claim 4, characterized in that, The process of executing the drive adjustment command to control the drive waveform of the next pulse, and acquiring the adjusted current waveform after the next pulse ends for performance verification, includes: The adjusted maximum current rise rate, the adjusted minimum leading-edge impedance, and the adjusted current ramp-up time are determined based on the adjusted current waveform. Calculate the first deviation ratio of the adjusted maximum current rise rate, the second deviation ratio of the actual minimum front impedance value, and the third deviation ratio of the actual current ramp-up time, respectively. The first deviation ratio, the second deviation ratio, and the third deviation ratio are weighted and summed to obtain the comprehensive suppression evaluation value. The comprehensive suppression evaluation value is compared with a preset performance threshold: if the comprehensive suppression evaluation value is less than the performance threshold, the performance verification is determined to be successful; if the comprehensive suppression evaluation value is greater than or equal to the performance threshold, the performance verification is determined to be unsuccessful.

6. The spike control method for PWM pulse power supply according to claim 5, characterized in that, The optimization of the parameters of the preset policy matrix based on the performance verification results includes: When the performance verification fails, the dominant deviation component that caused the verification failure is determined based on the verification result. The dominant deviation component is the electrical characteristic parameter corresponding to the largest value among the first deviation ratio, the second deviation ratio, and the third deviation ratio. Based on the dominant deviation component, the adjustable parameters in the preset strategy matrix are adjusted in a targeted manner to obtain the adjusted parameters; The adjusted parameters are updated into the preset strategy matrix and applied to subsequent impulse suppression at the same risk level.

7. The spike control method for a PWM pulse power supply according to claim 1, characterized in that, The method further includes: An interface circuit is provided between the PWM pulse power supply and the energy-saving load device. The interface circuit includes a suppression inductor, a freewheeling diode, and an input capacitor. The first output electrode of the PWM pulse power supply is connected to the first terminal of the suppression inductor and the cathode of the freewheeling diode, respectively. The second terminal of the suppression inductor is connected to the first terminal of the input capacitor and the first input terminal of the energy-saving load device, respectively. The second output electrode of the PWM pulse power supply is connected to the second terminal of the suppression inductor, the anode of the freewheeling diode, and the second input terminal of the energy-saving load device, respectively.

8. A spike control device for a PWM pulse power supply, characterized in that, The spike control device of the PWM pulse power supply is used to execute the spike control method of the PWM pulse power supply as described in any one of claims 1-7, wherein the spike control device of the PWM pulse power supply comprises: The parameter acquisition module is used to synchronously acquire a set of electrical characteristic parameters during the high level of each output pulse of the PWM power supply; The risk prediction module is used to perform a two-level collaborative analysis based on the electrical characteristic parameters of multiple consecutive pulses to predict the risk level of the current spike generated by the next pulse. The drive adjustment module is used to select a drive suppression scheme from a preset strategy matrix according to the risk level, and generate a drive adjustment instruction according to the drive suppression scheme. The waveform adjustment module is used to execute the drive adjustment command to control the drive waveform of the next pulse, and to collect the adjusted current waveform after the next pulse ends for performance verification. The result verification module is used to determine that peak suppression is successful if the performance verification is successful, and to optimize the parameters of the preset strategy matrix based on the verification result if the performance verification fails.

9. An electronic device, characterized in that, The electronic device includes a memory and a processor; The memory is used to store computer programs; The processor is configured to execute the computer program and, in executing the computer program, implement the spike control method for the PWM pulse power supply as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, causes the processor to implement the spike control method for a PWM pulse power supply as described in any one of claims 1 to 7.

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