Encoding and decoding methods and apparatus

Abstract

A coding / decoding method and apparatus are disclosed, relating to the multimedia field. The method includes: dividing an 11B7T sequence into three groups, namely 5B3T, 3B2T, and 3B2T; using a 5-bit data pattern, setting feature combinations in specific regions of the 7 symbols mapped to the 11 bits; using these feature combinations as identifiers to indicate the encoding method; and at the decoding end, mapping the 7 symbols to 11 bits according to the encoding method indicated by the feature combinations of the specific regions. This divides a long sequence into multiple short sequences, performs PAM3 coding / decoding on these short sequences, and combines the feature combinations of the specific regions to indicate the encoding method, reducing the complexity of long-sequence PAM3 coding / decoding, thereby reducing the circuit implementation complexity of long-sequence PAM3 coding / decoding and improving PAM3 coding / decoding performance.

Description

Technical Field

[0001] This application relates to the field of multimedia, and more particularly to an encoding / decoding method and apparatus. Background Technology

[0002] Currently, compared to signals modulated by Pulse Amplitude Modulation (PAM)2 or Non-Return-to-Zero (NRZ), signals modulated by PAM3 can carry more bits of data. PAM3 encoding maps the binary sequence to a ternary sequence, using multiple ternary symbols to represent multiple binary bits, improving encoding efficiency and reducing bandwidth. Different encoding and decoding schemes offer the possibility of different combinations of the number of binary bits and the number of ternary symbols. However, current encoding and decoding schemes have complex circuit implementations and relatively low performance. Summary of the Invention

[0003] This application provides an encoding / decoding method and apparatus, thereby reducing the circuit implementation complexity of the encoding / decoding scheme and improving the performance of encoding / decoding.

[0004] Firstly, an encoding / decoding method is provided. The method includes: acquiring a sequence to be encoded; dividing the 11 bits contained in the sequence into three groups: a first group containing 5 bits, a second group containing 3 bits, and a third group containing 3 bits; encoding the 11 bits into 7 symbols when the 5 bits in the first group are a specific bit combination; mapping the 5 bits in the first group and the 3 bits from either the second or third group to 3 symbols; and mapping the 3 bits from the third group to 2 symbols, thus obtaining a first encoded sequence; and sending the first encoded sequence. The first encoded sequence includes 7 symbols, which include 3 symbols, 2 symbols, and a feature combination of specific bit fields. The specific bit fields are any two bit fields from the 7 symbols. The feature combination is any one of nine symbol combinations, which are obtained by combining ternary data from two bit fields. Symbols are represented using ternary data, and bits are represented using binary data.

[0005] This application provides an 11-bit-7-symbol encoding / decoding (11B7T) binary sequence mapping ternary sequence encoding / decoding technique. It divides a long sequence into multiple short sequences, performs PAM3 encoding / decoding on these short sequences, and combines a feature combination of specific positioning fields to indicate a 5-bit encoding method with a group of 3 bits for encoding. This reduces the complexity of PAM3 encoding / decoding for long sequences, thereby reducing the circuit implementation complexity and improving PAM3 encoding / decoding performance. Since the encoding efficiency of long sequences is generally higher than that of short sequences (e.g., 3B2T, 4B3T, 8B6T), for example, 11B7T has a 99% encoding efficiency. Therefore, by utilizing long sequences for PAM3 encoding / decoding, it achieves the effect of simple PAM3 encoding / decoding circuit implementation while ensuring encoding efficiency.

[0006] For example, Bit[10:0] is divided into Bit[10:6], Bit[5:3], and Bit[2:0]. The 11 bits include 5 bits on Bit[10:6], 3 bits on Bit[5:3], and 3 bits on Bit[2:0]. When the 5 bits on Bit[10:6] are a first specific bit combination, the first specific bit field includes bit field 2 and bit field 3 (T[3:2]) in the bit field of 7 symbols, and the first feature combination is set on the first specific bit field. The 2 symbols mapped by the 3 bits on Bit[2:0] are set in bit field 1 and bit field 0 (T[1:0]) in the bit field of 7 symbols. The 2 symbols mapped by the 3 bits on bit field Bit[5:3] are set in bit field 5 and bit field 4 (T[5:4]) in the bit field of 7 symbols. The five bits mapped on bit field Bit[10:6] are set in bit field 6(T[6]) of the seven-symbol bit field.

[0007] In one possible implementation, the method further includes: if the first group of 5 bits is a non-specific bit combination, encoding 11 bits into 7 symbols, mapping the first group of 5 bits into 3 symbols, the second group of 3 bits into 2 symbols, and the third group of 3 bits into 2 symbols, to obtain a second encoded sequence, and sending the second encoded sequence. The second encoded sequence includes 7 symbols, which include the 3 symbols mapped from the first group of 5 bits, the 2 symbols mapped from the second group of 3 bits, and the 2 symbols mapped from the third group of 3 bits.

[0008] For example, when the 5 bits in B[10:6] are a non-specific bit combination, the 3 symbols mapped to the 5 bits in bit field Bit[10:6] are set in bit fields 6 to 4 of the 7-symbol bit field (T[6:4]). The 2 symbols mapped to the 3 bits in bit field Bit[5:3] are set in bit fields 3 and 2 of the 7-symbol bit field (T[3:2]). The 2 symbols mapped to the 3 bits in bit field Bit[2:0] are set in bit fields 1 and 0 of the 7-symbol bit field (T[1:0]).

[0009] By dividing a long sequence into multiple short sequences and performing PAM3 encoding and decoding on each short sequence separately, the complexity of PAM3 encoding and decoding for long sequences is reduced, thereby reducing the circuit implementation complexity of PAM3 encoding and decoding for long sequences and improving PAM3 encoding and decoding performance.

[0010] In another possible implementation, the specific bit combination includes a first specific bit combination and a second specific bit combination; when the first group of 5 bits is the first specific bit combination, the feature combination is the first feature combination; when the first group of 5 bits is the second specific bit combination, the feature combination is the second feature combination; wherein the first feature combination and the second feature combination are the same or different, and the first specific positioning domain of the first feature combination and the second specific positioning domain of the second feature combination are different.

[0011] By setting feature combinations in different specific domains, the diversity of encoding methods can be improved.

[0012] In another possible implementation, the 5 bits of the first group and the 3 bits of either the second or third group are mapped to 3 symbols, including: the 5 bits of the first group are mapped to 1 of the 3 symbols; and the 3 bits of either group are mapped to 2 of the 3 symbols.

[0013] In another possible implementation, the 5 bits of the first group are mapped to 1 of the 3 symbols, including: 2 bits of the 5 bits of the first group are mapped to 1 of the 3 symbols.

[0014] In another possible implementation, the 5 bits of the first group are mapped to 1 of the 3 symbols, including: 1 bit of the 5 bits of the first group is mapped to 1 of the 3 symbols.

[0015] In another possible implementation, the first feature combination and the second feature combination may be the same or different; the three bits of any group are mapped to two of the three symbols, including: if the five bits of the first group are a first specific bit combination or a second specific bit combination, the three bits of the second group are mapped to two of the three symbols; or, if the five bits of the first group are a first specific bit combination or a second specific bit combination, the three bits of the third group are mapped to two of the three symbols; or, if the five bits of the first group are a first specific bit combination, the three bits of the second group are mapped to two of the three symbols; if the five bits of the first group are a second specific bit combination, the three bits of the third group are mapped to two of the three symbols.

[0016] In another possible implementation, if the first feature combination and the second feature combination are different, the first feature field includes the first feature combination or one of the eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs, and the first feature combination is associated with three bits of the second group; and / or, the second feature field includes the second feature combination or one of the eight symbol combinations other than the second feature combination among the nine symbol combinations to which the second feature combination belongs, and the second feature combination is associated with three bits of the third group.

[0017] This allows the decoding end to accurately decode the received sequence based on the encoding method indicated by the feature combination of specific positioning fields.

[0018] In another possible implementation, the binary data combinations on 3 bit fields yield 8 bit combinations, and the ternary data combinations on 2 bit fields yield 9 symbol combinations. The 8 bit combinations are mapped one-to-one to 8 of the 9 symbol combinations. The other symbol combination among the 9 symbol combinations is used as a feature combination. The mapping of 3 bits to 2 symbols includes: when 3 bits are one of the 8 bit combinations, the 3 bits are mapped to one of the 8 symbol combinations corresponding to the 8 bit combinations.

[0019] By utilizing the combination of spare symbols, the encoded sequence can carry more data, thereby improving encoding efficiency and performance.

[0020] In another possible implementation, the feature combination is 00, 11, or 22.

[0021] In another possible implementation, the binary data combinations on the 5 bit fields yield 32 bit combinations, and the ternary data combinations on the 3 bit fields yield 27 symbol combinations. Among the 32 bit combinations, 26 bit combinations are mapped one-to-one with the 26 symbol combinations among the 27 symbol combinations. The 5 bits are mapped to 3 symbols, including: when the 5 bits are one of the 26 bit combinations, the 5 bits are mapped to one of the 26 symbol combinations corresponding to the 26 bit combinations.

[0022] In another possible implementation, the combination other than the 26 combinations of symbols out of the 27 combinations is 000, 111, or 222; or, the combination other than the 26 combinations of symbols out of the 27 combinations is {-1, -1, -1}, {0, 0, 0}, or {+1, +1, +1}.

[0023] Reducing the occurrence of consecutive identical numbers in the encoded sequence reduces circuit drift and stabilizes circuit operation.

[0024] In another possible implementation, the non-specific bit combinations include 26 bit combinations, and the specific bit combinations include 6 bit combinations other than the 26 bit combinations out of the 32 bit combinations.

[0025] In another possible implementation, the binary data combinations on the 5 bit fields yield 32 bit combinations, and the ternary data combinations on the 3 bit fields yield 27 symbol combinations. Among the 32 bit combinations, the 27 bit combinations are mapped one-to-one with the 27 symbol combinations. The mapping of 5 bits to 3 symbols includes: when the 5 bits are one of the 27 bit combinations, the 5 bits are mapped to one of the 27 symbol combinations corresponding to the 27 bit combinations.

[0026] In another possible implementation, the non-specific bit combinations include 27 bit combinations, and the specific bit combinations include 5 bit combinations other than the 27 bit combinations out of the 32 bit combinations.

[0027] In another possible implementation, the 5 bits of the first group, the 3 bits of the second group, and the 3 bits of the third group are bits in any bit field of the 11-bit space. In the 11-bit space, the bit fields of the 5 bits of the first group, the 3 bits of the second group, and the 3 bits of the third group are different.

[0028] In another possible implementation, the 11-bit field corresponds to any bit field of the 7 symbols.

[0029] This application does not limit the grouping method of the 11 bits and the bit field correspondence of the binary sequence to the ternary sequence, thereby improving the flexibility of circuit design.

[0030] Secondly, a decoding method is provided, comprising: receiving a sequence to be decoded, the sequence comprising 7 symbols, the 7 symbols including 3 symbols and 2 symbols; in the case where the 7 symbols also include feature combinations of specific bit fields, decoding the 7 symbols into 11 bits according to the feature combinations of the specific bit fields, mapping 3 of the 7 symbols to 5 bits and a group of 3 bits, and mapping 2 of the 7 symbols to another group of 3 bits, to obtain a first decoded sequence. The first decoded sequence comprises 11 bits. The 11 bits include 5 bits, a group of 3 bits, and another group of 3 bits. Symbols are represented using ternary data, and bits are represented using binary data. The 5 bits are specific bit combinations. The specific bit fields are any 2 bit fields in the bit fields of the 7 symbols, and the feature combinations are any combination of 9 symbol combinations, the 9 symbol combinations being obtained by combining ternary data from 2 bit fields.

[0031] In one possible implementation, the method further includes: when the seven symbols do not include feature combinations of specific positioning domains, decoding the seven symbols into 11 bits, mapping the three symbols of the first group of seven symbols to five bits of the first group, mapping the two symbols of the second group of seven symbols to three bits of the second group, and mapping the two symbols of the third group of seven symbols to three bits of the third group, thus obtaining a second decoded sequence. The second decoded sequence includes 11 bits. The 11 bits include the five bits of the first group, the three bits of the second group, and the three bits of the third group. The five bits are non-specific bit combinations.

[0032] In another possible implementation, the feature combination includes one of a first feature combination or a second feature combination, the first feature combination and the second feature combination may be the same or different, and the first feature domain of the first feature combination and the second feature domain of the second feature combination are different.

[0033] In another possible implementation, three of the seven symbols are mapped to five bits and a set of three bits, including: when the first specific domain includes a first feature combination, one of the three symbols is mapped to five bits, and the five bits are the first specific bit combination; two of the three symbols are mapped to a set of three bits.

[0034] In another possible implementation, the first feature combination and the second feature combination are different; three of the seven symbols are mapped to five bits and a group of three bits, including: when the first specific positioning domain contains the first feature combination and the second specific positioning domain does not contain the second feature combination, one of the three symbols is mapped to five bits, and the five bits are the first specific bit combination; two of the three symbols are mapped to a group of three bits.

[0035] In another possible implementation, three of the seven symbols are mapped to five bits and a set of three bits, including: when the second specific bit field includes a second feature combination, one of the three symbols is mapped to five bits, and the five bits are the second specific bit combination; two of the three symbols are mapped to a set of three bits.

[0036] In another possible implementation, the 11 bits include 3 bits from a second group and 3 bits from a third group, where the first feature combination and the second feature combination may be the same or different; 2 of the 3 symbols are mapped to a group of 3 bits, including: when the 5 bits are a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the second group of 11 bits; or, when the 5 bits are a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the third group of 11 bits; or, when the 5 bits are a first specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the second group of 11 bits; and when the 5 bits are a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the third group of 11 bits.

[0037] In another possible implementation, ternary data combinations on 2 bit fields yield 9 symbol combinations, binary data combinations on 3 bit fields yield 8 bit combinations, 8 of the 9 symbol combinations are mapped one-to-one to 8 bit combinations, and the other symbol combination among the 9 symbol combinations is used as a feature combination; 2 of the 7 symbols are mapped to 3 bits, including: when 2 symbols are one of the 8 symbol combinations, 2 symbols are mapped to one of the 8 bit combinations corresponding to the 8 symbol combinations.

[0038] In another possible implementation, ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. 26 of the 27 symbol combinations are mapped one-to-one with 26 of the 32 bit combinations. The mapping of 3 symbols to 5 bits includes: when the 3 symbols are one of the 26 symbol combinations, the 3 symbols are mapped to one of the 26 bit combinations corresponding to the 26 symbol combinations.

[0039] In another possible implementation, ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. The 27 symbol combinations are mapped one-to-one with the 27 bit combinations among the 32 bit combinations. The mapping of 3 symbols to 5 bits includes: when the 3 symbols are one of the 27 symbol combinations, the 3 symbols are mapped to one of the 27 bit combinations corresponding to the 27 symbol combinations.

[0040] Thirdly, a coding / decoding apparatus is provided, the apparatus comprising modules for performing the methods of the first aspect or any possible design of the first aspect. For example, the coding / decoding apparatus includes a communication module and an encoding module.

[0041] The communication module acquires the sequence to be encoded, which contains 11 bits. The encoding module divides the 11 bits into three groups: a first group containing 5 bits, a second group containing 3 bits, and a third group containing 3 bits. If the 5 bits in the first group form a specific bit combination, the 11 bits are encoded into 7 symbols. The 5 bits in the first group, along with the 3 bits from either the second or third group, are mapped to 3 symbols. The 3 bits from the third group are mapped to 2 symbols, resulting in the first encoded sequence. The first encoded sequence includes 7 symbols, which include combinations of 3 symbols, 2 symbols, and specific bit fields. The specific bit fields are any two bit fields from the 7 symbols. The specific combination is any one of nine symbol combinations, obtained by combining ternary data from two bit fields. Symbols are represented using ternary data, and bits are represented using binary data. The communication module also transmits the first encoded sequence.

[0042] In one possible implementation, the encoding module is further configured to encode 11 bits into 7 symbols when the first group of 5 bits is a non-specific bit combination; the first group of 5 bits is mapped to 3 symbols, the second group of 3 bits is mapped to 2 symbols, and the third group of 3 bits is mapped to 2 symbols, resulting in a second encoded sequence. The second encoded sequence includes 7 symbols, comprising the 3 symbols obtained from mapping the first group of 5 bits, the 2 symbols obtained from mapping the second group of 3 bits, and the 2 symbols obtained from mapping the third group of 3 bits. The communication module is further configured to transmit the second encoded sequence.

[0043] In another possible implementation, the specific bit combination includes a first specific bit combination and a second specific bit combination; when the first group of 5 bits is the first specific bit combination, the feature combination is the first feature combination; when the first group of 5 bits is the second specific bit combination, the feature combination is the second feature combination; wherein the first feature combination and the second feature combination are the same or different, and the first specific positioning domain of the first feature combination and the second specific positioning domain of the second feature combination are different.

[0044] In another possible implementation, the 5 bits of the first group and the 3 bits of any group are mapped to 3 symbols, including: the 5 bits of the first group are mapped to 1 of the 3 symbols; and the 3 bits of any group are mapped to 2 of the 3 symbols.

[0045] In another possible implementation, the 5 bits of the first group are mapped to 1 of the 3 symbols, including: 2 bits of the 5 bits of the first group are mapped to 1 of the 3 symbols.

[0046] In another possible implementation, the 5 bits of the first group are mapped to 1 of the 3 symbols, including: 1 bit of the 5 bits of the first group is mapped to 1 of the 3 symbols.

[0047] In another possible implementation, the first feature combination and the second feature combination may be the same or different; the three bits of any group are mapped to two of the three symbols, including: if the five bits of the first group are a first specific bit combination or a second specific bit combination, the three bits of the second group are mapped to two of the three symbols; or, if the five bits of the first group are a first specific bit combination or a second specific bit combination, the three bits of the third group are mapped to two of the three symbols; or, if the five bits of the first group are a first specific bit combination, the three bits of the second group are mapped to two of the three symbols; if the five bits of the first group are a second specific bit combination, the three bits of the third group are mapped to two of the three symbols.

[0048] In another possible implementation, if the first feature combination and the second feature combination are different, the first feature field includes the first feature combination or one of the eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs, and the first feature combination is associated with three bits of the second group; and / or, the second feature field includes the second feature combination or one of the eight symbol combinations other than the second feature combination among the nine symbol combinations to which the second feature combination belongs, and the second feature combination is associated with three bits of the third group.

[0049] In another possible implementation, the binary data combinations on 3 bit fields yield 8 bit combinations, and the ternary data combinations on 2 bit fields yield 9 symbol combinations. The 8 bit combinations are mapped one-to-one to 8 of the 9 symbol combinations. The other symbol combination among the 9 symbol combinations is used as a feature combination. The mapping of 3 bits to 2 symbols includes: when 3 bits are one of the 8 bit combinations, the 3 bits are mapped to one of the 8 symbol combinations corresponding to the 8 bit combinations.

[0050] In another possible implementation, the feature combination is 00, 11, or 22.

[0051] In another possible implementation, the binary data combinations on the 5 bit fields yield 32 bit combinations, and the ternary data combinations on the 3 bit fields yield 27 symbol combinations. Among the 32 bit combinations, 26 bit combinations are mapped one-to-one with the 26 symbol combinations among the 27 symbol combinations. The 5 bits are mapped to 3 symbols, including: when the 5 bits are one of the 26 bit combinations, the 5 bits are mapped to one of the 26 symbol combinations corresponding to the 26 bit combinations.

[0052] In another possible implementation, the combination other than the 26 combinations of symbols out of the 27 combinations is 000, 111, or 222; or, the combination other than the 26 combinations of symbols out of the 27 combinations is {-1, -1, -1}, {0, 0, 0}, or {+1, +1, +1}.

[0053] In another possible implementation, the non-specific bit combinations include 26 bit combinations, and the specific bit combinations include 6 bit combinations other than the 26 bit combinations out of the 32 bit combinations.

[0054] In another possible implementation, the binary data combinations on the 5 bit fields yield 32 bit combinations, and the ternary data combinations on the 3 bit fields yield 27 symbol combinations. Among the 32 bit combinations, the 27 bit combinations are mapped one-to-one with the 27 symbol combinations. The mapping of 5 bits to 3 symbols includes: when the 5 bits are one of the 27 bit combinations, the 5 bits are mapped to one of the 27 symbol combinations corresponding to the 27 bit combinations.

[0055] In another possible implementation, the non-specific bit combinations include 27 bit combinations, and the specific bit combinations include 5 bit combinations other than the 27 bit combinations out of the 32 bit combinations.

[0056] In another possible implementation, the 5 bits of the first group, the 3 bits of the second group, and the 3 bits of the third group are bits in any bit field of the 11-bit space. In the 11-bit space, the bit fields of the 5 bits of the first group, the 3 bits of the second group, and the 3 bits of the third group are different.

[0057] In another possible implementation, the 11-bit field corresponds to any bit field of the 7 symbols.

[0058] Fourthly, a coding / decoding apparatus is provided, the apparatus comprising modules for performing the methods of the second aspect or any possible design of the second aspect. For example, the coding / decoding apparatus includes a communication module and a decoding module.

[0059] The communication module receives a sequence to be decoded, which includes 7 symbols, comprising 3-bit and 2-bit symbols. The decoding module, given that the 7 symbols include feature combinations of specific bit fields, decodes the 7 symbols into 11 bits based on these feature combinations. Three of the 7 symbols are mapped to a first group of 5 bits and a second group of 3 bits, while the remaining two symbols are mapped to a third group of 3 bits, resulting in a first decoded sequence of 11 bits. These 11 bits include a first group of 5 bits, a second group of 3 bits, and a third group of 3 bits. Symbols are represented using ternary data, and bits are represented using binary data. The 5 bits represent a specific bit combination. The specific bit field is any two bit fields from the 7 symbols, and the feature combination is any one of nine possible symbol combinations, obtained by combining ternary data from two bit fields.

[0060] In one possible implementation, the method further includes: when the 7 symbols do not include feature combinations of specific positioning domains, the 7 symbols are decoded into 11 bits; the 3 symbols of the first group of 7 symbols are mapped to 5 bits of the first group; the 2 symbols of the second group of 7 symbols are mapped to 3 bits of the second group; and the 2 symbols of the third group of 7 symbols are mapped to 3 bits of the third group, resulting in a second decoded sequence. The second decoded sequence includes 11 bits. The 11 bits include 5 bits of the first group, 3 bits of the second group, and 3 bits of the third group. The 5 bits are non-specific bit combinations.

[0061] In another possible implementation, the feature combination includes one of a first feature combination or a second feature combination, the first feature combination and the second feature combination may be the same or different, and the first feature domain of the first feature combination and the second feature domain of the second feature combination are different.

[0062] In another possible implementation, three of the seven symbols are mapped to five bits and a set of three bits, including: when the first specific domain includes a first feature combination, one of the three symbols is mapped to five bits, and the five bits are the first specific bit combination; two of the three symbols are mapped to a set of three bits.

[0063] In another possible implementation, the first feature combination and the second feature combination are different; three of the seven symbols are mapped to five bits and a group of three bits, including: when the first specific positioning domain contains the first feature combination and the second specific positioning domain does not contain the second feature combination, one of the three symbols is mapped to five bits, and the five bits are the first specific bit combination; two of the three symbols are mapped to a group of three bits.

[0064] In another possible implementation, three of the seven symbols are mapped to five bits and a set of three bits, including: when the second specific bit field includes a second feature combination, one of the three symbols is mapped to five bits, and the five bits are the second specific bit combination; two of the three symbols are mapped to a set of three bits.

[0065] In another possible implementation, the 11 bits include 3 bits from a second group and 3 bits from a third group, where the first feature combination and the second feature combination may be the same or different; 2 of the 3 symbols are mapped to a group of 3 bits, including: when the 5 bits are a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the second group of 11 bits; or, when the 5 bits are a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the third group of 11 bits; or, when the 5 bits are a first specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the second group of 11 bits; and when the 5 bits are a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the third group of 11 bits.

[0066] In another possible implementation, ternary data combinations on 2 bit fields yield 9 symbol combinations, binary data combinations on 3 bit fields yield 8 bit combinations, 8 of the 9 symbol combinations are mapped one-to-one to 8 bit combinations, and the other symbol combination among the 9 symbol combinations is used as a feature combination; 2 of the 7 symbols are mapped to 3 bits, including: when 2 symbols are one of the 8 symbol combinations, 2 symbols are mapped to one of the 8 bit combinations corresponding to the 8 symbol combinations.

[0067] In another possible implementation, ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. 26 of the 27 symbol combinations are mapped one-to-one with 26 of the 32 bit combinations. The mapping of 3 symbols to 5 bits includes: when the 3 symbols are one of the 26 symbol combinations, the 3 symbols are mapped to one of the 26 bit combinations corresponding to the 26 symbol combinations.

[0068] In another possible implementation, ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. The 27 symbol combinations are mapped one-to-one with the 27 bit combinations among the 32 bit combinations. The mapping of 3 symbols to 5 bits includes: when the 3 symbols are one of the 27 symbol combinations, the 3 symbols are mapped to one of the 27 bit combinations corresponding to the 27 symbol combinations.

[0069] Fifthly, an encoder is provided, the encoder comprising at least one processor and a memory, wherein the memory is used to store a computer program such that when the computer program is executed by at least one processor, it implements the method described in the first aspect or any possible design of the first aspect.

[0070] A sixth aspect provides a decoder comprising at least one processor and a memory, wherein the memory is used to store a computer program such that when the computer program is executed by at least one processor, it implements the method described in the second aspect or any possible design of the second aspect.

[0071] In a seventh aspect, a coding and decoding system is provided, the coding and decoding system comprising an encoder as described in the fifth aspect and a decoder as described in the sixth aspect.

[0072] Eighthly, a chip is provided, comprising: a processor and a power supply circuit; wherein the power supply circuit is used to supply power to the processor; the processor is used to perform operational steps of the method in the first aspect or any possible implementation of the first aspect, and to perform operational steps of the method in the second aspect or any possible implementation of the second aspect.

[0073] Ninth aspect, a computer program product is provided, the computer program product including a computer program or instructions, which, when the computer program product is run on a processor, causes the processor to perform the operation steps of the method in the first aspect or any possible implementation of the first aspect, or to perform the operation steps of the method in the second aspect or any possible implementation of the second aspect.

[0074] A tenth aspect provides a computer-readable storage medium comprising: computer software instructions; which, when executed in a computing device, cause the computing device to perform operational steps of the method in the first aspect or any possible implementation thereof, or to perform operational steps of the method in the second aspect or any possible implementation thereof.

[0075] The computer-readable storage medium includes an encoded or decoded sequence obtained when executing the method described in the first aspect or any possible design of the first aspect.

[0076] Eleventhly, a sequence is provided, the sequence being an encoded sequence obtained by the first aspect or any possible implementation of the first aspect, or the sequence being a decoded sequence obtained by the second aspect or any possible implementation of the second aspect.

[0077] In a twelfth aspect, a method for storing a sequence is provided, the method comprising: receiving an encoded sequence generated according to the first aspect or any possible implementation thereof; and storing the encoded sequence in a storage medium.

[0078] In a thirteenth aspect, an apparatus for storing sequences is provided, the apparatus being used to store an encoded sequence generated according to the first aspect or any possible implementation thereof, or the apparatus being used to store a decoded sequence generated according to the second aspect or any possible implementation thereof. Exemplarily, the apparatus may be a computer-readable storage medium.

[0079] In a fourteenth aspect, a method for transmitting an encoded sequence is provided, the method comprising: acquiring the encoded sequence, the encoded sequence being generated by the first aspect or any possible implementation thereof; and sending the encoded sequence.

[0080] In a fifteenth aspect, there is provided an apparatus for transmitting an encoded sequence, the apparatus being used to acquire and transmit an encoded sequence generated by the first aspect or any possible implementation thereof.

[0081] The technical effects of any of the implementation methods in aspects three through fifteen can be found in the technical effects of the corresponding implementation methods in aspects one or two, and will not be repeated here.

[0082] Among these, any possible implementation methods of any one of the above aspects can be combined, provided that the solutions do not contradict each other. Attached Figure Description

[0083] Figure 1 A schematic diagram of an OSI reference model provided in this application;

[0084] Figure 2 A schematic diagram of the level states of a PAM3 provided in this application;

[0085] Figure 3 This application provides a schematic diagram of a GPMI interface link;

[0086] Figure 4 A schematic diagram of the structure of a data transmission system provided in this application;

[0087] Figure 5 A schematic diagram of the structure of an encoding / decoding system provided in this application;

[0088] Figure 6 A flowchart illustrating an encoding / decoding method provided in this application;

[0089] Figure 7 A schematic diagram of a 5B3T mapping relationship provided for this application;

[0090] Figure 8 A schematic diagram of another 5B3T mapping relationship provided for this application;

[0091] Figure 9 A schematic diagram of a 3B2T mapping relationship provided for this application;

[0092] Figure 10 This application provides an example diagram illustrating an encoding / decoding process.

[0093] Figure 11 A schematic diagram illustrating another 3B2T mapping relationship provided for this application;

[0094] Figure 12 A schematic diagram of six signal levels for a PAM6 provided in this application;

[0095] Figure 13 A schematic diagram of the structure of an encoding / decoding device provided in this application;

[0096] Figure 14 A schematic diagram of an encoder provided in this application;

[0097] Figure 15 This is a schematic diagram of the structure of a decoder provided in this application. Detailed Implementation

[0098] The following is a brief introduction to some concepts that may be involved in this application.

[0099] Open Systems Interconnection (OSI) is a network architecture framework proposed by an international standards organization, also known as the OSI reference model. OSI aims to provide a universal, standardized communication environment that enables different computer systems to communicate and exchange information. Figure 1 As shown, the OSI reference model defines a seven-layer framework for network interconnection, including the Physical Layer, Data Link Layer, Network Layer, Transport Layer, Session Layer, Presentation Layer, and Application Layer.

[0100] The physical layer is located at the bottom of the OSI reference model. It deals with the transmission characteristics of the physical transmission medium, such as voltage, physical data rate, maximum transmission distance, physical connectors, and other similar characteristics. Transmission media include optical fiber, twisted pair, and radio waves. Its main functions include providing physical connections to the data link layer using the transmission medium and defining the electrical, mechanical, functional, and procedural characteristics of the data bit stream.

[0101] For different interface types or application scenarios, the seven-layer functionality defined by the OSI reference model can be selected.

[0102] This application provides a General Purpose Multimedia Interface (GPMI) for data transmission. The GPMI interface is suitable for transmitting high-speed signals from audio / video devices and third-party protocol devices (such as Universal Serial Bus (USB) devices). Devices using the GPMI interface are called GPMI devices. A system consisting of multiple GPMI devices connected together is called a GPMI system. In some embodiments, multiple GPMI devices are directly connected to each other, or they are directly connected through other devices (such as routers). The capabilities provided by the GPMI interface include meeting the bidirectional audio / video transmission needs of devices such as televisions, personal computers (PCs), and mobile phones, and supporting audio / video content transmission protection and lossless compression; interaction between GPMI devices and third-party protocol devices (such as Universal Serial Bus (USB), Ethernet, and Peripheral Component Interconnect Express (PCIe)); and meeting the bidirectional power supply needs of electronic devices with a power consumption not exceeding 480W.

[0103] The GPMI 1.0 standard supports a transmission rate of 20Gbps per channel and uses non-return-to-zero (NRZ) coding to modulate the signal.

[0104] NRZ, also known as PAM2, is a binary encoding method that uses two different voltage levels to represent binary data. Binary is a widely used number system in computing technology, specifically a base-2 number system. Binary uses 0 and 1 to represent data. The carry rule is "carry one when reaching two," and the borrow rule is "borrow one as two." In binary, each digit is called a bit, and the bit is the smallest unit of data in a computer. Binary is widely used in computer science, digital circuits, and communications.

[0105] In NRZ encoding, a high level represents binary data "1", and a low level represents binary data "0".

[0106] The GPMI 1.1 / 2.0 standard supports higher transmission rates, such as 40Gbps / lane and above. It also reuses USB standard cables and cables already widely used in the industry at the physical layer. When supporting transmission rates above 40Gbps, these cables use PAM3 encoding to modulate the signal to meet the required transmission distance and bit error rate of the interface.

[0107] PAM3 is a ternary encoding method that uses three different voltage levels to represent ternary data. Ternary is a base-3 number system. Ternary generally has two representations: one uses 0, 1, 2 to represent ternary data, and the other uses -1, 0, +1 to represent numerical values; this latter representation is also called symmetrical ternary or balanced ternary. The carry rule is "carry one when reaching three," and the borrow rule is "borrow one and return three." For example, ... Figure 2 As shown, PAM3 uses three levels to represent the ternary data to be transmitted. For example, 0 / 1 / 2 is used to represent a certain level state of a PAM3 symbol (Trit), or -1 / 0 / +1 is used to represent a certain level state of a symbol.

[0108] This application does not limit the equivalence relationship between the two ternary representations. For example, ternary data 0, 1, 2 are equivalent to ternary data 0, +1, -1. Similarly, ternary data 0, 1, 2 are equivalent to ternary data -1, 0, +1.

[0109] For ease of description, the following text will use ternary data including 0, 1, and 2 as an example.

[0110] Figure 3This application provides a schematic diagram of a GPMI interface link. The transmitting end includes a Reed-Solomon Forward Error Correction (RS FEC) coding unit, a PAM3 modulation unit, and a transmitting unit. The RS FEC coding unit is used to perform error correction coding on the signal. The PAM3 modulation unit is used to perform PAM3 modulation on the signal output by the RS FEC coding unit. The transmitting unit is used to transmit the signal output by the PAM3 modulation unit. The receiving end includes a receiving unit, a PAM3 demodulation unit, and an RS FEC decoding unit. The PAM3 demodulation unit is used to perform PAM3 demodulation on the signal received by the receiving unit. The RS FEC decoding unit is used to perform RS FEC decoding on the signal output by the PAM3 demodulation unit. Alternatively, the system may not include an RS FEC coding unit and an RS FEC decoding unit. RS FEC is an error correction coding technology widely used in data transmission and storage.

[0111] Compared to NRZ, which uses two voltage levels to represent binary data, PAM3 uses more voltage levels to represent ternary data, thus enabling the transmission of more information per symbol period. For example, the amount of information each symbol can carry is obtained from logarithmic operations, i.e., log2. 3 ≈1.585 bits. That is, the number of bits represented by one symbol is log(3) / log(2)≈1.58 bits. PAM3 is more suitable for application scenarios with high bandwidth efficiency requirements.

[0112] If one symbol corresponds to one bit for PAM3 modulation, only one bit can be transmitted, wasting the symbol state and corresponding transmission bandwidth, and failing to fully utilize the advantages of PAM3 multi-level transmission. Therefore, a binary sequence is generally mapped to a ternary sequence, meaning multiple symbols are combined to represent a data pattern of multiple bits. The ternary sequence must have more or more symbol combinations than the binary sequence to be transmitted, maximizing the efficiency of PAM3 encoding. The mapping relationship between the two sequences indicates the PAM3 encoding / decoding method. Table 1 shows the #B#T combinations for PAM3 encoding / decoding.

[0113] Table 1

[0114] Mapping relationship Bit (#of Binary Symbol) Symbol (# of Ternary Symbol) Capacity Efficiency 3B2T 3 2 3.169925 94.6395％ 4B3T 4 3 4.754888 84.1240％ 6B4T 6 4 6.339850 94.6395％ 7B5T 7 5 7.924813 88.3302％ 8B6T 8 6 9.509775 84.1240％ 11B7T 11 7 11.09474 99.1461％ 12B8T 12 8 12.6797 94.6395％ 14B9T 14 9 14.26466 98.1446％ 15B10T 15 10 15.849625 94.6395％ 17B11T 17 11 17.43459 97.5073％ 19B12T 19 12 19.01955 99.8972％

[0115] Table 1 provides different PAM3 encoding / decoding schemes, i.e., the mapping relationships between different binary sequences and ternary sequences. It can be seen that the more bits a binary sequence contains, the more symbols the resulting ternary sequence contains. Different mapping relationships between binary and ternary sequences achieve PAM3 encoding / decoding schemes with different efficiencies. Compared to the 3-bit-2-symbol encoding / decoding (3B2T) scheme, the 11-bit-7-symbol encoding / decoding (11B7T) scheme achieves a higher efficiency of 99.1461%. Different encoding / decoding schemes strike a balance between efficiency (effective bandwidth) and Hamming distance (code pattern fault tolerance). For example, the 11B7T encoding / decoding scheme is comparable to that based on a Galois field of 2... 11 When used in conjunction with RS FEC error correction codes, it offers a comprehensive advantage in terms of performance in terms of latency, area power consumption, and bit error rate.

[0116] 11B7T means mapping 11 bits to 7 symbols. 3B2T means mapping 3 bits to 2 symbols.

[0117] Binary-Ternary encoding and decoding schemes include lookup table (LUT), number system conversion, and encoding.

[0118] The lookup table method refers to determining the ternary sequence corresponding to a binary sequence by looking up a table. When the number of bits in the binary sequence and the number of symbols in the ternary sequence are large, the table capacity is large and the lookup efficiency is low. For example, 11B7T requires 2048 entries, making encoding and decoding complex and resulting in significant latency.

[0119] Number system conversion refers to deriving the formulas for converting bits / symbols in each bit field from binary to decimal to ternary. However, binary (0 / 1) to ternary (0 / 1 / 2) addition and subtraction is complex to implement and involves consecutive 0s or 1s equal to the code length.

[0120] Encoding methods refer to analyzing the patterns and combinations of bit data patterns and symbol data patterns, but finding the code pattern is very difficult.

[0121] In practical applications, the PAM3 encoding and decoding scheme requires different specific designs to meet the requirements of simple implementation, low latency, and low bandwidth in the encoding and decoding circuit.

[0122] To address the issues of complex circuit implementation and low performance in encoding / decoding schemes, this application provides an encoding / decoding method involving the mapping of 11B7T binary sequences to ternary sequences, applied to PAM3 modulation and transmission at the physical layer interface. The method includes, at the encoding end, dividing 11B7T into three groups: 5B3T, 3B2T, and 3B2T. Using a 5-bit data pattern, feature combinations are set in specific regions of the 7 symbols mapped to the 11 bits, and these feature combinations serve as identifiers indicating the encoding method. At the decoding end, the 7 symbols are mapped to 11 bits according to the encoding method indicated by the feature combinations of the specific regions. Specifically, 11 bits are encoded into 7 symbols. The 11 bits are divided into a first group of 5 bits, a second group of 3 bits, and a third group of 3 bits. When the data pattern of the first group of 5 bits is a specific bit combination, the first group of 5 bits and the 3 bits of either the second or third group are mapped to 3 symbols, and the other group of 3 bits is mapped to 2 symbols. The 7 symbols include 3 symbols, 2 symbols, and feature combinations of specific positioning fields. When the data pattern of the first group of 5 bits is a non-specific bit combination, the first group of 5 bits is mapped to 3 symbols, the second group of 3 bits is mapped to 2 symbols, and the 7 symbols include the 3 symbols mapped from the first group of 5 bits, the 2 symbols mapped from the second group of 3 bits, and the 2 symbols mapped from the third group of 3 bits. When decoding 7 symbols into 11 bits, if the 7 symbols include feature combinations located in a specific location domain, the 7 symbols are mapped to 11 bits according to the feature combinations in the specific location domain. Three of the 7 symbols are mapped to 5 bits and a group of 3 bits, two of the 7 symbols are mapped to another group of 3 bits, and the 5-bit data pattern is a specific bit combination. The 11 bits include 5 bits, a group of 3 bits, and another group of 3 bits. If the 7 symbols do not include feature combinations located in a specific location domain, the 3 symbols in the first group of 7 symbols are mapped to the 5 bits in the first group, the 2 symbols in the second group of 7 symbols are mapped to the 3 bits in the second group, and the 2 symbols in the third group of 7 symbols are mapped to the 3 bits in the third group. The 5-bit data pattern is a non-specific bit combination, and the 11 bits include the 5 bits in the first group, the 3 bits in the second group, and the 3 bits in the third group.

[0123] Compared to lookup table methods and number system conversion methods, the encoding / decoding method provided in this application divides a long sequence into multiple short sequences, performs PAM3 encoding / decoding on these short sequences, and combines feature combinations of specific positioning fields to indicate the encoding method. This reduces the complexity of PAM3 encoding / decoding for long sequences, thereby reducing the circuit implementation complexity and improving PAM3 encoding / decoding performance. Since the encoding efficiency of long sequences is generally higher than that of short sequences (e.g., 3B2T, 4B3T, 8B6T), for example, 11B7T has a encoding efficiency of 99%. Therefore, by utilizing long sequences for PAM3 encoding / decoding, while ensuring encoding efficiency, a simpler circuit implementation for PAM3 encoding / decoding is achieved.

[0124] The implementation of the encoding / decoding method provided in this application will now be described in detail with reference to the accompanying drawings.

[0125] The encoding / decoding method provided in this application is one of the physical layer technologies of the OSI reference model. This method is applied to GPMI and integrated into consumer electronics products such as PCs, laptops, TVs, set-top boxes, and mobile phones to enable communication and information transmission between multiple devices. This method is also suitable for interconnection interfaces of various communication devices, such as Ethernet interfaces, Dynamic Random Access Memory (DRAM) interfaces, Chiplet interfaces, audio / video multimedia interfaces, and PCIe / USB.

[0126] Figure 4 This is a schematic diagram of a data transmission system provided in this application. The data transmission system includes multiple devices 210 and a router 220. The multiple devices 210 are connected to the router 220 via wired or wireless means. For example, all multiple devices 210 are connected to the router 220 via cables. Any two of the multiple devices 210 transmit signals, such as audio / video data or charging signals, through the router 220.

[0127] In one example, multiple devices 210 include a display 211, a set-top box 212, and an audio player (e.g., an MP3 player (Moving Picture Experts Group Audio Layer-3)) 213. The set-top box 212 transmits audio and video data to the display 211 via a router 220, and also transmits audio data to the audio player 213 via the router 220, etc.

[0128] Optionally, the multiple devices 210 may also include two interconnected devices. For example, the multiple devices 210 may also include a game controller 214, which is connected to the display 211 and transmits control information to the display 211.

[0129] Optionally, each of the multiple devices 210 includes an interface, and the router 220 includes multiple interfaces. The interface of each of the multiple devices 210 is connected to one of the multiple interfaces of the router 220. For example, the multiple interfaces of the router 220 include a first interface to a fourth interface. The interface of the monitor 211 is connected to the first interface of the router 220 via a cable, the interface of the set-top box 212 is connected to the second interface of the router 220 via a cable, the interface of the game controller 214 is connected to the third interface of the router 220 via a cable, and the interface of the audio player 213 is connected to the fourth interface of the router 220 via a cable.

[0130] The devices in the aforementioned system with data transmission capabilities are called communication devices. These communication devices are deployed on land, including indoors or outdoors, handheld or vehicle-mounted. They are also deployed on water (such as ships) and in the air (such as airplanes, balloons, and satellites), and are used in different scenarios. For example, the communication device includes, but is not limited to: mobile phone, tablet computer, laptop computer, PDA, mobile internet device (MID), camera, wearable device (e.g., smartwatch, smart bracelet, pedometer, etc.), audio equipment, audio and video player, set-top box, game console, printer, mouse, keyboard, in-vehicle equipment (e.g., equipment on vehicles such as cars, bicycles, electric vehicles, airplanes, ships, trains, and high-speed trains), virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, smart home device (e.g., refrigerator, television, air conditioner, electricity meter, etc.), smart robot, workshop equipment, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, or smart home. Wireless terminals and flying equipment (e.g., intelligent robots, hot air balloons, drones, airplanes) in the home. Optionally, the signals transmitted between the above-mentioned communication devices include, but are not limited to: audio and video signals, radio frequency signals, IoT data, and charging signals.

[0131] In this application, the interface specifications used for signal transmission between devices in the data transmission system include, but are not limited to: Universal Serial Bus (USB) interface specification, High Definition Multimedia Interface (HDMI) specification, DisplayPort (DP) specification, GPMI interface specification, and Peripheral Component Interconnect Express (PCI-Express) interface specification. Correspondingly, the interfaces are HDMI and Type-C interfaces, etc.

[0132] For example, in the above examples, the interface connection between the set-top box and the TV, or between the game console and the monitor, is via a USB cable, following the USB interface standard; or the connection is via an HDMI cable, following the HDMI interface standard.

[0133] It is understood that the interface specifications used for signal transmission between the above-mentioned devices are merely exemplary. In practical applications, these interface specifications may include other or any future interface specifications, such as GPMI as defined in the GPMI 1.1 / 2.0 standard. This application embodiment does not impose any specific limitations on these.

[0134] Figure 5 This is a schematic diagram of an encoding / decoding system provided in this application. The encoding / decoding system 500 includes a source device 510 and a destination device 520. The source device 510 encodes the sequence to be encoded to obtain an encoded sequence and transmits the encoded sequence to the destination device 520. The destination device 520 decodes the sequence to be decoded to obtain a decoded sequence. The sequence to be encoded is a binary sequence, and the encoded sequence is a ternary sequence. The sequence to be decoded is a ternary sequence, and the decoded sequence is a binary sequence.

[0135] Specifically, the source device 510 includes an image acquisition unit 511, a preprocessor 512, an encoder 513, and a communication interface 514.

[0136] Image acquisition device 511 is used to acquire raw images. Image acquisition device 511 includes or is any category of image capture device for, for example, capturing real-world images, and / or any category of image or commentary (for screen content encoding, some text on the screen is also considered as an image to be encoded or part of an image) generation device, such as a computer graphics processor for generating computer-animated images, or any category of device for acquiring and / or providing real-world images, computer-animated images (e.g., screen content, virtual reality (VR) images), and / or any combination thereof (e.g., augmented reality (AR) images). Image acquisition device 511 can be a camera for capturing images or a memory for storing images. Image acquisition device 511 may also include any category of (internal or external) interface for storing previously captured or generated images and / or acquiring or receiving images. When image acquisition device 511 is a camera, image acquisition device 511 may be, for example, a local or integrated camera integrated into a source device; when image acquisition device 511 is a memory, image acquisition device 511 may be a local or integrated memory integrated into a source device. When the image acquisition device 511 includes an interface, the interface is, for example, an external interface for receiving images from an external video source. The external video source is, for example, an external image capture device, such as a camera, external storage, or an external image generation device. The external image generation device is, for example, an external computer graphics processor, computer, or server. The interface is any type of interface according to any proprietary or standardized interface protocol, such as a wired or wireless interface, or an optical interface.

[0137] An image is viewed as a two-dimensional array or matrix of pixels (picture elements). Pixels in the array are also called sample points. The number of sample points in the array or image along the horizontal and vertical directions (or axes) defines the image's size and / or resolution. To represent color, three color components are typically used; that is, an image can be represented as or contain three sample arrays. For example, in RBG format or color space, an image includes corresponding red, green, and blue sample arrays. However, in video coding, each pixel is typically represented in a luma / chroma format or color space. For example, for a YUV format image, this includes a luma component indicated by Y (sometimes also indicated by L) and two chroma components indicated by U and V. The luma component Y represents the brightness or grayscale level intensity (e.g., both are the same in a grayscale image), while the two chroma components U and V represent chroma or color information components. Accordingly, a YUV format image includes a luma sample array of luma sample values ​​(Y) and two chroma sample arrays of chroma values ​​(U and V). The conversion or transformation of an RGB format image to YUV format, and vice versa, is also known as color transformation or conversion. If the image is black and white, it includes a luminance sampling array. In this application, the image transmitted from the image acquisition unit 511 to the encoder 513 is also referred to as raw image data.

[0138] The preprocessor 512 receives data acquired by the image acquisition unit 511 and preprocesses the data to obtain a preprocessed image. For example, the preprocessing performed by the preprocessor 512 includes retouching, color format conversion (e.g., from RGB format to YUV format), color adjustment, or noise reduction.

[0139] Optionally, the preprocessor 512 is also used to convert the preprocessed image into a binary sequence.

[0140] Encoder 513 receives preprocessed data generated by preprocessor 512 and encodes the preprocessed data to obtain a bitstream. For example, if the preprocessed data is a binary sequence, encoding the preprocessed data means mapping the binary sequence to a ternary sequence, and the bitstream is a ternary sequence. For example, mapping 11 bits in the binary sequence to 7 symbols. Encoder 513 includes a decision unit 5131 and an encoding unit 5132. Decision unit 5131 divides the 11 bits into three groups: a first group of 5 bits, a second group of 3 bits, and a third group of 3 bits. If the data pattern of the first group of 5 bits is a specific bit combination, it instructs encoding unit 5132 to use a first encoding method; if the data pattern of the first group of 5 bits is a non-specific bit combination, it instructs encoding unit 5132 to use a second encoding method.

[0141] The first encoding method refers to the encoding method that combines the 5 bits of the first group with the 3 bits of any other group. The 5 bits of the first group and the 3 bits of any other group in the second and third groups are mapped to 3 symbols, and the 3 bits of the other group are mapped to 2 symbols. The 7 symbols include 3 symbols, 2 symbols, and feature combinations located in specific bit fields. The specific bit fields are any 2 bit fields in the bit fields of the 7 symbols, and the feature combinations are any combination of 9 symbol combinations. The 9 symbol combinations are obtained by combining ternary data on 2 bit fields.

[0142] The second encoding method refers to encoding the first group of 5 bits, the second group of 3 bits, and the third group of 3 bits separately. The first group of 5 bits is mapped to 3 symbols, the second group of 3 bits is mapped to 2 symbols, and the third group of 3 bits is mapped to 2 symbols. The 7 symbols include the 3 symbols mapped from the first group of 5 bits, the 2 symbols mapped from the second group of 3 bits, and the 2 symbols mapped from the third group of 3 bits.

[0143] The communication interface 514 is used to receive the code stream generated by the encoder 513 and send the code stream to the destination device 520 through the communication channel 530 so that the destination device 520 can decode the code stream to obtain the decoded data.

[0144] The target device 520 includes a display 521, a post-processor 522, a decoder 523, and a communication interface 524.

[0145] Communication interface 524 is used to receive the bit stream sent by communication interface 514 and transmit the bit stream to decoder 523 so that decoder 523 can decode the bit stream to obtain decoded data.

[0146] Communication interfaces 514 and 524 can be used to send or receive video-related data through a direct communication link between the source device 510 and the destination device 520, such as a direct wired or wireless connection, or through any type of network, such as a wired network, a wireless network or any combination thereof, any type of private network and public network or any combination thereof.

[0147] Both communication interface 514 and communication interface 524 can be configured as follows: Figure 5 The arrow pointing from the source device 510 to the corresponding communication channel 530 of the destination device 520 indicates a one-way communication interface or a two-way communication interface, and can be used to send and receive messages, etc., to establish a connection, acknowledge and exchange any other information related to the communication link and / or data transmission such as encoded bit stream transmission, etc.

[0148] Decoder 523 is used to decode the bitstream to obtain decoded data. For example, the decoded data is a ternary sequence. Decoding the decoded data means mapping the ternary sequence to a binary sequence, and the bitstream is a ternary sequence. That is, mapping the 7 symbols contained in the ternary sequence to 11 bits. For example, decoder 523 includes decision unit 5231 and decoding unit 5232. For example, decision unit 5231 is used to decode the sequence according to the feature combination of the specific location domain when the 7 symbols include feature combinations of the specific location domain, and instruct decoding unit 5232 to adopt a first decoding method; when the 7 symbols do not include feature combinations located in the specific location domain, it instructs decoding unit 5232 to adopt a second decoding method.

[0149] The first decoding method refers to mapping 3 out of 7 symbols to 5 bits and a group of 3 bits, mapping 2 out of 7 symbols to another group of 3 bits, and the 5-bit data pattern being a specific bit combination. The 11 bits include 5 bits, a group of 3 bits, and another group of 3 bits.

[0150] The second decoding method refers to mapping 3 out of 7 symbols to 5 bits, mapping a group of 2 symbols out of 7 symbols to a group of 3 bits, mapping another group of 2 symbols out of 7 symbols to another group of 3 bits, and the 5-bit data pattern is a non-specific bit combination. The 11 bits include 5 bits, a group of 3 bits, and another group of 3 bits.

[0151] Optionally, decoder 523 is also used to reconstruct the video using the decoded data.

[0152] The post-processor 522 is used to receive the reconstructed video or image generated by the decoder 523 and perform post-processing on the reconstructed video or image. For example, the post-processing performed by the post-processor 522 includes color format conversion (e.g., from YUV format to RGB format), color correction, retouching or resampling, or any other processing.

[0153] Display 521 is used to display the reconstructed video or image. Display 521 can be or can include any class of display devices for presenting the reconstructed image, such as integrated or external displays or monitors. For example, the display can include a liquid crystal display (LCD), an organic light-emitting diode (OLED) display, a plasma display, a projector, a micro-LED display, liquid crystal on silicon (LCoS), a digital light processor (DLP), or any other class of display.

[0154] Both encoder 513 and decoder 523 can be implemented as any of a variety of suitable circuits, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combination thereof. If the technology is implemented in part in software, the device can store software instructions in a suitable non-transitory computer-readable storage medium, and one or more processors can be used to execute the instructions in hardware to perform the technology of this disclosure. Any of the foregoing (including hardware, software, combinations of hardware and software, etc.) can be considered as one or more processors.

[0155] The image acquisition unit 511 and the encoder 513 can be integrated into a single physical device or located on different physical devices; this is not limited. For example, such as... Figure 5 The source device 510 shown includes an image acquisition unit 511 and an encoder 513, indicating that the image acquisition unit 511 and the encoder 513 are integrated into a single physical device. Therefore, the source device 510 can also be referred to as an acquisition device. The source device 510 can be, for example, a mobile phone, tablet computer, computer, laptop computer, camera, wearable device, in-vehicle device, terminal device, virtual reality (VR) device, augmented reality (AR) device, mixed reality (MR) device, extended reality (XR) device, or other image acquisition device. If the source device 510 does not include the image acquisition unit 511, it means that the image acquisition unit 511 and the encoder 513 are two different physical devices, and the source device 510 can acquire raw images from other devices (such as image acquisition devices or image storage devices).

[0156] In this application, the decision unit 5131 and the encoder 513 can be integrated into one physical device or set on different physical devices, without limitation. If the encoder 513 does not include the decision unit 5131, it means that the decision unit 5131 and the encoder 513 are two different physical devices.

[0157] Furthermore, the display 521 and the decoder 523 can be integrated into a single physical device or located on different physical devices; there is no limitation on this. For example, such as... Figure 5The destination device 520 shown includes a display 521 and a decoder 523, indicating that the display 521 and decoder 523 are integrated into a single physical device. Therefore, the destination device 520 can also be called a playback device. The destination device 520 has the functions of decrypting, decoding, and displaying the reconstructed video or image. The destination device 520 can be, for example, a monitor, television, digital media player, video game console, in-vehicle computer, or other image display device. If the destination device 520 does not include a display 521, it means that the display 521 and decoder 523 are two different physical devices. After decoding and reconstructing the video or image from the bitstream, the destination device 520 transmits the reconstructed video or image to other display devices (such as a television or digital media player) for display.

[0158] also, Figure 5 The source device 510 and destination device 520 can be integrated on a single physical device or located on different physical devices; there is no limitation on this. This application also does not limit the number of devices included in the encoding / decoding system. The encoding / decoding system includes multiple source devices and multiple destination devices.

[0159] In these embodiments, the source device 510 or its corresponding functions and the destination device 520 or its corresponding functions can be implemented using the same hardware and / or software or by separate hardware and / or software or any combination thereof. As described, Figure 5 The presence and division of different units or functions in the source device 510 and / or destination device 520 shown may vary depending on the actual device and application, which is obvious to those skilled in the art.

[0160] The structure of the above-described encoding / decoding system is only illustrative. In some possible implementations, the encoding / decoding system may also include other devices, such as end-side devices or cloud-side devices. After the source device 510 acquires the original image, it preprocesses the original image to obtain a preprocessed image; and then transmits the preprocessed image to the end-side device or cloud-side device, which performs encoding / decoding on the preprocessed image.

[0161] Next, the encoding and decoding process will be explained with reference to the accompanying diagrams. Figure 6 This is a flowchart illustrating an encoding / decoding method provided in this application. Figure 5 The encoding and decoding process performed by the source device 510 and the destination device 520 will be used as an example for illustration. Figure 6 As shown in (a) above, the encoding process includes the following steps.

[0162] Step 610: Obtain the sequence to be encoded, which contains 11 bits.

[0163] The sequence to be encoded refers to a binary sequence, that is, a sequence containing multiple bits. In this application, an example is given where the sequence to be encoded contains 11 bits. This application does not limit the method of obtaining the sequence to be encoded.

[0164] In some embodiments, the source device obtains the binary sequence from its memory or other memory. Optionally, if the binary sequence contains a large number of bits, the binary sequence is divided into multiple sequences to be encoded in units of 11 bits, and PAM3 encoding is performed on each of the multiple sequences to be encoded, that is, the binary sequence is mapped to a ternary sequence.

[0165] In other embodiments, the source device performs real-time format conversion on the acquired data to obtain a binary sequence. For example, if the source device 510 carries an image acquisition device 511, the source device 510 acquires video through the image acquisition device 511 and converts the video into a binary sequence. Optionally, the source device 510 may also receive video acquired by other devices; or obtain video from its own memory or other storage. The video includes at least one of real-time acquired real-world video, video stored in the device, and video synthesized from multiple videos. This embodiment does not limit the method of video acquisition or the type of video.

[0166] Step 620: Divide the 11 bits into three groups: the first group contains 5 bits, the second group contains 3 bits, and the third group contains 3 bits.

[0167] This application does not limit the grouping method of the 11 bits. That is, it does not limit the bit fields of the first group of 5 bits, the second group of 3 bits, and the third group of 3 bits in the 11 bits.

[0168] The first group of 5 bits, the second group of 3 bits, and the third group of 3 bits are bits in any of the 11-bit bit fields. Within the 11-bit bit fields, the 5-bit bit fields of the first group, the 3-bit bit fields of the second group, and the 3-bit bit fields of the third group are different. Alternatively, the 5-bit bit fields of the first group, the 3-bit bit fields of the second group, and the 3-bit bit fields of the third group do not overlap.

[0169] For example, starting from the most significant bit of the 11 bits, divide the 11 bits into three groups, each containing consecutive bits of the bit field. Assume Bit[10:0] represents an 11-bit bit field, and divide Bit[10:0] into Bit[10:6], Bit[5:3], and Bit[2:0]. Bit[10:6] represents 5 consecutive bits in the 11-bit bit field. Bit[5:3] represents 3 consecutive bits in the 11-bit bit field. Bit[2:0] represents 3 consecutive bits in the 11-bit bit field. The first group of 5 bits contains the 5 bits in the bit field Bit[10:6]. The second group of 3 bits contains the 3 bits in the bit field Bit[5:3]. The third group of 3 bits contains the 3 bits in the bit field Bit[2:0].

[0170] For example, starting from the least significant bit of the 11 bits, divide the 11 bits into three groups, each group containing consecutive bits of the bit field. Divide Bit[10:0] into Bit[4:0], Bit[7:5], and Bit[10:8]. Bit[4:0] represents 5 consecutive bits in the 11-bit bit field. Bit[7:5] represents 3 consecutive bits in the 11-bit bit field. Bit[10:8] represents 3 consecutive bits in the 11-bit bit field. The first group of 5 bits contains the 5 bits in the bit field Bit[4:0]. The second group of 3 bits contains the 3 bits in the bit field Bit[7:5]. The third group of 3 bits contains the 3 bits in the bit field Bit[10:8].

[0171] The above example illustrates the grouping of 11 bits using consecutive bit fields. In some embodiments, the 11 bits are also grouped using non-consecutive bit fields.

[0172] For example, group 11 bits using cross-bit fields. Starting from the least significant bit, divide the 11 bits into three groups using the first, second, and third bits of each group. Divide Bit[10:0] into Bit[10,9,6,3,0], Bit[7,4,1], and Bit[8,5,2]. Bit[10,9,6,3,0] represents 5 discrete bit fields within the 11-bit field. Bit[7,4,1] represents 3 discrete bit fields within the 11-bit field. Bit[8,5,2] represents 3 discrete bit fields within the 11-bit field. The first group of 5 bits contains the 5 bits in bit field Bit[10,9,6,3,0]. The second group of 3 bits contains the 3 bits in bit field Bit[7,4,1]. The third group of 3 bits contains the 3 bits in bit field Bit[8,5,2].

[0173] For example, 11 bits can be grouped into equally spaced bit fields. Starting from the least significant bit of the 11 bits, Bit[8,6,4,2,0] is selected from the 11 bit fields after a one-bit-field interval. Then, Bit[9,5,1] is selected from the remaining bit field Bit[10,9,7,5,3,1] after another one-bit-field interval, leaving Bit[10,7,3]. Bit[10:0] is divided into Bit[8,6,4,2,0], Bit[9,5,1], and Bit[10,7,3]. Bit[8,6,4,2,0] represents 5 discrete bit fields in the 11-bit field. Bit[9,5,1] represents 3 discrete bit fields in the 11-bit field. Bit[10,7,3] represents 3 discrete bit fields in the 11-bit field. The first group of 5 bits contains the 5 bits in bit field Bit[8,6,4,2,0]. The second group of 3 bits consists of 3 bits in the bit field [9,5,1]. The third group of 3 bits consists of 3 bits in the bit field [10,7,3].

[0174] Next, it is determined whether the 5 bits in the first group constitute a specific bit combination, that is, whether the data pattern of the 5 bits in the first group constitutes a specific bit combination. A data pattern refers to the arrangement of binary data across multiple bit fields. If the data pattern of the 5 bits in the first group is a specific bit combination, the first encoding method is used to perform PAM3 encoding on the 5 bits in the first group, the 3 bits in the second group, and the 3 bits in the third group, encoding 11 bits into 7 symbols, resulting in the first encoded sequence, which includes 7 symbols. Step 630 is then executed. If the data pattern of the 5 bits in the first group is not a specific bit combination, the second encoding method is used to perform PAM3 encoding on the 5 bits in the first group, the 3 bits in the second group, and the 3 bits in the third group, encoding 11 bits into 7 symbols, resulting in the second encoded sequence, which also includes 7 symbols. Step 640 is then executed. Symbols are represented using ternary data. Bits are represented using binary data.

[0175] Step 630: If the first group of 5 bits is a specific bit combination, send the first encoded sequence.

[0176] Step 640: If the first group of 5 bits is a non-specific bit combination, send the second encoded sequence.

[0177] In binary, the binary data of a bit field is either 0 or 1; that is, a bit in a bit field is either 0 or 1. By setting the value of each of the five bit fields, the binary data combinations in the five bit fields result in 32 possible bit combinations. For example, ... Figure 7 and Figure 8As shown, the first column of bit combinations represents 32 possible bit combinations obtained by combining binary data from 5 bit fields. By setting the value of each bit field in the remaining 3 bit fields, 8 possible bit combinations are obtained by combining binary data from these 3 bit fields. For example... Figure 9 As shown, the bit combinations in the first column represent eight possible bit combinations obtained by combining binary data in three bit fields.

[0178] In ternary numbering, the ternary data of a bit field is 0, 1, or 2; that is, the sign of a bit field is 0, 1, or 2. By setting the value of each of the three bit fields, the ternary data combinations of the three bit fields result in 27 possible sign combinations. For example, ... Figure 7 As shown, the symbol combinations in the second and third columns represent 27 symbol combinations obtained by combining ternary data on 3 bit fields. For example... Figure 8 As shown, the third column represents 27 possible symbol combinations from ternary data across 3 bit fields. By setting the value for each bit in 2 bit fields, 9 possible symbol combinations from ternary data across 2 bit fields are obtained. For example... Figure 9 As shown, the symbol combinations in the second column represent 9 symbol combinations obtained by combining ternary data on 2 bit fields.

[0179] When a one-to-one mapping relationship is established between 32 bit combinations and 27 symbol combinations, since there are at most 27 symbol combinations for ternary data combinations on the 3 bit fields, there are bit combinations among the 32 bit combinations that do not have a mapping relationship with the 27 symbol combinations.

[0180] One-to-one mapping refers to a combination of bits mapping to a combination of symbols. Different combinations of bits map to different combinations of symbols.

[0181] Non-specific bit combinations include bit combinations that have a mapping relationship with 26 or 27 symbol combinations out of 32 bit combinations.

[0182] Specific bit combinations include bit combinations that do not have a mapping relationship with 26 or 27 symbol combinations out of 32 bit combinations.

[0183] This application does not limit the specific mapping relationship between the 32 bit combinations and the 27 symbol combinations. That is, it does not limit which bit combination among the 32 bit combinations has a mapping relationship with which symbol combination among the 27 symbol combinations.

[0184] However, the regular mapping relationship between bit combinations and symbol combinations makes the circuit simple to implement and has advantages such as low latency.

[0185] In some embodiments, 27 of the 32 bit combinations are mapped one-to-one with 27 symbol combinations. That is, one bit combination among the 27 bit combinations has a mapping relationship with one symbol combination among the 27 symbol combinations. Non-specific bit combinations include the 27 bit combinations. Specific bit combinations include the 5 bit combinations other than the 27 bit combinations among the 32 bit combinations.

[0186] For example, such as Figure 7 As shown, based on the sequential increase of the binary data in the 5 bit fields, 27 out of the 32 bit combinations are mapped one-to-one with 27 symbol combinations. The 27 bit combinations from 00000 to 10111 are mapped one-to-one with the 27 symbol combinations from 000 to 2^12, and 11101 is mapped to 022, 11110 to 122, and 11111 to 222. Non-specific bit combinations include 00000 to 10111, 11101, 11110, and 11111. Specific bit combinations include 11000 to 11100.

[0187] In other embodiments, 26 of the 32 bit combinations are mapped one-to-one with the 26 symbol combinations of the 27 symbol combinations. That is, one bit combination from the 26 bit combinations has a mapping relationship with one symbol combination from the 26 symbol combinations. Non-specific bit combinations include the 26 bit combinations. Specific bit combinations include the 6 bit combinations other than the 26 bit combinations from the 32 bit combinations.

[0188] Optionally, combinations other than the 26 possible symbol combinations out of the 27 are combinations of consecutive identical symbols. For example, combinations other than the 26 possible symbol combinations out of the 27 are 000, 111, or 222; or, combinations other than the 26 possible symbol combinations out of the 27 are -1-1-1, 000, or +1+1+1. This reduces the run length of the circuit, reduces the occurrence of consecutive identical digits in the encoded sequence, reduces circuit drift, and makes the circuit more stable.

[0189] For example, such as Figure 8 As shown, based on the sequential increase of the binary data in the 5 bit fields, 26 of the 32 bit combinations are mapped one-to-one with 26 symbol combinations. The 26 bit combinations from 00000 to 10111 are mapped one-to-one with the 26 symbol combinations from 000 to 212, and 11011 is mapped to 220, 11111 to 221. Non-specific bit combinations include 00000 to 10111, 11011, and 11111. Specific bit combinations include 11000 to 11010 and 11100 to 11110.

[0190] Eight bit combinations of binary data in three bit fields are mapped one-to-one with eight symbol combinations of nine ternary data in two bit fields. That is, one bit combination from the eight bit combinations has a mapping relationship with one symbol combination from the eight symbol combinations. This application does not limit the specific mapping relationship between the eight bit combinations and the nine symbol combinations. In other words, it does not limit which bit combination from the eight bit combinations has a mapping relationship with which symbol combination from the nine symbol combinations.

[0191] The feature combination is one of the nine symbol combinations, excluding the eight. This application does not limit the feature combination; it can be any one of the nine symbol combinations. Optionally, the feature combination can be a combination of consecutive identical symbols from the nine symbol combinations. For example, the feature combination includes one or more of 00, 11, or 22.

[0192] For example, such as Figure 9 As shown in (a), a constellation diagram maps 3 bits to 2 symbols. The white dots represent the other symbol combination among the 9 possible combinations, i.e., the feature combination. For example... Figure 9 As shown in (b), a mapping table maps 3 bits to 2 symbols. Based on the sequential order of the binary data in the 3 bit fields, 8 bit combinations of the binary data in the 3 bit fields are mapped one-to-one to 8 symbol combinations out of 9 symbol combinations of the 2 bit fields. The 8 bit combinations, 000 to 111, are mapped one-to-one to the 8 symbol combinations out of 9, 22 to 01.

[0193] In some embodiments, specific bit combinations are divided into multiple groups, and combined with the bit field arrangement of the feature combinations, multiple encoding methods are provided. The feature combination of the specific bit field serves as an identifier, enabling a correspondence between the feature combination of the specific bit field and the specific bit combination, indicating the encoding method.

[0194] For example, a specific bit combination is divided into two groups, and by combining the features of the two specific bit fields, two different encoding methods are provided.

[0195] Understandably, the 32 bit combinations are divided into three groups. The first group includes non-specific bit combinations, while the second and third groups form specific bit combinations. For example, the second group includes the first specific bit combination, and the third group includes the second specific bit combination. Alternatively, the second group may include the second specific bit combination, and the third group may include the first specific bit combination.

[0196] This application does not limit the grouping method of the 32 bit combinations, as long as the number of bit combinations in each group meets the agreed requirements, without relying on the data pattern of the binary sequence. For example, the first group may contain a maximum of 27 bit combinations, and each of the second and third groups may contain a maximum of 3 bit combinations, so that the total number of bit combinations in the three groups of 32 bit combinations is equal to 32.

[0197] Therefore, this application provides a flexible 5B3T grouping method, which simplifies circuit design and implementation by encoding and decoding the data pattern based on the grouping.

[0198] For example, the 32 possible bit combinations can be divided into three groups: the first group contains 27 bit combinations, the second group contains 2 bit combinations, and the third group contains 3 bit combinations. That is, there are 27 non-specific bit combinations and 5 specific bit combinations. Specific bit combinations are further divided into the second and third groups. For example, ... Figure 7 As shown, specific bit combinations from 11000 to 11100 are divided into two groups: the second group includes 11000 and 11001, and the third group includes 11010, 11011, and 11100. Optionally, the second group may contain three bit combinations, and the third group may contain two bit combinations. For example, the second group may include 11010, 11011, and 11100, and the third group may include 11000 and 11001.

[0199] For example, the 32 possible bit combinations can be divided into three groups: the first group contains 26 bit combinations, the second group contains 3 bit combinations, and the third group contains 3 bit combinations. That is, there are 26 non-specific bit combinations and 6 specific bit combinations. Specific bit combinations are further divided into the second and third groups. For example, ... Figure 8 As shown, specific bit combinations including 11000 to 11010 and 11000 to 11010 are divided into two groups. The second group includes 11100, 11101 and 11110, and the third group includes 11000, 11001 and 11010; or, the second group includes 11000, 11001 and 11010, and the third group includes 11100, 11101 and 11110.

[0200] Optionally, the above-mentioned information such as non-specific bit combinations, specific bit combinations, feature combinations, 5B3T grouping method, 5B3T mapping relationship, 3B2T mapping relationship, and 11-bit grouping method can be pre-configured so that the above information can be used when mapping 11 bits into 7 symbols according to the encoding and decoding method provided in this application.

[0201] The first encoding method refers to encoding by combining 5 bits with any group of 3 bits. Encoding 11 bits into 7 symbols includes mapping 5 bits and 3 bits from either the second or third group to 3 symbols, and mapping another group of 3 bits to 2 symbols. The 7 symbols include 3 symbols, 2 symbols, and a feature combination of specific bit fields. The specific bit fields are any two bit fields from the 7 symbols. The feature combination is any one of 9 symbol combinations, obtained by combining ternary data from 2 bit fields.

[0202] Mapping 5 bits and any group of 3 bits to 3 symbols includes mapping 5 bits to 1 of the 3 symbols, and mapping any group of 3 bits to 2 of the 3 symbols.

[0203] Understandably, 5 bits constitute a specific bit combination, which maps to one of three symbols. Since the symbol for one bit field is 0, 1, or 2, the specific bit combination maps to 0, 1, or 2. In this application, when the number of specific bit combinations exceeds three symbols, the specific bit combinations are divided into two groups, as described above regarding the grouping of 5 bits. Specific bit combinations include a first specific bit combination and a second specific bit combination. The first specific bit combination maps to 0, 1, or 2. The second specific bit combination maps to 0, 1, or 2.

[0204] In some embodiments, when the 5-bit data pattern of the first group is a first specific bit combination, the feature combination is the first feature combination, and the first feature combination is set in the first specific positioning field. When the 5-bit data pattern of the first group is a second specific bit combination, the feature combination is the second feature combination, and the second feature combination is set in the second specific positioning field. The first specific positioning field of the first feature combination and the second specific positioning field of the second feature combination are different.

[0205] Optionally, the first feature combination of the first specific bit field indicates the encoding method of combining the first specific bit combination of the first specific bit field with any group of 3 bits. The second feature combination of the second specific bit field indicates the encoding method of combining the second specific bit combination of the second specific bit field with any group of 3 bits.

[0206] Optionally, the first feature combination of the first specific bit field corresponds to any group of 3 bits encoded in combination with the first specific bit combination. The second feature combination of the second specific bit field corresponds to any group of 3 bits encoded in combination with the second specific bit combination.

[0207] Optionally, the first feature combination of the first specific positioning field indicates a first specific bit combination encoded in combination with any group of 3 bits. The second feature combination of the second specific positioning field indicates a second specific bit combination encoded in combination with any group of 3 bits.

[0208] Optionally, the first feature combination of the first specific bit field indicates the bit field of the three symbols obtained by encoding the first specific bit combination of the first specific bit field with any group of three bits. The second feature combination of the second specific bit field indicates the bit field of the three symbols obtained by encoding the second specific bit combination of the second specific bit field with any group of three bits.

[0209] In some embodiments, the first feature combination is another symbol combination other than the eight symbol combinations among the nine symbol combinations of three bits in any group. The second feature combination is another symbol combination other than the eight symbol combinations among the nine symbol combinations of three bits in another group.

[0210] For example, the first characteristic combination is the other symbol combination besides the eight symbol combinations among the nine symbol combinations of three bits in the second group. The second characteristic combination is the other symbol combination besides the eight symbol combinations among the nine symbol combinations of three bits in the third group.

[0211] For example, the first characteristic combination is the other symbol combination besides the eight symbol combinations among the nine symbol combinations of the three bits in the third group. The second characteristic combination is the other symbol combination besides the eight symbol combinations among the nine symbol combinations of the three bits in the second group.

[0212] Optionally, the first feature combination and the second feature combination can be the same. For example, the first feature combination and the second feature combination can both be any one of 00, 11, or 22.

[0213] Optionally, the first feature combination and the second feature combination can be different. For example, the first feature combination is 00, and the second feature combination is 11. Another example is the first feature combination being 11 and the second feature combination being 00. Yet another example is the first feature combination being 00 and the second feature combination being 22. Yet another example is the first feature combination being 22 and the second feature combination being 00. Yet another example is the first feature combination being 11 and the second feature combination being 22. Yet another example is the first feature combination being 22 and the second feature combination being 11.

[0214] This application does not limit the three bits that are combined with the first specific bit combination and the second specific bit combination.

[0215] In some embodiments, both the first specific bit combination and the second specific bit combination are combined with 3 bits from the same group. For example, the 11 bits include 5 bits from the first group, 3 bits from the second group, and 3 bits from the third group. When the data pattern of the 5 bits in the first group is either the first specific bit combination or the second specific bit combination, the 3 bits in the second group are mapped to 2 of the 3 symbols. Alternatively, when the data pattern of the 5 bits in the first group is either the first specific bit combination or the second specific bit combination, the 3 bits in the third group are mapped to 2 of the 3 symbols.

[0216] In other embodiments, the first specific bit combination and the second specific bit combination are combined with different 3-bit combinations. When the first group of 5-bit data pattern is the first specific bit combination, the second group of 3 bits maps to 2 of the 3 symbols; when the first group of 5-bit data pattern is the second specific bit combination, the third group of 11 bits maps to 2 of the 3 symbols. Alternatively, when the first group of 5-bit data pattern is the first specific bit combination, the third group of 3 bits maps to 2 of the 3 symbols; when the first group of 5-bit data pattern is the second specific bit combination, the second group of 11 bits maps to 2 of the 3 symbols.

[0217] It should be noted that when 5 bits and any group of 3 bits are mapped to 3 symbols, and another group of 3 bits are mapped to 2 symbols, in the case where any group of 3 bits is the same as the second group of 3 bits, the other group of 3 bits is the same as the third group of 3 bits, and in the case where any group of 3 bits is the same as the third group of 3 bits, the other group of 3 bits is the same as the second group of 3 bits.

[0218] The following examples illustrate how to encode 5 bits in combination with any group of 3 bits, using Tables 2 to 8 as examples.

[0219] For example, suppose Bit[10:0] is divided into Bit[10:6], Bit[5:3], and Bit[2:0]. The 11 bits include 5 bits in Bit[10:6], 3 bits in Bit[5:3], and 3 bits in Bit[2:0]. The first group of 5 bits contains 5 bits in the bit field Bit[10:6]. The second group of 3 bits contains 3 bits in the bit field Bit[5:3]. The third group of 3 bits contains 3 bits in the bit field Bit[2:0]. The first feature combination is one of the 9 symbol combinations belonging to the 3 bits in the second group. The second feature combination is one of the 9 symbol combinations belonging to the 3 bits in the third group. The first feature combination and the second feature combination are the same. The first feature combination and the second feature combination are both 00. The first specific bit combination includes 11100, 11101, and 11110. The second specific bit combination includes 11000, 11001, and 11010.

[0220] As shown in Table 2, the 5 bits of the first group on B[10:6] are combined with the 3 bits of the second group on B[5:3]. When the 5 bits of the first group on B[10:6] are the first specific bit combination, the first specific bit field includes bit field 2 and bit field 3 (T[3:2]) in the bit field of 7 symbols, and the first feature combination is set on the first specific bit field. The 2 symbols mapped by the 3 bits on Bit[2:0] are set in bit field 1 and bit field 0 in the bit field of 7 symbols (T[1:0]). The 2 symbols mapped by the 3 bits on bit field Bit[5:3] are set in bit field 5 and bit field 4 in the bit field of 7 symbols (T[5:4]). The 1 symbol mapped by the 5 bits on bit field Bit[10:6] is set in bit field 6 (T[6]) in the bit field of 7 symbols.

[0221] When the 5 bits in B[10:6] are a second specific bit combination, the second specific bit field includes bit field 0 and bit field 1 in the bit field of 7 symbols (T[1:0]), and the second feature combination is set on the second specific bit field. The 2 symbols mapped by the 3 bits in bit field Bit[2:0] are set in bit field 3 and bit field 2 in the bit field of 7 symbols (T[3:2]). The 2 symbols mapped by the 3 bits in bit field Bit[5:3] are set in bit field 5 and bit field 4 in the bit field of 7 symbols (T[5:4]). The 1 symbol mapped by the 5 bits in bit field Bit[10:6] is set in bit field 6 in the bit field of 7 symbols (T[6]).

[0222] When the 5 bits in B[10:6] are a non-specific bit combination, the 3 symbols mapped by the 5 bits in bit field Bit[10:6] are set in bit fields 6 to 4 of the 7-symbol bit field (T[6:4]). The 2 symbols mapped by the 3 bits in bit field Bit[5:3] are set in bit fields 3 and 2 of the 7-symbol bit field (T[3:2]). The 2 symbols mapped by the 3 bits in bit field Bit[2:0] are set in bit fields 1 and 0 of the 7-symbol bit field (T[1:0]).

[0223] Table 2

[0224]

[0225] The difference between Table 3 and Table 2 is that the 5 bits of the first group on B[10:6] are combined with the 3 bits of the third group on B[2:0].

[0226] Table 3

[0227]

[0228] As shown in Table 4, when the 5 bits of the first group on B[10:6] are any combination of the first specific bit combinations, the 3 bits of the third group on B[2:0] are combined with the 5 bits of the first group on B[10:6], and the first specific bit field is bit field 2 and bit field 3 in the bit field of 7 symbols (T[3:2]). When the 5 bits of the first group on B[10:6] are any combination of the second specific bit combinations, the 3 bits of the second group on B[5:3] are combined with the 5 bits of the first group on B[10:6], and the second specific bit field is bit field 0 and bit field 1 in the bit field of 7 symbols (T[1:0]).

[0229] The difference between Table 5 and Table 4 is that, when the 5 bits of the first group on B[10:6] are any of the first specific bit combinations, the 3 bits of the second group on B[5:3] are combined with the 5 bits of the first group on B[10:6]. When the 5 bits of the first group on B[10:6] are any of the second specific bit combinations, the 3 bits of the third group on B[2:0] are combined with the 5 bits of the first group on B[10:6].

[0230] Table 4

[0231]

[0232] Table 5

[0233]

[0234] Tables 2 to 5 above illustrate the encoding method of combining 5 bits with any group of 3 bits, using the example of the first and second feature combinations being the same. In other embodiments, the first and second feature combinations are different. For example, the first feature combination is 00, and the second feature combination is 11. Tables 6 to 8 below show the encoding method of combining 5 bits with any group of 3 bits.

[0235] As shown in Table 6, the 5 bits of the first group on B[10:6] are combined with the 3 bits of the second group on B[5:3]. When the 5 bits of the first group on B[10:6] are any combination of the first specific bit combinations, the first specific bit field is bit field 2 and bit field 3 (T[3:2]) of the 7-symbol bit field, and the first characteristic combination of the first specific bit field is 00. When the 5 bits of B[10:6] are any combination of the second specific bit combinations, the second specific bit field is bit field 0 and bit field 1 (T[1:0]) of the 7-symbol bit field, and the second characteristic combination of the second specific bit field is 11.

[0236] The difference between Table 7 and Table 6 is that the 5 bits of the first group on B[10:6] are combined with the 3 bits of the third group on B[2:0].

[0237] Table 6

[0238]

[0239] Table 7

[0240]

[0241] As shown in Table 8, when the 5 bits of the first group on B[10:6] are any combination of the first specific bit combinations, the first specific bit field is bit field 2 and bit field 3 in the bit field of 7 symbols (T[3:2]), the first characteristic combination of the first specific bit field is 00, and the 3 bits of the second group on B[5:3] are combined with the 5 bits of the first group on B[10:6]. When the 5 bits of the first group on B[10:6] are any combination of the second specific bit combinations, the second specific bit field is bit field 0 and bit field 1 in the bit field of 7 symbols (T[1:0]), the second characteristic combination of the second specific bit field is 11, and the 3 bits of the third group on B[2:0] are combined with the 5 bits of the first group on B[10:6].

[0242] Table 8

[0243]

[0244] Additionally, when the first feature combination and the second feature combination are different, the first specific bit field includes one of the eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs, and the first feature combination is associated with the three bits of the second group. For example, the first feature combination 00 is associated with the three bits on B[5:3]. In Tables 7 and 8, the first feature combination 00 is one of the nine symbol combinations to which the three bits on B[5:3] belong, and the bit field T[3:2] contains one of the remaining eight symbol combinations mapped by the first feature combination 00 or the three bits on B[5:3]. And / or, the second specific bit field includes one of the eight symbol combinations other than the second feature combination among the nine symbol combinations to which the second feature combination belongs, and the second feature combination is associated with the three bits of the third group. For example, the second feature combination 11 is associated with the three bits on B[2:0]. In Tables 6 and 8, the second feature combination 11 is one of the nine symbol combinations to which the three bits on B[2:0] belong, and the bit field T[1:0] contains one of the other eight symbol combinations mapped by the second feature combination 11 or the three bits on B[2:0].

[0245] This allows the decoding end to accurately decode the received sequence based on the encoding method indicated by the feature combination of specific positioning fields.

[0246] In some embodiments, 5 bits are mapped to one of three symbols. As shown in Table 9, 5 bits on B[10:6] are mapped to one of three symbols on T[4:2]. For example, 5 bits on B[10:6] are mapped to one symbol on T[4]. The first specific bit combination includes 11000 and 11001. 11000 is mapped to symbol 0, and 11001 is mapped to symbol 1. The second specific bit combination includes 11010, 11011, and 11100. 11010 is mapped to symbol 0, 11011 is mapped to symbol 1, and 11100 is mapped to symbol 2.

[0247] Table 9

[0248]

[0249] In other embodiments, one of the five bits is mapped to one of the three symbols. As shown in Table 9, one of the five bits on B[10:6] is mapped to one of the three symbols on T[4:2]. For example, one of the five bits on B[10:6] is mapped to one symbol on T[2].

[0250] For example, if the first specific bit combination includes 11000 and 11001, and the first 4 bits of the 5 bits are the same, then the mapping is based on the last bit of the 5 bits. The last 0 in 11000 is mapped to the symbol 0, and the last 1 in 11001 is mapped to the symbol 1.

[0251] In other embodiments, two of the five bits are mapped to one of the three symbols. As shown in Tables 2 through 8, two bits on B[7:6] are mapped to one of the three symbols on T[6:4]. For example, two bits on B[7:6] are mapped to one symbol on T[6].

[0252] For example, the first specific bit combination includes 11000, 11001, and 11010. The first three bits of these five bits are the same, all being 110. Therefore, the mapping is based on the last two bits. The last two 00s in 11000 are mapped to the symbol 0, the last two 01s in 11001 are mapped to the symbol 1, and the last two 10s in 11010 are mapped to the symbol 2. The second specific bit combination includes 11100, 11101, and 11110. The first three bits of these five bits are the same, all being 111. Therefore, the mapping is based on the last two bits of these five bits.

[0253] The 111 contained in the first specific bit combination is transmitted through the first feature combination mapping of the first specific bit field, that is, the content carried by the 111 contained in the first specific bit combination is transmitted through the first feature combination mapping of the first specific bit field. The 110 contained in the second specific bit combination is transmitted through the second feature combination mapping of the second specific bit field, that is, the content carried by the 110 contained in the second specific bit combination is transmitted through the second feature combination mapping of the second specific bit field.

[0254] In some embodiments, mapping 3 bits to 2 symbols includes mapping 3 bits to 2 symbols in any group combined with 5 bits, and mapping 3 bits to 2 symbols in another group. When the 3-bit data pattern is one of eight bit combinations, the 3 bits are mapped to one of the eight symbol combinations corresponding to those eight bit combinations. For example, mapping 3 bits to 2 symbols in the second group means mapping one of the eight bit combinations to one of the eight symbol combinations. As another example, mapping 3 bits to 2 symbols in the third group. For instance, as shown... Figure 9 As shown, 3 bits are 001, and the bit combination 001 has a mapping relationship with the symbol combination 02, so 3 bits 001 are mapped to 2 symbols 02. Alternatively, 3 bits are 001, and the bit combination 001 has a mapping relationship with the symbol combination {0, -1}, so 3 bits 001 are mapped to 2 symbols {0, -1}.

[0255] This application does not limit the specific implementation method of mapping 3 bits to 2 symbols. For example, the 3 bits can be mapped to 2 symbols by using a lookup table method, number system conversion or encoding method.

[0256] The second encoding method refers to mapping 5 bits from the first group to 3 symbols, 3 bits from the second group to 2 symbols, and 3 bits from the third group to 2 symbols. The 7 symbols include the 3 symbols mapped from the 5 bits of the first group, the 2 symbols mapped from the 3 bits of the second group, and the 2 symbols mapped from the 3 bits of the third group.

[0257] In some embodiments, when the data pattern of the first group of 5 bits is one of 27 bit combinations, the 5 bits are mapped to one of the 27 symbol combinations corresponding to the 27 bit combinations.

[0258] For example, such as Figure 7 As shown, the 5-bit data pattern is one of the 27 bit combinations, 00011. The bit combination 00011 has a mapping relationship with one of the 27 symbol combinations, 011. The 3 symbols are 011.

[0259] For example, such as Figure 7 As shown, the 5-bit data pattern is one of the 27 bit combinations, 11101. Combination 11101 has a mapping relationship with one of the 27 symbol combinations, 022, and the 3 symbols are 022.

[0260] In other embodiments, when the data pattern of the first group of 5 bits is one of 26 bit combinations, the 5 bits are mapped to one of 26 symbol combinations corresponding to the 26 bit combinations.

[0261] For example, such as Figure 8 As shown, the 5-bit data pattern is one of the 26 bit combinations, 00111. Combination 00111 has a mapping relationship with one of the 26 symbol combinations, 021. The 3 symbols are 021.

[0262] For example, such as Figure 8 As shown, the 5-bit data pattern is one of the 26 bit combinations, 11011. Combination 11011 has a mapping relationship with one of the 26 symbol combinations, 220. The 3 symbols are 220.

[0263] The second group of 3 bits is mapped to a set of 2 symbols, and the third group of 3 bits is mapped to another set of 2 symbols, as explained above.

[0264] Optionally, this application maps 11 bits to 7 symbols, and the correspondence between the bit fields of the 11 bits and the bit fields of the 7 symbols is not limited. The bit fields of the 11 bits correspond to any bit field of the 7 symbols. The symbols mapped by the first group of 5 bits, the second group of 3 bits, and the third group of 3 bits are respectively located in different bit fields of the 7 symbols. The bit fields of the first group of 5 bits, the second group of 3 bits, and the third group of 3 bits are not overlapping in the 7 bit fields. This improves the flexibility of circuit implementation.

[0265] Optionally, the correspondence between the 11-bit bit field and the 7-symbol bit field is pre-configured so that the correspondence can be used when mapping the 11 bits to 7 symbols according to the encoding and decoding method provided in this application.

[0266] For example, as shown in Table 2, in the second encoding method, B[2:0] corresponds to T[1:0], that is, the two symbols obtained by mapping the three bits on B[2:0] are set in bit field 0 and bit field 1 of the seven-symbol bit field (T[1:0]). B[5:3] corresponds to T[3:2], that is, the two symbols obtained by mapping the three bits on B[5:3] are set in bit field 3 and bit field 2 of the seven-symbol bit field (T[3:2]). B[10:6] corresponds to T[6:4], that is, the three symbols obtained by mapping the five bits on B[10:6] are set in bit field 6, bit field 5 and bit field 4 of the seven-symbol bit field (T[6:4]).

[0267] As shown in Table 9, in the case of the second encoding method, B[2:0] corresponds to T[1:0], B[5:3] corresponds to T[6:5], and B[10:6] corresponds to T[4:2].

[0268] As shown in Table 2, in the first encoding method, T[3:2] is a special bit field, the 1 symbol obtained by mapping 2 bits of B[7:6] is set in bit field 6 of the 7-symbol bit field (T[6]), the 2 symbols obtained by mapping 3 bits of B[5:3] are set in bit fields 5 and 4 of the 7-symbol bit field (T[5:4]), and the 2 symbols obtained by mapping 3 bits of B[2:0] are set in bit fields 0 and 1 of the 7-symbol bit field (T[1:0]). Optionally, the 1 symbol obtained by mapping 2 bits of B[7:6] is set in bit field 4 of the 7-symbol bit field (T[4]), and the 2 symbols obtained by mapping 3 bits of B[5:3] are set in bit fields 5 and 6 of the 7-symbol bit field (T[6:5]).

[0269] As shown in Table 2, in the first encoding method, T[1:0] is a special bit field, the 1 symbol obtained by mapping 2 bits of B[7:6] is set in bit field 6 of the bit field of 7 symbols, the 2 symbols obtained by mapping 3 bits of B[5:3] are set in bit fields 5 and 4 of the bit field of 7 symbols, and the 2 symbols obtained by mapping 3 bits of B[2:0] are set in bit fields 3 and 2 of the bit field of 7 symbols.

[0270] As shown in Table 9, in the case of the first encoding method, T[6:5] is a special positioning field, B[2:0] corresponds to T[3:2], B[5:3] corresponds to T[1:0], and B[10:6] corresponds to T[4].

[0271] Optionally, the special bit field is a non-contiguous bit field among the 7 bit fields. For example, as shown in Table 2, in the case of the first encoding method, T[6] and T[0] are used as special bit fields, the 1 symbol obtained by mapping 2 bits of B[7:6] is set in bit field 5 of the 7 symbol bit fields, the 2 symbols obtained by mapping 3 bits of B[5:3] are set in bit fields 4 and 3 of the 7 symbol bit fields, and the 2 symbols obtained by mapping 3 bits of B[2:0] are set in bit fields 2 and 1 of the 7 symbol bit fields.

[0272] like Figure 6 As shown in (b) of the diagram, the decoding process includes the following steps.

[0273] Step 650: Receive the sequence to be decoded, which includes 7 symbols.

[0274] Determine whether a specific bit field of the 7 symbols contains a feature combination. If the 7 symbols contain a feature combination of the specific bit field, it indicates that the first encoding method is used to encode the 11 bits, and step 660 is executed; if the 7 symbols do not contain a feature combination of the specific bit field, it indicates that the second encoding method is used to encode the 11 bits, and step 670 is executed.

[0275] Step 660: When the 7 symbols include feature combinations of specific positioning domains, the 7 symbols are decoded into 11 bits according to the feature combinations of specific positioning domains to obtain the first decoded sequence, which includes 11 bits.

[0276] The specific positioning field is any two of the seven symbol bit fields, and the feature combination is any one of the nine symbol combinations. The nine symbol combinations are obtained by combining ternary data on the two bit fields.

[0277] Optionally, the feature combination of the specific positioning field is used to indicate 3 of the 7 symbols, that is, the 3 symbols indicated by the feature combination of the specific positioning field are mapped to 5 bits and 3 bits.

[0278] In the case where the 7 symbols include a feature combination of specific positioning domains, the 7 symbols also include 3 symbols and 2 symbols. Three of the 7 symbols are mapped to 5 bits and a group of 3 bits, and two of the 7 symbols are mapped to another group of 3 bits. The 5-bit data pattern is a specific bit combination. The 11 bits include 5 bits, a group of 3 bits, and another group of 3 bits.

[0279] In some embodiments, the feature combination includes one of a first feature combination or a second feature combination, the first feature combination and the second feature combination may be the same or different, and the first feature domain of the first feature combination and the second feature domain of the second feature combination are different.

[0280] In a first possible implementation, if the first feature combination and the second feature combination are the same or different, it is determined whether the first specific location field contains the first feature combination, or whether the second specific location field contains the second feature combination. If the first specific location field contains the first feature combination, or the second specific location field contains the second feature combination, then the encoding of the 11 bits using the first encoding method can be determined.

[0281] When the first specific bit field includes the first feature combination, one of the three symbols is mapped to five bits, and the five-bit data pattern is the first specific bit combination; two of the three symbols are mapped to a group of three bits out of eleven bits.

[0282] For example, as shown in Table 2, the first specific bit field includes bit field 3 and bit field 2, and the first characteristic combination is 00, that is, T[3:2] is 00. Assume that the 1 symbol obtained by mapping 2 bits on B[7:6] is set in bit field 6 of the bit field of 7 symbols, and the 2 symbols obtained by mapping 3 bits on B[5:3] are set in bit fields 5 and 4 of the bit field of 7 symbols. The 3 symbols on T[6:4] are mapped to 5 bits and a group of 3 bits, that is, the 1 symbol on T[6] is mapped to 5 bits, and the 5 bits are one of the combinations in the first specific bit combination. The 2 symbols on T[5:4] are mapped to a group of 3 bits.

[0283] When the second specific bit field includes the second feature combination, one of the three symbols is mapped to five bits, and the five-bit data pattern is the second specific bit combination; two of the three symbols are mapped to a group of three bits out of eleven bits.

[0284] For example, as shown in Table 2, the second specific bit field includes bit field 1 and bit field 0, and the second feature combination is 00, that is, T[1:0] is 00. The three symbols on T[6:4] are mapped to five bits and a group of three bits, that is, one symbol on T[6] is mapped to five bits, and the five bits are one of the combinations in the second specific bit combination. The two symbols on T[5:4] are mapped to a group of three bits.

[0285] For example, as shown in Table 8, the second specific bit field includes bit field 1 and bit field 0, and the second feature combination is 11, that is, T[1:0] is 11. The three symbols on T[6:4] are mapped to five bits and a group of three bits, that is, the one symbol on T[6] is mapped to five bits, and the five bits are one of the combinations in the second specific bit combination. The two symbols on T[5:4] are mapped to a group of three bits.

[0286] In the second possible implementation, if the first feature combination and the second feature combination are different, it is determined whether the first feature location field contains the first feature combination, and whether the second feature location field contains the second feature combination, and then it is determined whether the first encoding method is used to encode the 11 bits.

[0287] When the first specific location domain contains the first feature combination and the second specific location domain does not contain the second feature combination, one of the three symbols is mapped to five bits, and the five-bit data pattern is the first specific bit combination; two of the three symbols are mapped to a group of three bits out of eleven bits.

[0288] For example, as shown in Table 6, when the 5-bit data pattern is either a first specific bit combination or a second specific bit combination, both symbols on T[3:2] are 00. It is impossible to determine whether the two symbols 00 on T[3:2] are the first feature combination 00 of the first specific location domain or the two symbols 00 obtained by mapping the 3 bits on B[2:0]. At this time, it is also necessary to determine whether the two symbols on T[1:0] are 11. If the two symbols on T[1:0] are not 11, the 00 of the two symbols on T[3:2] is the first feature combination 00 of the first specific location domain. The 3 symbols on T[6:4] are mapped to 5 bits and a group of 3 bits, and the 1 symbol on T[6] is mapped to 5 bits. The 5 bits are one of the combinations in the first specific bit combination. The 2 symbols on T[5:4] are mapped to a group of 3 bits. When the two symbols on T[1:0] are 11, the two symbols on T[3:2] are not the first feature combination 00 of the first specific positioning domain. The two symbols on T[3:2] are the two symbols 00 obtained by mapping the three bits on B[2:0]. The three symbols on T[6:4] are mapped to five bits and a group of three bits. The one symbol on T[6] is mapped to five bits. The five bits are one of the combinations in the second specific bit combination. The two symbols on T[5:4] are mapped to a group of three bits.

[0289] For example, as shown in Table 7, when the 5-bit data pattern is either the first specific bit combination or the second specific bit combination, both symbols on T[1:0] are 11. It is impossible to determine whether the two symbols 11 on T[1:0] are the second feature combination 11 of the second specific positioning domain, or the two symbols 11 obtained by mapping the 3 bits on B[5:3]. At this time, it is also necessary to determine whether the two symbols on T[3:2] are 00. If the two symbols on T[3:2] are not 00, the 11 of the two symbols on T[1:0] is the second feature combination 11 of the second specific positioning domain. The 3 symbols on T[6:4] are mapped to 5 bits and a group of 3 bits, and the 1 symbol on T[6] is mapped to 5 bits. The 5 bits are one of the combinations in the second specific bit combination. The 2 symbols on T[5:4] are mapped to a group of 3 bits. When the two symbols on T[3:2] are 00, the two symbols 11 on T[1:0] are not the second feature combination 11 of the second specific positioning domain. The two symbols 11 on T[1:0] are the two symbols 11 obtained by mapping the three bits on B[5:3]. The three symbols on T[6:4] are mapped to five bits and a group of three bits. The one symbol on T[6] is mapped to five bits. The five bits are one of the combinations in the first specific bit combination. The two symbols on T[5:4] are mapped to a group of three bits.

[0290] In some embodiments, if the first feature combination and the second feature combination are the same or different, the first specific bit combination and the second specific bit combination are both combined with the same group of 3 bits, or the first specific bit combination and the second specific bit combination are combined with different 3 bits.

[0291] For example, 11 bits include 3 bits from the second group and 3 bits from the third group. In the case where the 5-bit data pattern is a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits from the second group.

[0292] For example, when the 5-bit data pattern is a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the third group.

[0293] For example, when the 5-bit data pattern is the first specific bit combination, 2 out of 3 symbols are mapped to 3 bits in the second group of 11 bits; when the 5-bit data pattern is the second specific bit combination, 2 out of 3 symbols are mapped to 3 bits in the third group of 11 bits.

[0294] For example, when the 5-bit data pattern is the first specific bit combination, 2 out of 3 symbols are mapped to 3 bits in the third group of 11 bits; when the 5-bit data pattern is the second specific bit combination, 2 out of 3 symbols are mapped to 3 bits in the second group of 11 bits.

[0295] For example, as in Tables 2 and 6, both the first and second specific bit combinations are mapped to 3 symbols by combining 3 bits on B[5:3]. As in Tables 3 and 7, both the first and second specific bit combinations are mapped to 3 symbols by combining 3 bits on B[2:0]. As in Table 4, the first specific bit combination is mapped to 3 symbols by combining 3 bits on B[2:0]. The second specific bit combination is mapped to 3 symbols by combining 3 bits on B[5:3].

[0296] Step 670: In the case that the 7 symbols do not include the feature combination of the specific positioning domain, the 7 symbols are decoded into 11 bits to obtain the second decoded sequence, which includes 11 bits.

[0297] The first group of 7 symbols is mapped to 5 bits of the first group. The second group of 7 symbols is mapped to 3 bits of the second group. The third group of 7 symbols is mapped to 3 bits of the third group. The 5-bit data pattern is a non-specific bit combination. The 11 bits include the 5 bits of the first group, the 3 bits of the second group, and the 3 bits of the third group.

[0298] In some embodiments, ternary data combinations on two bit fields yield nine symbol combinations, and binary data combinations on three bit fields yield eight bit combinations. Eight of the nine symbol combinations are mapped one-to-one with the eight bit combinations. The remaining symbol combination, excluding the eight symbol combinations, is used as a feature combination.

[0299] Mapping 2 symbols to 3 bits includes cases where the data pattern of 2 symbols is one of 8 symbol combinations, and the 2 symbols are mapped to one of the 8 bit combinations corresponding to the 8 symbol combinations.

[0300] For example, such as Figure 9 As shown, there is a mapping relationship between two symbols 02 and the bit combination 001. Two symbols 02 are mapped to three bits 001.

[0301] In other embodiments, ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. 26 of the 27 symbol combinations are mapped one-to-one with 26 of the 32 bit combinations.

[0302] Mapping 3 symbols to 5 bits includes mapping 3 symbols to 5 bits when the data pattern of 3 symbols is one of 26 symbol combinations, and mapping 3 symbols to one of the 26 bit combinations corresponding to the 26 symbol combinations.

[0303] For example, such as Figure 8 As shown, the three symbols are one of the 26 symbol combinations, 021. The 26 symbol combinations, 021, have a mapping relationship with the 5-bit data pattern, which is one of the 26 bit combinations, 00111. The 5 bits are 00111.

[0304] In other embodiments, ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. The 27 symbol combinations are mapped one-to-one with the 27 bit combinations among the 32 bit combinations.

[0305] Mapping 3 symbols to 5 bits means that when the data pattern of 3 symbols is one of the 27 possible symbol combinations, the 3 symbols are mapped to one of the 27 possible bit combinations corresponding to the 27 possible symbol combinations.

[0306] For example, such as Figure 7 As shown, the three symbols are one of the 27 symbol combinations, 011. The 27 symbol combinations, 011, have a mapping relationship with the 5-bit data pattern, which is one of the 27 bit combinations, 00011. The 5 bits are 00011.

[0307] The encoding and decoding methods provided in this application are illustrated below with examples. Figure 8 and Figure 9 The mapping relationship shown is illustrated using the example of the correspondence between the 11-bit bit field and the 7-symbol bit field shown in Table 2. The first specific bit combination includes 11100, 11101, and 11110. For example... Figure 10 The diagram shown is an example illustration of an encoding / decoding process provided in this application.

[0308] like Figure 10 As shown in (a) in the figure, this is an example of the encoding and decoding process of the first encoding method.

[0309] For example, 11 bits is 11101101110. Starting from the most significant bit of the 11 bits, Bit[10:0] is divided into Bit[10:6], Bit[5:3] and Bit[2:0], that is, 11101101110 is divided into three groups. The first group contains 5 bits of Bit[10:6], which is 11101. The second group contains 3 bits of Bit[5:3], which is 101. The third group contains 3 bits of Bit[2:0], which is 110.

[0310] The five bits 11101 belong to the first specific bit combination. These five bits 11101 are then mapped together with the three bits 101 contained in the second group. For example, the five bits 11101 are mapped to one symbol 1, see reference. Figure 9 3 bits 101 are mapped to 2 symbols 12, and 3 bits 110 are mapped to 2 symbols 11. Symbol 1 is set in bit field T[6], symbol 12 is set in bit field T[5:4], the first feature bit field T[3:2] is set to the first feature combination 00, and symbol 11 is set in bit field T[1:0]. Then the 7 symbols are 1120011, that is, the 11 bits 11101101110 are encoded into 7 symbols 1120011.

[0311] When decoding the 7 symbols 1120011, the first feature field T[3:2] is determined to be the first feature combination 00. The symbol 1 on the bit field T[6] is mapped to 5 bits 11101, the bit field T[5:4] is mapped to 3 bits 101, and the bit field T[1:0] is mapped to 3 bits 110. Then the 11 bits are 11101101110, that is, the 7 symbols 1120011 are decoded into 11 bits 11101101110.

[0312] like Figure 10 As shown in (b) in the figure, this is an example of the encoding and decoding process of the second encoding method.

[0313] For example, if the 11 bits are 00011101110, starting from the most significant bit, Bit[10:0] is divided into Bit[10:6], Bit[5:3], and Bit[2:0]. That is, 00011101110 is divided into three groups. The first group contains 5 bits of 00011, the second group contains 3 bits of 101, and the third group contains 3 bits of 110.

[0314] The 5 bits 00011 belong to a non-specific bit combination. Mapping the 5 bits 00011 to 3 symbols 010 (refer to Table 9), the 3 bits 101 to 2 symbols 12, and the 3 bits 110 to 2 symbols 11. Symbol 010 is set in bit field T[6:4], symbol 12 is set in bit field T[3:2], and symbol 11 is set in bit field T[1:0]. Therefore, the 7 symbols are 0101211, that is, the 11 bits 00011101110 are encoded into 7 symbols 0101211.

[0315] When decoding the 7 symbols 0101211, it is determined that the 7 symbols do not contain the feature combination of specific bit fields. The symbol 010 on bit field T[6:4] is mapped to 5 bits 00011, bit field T[3:2] is mapped to 3 bits 101, and bit field T[1:0] is mapped to 3 bits 110. Then the 11 bits are 00011101110, that is, the 7 symbols 0101211 are decoded into 11 bits 00011101110.

[0316] The 11B7T encoding / decoding method provided in this application can achieve 2048 combinations, as shown in Tables 10 and 11.

[0317] Table 10

[0318]

[0319] In the first group of 5B3T, the combination where 3Trit = 222 is not used. 5 bits correspond to 2... 5 = 26 of the 32 (0-31) bit combinations (0-25) are grouped into the first group, which are mapped to the remaining 3 of the above 3Trit. 3 =27, which contains 26 possible combinations of bit symbols.

[0320] The remaining 6 bit combinations (2B1T) out of the 32 bit combinations are further divided into two groups, and combined with the 3B2T from the second or third group for encoding, resulting in the combined 2B1T+3B2T (5B3T). The feature combination of 2Trit=00 in the 3B2T from the second and third groups does not participate in the encoding and decoding of this group, but is used for position identification.

[0321] The unused combinations in the first group and the feature combinations in the second and third groups that do not participate in encoding / decoding are not required to have the same signal content or the same combination pattern; they can be the same or different. In this embodiment, they are different, such as 3Trit = 222 and 2Trit = 00.

[0322] In the first group, the 5-bit sequence is converted into a 3Trit sequence according to the binary-decimal-ternary representation of the unsigned number.

[0323] The first group contains 5 bits ranging from 00000 to 10111, 11011, and 11111. The numbers 00000-10111 are obtained according to the base conversions shown in Table 8. Encoding and decoding are achieved through table lookup, calculation, decoding, and encoding. The 5-bit value of 11011 is modified to correspond to 3Trit = 220, and the 5-bit value of 11111 corresponds to 3Trit = 221.

[0324] The second group of 5 bits = 11100 / 11101 / 11110, which are then converted to 0, 1, and 2 in 1 Trit respectively. This can be arbitrarily assigned.

[0325] The third group of 5 bits = 11000 / 11001 / 11010, which are then converted to 0, 1, and 2 of 1 Trit respectively.

[0326] The second and third groups of 3B2T encoding and decoding can adopt the above explanation of mapping 3 bits to 2 symbols.

[0327] Table 11

[0328]

[0329] In the first group of 5B3T, all combinations of 3Trit are used. Of the 32 bit combinations corresponding to 5Bit, 27 bit combinations are used as the first group, which are mapped to all 27 symbol combinations of the aforementioned 3Trit.

[0330] The remaining 5 bit combinations out of the 32 bit combinations are further divided into two groups and combined with the 3B2T of the second or third group for encoding.

[0331] In the second or third group of 3B2T, the specific combination of 2Trit=11 is not used, and is constructed as a feature combination for location identification.

[0332] In the first group, the 5-bit sequence is divided into three parts according to Bit[10:9], where 2Bit = 00 / 01 / 10, and mapped to 1Trit = 0 / 1 / 2 or -1 / 0 / +1.

[0333] In this embodiment, the Bit[8:6] of each part in the first group can be encoded and decoded using the same 3B2T encoding and decoding method.

[0334] The second group of 5 bits = 11000 / 11001 is converted into two signals selected arbitrarily from 0 / 1 / 2 or -1 / 0 / +1 of 1 Trit.

[0335] The third group of 5 bits = 11000 / 11001 / 11010, which are converted to 0 / 1 / 2 or -1 / 0 / +1 of 1 Trit according to the one-to-one mapping.

[0336] The second and third groups of 3B2T can use the same 3B2T encoding and decoding method according to this embodiment.

[0337] All 3B2T encoding and decoding in this embodiment ( [Illustration]) is mapped to 0 / 1 / 2 according to the following rules.

[0338] 0,B1,B0 is mapped to 000,001,010,011, 10,B0 is mapped to 020,021, and 11,B0 is mapped to 002,012.

[0339] The above 2Trit 0 / 1 / 2 can be replaced by different combinations of -1 / 0 / +1, +1 / 0 / -1, etc.

[0340] The 5-bit sequence Bit[10:6] = 11101 / 11110 / 11111 needs to be directly encoded as 022 / 122 / 222 (the last three out of 27), and the mapping relationship can be arbitrarily combined.

[0341] Decoding is performed in reverse according to the Bit-Trit mapping relationship described above. Most of the time, there is no need to look up tables; it can be done simply by converting according to the Bit-Trit, making the circuit implementation simple.

[0342] Key points of the 11B7T encoding method provided in this application.

[0343] The encoding will be 11B7T(2 11 The data of =2048) is divided into three groups: the first group is 5B3T, the second group is 3B2T(0), and the third group is 3B2T(1).

[0344] The first set of 5B3T data patterns contains a maximum of 2 5 =32 combinations, further divided into three groups: the first group has 26 or 27 5-bit binary data patterns, the second group has 2 or 3 5-bit binary data patterns, and the third group has 2 or 3 5-bit binary data patterns.

[0345] Among them, the 26 or 27 combinations in the first group correspond to the 3 of 3Trit. 3= 26 or 27 of the 27 types, with a one-to-one mapping code.

[0346] The two or three combinations of the second and third groups need to be combined with a certain 3B2T group and mapped to three different signal levels of PAM3 (0 / 1 / 2 or -1 / 0 / +1).

[0347] In the first group of 3Trit combinations, one combination can be left unused (e.g., 3Trit = 000, 111, 222), or all combinations can be used. However, it must be ensured that the maximum number of combinations in the first group does not exceed 27, and the maximum number of combinations in each of the second and third groups does not exceed 3. The total number of combinations is equal to 32.

[0348] The second group 3B2T(0) and the third group 3B2T(1) use 3B2T encoding. A feature combination that is not used in the 2Trit combination needs to be agreed upon (e.g., 2Trit = 00) and both sets must be consistent.

[0349] The 1X5B3T+3B2T+3B2T data combination according to the above rules forms the 11B7T code. Furthermore, by utilizing the different arrangement positions of a feature combination (such as 2Trit=00) that is not used in the 3B2T encoding of the second and third groups in 11B7T, two different position information encodings Trit[3:2] or Trit[1:0]=2Trit=00 are formed, which correspond to the second and third groups in the aforementioned 5B3T, and are combined with a certain 3B2T group to finally achieve 2048 combination encodings.

[0350] Key points of the 11B7T decoding method provided in this application.

[0351] First, according to the 2Trit combination of specific bit fields in the encoding convention, such as Trit[3:2] or Trit[1:0], identify whether it contains the 2Trit feature combination of the encoding convention (such as 2Trit=00). If it does not contain it, then decode according to the encoding rule of the first group of 26 / 27 combinations 5B3T + the second group of 3B2T(1) + the third group of 3B2T(1).

[0352] If any position in the 2Trit combination of the encoding convention is identified as having a 2Trit feature combination (e.g., 2Trit = 00), and the position Trit[3:2] or Trit[1:0] is combined, the decoding is performed according to the order and encoding rules of the second or third group + the second group 3B2T(0) / the third group 3B2T(1), and the second and third groups 3B2T.

[0353] If there is no specific location domain feature combination at the above position, then 7Trit is decoded in reverse process according to the encoding of the first group of 5B3T of Trit[6:4] + the second group of 3B2T(0) + the third group of 3B2T(1).

[0354] The above-mentioned 3B2T and 5B4T decoding can be performed by looking up the encoding table, or it can be directly implemented by the corresponding circuit according to the Bit-Trit mapping conversion rules of the encoding.

[0355] The 11B7T implementation includes encoding / decoding mapping and bit field description.

[0356] The three groups Bit[10:6], Bit[5:3], and Bit[2:0] in this application's 11B7T encoding are not limited in any particular order during conversion to 7Trit and data transmission. For example, Bit[10:6], Bit[5:3], and Bit[2:0] can correspond to 7Trit[6:0], or Bit[5:3], Bit[10:6], and Bit[2:0] can correspond to 7Trit[6:0]. However, a specific 11B7T encoding embodiment based on this application is required to have a specific order so that decoding can find and identify the agreed-upon 2Trit feature combinations at specific positions.

[0357] In the first group of codes of 5B3T, no specific mapping relationship is specified, that is, from 2 5 =Select any 26 / 27 from 32, and they can be combined with 3 3 A one-to-one correspondence is established between any 26 / 27 data patterns in the set = 27. Of course, a regular mapping can give the circuit advantages such as simple implementation and low latency.

[0358] When this application further divides the first group of codes in 5B3T into three groups, it does not rely on the binary data pattern, but only requires that the number of combinations in each group meets the agreed requirements, namely, the first group has a maximum of 27 combinations, and the second and third groups have a maximum of 3 combinations. The total number of combinations is equal to 32.

[0359] In the case of 26 combinations in the first group, without limiting the feature combination pattern retained in 3Trit, considering the maximum possible reduction of run length, it is generally recommended that 3Trit = 000 / {-1, -1, -1}, 111 / {0, 0, 0}, 222 / {+1, +1, +1}.

[0360] 5B3T / 3B2T group codec diagram.

[0361] The following is a schematic diagram of the 27 encoding / decoding combinations of 3Trit T[2:0] in 5B3T. For example... Figure 11As shown, due to the existence of long consecutive -1 / 0, 0 / 1, or +1 / 2 combinations, one of the three combinations can be selected as a reserve and no longer used. Furthermore, the mapping method of the 5-bit binary date pattern in the aforementioned 7-Trit data pattern can be inconsistent in different embodiments, and is designed based on the simplification of the encoding and decoding circuits or the different Hamming distances between encoding and decoding.

[0362] Extended applications of 11B7T encoding / decoding, such as PAM6 or PAM9. For example... Figure 12 As shown.

[0363] The 11B7T encoding / decoding method of this application can be applied to any modulation scheme based on an integer multiple of PAM3, such as PAM6 and PAM9. In specific implementation, it is only necessary to split the multilevel of similar modulation signals such as PAM6 and PAM9 into multiple PAM3 groups according to the equal level spacing required by PAM3 signals, and continue to use the 11B7T encoding / decoding method of this application in each PAM3 group.

[0364] Taking PAM6 as an example, assume that the six signal levels of PAM6 are as follows.

[0365] The three signal levels of the first PAM3 group are {-5d, -1d, +3d}, and the three signal levels of the second PAM3 group are {-3d, +1d, +5d}. During encoding, the 12-bit data pattern sequence Bit[11:0] is divided into two groups according to 1 Bit 11 = 0 / 1. Each group corresponds to a PAM3 group, and the 11-bit data pattern of each PAM3 group is encoded and decoded according to the 11B7T of this application. After encoding the two PAM3 groups, each 7Trit signal is interleaved and merged into a Trit data pattern data stream for transmission. Decoding is the reverse process of the above-determined encoding behavior.

[0366] Bit[11:0] can also be divided into two groups according to 1 Bit 0 = 0 / 1, or any method can be chosen to divide Bit[11:0] into two groups of equal number of combinations.

[0367] It is suitable for a variety of #×(PAM3) encoding and decoding applications, and can adopt the bit / trit / level interleaving mapping or partitioning method in the technical solution so that each group of PAM3 signals has the same signal-to-noise ratio and bit error rate performance.

[0368] This application is based on the GPMI scenario, but can also be applied to other physical layer interfaces.

[0369] To achieve the functions described in the above embodiments, the encoder and decoder include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the units and method steps of the examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0370] The above text combines Figures 1 to 12 The encoding and decoding methods provided according to this embodiment are described in detail below. Figure 13 This describes the encoding / decoding apparatus provided according to this embodiment.

[0371] Figure 13 This is a schematic diagram of a possible encoding / decoding device provided in this embodiment. These encoding / decoding devices can be used to implement the encoding function in the above method embodiments, and therefore can also achieve the beneficial effects of the above method embodiments. In this embodiment, the encoding / decoding device can be as follows: Figure 5 The encoder shown can also be a module (such as a chip) applied to the front end.

[0372] like Figure 13 As shown in (a), the encoding / decoding device 1300 includes a communication module 1310, a decision module 1320, an encoding module 1330, and a storage module 1340.

[0373] The communication module 1310 is used to acquire the sequence to be encoded, which contains 11 bits. For example, the communication module 1310 is used to perform... Figure 6 Step 610.

[0374] Decision module 1320 is used to divide the 11 bits into three groups: the first group contains 5 bits, the second group contains 3 bits, and the third group contains 3 bits. It then determines whether the 5-bit data pattern constitutes a specific bit combination. For example, decision module 1320 is used to perform... Figure 6 Step 620.

[0375] The encoding module 1330 is used to map the 5 bits of the first group and the 3 bits of any group in the second and third groups to 3 symbols when the data pattern of the 5 bits of the first group is a specific bit combination, and to map the 3 bits of another group to 2 symbols. The 7 symbols include a feature combination of 3 symbols, 2 symbols and a specific bit field. The specific bit field is any 2 bit fields in the bit fields of the 7 symbols, and the feature combination is any combination of 9 symbol combinations of the symbols in the 2 bit fields.

[0376] The encoding module 1330 is used to map the 5 bits of the first group of data patterns to 3 symbols, the 3 bits of the second group to 2 symbols, and the 3 bits of the third group to 2 symbols when the data pattern of the first group of 5 bits is a non-specific bit combination. The 7 symbols include the 3 symbols mapped from the 5 bits of the first group, the 2 symbols mapped from the 3 bits of the second group, and the 2 symbols mapped from the 3 bits of the third group.

[0377] The communication module 1310 is used to send a first encoded sequence or a second encoded sequence. For example, the communication module 1310 is used to perform... Figure 6 Steps 630 and 640.

[0378] Storage module 1340 is used to store mapping tables and feature combinations, etc. The mapping table includes a mapping table that maps 5 bits to 3 symbols and a mapping table that maps 3 bits to 2 symbols.

[0379] The encoding / decoding device can be used to implement the decoding function in the above method embodiments, and therefore can also achieve the beneficial effects of the above method embodiments. In this embodiment, the encoding / decoding device can be as follows: Figure 5 The decoder shown can also be a module (such as a chip) applied to the backend.

[0380] like Figure 13 As shown in (b), the encoding / decoding device 1300 includes a communication module 1310, a decision module 1350, a decoding module 1360, and a storage module 1340.

[0381] The communication module 1310 is also used to receive a sequence to be decoded, the sequence comprising seven symbols. For example, the decision module 1320 is used to perform... Figure 6 Step 650.

[0382] Decision module 1350 is used to determine whether the seven symbols contain feature combinations of specific localization domains.

[0383] The decoding module 1360 is used to decode a sequence based on the feature combinations of specific bit fields when seven symbols include feature combinations of specific bit fields. Three of the seven symbols, excluding the feature combinations, are mapped to 5 bits and a group of 3 bits. The other two symbols are mapped to another group of 3 bits, resulting in a first decoded sequence comprising 11 bits. These 11 bits include 5 bits, a group of 3 bits, and another group of 3 bits. Symbols are represented using ternary data, and bits are represented using binary data. The 5-bit data pattern is a specific bit combination. The specific bit field is any two bit fields from the bit fields of the seven symbols, and the feature combination is any one of nine symbol combinations, obtained by combining ternary data from two bit fields. For example, the decoding module 1360 is used to perform... Figure 6 Step 660.

[0384] Decoding module 1360 is used to decode a sequence when the seven symbols do not include feature combinations of specific positioning domains. The three symbols in the first group of seven symbols are mapped to five bits of the first group, the two symbols in the second group of seven symbols are mapped to three bits of the second group, and the two symbols in the third group of seven symbols are mapped to three bits of the third group, resulting in a second decoded sequence comprising 11 bits. The five-bit data pattern is a non-specific bit combination. The 11 bits include the five bits from the first group, the three bits from the second group, and the three bits from the third group. For example, decoding module 1360 is used to perform... Figure 6 Step 670.

[0385] The encoding / decoding device 1300 of this application embodiment can be implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD can be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof. It can also be implemented using software. Figure 6 In the encoding and decoding method shown, the encoding and decoding device 1300 and its various modules can also be software modules.

[0386] For a more detailed description of the communication module, encoding module, decoding module, and storage module mentioned above, please refer to [reference needed]. Figure 6 The relevant descriptions in the method embodiments shown are directly obtained and will not be repeated here.

[0387] Figure 14 This is a schematic diagram of the structure of an encoder 1400 provided in this embodiment. Figure 14 As shown, encoder 1400 includes processor 1410, bus 1420, memory 1430 and communication interface 1440.

[0388] It should be understood that in this embodiment, the processor 1410 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), ASICs, FPGAs, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0389] The processor may also be a graphics processing unit (GPU), a neural network processing unit (NPU), a microprocessor, or one or more integrated circuits used to control the execution of the program in this application.

[0390] The communication interface 1440 is used to enable communication between the encoder 1400 and external devices or components. In this embodiment, the communication interface 1440 is used to acquire sequences.

[0391] Bus 1420 may include a pathway for transmitting information between the aforementioned components (such as processor 1410 and memory 1430). In addition to a data bus, bus 1420 may also include a power bus, a control bus, and a status signal bus. However, for clarity, all buses are labeled as bus 1420 in the figure.

[0392] As an example, encoder 1400 may include multiple processors. A processor may be a multi-CPU processor. Here, "processor" can refer to one or more devices, circuits, and / or computing units for processing data (e.g., computer program instructions). Processor 1410 samples and encodes the first set of 5-bit data using a first encoding scheme when the data pattern is a specific bit combination; and samples and encodes the first set of 5-bit data using a second encoding scheme when the data pattern is a non-specific bit combination.

[0393] It is worth noting that, Figure 14 Taking encoder 1400 as an example, which includes one processor 1410 and one memory 1430, the processor 1410 and memory 1430 are used to indicate a type of device or equipment. In specific embodiments, the number of each type of device or equipment can be determined according to business needs.

[0394] The memory 1430 can correspond to the storage medium used in the above method embodiments for storing information such as mapping tables and feature combinations, for example, a disk, such as a mechanical hard disk or a solid-state hard disk.

[0395] The encoder 1400 described above can be a general-purpose device or a special-purpose device. For example, the encoder 1400 can be an x86 or ARM-based server, or other special-purpose servers. This application does not limit the type of encoder 1400.

[0396] It should be understood that the encoder 1400 in this embodiment can correspond to the encoding / decoding device 1300 in this embodiment, and can correspond to the execution according to Figure 6 The corresponding subject in any of the methods, and the above and other operations and / or functions of each module in the encoding / decoding device 1300 are respectively for implementing Figure 6 For the sake of brevity, the corresponding processes of each method in the code will not be elaborated here.

[0397] Figure 15 This is a schematic diagram of the structure of a decoder 1500 provided in this embodiment. Figure 15 As shown, the decoder 1500 includes a processor 1510, a bus 1520, a memory 1530, and a communication interface 1540.

[0398] It should be understood that in this embodiment, the processor 1510 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), ASICs, FPGAs, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0399] The processor may also be a graphics processing unit (GPU), a neural network processing unit (NPU), a microprocessor, or one or more integrated circuits used to control the execution of the program in this application.

[0400] The communication interface 1540 is used to enable communication between the decoder 1500 and external devices or components. In this embodiment, the communication interface 1540 is used to acquire sequences.

[0401] Bus 1520 may include a pathway for transmitting information between the aforementioned components (such as processor 1510 and memory 1530). In addition to a data bus, bus 1520 may also include a power bus, a control bus, and a status signal bus. However, for clarity, all buses are labeled as bus 1520 in the figure.

[0402] As an example, decoder 1500 may include multiple processors. A processor may be a multi-CPU processor. Here, "processor" can refer to one or more devices, circuits, and / or computing units for processing data (e.g., computer program instructions). Processor 1510 is used to sample and decode using a first encoding scheme when the seven symbols include feature combinations of specific location domains; and to sample and decode using a second encoding scheme when the seven symbols do not include feature combinations of specific location domains.

[0403] It is worth noting that, Figure 15 Taking the decoder 1500 as an example, which includes one processor 1510 and one memory 1530, the processor 1510 and the memory 1530 are used to indicate a type of device or equipment. In specific embodiments, the number of each type of device or equipment can be determined according to business requirements.

[0404] The memory 1530 can correspond to the storage medium used in the above method embodiments for storing information such as mapping tables and feature combinations, for example, a disk, such as a mechanical hard disk or a solid-state hard disk.

[0405] The decoder 1500 described above can be a general-purpose device or a special-purpose device. For example, the decoder 1500 can be an x86-based or ARM-based server, or other special-purpose servers. This application does not limit the type of decoder 1500.

[0406] It should be understood that the decoder 1500 according to this embodiment can correspond to the encoding / decoding device 1300 in this embodiment, and can correspond to the execution of the encoding / decoding device 1300 according to this embodiment. Figure 6 The corresponding subject in any of the methods, and the above and other operations and / or functions of each module in the encoding / decoding device 1300 are respectively for implementing Figure 6 For the sake of brevity, the corresponding processes of each method in the code will not be elaborated here.

[0407] Optionally, the decision module is located both inside the encoder 1400 and the decoder 1500. The encoder 1400 also includes a decision module for grouping sequences. The decoder 1500 also includes a decision module for determining whether a sequence contains a feature combination of specific localization domains.

[0408] The method steps in this embodiment can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Alternatively, the ASIC can reside in a network device or terminal device. Of course, the processor and storage medium can also exist as discrete components in the network device or terminal device.

[0409] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks, SSDs).

[0410] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, the disclosure, and the appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0411] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

[0412] In the description of this application, unless otherwise stated, " / " indicates that the objects before and after it are in an "or" relationship. For example, A / B can mean A or B. "And / or" in this application is merely a description of the relationship between the related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following or similar expressions" refers to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and / or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0413] Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that "first" and "second" are not necessarily different. In the embodiments of this application, words such as "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design scheme described as "exemplarily" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of words such as "exemplarily" or "for example" is intended to present related concepts in a concrete manner for ease of understanding.

[0414] It is understood that the term "embodiment" used throughout the specification means that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, throughout the specification, various embodiments do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0415] Some optional features in the embodiments of this application can be implemented independently in certain scenarios without relying on other features, such as the current underlying solution, to solve the corresponding technical problems and achieve the corresponding effects. Alternatively, they can be combined with other features as needed in other scenarios. Correspondingly, the apparatus given in the embodiments of this application can also implement these features or functions, which will not be elaborated upon here.

[0416] In this application, unless otherwise specified, the same or similar parts between the various embodiments can be referred to each other. In the various embodiments of this application, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments are consistent and can be mutually referenced. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships. The following embodiments of this application do not constitute a limitation on the scope of protection of this application.

Claims

1. An encoding method, characterized in that, include: Obtain the sequence to be encoded, the sequence containing 11 bits; The 11 bits are divided into three groups: the first group contains 5 bits, the second group contains 3 bits, and the third group contains 3 bits. When the first group of 5 bits is a specific bit combination, the 11 bits are encoded into 7 symbols and a first encoded sequence is sent. The first encoded sequence includes the 7 symbols, which include a combination of 3 symbols, 2 symbols, and a specific positioning field. The symbols are represented by ternary data, and the bits are represented by binary data. Wherein, the 5 bits of the first group and the 3 bits of any one of the second and third groups are mapped to the 3 symbols, and the 3 bits of the other group are mapped to the 2 symbols. The special bit field is any 2 bit fields of the 7 symbols. The feature combination is any one of the 9 symbol combinations. The 9 symbol combinations are obtained by combining ternary data on 2 bit fields.

2. The method according to claim 1, characterized in that, The method further includes: When the first group of 5 bits is a non-specific bit combination, the 11 bits are encoded into 7 symbols and sent as a second encoded sequence. The second encoded sequence includes the 7 symbols, which include 3 symbols mapped from the first group of 5 bits, 2 symbols mapped from the second group of 3 bits, and 2 symbols mapped from the third group of 3 bits. Wherein, the 5 bits are mapped to the 3 symbols, the 3 bits are mapped to the 2 symbols, and the 3 bits are mapped to the 2 symbols.

3. The method according to claim 1 or 2, characterized in that, The specific bit combination includes a first specific bit combination and a second specific bit combination; When the five bits of the first group are the first specific bit combination, the feature combination is the first feature combination; When the first group of 5 bits is the second specific bit combination, the feature combination is the second feature combination; The first feature combination and the second feature combination may be the same or different, and the first feature domain of the first feature combination and the second feature domain of the second feature combination are different.

4. The method according to any one of claims 1-3, characterized in that, The first group of 5 bits and any 3 bits from the second and third groups are mapped to 3 symbols, including: The first group of 5 bits is mapped to one of the 3 symbols; The three bits of any group are mapped to two of the three symbols.

5. The method according to claim 4, characterized in that, The first group of 5 bits is mapped to one of the 3 symbols, including: Two bits out of the five bits in the first group are mapped to one of the three symbols.

6. The method according to claim 4, characterized in that, The first group of 5 bits is mapped to one of the 3 symbols, including: One bit of the first group of five bits is mapped to one of the three symbols.

7. The method according to any one of claims 4-6, characterized in that, The first feature combination and the second feature combination may be the same or different; The three bits of any group are mapped to two of the three symbols, including: When the five bits of the first group are a first specific bit combination or a second specific bit combination, the three bits of the second group are mapped to two of the three symbols; or, When the five bits of the first group are a first specific bit combination or a second specific bit combination, the three bits of the third group are mapped to two of the three symbols; or, When the first group of 5 bits is a first specific bit combination, the second group of 3 bits is mapped to 2 of the 3 symbols; When the first group of 5 bits is a second specific bit combination, the third group of 3 bits is mapped to 2 of the 3 symbols.

8. The method according to claim 7, characterized in that, When the first feature combination and the second feature combination are different, the first feature domain includes the first feature combination or one of the eight symbol combinations other than the first feature combination among the nine symbol combinations to which the first feature combination belongs, and the first feature combination is associated with the three bits of the second group. And / or, The second specific location field includes a combination of eight symbol combinations other than the second feature combination, which are among the nine symbol combinations to which the second feature combination belongs. The second feature combination is associated with three bits of the third group.

9. The method according to any one of claims 1-8, characterized in that, The combination of binary data in 3 bit fields yields 8 bit combinations, and the combination of ternary data in 2 bit fields yields 9 symbol combinations. The 8 bit combinations are mapped one-to-one with 8 of the 9 symbol combinations. The other symbol combination among the 9 symbol combinations is used as the feature combination. The three bits are mapped to the two symbols, including: When the three bits are one of the eight bit combinations, the three bits are mapped to one of the eight symbol combinations corresponding to the eight bit combinations.

10. The method according to any one of claims 2-9, characterized in that, The combination of binary data in 5 bit fields yields 32 bit combinations, and the combination of ternary data in 3 bit fields yields 27 symbol combinations. Among the 32 bit combinations, 26 bit combinations are mapped one-to-one with the 26 symbol combinations among the 27 symbol combinations. The 5 bits are mapped to the 3 symbols, including: When the 5 bits are one of the 26 bit combinations, the 5 bits are mapped to one of the 26 symbol combinations corresponding to the 26 bit combinations.

11. The method according to claim 10, characterized in that, The combinations other than the 26 of the 27 symbol combinations are 000, 111, or 222; or, The combinations other than the 26 of the 27 symbol combinations are {-1, -1, -1}, {0, 0, 0}, or {+1, +1, +1}.

12. The method according to claim 10 or 11, characterized in that, The non-specific bit combinations include the 26 bit combinations, and the specific bit combinations include the 6 bit combinations other than the 26 bit combinations among the 32 bit combinations.

13. The method according to any one of claims 2-9, characterized in that, The combination of binary data in 5 bit fields yields 32 bit combinations, and the combination of ternary data in 3 bit fields yields 27 symbol combinations. Among the 32 bit combinations, the 27 bit combinations are mapped one-to-one with the 27 symbol combinations. The 5 bits are mapped to the 3 symbols, including: When the 5 bits are one of the 27 bit combinations, the 5 bits are mapped to one of the 27 symbol combinations corresponding to the 27 bit combinations.

14. The method according to claim 13, characterized in that, The non-specific bit combinations include the 27 bit combinations, and the specific bit combinations include the 5 bit combinations other than the 27 bit combinations out of the 32 bit combinations.

15. The method according to any one of claims 1-14, characterized in that, The first group of 5 bits, the second group of 3 bits, and the third group of 3 bits are bits in any bit field of the 11 bits. In the bit fields of the 11 bits, the bit fields of the first group of 5 bits, the bit fields of the second group of 3 bits, and the bit fields of the third group of 3 bits are different.

16. The method according to any one of claims 1-15, characterized in that, The 11 bit fields correspond to any bit fields of the 7 symbols.

17. A decoding method, characterized in that, include: Receive a sequence to be decoded, the sequence comprising 7 symbols, the 7 symbols comprising 3 symbols and 2 symbols; When the seven symbols also include feature combinations of specific bit fields, the seven symbols are decoded into 11 bits according to the feature combinations of the specific bit fields to obtain a first decoded sequence. The first decoded sequence includes the 11 bits, which include 5 bits, a group of 3 bits, and another group of 3 bits. The symbols are represented by ternary data, the bits are represented by binary data, the specific bit fields are any two bit fields in the bit fields of the seven symbols, and the feature combinations are any one of nine symbol combinations. The nine symbol combinations are obtained by combining ternary data in two bit fields. Among the seven symbols, three symbols are mapped to the five bits and the group of three bits, two symbols are mapped to the other group of three bits, and the five bits are a specific bit combination.

18. The method according to claim 17, characterized in that, The method further includes: In the case that the 7 symbols do not include the feature combination of the specific positioning domain, the 7 symbols are decoded into 11 bits to obtain a second decoded sequence. The second decoded sequence includes the 11 bits, which include 5 bits from the first group, 3 bits from the second group, and 3 bits from the third group. Among them, the three symbols in the first group of the seven symbols are mapped to the five bits of the first group, the two symbols in the second group of the seven symbols are mapped to the three bits of the second group, the two symbols in the third group of the seven symbols are mapped to the three bits of the third group, and the five bits are a non-specific bit combination.

19. The method according to claim 17 or 18, characterized in that, The feature combination includes one of a first feature combination or a second feature combination, wherein the first feature combination and the second feature combination are the same or different, and the first feature domain of the first feature combination and the second feature domain of the second feature combination are different.

20. The method according to claim 19, characterized in that, Of the seven symbols, three symbols are mapped to the five bits and the set of three bits, including: When the first specific positioning domain includes the first feature combination, one of the three symbols is mapped to the five bits, and the five bits are the first specific bit combination; Two of the three symbols are mapped to the set of three bits.

21. The method according to claim 19, characterized in that, The first feature combination and the second feature combination are different; Of the seven symbols, three are mapped to five bits and a set of three bits, including: When the first specific location domain contains the first feature combination and the second specific location domain does not contain the second feature combination, one of the three symbols is mapped to the five bits, and the five bits are the first specific bit combination; Two of the three symbols are mapped to the set of three bits.

22. The method according to any one of claims 19-21, characterized in that, Of the seven symbols, three are mapped to five bits and a set of three bits, including: When the second specific bit domain includes the second feature combination, one of the three symbols is mapped to the five bits, and the five bits are the second specific bit combination; Two of the three symbols are mapped to the set of three bits.

23. The method according to any one of claims 20-22, characterized in that, The 11 bits include 3 bits from the second group and 3 bits from the third group, and the first feature combination and the second feature combination may be the same or different; Two of the three symbols are mapped to the set of three bits, including: In the case where the 5 bits are a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to 3 bits of the second group of the 11 bits; or, In the case where the 5 bits are a first specific bit combination or a second specific bit combination, 2 of the 3 symbols are mapped to 3 bits of the third group of the 11 bits; or, When the 5 bits are a first specific bit combination, 2 of the 3 symbols are mapped to 3 bits of the second group of the 11 bits; When the 5 bits are the second specific bit combination, 2 of the 3 symbols are mapped to the 3 bits of the third group of the 11 bits.

24. The method according to any one of claims 17-23, characterized in that, Nine symbol combinations are obtained by combining ternary data in two bit fields, and eight bit combinations are obtained by combining binary data in three bit fields. Eight of the nine symbol combinations are mapped one-to-one with the eight bit combinations. The other symbol combination among the nine symbol combinations is used as the feature combination. Two symbols are mapped to three bits, including: When the two symbols are one of the eight symbol combinations, the two symbols are mapped to one of the eight bit combinations corresponding to the eight symbol combinations.

25. The method according to any one of claims 18-24, characterized in that, Ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. Among the 27 symbol combinations, 26 symbol combinations are mapped one-to-one with the 26 bit combinations among the 32 bit combinations. Three symbols are mapped to five bits, including: When the three symbols are one of the 26 symbol combinations, the three symbols are mapped to one of the 26 bit combinations corresponding to the 26 symbol combinations.

26. The method according to any one of claims 18-24, characterized in that, Ternary data combinations on 3 bit fields yield 27 symbol combinations, and binary data combinations on 5 bit fields yield 32 bit combinations. The 27 symbol combinations are mapped one-to-one with the 27 bit combinations among the 32 bit combinations. Three symbols are mapped to five bits, including: When the three symbols are one of the 27 symbol combinations, the three symbols are mapped to one of the 27 bit combinations corresponding to the 27 symbol combinations.

27. A codec device, characterized in that, The encoding / decoding apparatus includes at least one processor and a memory, wherein the memory is used to store a computer program such that when the computer program is executed by the at least one processor, it implements the method as described in any one of claims 1-16, or such that when the computer program is executed by the at least one processor, it implements the method as described in any one of claims 17-26.

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