semiconductor devices
By optimizing the cell structure of SiC MPS diodes, the problems of uneven current distribution and electric field concentration were solved, improving the forward conduction capability and reverse withstand voltage performance of the devices, and enhancing the reliability and heat dissipation efficiency of the devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CHONGQING INNOEVSIC TECHNOLOGY CO LTD
- Filing Date
- 2026-03-11
- Publication Date
- 2026-06-02
AI Technical Summary
Existing SiC MPS diodes suffer from uneven current distribution, concentrated electric field, and high turn-on voltage, leading to decreased device reliability and heat dissipation efficiency.
The design employs a first cell unit and a second cell unit. The area of the second cell unit is the sum of the areas of M first cell units. The area of the second injection region is larger than the area of the first injection region. The current propagation path and electric field distribution are controlled by optimizing the cell unit structure.
This improves the device's forward conduction capability and reverse withstand voltage performance, while also enhancing its reliability and heat dissipation efficiency.
Smart Images
Figure CN122138415A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to a semiconductor device. Background Technology
[0002] In the field of power semiconductors, silicon carbide (SiC) has become an ideal choice for fabricating high-voltage, high-temperature, and high-frequency devices due to its wide bandgap, high critical breakdown field strength, and high thermal conductivity. While traditional SiC Schottky barrier diodes (SBDs) exhibit extremely fast reverse recovery characteristics, their reverse leakage current increases sharply with increasing voltage, and their surge current capability is limited. To overcome these shortcomings, the industry has proposed a composite PiN Schottky (MPS) structure. By introducing a P-type doped region near the Schottky interface, it enhances surge capability under high forward current and suppresses leakage current under reverse bias.
[0003] However, existing SiC MPS diodes typically use circular or square cell units. Such designs are prone to problems such as uneven current distribution, concentrated electric field, and high turn-on voltage, which in turn lead to a decrease in device reliability and heat dissipation efficiency. Summary of the Invention
[0004] In view of the above problems, the purpose of this application is to provide a semiconductor device that can improve current distribution and alleviate electric field concentration.
[0005] According to one aspect of the present invention, a semiconductor device is provided, comprising: a first cell having a first implantation region and a first body region surrounding the first implantation region; and a second cell having a second implantation region and a second body region surrounding the second implantation region, wherein the first body region and the second body region have a first doping type, and the first implantation region and the second implantation region have a second doping type opposite to the first doping type, wherein the area of the second cell is the sum of the areas of M first cell units, where M is an integer greater than 1, and the area of the second implantation region is at least greater than the area of the first implantation region.
[0006] Optionally, the area of the second injection region is greater than the sum of the areas of M of the first injection regions.
[0007] Optionally, the first cell unit has a first shape, and the second cell unit has a second shape, wherein the second shape is formed by splicing together M of the first shapes.
[0008] Optionally, the second shape is formed by splicing a first shape located at the center and a remaining M-1 first shapes surrounding the first shape located at the center, wherein the remaining M-1 first shapes surround the first shape located at the center at least once and are spliced in stages, and the second main body area is located at least at the circumferential edge of the outermost first shape.
[0009] Optionally, the second injection region occupies the entire area of the remaining first shape within the second shape, excluding the outermost first shape.
[0010] Optionally, within the second cell unit, a plurality of first shapes have injection regions, and each injection region within the plurality of first shapes extends toward and connects with the injection regions of adjacent first shapes to form a continuous second injection region.
[0011] Optionally, a third main region is provided within the second implantation region, and the third main region has the first doping type.
[0012] Optionally, the width of the first main body area and the width of the second main body area are the same.
[0013] Optionally, the area ratio of the first injection region to the first cell unit is 10% to 90%; or / and the area ratio of the second injection region to the second cell unit is 10% to 90%.
[0014] Optionally, the area ratio of the first injection region to the first cell unit is 35% to 45%; or / and the area ratio of the second injection region to the second cell unit is 35% to 45%.
[0015] Optionally, there are multiple second cell units arranged in an array, and the first cell units are arranged circumferentially around the second cell units among the multiple second cell units.
[0016] Optionally, the first cell units are arranged in an array periodically, and the second cell units are embedded in the array of the first cell units and replace the first cell units at the corresponding positions.
[0017] According to another aspect of the present invention, a semiconductor device is provided, comprising: a first cell unit, the first cell unit including: a first implantation region; and a first body region surrounding the first implantation region, the first body region having a first doping type, the first implantation region having a second doping type opposite to the first doping type, wherein the length of the first implantation region in a first direction is at least greater than its width in a second direction.
[0018] Optionally, the ratio between the side length of the first injection region in the first direction and its width in the second direction is 1 to 1.5.
[0019] Optionally, the ratio between the side length of the first injection region in the first direction and its width in the second direction is 1.15 to 1.25.
[0020] Optionally, the width of the first main body area is the same at any position.
[0021] Optionally, the semiconductor device further includes: a second cell having a second implantation region and a second body region surrounding the second implantation region, the second body region having the first doping type, the second implantation region having the second doping type, wherein the area of the second cell is the sum of the areas of M first cell units, M being an integer greater than 1, and the area of the second implantation region is at least greater than the area of the first implantation region.
[0022] Optionally, the area of the second injection region is greater than the sum of the areas of M of the first injection regions.
[0023] Optionally, the first cell unit has a first shape, and the second cell unit has a second shape, wherein the second shape is formed by splicing together M of the first shapes.
[0024] Optionally, the second shape is formed by splicing a first shape located at the center and a remaining M-1 first shapes surrounding the first shape located at the center, wherein the remaining M-1 first shapes surround the first shape located at the center at least once and are spliced in stages, and the second main body area is located at least at the circumferential edge of the outermost first shape.
[0025] Optionally, the second injection region occupies the entire area of the remaining first shape within the second shape, excluding the outermost first shape.
[0026] Optionally, within the second cell unit, a plurality of first shapes have injection regions, and each injection region within the plurality of first shapes extends toward and connects with the injection regions of adjacent first shapes to form a continuous second injection region.
[0027] Optionally, the area ratio of the first injection region to the first cell unit is 10% to 90%; or / and the area ratio of the second injection region to the second cell unit is 10% to 90%.
[0028] Optionally, the area ratio of the first injection region to the first cell unit is 35% to 45%; or / and the area ratio of the second injection region to the second cell unit is 35% to 45%.
[0029] Optionally, there are multiple second cell units arranged in an array, and the first cell units are arranged circumferentially around the second cell units among the multiple second cell units.
[0030] Optionally, the first cell units are arranged in an array periodically, and the second cell units are embedded in the array of the first cell units and replace the first cell units at the corresponding positions.
[0031] In this application, by optimizing the structure of the cell unit, the current propagation path and electric field distribution can be effectively controlled, thereby improving the forward conduction capability of the device while enhancing its reverse breakdown voltage performance. It can also improve the reliability and heat dissipation efficiency of the device. Attached Figure Description
[0032] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:
[0033] Figure 1 This application illustrates the structure of semiconductor devices in some embodiments;
[0034] Figure 2 Show Figure 1 A magnified view of the central region Q1;
[0035] Figure 3 Schematic structural diagrams of the second cell unit are shown in some embodiments;
[0036] Figure 4 Schematic structural diagrams of the second cell unit are shown in some embodiments;
[0037] Figure 5 Show along Figure 2 Cross-sectional view of line I1-I1' in the middle;
[0038] Figure 6 This application shows schematic diagrams of the structure of semiconductor devices in some of its embodiments;
[0039] Figure 7 Show Figure 6 A magnified view of region Q2 in the middle area;
[0040] Figure 8 Show along Figure 7 Cross-sectional view of line I2-I2' in the middle;
[0041] Figure 9 The diagram illustrates the structure of a semiconductor device in some embodiments of this application. Detailed Implementation
[0042] Various embodiments of the present application will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.
[0043] Furthermore, certain terms are used in this specification and claims to refer to specific components. Those skilled in the art will understand that manufacturers may use different names to refer to the same component. This specification and claims do not use differences in name to distinguish components.
[0044] It should be understood that in the following description, when a layer, region, or structure is referred to as "connected" to another layer, region, or structure, or as "connected" between two nodes, it can be in direct contact with or connected to the other layer, region, or structure, or there may be an intermediate layer or region. The connection can be physical contact, electrical connection, or a combination thereof. Conversely, when a layer, region, or structure is referred to as "directly connected" to another layer, region, or structure, it means that there is no intermediate layer or region between them.
[0045] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0046] Let X be the first direction, Y be the second direction, and Z be the third direction. In the following embodiments, we will use the example where the first direction X, the second direction Y, and the third direction Z are mutually perpendicular. Here, the third direction Z is the thickness direction of the semiconductor device, and the plane formed by the intersection of the first direction X and the second direction Y is parallel to the surface of the semiconductor layer in the semiconductor device.
[0047] Figure 1 The diagram illustrates the structure of the semiconductor device 100 in some embodiments of this application. Figure 1 The structure shown can be a cross-sectional view of the semiconductor device 100 in the XY plane.
[0048] refer to Figure 1In some embodiments of this application, the semiconductor device 100 includes a first cell unit U1 and a second cell unit U2.
[0049] There can be multiple first cell units U1 and second cell units U2.
[0050] In some embodiments, the second cell units U2 are arranged in an array, and the first cell units U1 are arranged circumferentially around the second cell units U2 among the plurality of second cell units U2. In other embodiments, the first cell units U1 may be arranged in an array periodically, and the second cell units U2 may be embedded in the array of first cell units U1 and replace the first cell units U1 at corresponding positions.
[0051] exist Figure 1 In the example, the second cell unit U2 embedded in the array of the first cell unit U1 is also arranged in a periodic array.
[0052] The periodic arrangement of the first cell unit U1 and the second cell unit U2 is beneficial to improving the uniformity of the electric field and current distribution.
[0053] Figure 2 It shows Figure 1 An enlarged view of region Q1. Region Q1 contains a second cell unit U2 and a plurality of first cell units U1 surrounding the second cell unit U2.
[0054] refer to Figure 2 The first cell unit U1 has a first injection region 112a and a first body region 111a surrounding the first injection region 112a. The second cell unit U2 has a second injection region 112b and a second body region 111b surrounding the second injection region 112b.
[0055] The first host region 111a and the second host region 111b have a first doping type, and the first implantation region 112a and the second implantation region 112b have a second doping type opposite to the first doping type.
[0056] The first doping type can be either N-type or P-type doping, and the second doping type can be either N-type or P-type doping. N-type doping is formed by doping the semiconductor material with pentavalent elements such as nitrogen (N), phosphorus (P), arsenic (As), and antimony (Sb), while P-type doping is formed by doping the semiconductor material with trivalent elements such as boron (B), aluminum (Al), gallium (Ga), and indium (In). In the following embodiments, N-type as the first doping type and P-type as the second doping type will be used as an example.
[0057] In some embodiments, it may be as follows Figure 2As shown, the first injection region 112a has the same shape as the first cell unit U1 and is located at the center of the first cell unit U1. Correspondingly, the width d1 of the first main body region 111a is the same at any position in the first cell unit U1.
[0058] The second injection region 112b has the same shape as the second cell unit U2 and is located at the center of the second cell unit U2. Correspondingly, the width d2 of the second main body region 111b is the same at any position in the second cell unit U2.
[0059] In some embodiments, the widths of the first main body region 111a and the second main body region 111b are the same, i.e., d1 and d2 are the same as described above. In other words, the spacing between any adjacent injection regions is the same in adjacent directions. This design, where each injection region has the same width, helps to improve the uniformity of the current.
[0060] In some embodiments, the first cell unit U1 has a first shape. The first shape can be a polygon, a circle, or an ellipse. The polygon can be a regular polygon, or a polygon elongated in any direction along the XY plane. Accordingly, the first injection region 112a is also an elongated polygon.
[0061] Taking the first cell unit U1 as an elongated polygon in the first direction X as an example, the width of the first cell unit U1 in the second direction Y is at least less than its length in the first direction X.
[0062] The length is at least one of the following:
[0063] 1() The distance between the two opposite corners of the first cell unit U1 in the first direction X;
[0064] 1() The side length of the first cell unit U1 in the first direction X.
[0065] Accordingly, in some embodiments, the width of the first injection region 112a in the second direction Y is at least smaller than its diagonal distance in the first direction X. In some embodiments, the width of the first injection region 112a in the second direction Y may also be smaller than its side length in the first direction X.
[0066] In some embodiments, the first cell unit U1 is hexagonal. Hexagonal shapes can improve current accumulation and increase current density. The hexagonal structure also helps reduce the on-resistance and switching losses of semiconductor devices.
[0067] exist Figures 1-4 In the implementation, the first cell unit U1 is illustrated using a regular hexagon as an example.
[0068] In some embodiments, the size of the first cell unit U1 is 6~13μm and can be adjusted according to the rated withstand voltage of the semiconductor device.
[0069] Wherein, when the first cell unit U1 is a polygon, the size of the first cell unit U1 can refer to the width of opposite sides or the width of opposite diagonals of the polygon. When the first cell unit U1 is a circle, the size of the first cell unit U1 can refer to the diameter of the circle. When the first cell unit U1 is an ellipse, the size of the first cell unit U1 can refer to the major axis or the minor axis of the ellipse.
[0070] exist Figure 2 In the embodiment, for the first hexagonal cell U1, its size refers to the width W1 of the opposite side of the first cell U1. Correspondingly, the size of the first injection region 112a is the width W2 of the opposite side of the first injection region 112a.
[0071] In this embodiment, the area of the second cell unit U2 is equal to the sum of the areas of M first cell units U1, and the area of the second injection region 112b is at least greater than the area of the first injection region 112a, where M is a positive integer greater than 1.
[0072] In the example where the second doping type is P-type, the second implantation region 112b can be a large-size P+ region of the semiconductor device 100, and the first implantation region 112a can be a small-size P+ region of the semiconductor device 100. By increasing the area of the implantation region through this design, the semiconductor device's ability to handle surge currents can be improved.
[0073] In some embodiments, the second cell unit U2 has a second shape, which is formed by splicing together M of the aforementioned first shapes. This design facilitates the periodic arrangement of the first cell unit U1 and the second cell unit U2, thereby improving the uniformity of current and electric field distribution.
[0074] In this embodiment, the second shape of the second cell unit U2 can be composed of a first shape located at the center and M-1 other first shapes surrounding the first shape located at the center. The M-1 first shapes surround the first shape located at the center at least once and are spliced together in stages. That is to say, the other M-1 first shapes can be extended outward in multiple layers according to specific performance requirements.
[0075] exist Figure 2 In this embodiment, the first shape of the first cell unit U1 is a regular hexagon, and the second shape of the second cell unit U2 is a combination of seven regular hexagons. These seven regular hexagons may include a central regular hexagon and six other regular hexagons adjacent to the sides of that central hexagon. That is, the second shape is formed by combining the central first shape and the six other first shapes surrounding it.
[0076] In some embodiments, the second injection region 112b in the second cell unit U2 may be located within only one of the first shapes. For example, the second injection region 112b may be located within any one of the first shapes in the second cell unit U2.
[0077] In some embodiments, a plurality of first shapes in the second cell unit U2 have injection regions. Under such conditions, in the plurality of first shapes having injection regions, the injection region in each first shape extends toward and connects with the injection region of the adjacent first shape to form a continuous second injection region 112b. The second body region 111b is located at least at the circumferential edge of the outermost first shape.
[0078] In such Figure 2 In the example, each of the seven first shapes in the second cell unit U2 has an injection region. The injection region of each first shape extends into the injection region of the adjacent first shape and connects with the injection region of the adjacent first shape to form a second injection region 112b. The first shape located at the center is completely occupied by the second injection region 112b, while the remaining six first shapes surrounding the central first shape are partially occupied by the second injection region 112b. The second main body region 111b is located at the circumferential edge of the annular structure in which the remaining six first shapes are not occupied by the second injection region 112b.
[0079] That is, the second injection region 112b occupies the entire area of the first shape except for the outermost first shape within the second shape.
[0080] This configuration ensures that the area of the second injection region 112b is greater than the sum of the areas of the M first injection regions 112a, thereby increasing the overall area ratio of the injection region on the XY cross-section. This is beneficial for improving the semiconductor device's ability to guide current diffusion and enhancing its surge resistance.
[0081] In some embodiments, at least a portion of the implanted region has an area ratio of 10% to 90% of its corresponding cell, and the size of the implanted region can be adjusted to adjust this area ratio according to the requirements of the on-resistance and withstand voltage of the semiconductor device.
[0082] For example, in some embodiments, the size of at least a portion of the first injection regions 112a may be adjusted so that the area ratio of these first injection regions 112a to their respective first cell units U1 is 10% to 90%.
[0083] In some embodiments, the size of at least a portion of the second injection regions 112b may be adjusted so that the area ratio of these second injection regions 112b to their respective second cell units U2 is 10% to 90%.
[0084] In some embodiments, the dimensions of the first injection region 112a and the second injection region 112b may be adjusted simultaneously so that at least a portion of the first cell unit U1 and at least a portion of the second cell unit U2 simultaneously have the above-described proportional relationship.
[0085] In some embodiments, at least a portion of the injected region has an area ratio of 35% to 45% of its corresponding cell unit, so that the device has a more balanced on-resistance and breakdown voltage properties.
[0086] For example, in some embodiments, the size of at least a portion of the first injection regions 112a may be adjusted so that the area ratio of these first injection regions 112a to their respective first cell units U1 is 35% to 45%.
[0087] In some embodiments, the size of at least a portion of the second injection regions 112b may be adjusted so that the area ratio of these second injection regions 112b to their respective second cell units U2 is 35% to 45%.
[0088] In some embodiments, the dimensions of the first injection region 112a and the second injection region 112b may be adjusted simultaneously so that at least a portion of the first cell unit U1 and at least a portion of the second cell unit U2 simultaneously have the above-described proportional relationship.
[0089] It should be noted that, depending on the value of M and the different ways in which the M first shapes are assembled, the second cell unit U2 can also have other shapes and sizes.
[0090] For example in Figure 2 In the example, the second shape of the second cell unit U2 is formed by splicing together a first shape located at the center and six other first shapes surrounding the central first shape. However, this application is not limited thereto.
[0091] In some other embodiments, the second shape of the second cell unit U2 can be formed by splicing together multiple first shapes that surround it in a progressively larger manner. That is, in addition to the first shape located at the center and the second ring of first shapes surrounding the first shape, the second shape of the second cell unit U2 can also include a third ring of first shapes surrounding the second ring of first shapes, or even more rings of first cell units U1. Under such progressively larger splicing conditions, the second main body region 111b can be located at least at the circumferential edge of the outermost ring of first shapes.
[0092] For example, in Figure 2 Based on the embodiment shown, the second cell unit U2 can also surround another 12 first shapes in addition to the remaining 6 first shapes, and can be extended step by step according to the required device performance.
[0093] In addition to the above-mentioned hierarchical splicing method, the first shape in the second cell unit U2 can also adopt any other splicing method.
[0094] Figure 3 A schematic structural diagram of the second cell unit U2 is shown in some other embodiments.
[0095] like Figure 3 As shown in Figure (a), the second shape can be a combination of three first shapes arranged in a roughly triangular pattern.
[0096] like Figure 3 As shown in Figure (b), the second shape can also be a combination of four first shapes arranged in a roughly parallelogram shape.
[0097] like Figure 3 As shown in Figure (c), the second shape can also be a combination of three or more first shapes arranged in strips.
[0098] Furthermore, in some other embodiments, it may also be as described above. Figure 3 The second shape of the second cell unit U2 is obtained by taking the shape shown in Figures (a), (b), and (c) as the center, or other shapes, and extending outwards in multiple layers.
[0099] It should be understood that, in any splicing method, the injection area of each of these spliced first shapes can extend to the injection area of the adjacent first shape and connect with the injection area of the adjacent first shape to form the second injection area 112b.
[0100] In some other embodiments, a third host region may also be disposed within the second implantation region 112b. The third host region also has a first doping type.
[0101] For example, such as Figure 4 As shown, the second injection region 112b can be a ring structure. The area surrounded by the ring structure is also configured with a third main region 111c. By setting the third main region 111c, the conduction performance of the device can be improved.
[0102] In some embodiments, it may be as follows Figure 4 As shown, the third main body region 111c can have the same shape as the second injection region 112b.
[0103] In some other embodiments, the third body region 111c may also have other shapes, such as triangles, quadrilaterals, stripes, circles, ellipses, etc.
[0104] In some embodiments, such as Figure 4As shown, the third main body region 111c can be formed in the first shape located at the center of the second shape. In some other embodiments, the third main body region 111c can also extend into the second ring, or even the outermost ring of the first shape.
[0105] It should be pointed out that, in Figures 2 to 4 In the diagram, the first cell unit U1 and the second cell unit U2 are separated by a red half-dash line. However, in the semiconductor device 100, the main body regions of each part are integrated, that is, the first main body region 111a and the second main body region 111b are essentially a whole. The division of the first cell unit U1, the second cell unit U2, and the half-dash line in the diagram is for the purpose of more clearly illustrating the embodiments of this application, and is not a substantial division of the structure of the semiconductor device 100 of this application.
[0106] For ease of understanding, Figure 5 It shows along Figure 2 A cross-sectional view of the I1-I1' line. That is, a cross-sectional view of the semiconductor device 100 in the XZ plane where the I1-I1' line is located.
[0107] like Figure 5 As shown, the semiconductor device 100 disclosed in this application includes a semiconductor layer 110 and a metal layer 120.
[0108] The semiconductor layer 110 has opposing first surfaces 110a and second surfaces 110b. For example... Figure 1 The schematic diagram shown can be a partial cross-sectional view of the semiconductor device 100 on the first surface 110a.
[0109] The semiconductor layer 110 can be made of semiconductor materials such as silicon, silicon carbide, gallium nitride, potassium oxide, and diamond, or other group IV semiconductor materials, binary, ternary, or quaternary group III-V semiconductor materials. In some embodiments, wide-bandgap silicon carbide, such as 2H-SiC, 4H-SiC, or 6H-SiC, can be selected to improve the high voltage and high temperature resistance of the semiconductor device.
[0110] By ion doping the semiconductor layer 110, a host region 111 with a first doping type and an implantation region 112 with a second doping type can be formed.
[0111] In some embodiments, such as Figure 5 As shown, the main body region 111 includes a substrate 1111 and a drift layer 1112 stacked together. Correspondingly, the first surface 110a is also the upper surface of the drift layer 1112, and the second surface 110b is also the lower surface of the substrate 1111. The doping concentration of the substrate 1111 is greater than the doping concentration of the drift layer 1112.
[0112] The injection region 112 extends from the first surface 110a into the main body region 111, in Figure 5 In the illustrated embodiment, the injection region 112 extends from the upper surface of the drift layer 1112 into the drift layer 1112.
[0113] It should be understood that, based on the positional relationship of the cross-sections, for Figure 5 The illustrated embodiment corresponds to line I1-I1'. Figure 5 The diagram shows portions of two first injection regions 112a and a second injection region 112b between the two first injection regions 112a. In the first direction X, the main body region 111 between the first injection regions 112a and the second injection region 112b includes the aforementioned first main body region 111a and second main body region 111b.
[0114] Due to the different doping types, a PN junction 11 will be formed at the interface between the host region 111 and the implantation region 112.
[0115] Metal layer 120 includes a first metal layer 121 and a second metal layer 122. The first metal layer 121, semiconductor layer 110, and second metal layer 122 are sequentially stacked. The first metal layer 121 and semiconductor layer 110 are in contact with a first surface 110a, and the second metal layer 122 and semiconductor layer 110 are in contact with a second surface 110b. The first metal layer 121 typically serves as the anode metal of the semiconductor device. The second metal layer 122 typically serves as the cathode metal of the semiconductor device.
[0116] On the first surface 110a, the first metal layer 121 and the main region 111, i.e. the drift layer 1112, form a Schottky contact 13, and the first metal layer 121 and the injection region 112 form a first ohmic contact 12a.
[0117] In some embodiments, such as Figure 5 As shown, the first metal layer 121 may include a first sub-metal layer 1211 and a second sub-metal layer 1212.
[0118] The first sub-metal layer 1211 contacts the first surface 110a and forms the aforementioned Schottky contact 13 and first ohmic contact 12a. The second sub-metal layer 1212 is stacked on top of the first sub-metal layer 1211 and is located away from the first surface 110a. The second sub-metal layer 1212 serves as the anode electrode of the semiconductor device 100.
[0119] In some embodiments, the first sub-metal layer 1211 may be made of a material or composite suitable for forming Schottky and ohmic contacts. Examples of such materials or composites include titanium / aluminum (Ti / Al) or nickel / titanium (Ni / Ti) series metals for forming Schottky contacts, and nickel-silicon alloys for forming ohmic contacts. The second sub-metal layer 1212 may be made of, for example, aluminum, copper, or other related materials.
[0120] On the second surface 110b, the second metal layer 122 and the main region 111, i.e. the substrate 1111, contact to form a second ohmic contact 12b. The second metal layer 122 may be made of, for example, titanium, nickel, silver, or alloys thereof.
[0121] When the semiconductor device is working, the PN junction 11 can be turned on under the action of a surge current, forming a working mode in which the PN junction 11 and the Schottky contact 13 are connected in parallel, thereby providing the semiconductor device with a higher surge current resistance capability.
[0122] In some embodiments, the semiconductor device 100 further includes a passivation layer on the first metal layer 121. The passivation layer may be made of materials such as silicon dioxide (SiO2), silicon nitride (SiN), or other related materials.
[0123] In some other embodiments, a field plate may also be provided on the surface of the passivation layer. The field plate may be made of aluminum or other related materials.
[0124] Figure 6 The diagram illustrates the structure of a semiconductor device 200 in some embodiments of this application. The semiconductor device 200 includes a first cell unit U1'.
[0125] These first-cell units U1' can be arranged in a periodic array, for example Figure 6 The staggered array arrangement shown gives the semiconductor device 100 uniform current characteristics and electric field distribution.
[0126] Figure 7 Show Figure 6 A magnified view of region Q2. Region Q2 contains multiple first-cell units U1' arranged in an alternating array.
[0127] The first cell unit U1' has a first injection region 212a and a first body region 211a surrounding the first injection region 212a. The first body region 211a has a first doping type, and the first injection region 212a has a second doping type opposite to the first doping type.
[0128] The first doping type can be either N-type or P-type doping, and the second doping type can be either N-type or P-type doping. N-type doping is formed by doping the semiconductor material with pentavalent elements such as nitrogen (N), phosphorus (P), arsenic (As), and antimony (Sb), while P-type doping is formed by doping the semiconductor material with trivalent elements such as boron (B), aluminum (Al), gallium (Ga), and indium (In). In the following embodiments, an example is given where the first doping type is N-type and the second doping type is P-type.
[0129] The first injection region 212a is a polygon elongated along the first direction X. Figure 7 In the embodiment shown, the first injection region 112a is an example of a hexagon elongated along the first direction X.
[0130] Specifically, the first injection region 212a, which is elongated along the first direction X, means that the width W4 of the first injection region 212a in the second direction Y is at least less than its length in the first direction X. This width W4 is also the width of the opposite side of the first injection region 212a in the second direction Y.
[0131] The length is at least one of the following:
[0132] (1) The distance W8 between the two diagonals of the first injection region 212a in the first direction X;
[0133] (2) The side length W3 of the first injection region 212a in the first direction X.
[0134] By configuring the first injection region 212a as a polygon elongated along the first direction X, the semiconductor device can have a current propagation path along the first direction X, thereby alleviating the current accumulation phenomenon in the semiconductor device 200.
[0135] In some embodiments, the ratio between W3 and W4 can be 1 to 1.5. Within this ratio range, the first injection region 212a can effectively extend the conductive path while maintaining a sufficient injection area.
[0136] In some other embodiments, the ratio between W3 and W4 can be 1.15 to 1.25. Within this ratio range, the conductive path can be extended while maintaining a balance between on-resistance and breakdown voltage.
[0137] In some embodiments, the first injection region 212a is located at the center of the first cell unit U1'. The first shape of the first cell unit U1' can be configured to be exactly the same as or substantially the same as the first injection region 212a.
[0138] In some embodiments, the first cell unit U1' and the first injection region 212a may have identical shapes but different sizes. That is, any parameter relationship between the side length W6 in the first direction X, the diagonal distance W7 in the first direction X, and the opposite side width W5 in the second direction Y of the first cell unit U1' is the same as the corresponding parameter relationship between W3, W4, and W8 mentioned above. Under such conditions, the width of the first main body region 211a can be equal at any position in the first cell unit U1', thereby improving the uniformity of the current.
[0139] In some other embodiments, the first cell unit U1' may have a substantially the same shape as the first injection region 212a. For example, in Figure 7 In the embodiment shown, although the first cell unit U1' is also a hexagon stretched along the first direction X, the parameter relationship in the first cell unit U1' is: the diagonal distance W7 of the first cell unit U1' in the first direction X > the side distance W5 of the first cell unit U1' in the second direction Y > the side length W6 of the first cell unit U1' in the first direction.
[0140] It should be understood that in some other embodiments, the shape of the first cell unit U1' is approximately the same as that of the first injection region 212a, or the diagonal distance W7 of the first cell unit U1' in the first direction X is greater than the side length W6 of the first cell unit U1' in the first direction and the side distance W5 of the first cell unit U1' in the second direction Y.
[0141] In actual operating conditions, the aforementioned dimensional parameters in the first cell unit U1' can be adjusted according to the requirements for the surge capability and conduction characteristics of the semiconductor device. This application does not impose any further limitations.
[0142] Figure 8 Show along Figure 7 A cross-sectional view along line I2-I2'. The structure and characteristics of semiconductor layer 210, main region 211, substrate 2111, drift layer 2112, implantation region 212, metal layer 220, first metal layer 221, first sub-metal layer 2211, second sub-metal layer 2212, second metal layer 222, PN junction 11, Schottky contact 13, first ohmic contact 12a, and second ohmic contact 12b can be found by referring to... Figure 5 The relevant description of the illustrated embodiment.
[0143] Among them, corresponding to Figure 7 The I2-I2' line in the middle, Figure 8 The injection region 212 in the above are all the first injection region 212a.
[0144] In yet other embodiments, Figures 1-4Based on the illustrated embodiment, the first shape in the first cell unit U1 and the second cell unit U2 of the semiconductor device can be used Figure 7 The shape of the first cell unit U1' in the illustrated embodiment is that of an elongated hexagonal replacement.
[0145] Figure 9 Schematic structural diagrams of semiconductor devices in some embodiments under the above alternative conditions are shown.
[0146] exist Figure 9 In the embodiments shown, the semiconductor device includes a second cell unit U2' in addition to the first cell unit U1' of any of the above embodiments.
[0147] There can be multiple first cell units U1' and multiple second cell units U2'.
[0148] In some embodiments, the second cell units U2' are arranged in an array, and the first cell units U1' are arranged circumferentially around the second cell units U2' among the plurality of second cell units U2'.
[0149] In some other embodiments, the first cell units U1' may be arranged in an array periodically, and the second cell units U2' may be embedded in the array of the first cell units U1' and replace the first cell units U1' at the corresponding positions.
[0150] The second cell unit U2' has a second injection region 212b and a second body region 211b surrounding the second injection region 212b. The second injection region 212b also has a second doping type, and the second body region 211b also has a first doping type.
[0151] The area of the second cell unit U2' is equal to the sum of the areas of M first cell units U1', and the area of the second injection region 212b is at least greater than the area of the first injection region 212a, where M is a positive integer greater than 1.
[0152] In some embodiments, the shape of the first cell unit U1' is still referred to as the first shape, and the shape of the second cell unit U2' is still referred to as the second shape. Then the second shape is a spliced shape of M of the above-mentioned first shapes. This design is beneficial for realizing the periodic arrangement of the first cell unit U1' and the second cell unit U2', thereby improving the uniformity of current and electric field distribution.
[0153] In some embodiments, the second shape may be composed of a central first shape and M-1 other first shapes surrounding the central first shape. The M-1 first shapes encircle the central first shape at least once and are joined sequentially. That is, the remaining M-1 first shapes can be extended outward in multiple layers according to specific performance requirements.
[0154] In yet other embodiments, Figure 9 In the example, the second shape of the second cell unit U2' is formed by splicing together four first shapes arranged in a roughly rhomboid shape.
[0155] In some other embodiments, the second shape of the second cell unit U2' can be obtained by expanding outwards in multiple layers from the four first shapes arranged in a roughly rhomboid pattern or other arbitrary arrangements of the first shapes as the center.
[0156] exist Figure 9 In the example, the second cell unit U2' has injection regions within a plurality of first shapes. Under such conditions, in the plurality of first shapes with injection regions, the injection region within each first shape extends toward the injection region of the adjacent first shape and connects with the injection region of the adjacent first shape to form a continuous second injection region 212b. The second body region 211b is located at least at the circumferential edge of the outermost first shape.
[0157] That is, the second injection region 212b occupies the entire area of the first shape except for the outermost first shape within the second shape.
[0158] This configuration ensures that the area of the second injection region 212b is greater than the sum of the areas of the M first injection regions 212a, thereby increasing the overall area ratio of the injection region on the XY cross-section. This is beneficial for improving the semiconductor device's ability to guide current diffusion and enhancing its surge resistance.
[0159] In some embodiments, at least a portion of the implanted region has an area ratio of 10% to 90% of its corresponding cell, and the size of the implanted region can be adjusted to adjust this area ratio according to the requirements of the on-resistance and withstand voltage of the semiconductor device.
[0160] For example, in some embodiments, the size of at least a portion of the first injection regions 212a may be adjusted so that the area ratio of these first injection regions 212a to their respective first cell units U1' is 10% to 90%.
[0161] In some embodiments, the size of at least a portion of the second injection regions 212b may be adjusted so that the area ratio of these second injection regions 212b to their respective second cell units U2' is 10% to 90%.
[0162] In some embodiments, the sizes of the first injection region 212a and the second injection region 212b may be adjusted simultaneously so that at least a portion of the first cell unit U1' and at least a portion of the second cell unit U2' simultaneously have the above-mentioned proportional relationship.
[0163] In some embodiments, at least a portion of the injected region has an area ratio of 35% to 45% of its corresponding cell unit, so that the device has a more balanced on-resistance and breakdown voltage properties.
[0164] For example, in some embodiments, the size of at least a portion of the first injection regions 212a may be adjusted so that the area ratio of these first injection regions 212a to their respective first cell units U1' is 35% to 45%.
[0165] In some embodiments, the size of at least a portion of the second injection regions 212b may be adjusted so that the area ratio of these second injection regions 212b to their respective second cell units U2' is 35% to 45%.
[0166] In some embodiments, the dimensions of the first injection region 1212a and the second injection region 212b may be adjusted simultaneously so that at least a portion of the first cell unit U1' and at least a portion of the second cell unit U2' simultaneously have the above-mentioned proportional relationship.
[0167] In some embodiments, the width of the second main body region 211b at any position in the second cell unit U2' may also be equal. In some embodiments, provided that the width of the first main body region 211a at any position in the first cell unit U1' is equal, the width of the first main body region 211a may be the width of the second main body region 211b.
[0168] also, Figure 9 The remaining characteristics of the second cell unit U2' in the embodiment shown can be referred to the description of... Figures 1 to 5 Description of any second cell unit U2 shown in the embodiment.
[0169] When a semiconductor device has a first cell unit U1' and a second cell unit U2', the semiconductor device also has the following characteristics: Figures 1 to 5 The beneficial effects of any of the embodiments shown.
[0170] According to the above embodiments, by optimizing the structure of the cell units in this application, the current propagation path and electric field distribution can be effectively controlled, thereby improving the forward conduction capability of the device while enhancing its reverse withstand voltage performance. It can also improve the reliability and heat dissipation efficiency of the device.
[0171] The embodiments described above, as per the examples of this application, do not exhaustively describe all details, nor do they limit this application to the specific embodiments described above. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. The scope of protection of this application should be determined by the scope defined in the claims of this application.
Claims
1. A semiconductor device, wherein, include: The first cell unit has a first injection region and a first body region surrounding the first injection region; as well as The second cell unit has a second injection region and a second body region surrounding the second injection region. The first host region and the second host region have a first doping type, and the first implantation region and the second implantation region have a second doping type opposite to the first doping type. Wherein, the area of the second cell unit is the sum of the areas of M first cell units, where M is an integer greater than 1. The area of the second injection region is at least larger than the area of the first injection region.
2. The semiconductor device according to claim 1, wherein, The area of the second injection region is greater than the sum of the areas of M of the first injection regions.
3. The semiconductor device according to claim 1, wherein, The first cell unit has a first shape, and the second cell unit has a second shape. The second shape is formed by splicing together M of the first shape.
4. The semiconductor device according to claim 3, wherein, The second shape is formed by piecing together a first shape located at the center and the remaining M-1 first shapes surrounding the first shape located at the center. The remaining M-1 first shapes surround the central first shape at least once and are joined together in successive steps. The second main body area is located at least at the circumferential edge of the outermost ring of the first shape.
5. The semiconductor device according to claim 3, wherein, The second injection region occupies the entire area of the first shape except for the outermost ring of the first shape within the second shape.
6. The semiconductor device according to claim 3, wherein, Within the second cell unit, multiple first shapes have injection regions. The injection area within each of the plurality of first shapes extends toward the injection area of the adjacent first shape and connects with the injection area of the adjacent first shape to form a continuous second injection area.
7. The semiconductor device according to claim 1, wherein, A third main region is provided inside the second implantation region, and the third main region has the first doping type.
8. The semiconductor device according to any one of claims 1-7, wherein, The widths of the first main body area and the second main body area are the same.
9. The semiconductor device according to any one of claims 1-7, wherein, The area ratio of the first injection region to the first cell unit is 10%~90%; or / and The area ratio of the second injection region to the second cell unit is 10% to 90%.
10. The semiconductor device according to claim 9, wherein, The area ratio of the first injection region to the first cell unit is 35%~45%; or / and The area ratio of the second injection region to the second cell unit is 35% to 45%.
11. The semiconductor device according to any one of claims 1-7, wherein, The second cell unit has multiple units, arranged in an array. The first cell unit is arranged circumferentially around the second cell unit among the plurality of second cell units.
12. The semiconductor device according to any one of claims 1-7, wherein, The first cell units are arranged in a periodic array. The second cell is embedded in the array of the first cell and replaces the first cell at the corresponding position.
13. A semiconductor device, wherein, include: First cell unit, The first cell unit includes: First injection zone; and The first main body region surrounding the first injection region. The first host region has a first doping type, and the first implantation region has a second doping type opposite to the first doping type. Wherein, the length of the first injection region in the first direction is at least greater than its width in the second direction.
14. The semiconductor device according to claim 13, wherein, The ratio between the side length of the first injection region in the first direction and its width in the second direction is 1 to 1.
5.
15. The semiconductor device according to claim 14, wherein, The ratio between the side length of the first injection region in the first direction and its width in the second direction is 1.15 to 1.
25.
16. The semiconductor device according to claim 13, wherein, The width of the first main body area is the same at any position.
17. The semiconductor device according to any one of claims 13-16, wherein, The semiconductor device further includes: The second cell unit has a second injection region and a second body region surrounding the second injection region. The second host region has the first doping type, and the second implantation region has the second doping type. Wherein, the area of the second cell unit is the sum of the areas of M first cell units, where M is an integer greater than 1. The area of the second injection region is at least larger than the area of the first injection region.
18. The semiconductor device according to claim 17, wherein, The area of the second injection region is greater than the sum of the areas of M of the first injection regions.
19. The semiconductor device according to claim 17, wherein, The first cell unit has a first shape, and the second cell unit has a second shape. The second shape is formed by splicing together M of the first shape.
20. The semiconductor device according to claim 19, wherein, The second shape is formed by piecing together a first shape located at the center and the remaining M-1 first shapes surrounding the first shape located at the center. The remaining M-1 first shapes surround the central first shape at least once and are joined together in successive steps. The second main body area is located at least at the circumferential edge of the outermost ring of the first shape.
21. The semiconductor device according to claim 19, wherein, The second injection region occupies the entire area of the first shape except for the outermost ring of the first shape within the second shape.
22. The semiconductor device according to claim 19, wherein, Within the second cell unit, multiple first shapes have injection regions. The injection area within each of the plurality of first shapes extends toward the injection area of the adjacent first shape and connects with the injection area of the adjacent first shape to form a continuous second injection area.
23. The semiconductor device according to claim 17, wherein, The area ratio of the first injection region to the first cell unit is 10%~90%; or / and The area ratio of the second injection region to the second cell unit is 10% to 90%.
24. The semiconductor device according to claim 23, wherein, The area ratio of the first injection region to the first cell unit is 35%~45%; or / and The area ratio of the second injection region to the second cell unit is 35% to 45%.
25. The semiconductor device according to claim 17, wherein, The second cell unit has multiple units, arranged in an array. The first cell unit is arranged circumferentially around the second cell unit among the plurality of second cell units.
26. The semiconductor device according to claim 17, wherein, The first cell units are arranged in a periodic array. The second cell is embedded in the array of the first cell and replaces the first cell at the corresponding position.