Semiconductor device
By introducing a first channel region with a high impurity concentration and configuring a body region with high conductivity, the problem of threshold voltage reduction and deviation in trench MOSFETs when the trench spacing is reduced is solved, achieving high channel density and stable threshold voltage, and improving the performance and reliability of the device.
Patent Information
- Application Number
- CN202480069632.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-05
- Filing Date
- 2024-11-26
- Publication Date
- 2026-06-02
AI Technical Summary
In the prior art, when the trench MOSFET with longitudinal channel fin structure reduces the trench spacing to increase the channel density, the threshold voltage (Vth) is prone to decrease or deviation.
A first channel region with a high impurity concentration is introduced into the channel region, and a high conductivity main body region is configured at the bottom of the trench. By controlling the impurity concentration and fin width of the channel region, the connection of the depletion layer is suppressed, and the desired threshold voltage is maintained.
Even when the trench spacing is reduced to increase the channel density, the reduction and deviation of the threshold voltage can be effectively suppressed, thereby improving the reliability and performance stability of the device.
Smart Images

Figure CN122139456A_ABST
Abstract
Citation Information
Patent Citations
Embedded gate type semiconductor device
JP2004207289A
