Silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) layout structure with stepped source doped region

By employing a stepped source doping region and a bulk contact doping region layout in silicon carbide MOSFET devices, the problem of limited channel density caused by large cell width is solved, achieving a reduction in on-resistance and an increase in channel density without increasing process complexity or photolithography precision requirements.

CN122294577APending Publication Date: 2026-06-26CHONGQING TSINGSHAN IND
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Patent Information

Application Number
CN202610430852.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-04-02
Publication Date
2026-06-26

AI Technical Summary

Technical Problem

The large cell width of existing planar gate silicon carbide MOSFET devices limits channel density, making it difficult to further reduce on-resistance. In addition, improving photolithography precision and process complexity will increase costs.

Method used

By employing a stepped layout of the source doped region and the bulk contact doped region, and by setting a groove structure in the source ohmic contact hole, the lateral size of the ohmic contact hole is reduced, and the cell width is reduced and the channel density is increased without changing the existing process flow and photolithography alignment accuracy requirements.

Benefits of technology

It effectively reduces the on-resistance of the device, increases the channel density, enhances the current carrying capacity of the device, and maintains good process compatibility and engineering feasibility.

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Abstract

The invention discloses a silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) layout structure with a stepped source electrode doped region, which comprises a plurality of plane gate MOSFET cells, and is characterized in that each plane gate MOSFET cell comprises a source electrode doped region, a body contact doped region, a gate structure and a source electrode ohmic contact hole; the source doped region is arranged in a step shape along the width direction of the cell, and at least one groove structure is formed; the body contact doping regions are distributed in a groove formed by the source electrode doping region at intervals; the length direction of the gate structures is consistent with the length direction of the cells, and the gate structures are periodically distributed at intervals along the width direction of the cells; and the source ohmic contact holes are positioned in the groove and are distributed along the length direction of the cell. According to the invention, the on-resistance of the device can be reduced, and the cell width is effectively reduced, so that the channel density is improved, and the on-resistance is reduced.
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