Method for forming low-k dielectric materials with reduced dielectric constant and improved electrical properties

Abstract

An exemplary semiconductor processing method may include providing a deposition precursor to a processing region of a semiconductor processing chamber. The deposition precursor may include a silicon-carbon and nitrogen-containing precursor. A substrate may be disposed within the processing region. The method may include forming a plasma effluent of the deposition precursor. The method may include depositing a silicon-carbon and nitrogen-containing material layer on the substrate. The silicon-carbon and nitrogen-containing material layer may be characterized in that its dielectric constant is less than or about 4.0. The silicon-carbon and nitrogen-containing material layer may be characterized in that its leakage current at 2 MV / cm is less than or about 3E-08 A / cm. 2 .

Description

[0001] Related Applications

[0002] This application claims the benefit of and priority to U.S. Patent Application No. 18 / 376,287, filed October 3, 2023, entitled “METHODS FOR FORMING LOW-K DIELECTRIC MATERIALS WITH REDUCED DIELECTRIC CONSTANT AND ENHANCED ELECTRICAL PROPERTIES,” which is hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The present technology relates to deposition processes and chambers. More particularly, the present technology relates to methods of producing low dielectric constant (k) materials. BACKGROUND

[0004] Processes that produce complex patterned layers of material on a substrate surface have made integrated circuits possible. Producing patterned material on a substrate requires controlled methods for forming and removing material. Material properties can affect how a device operates and can also affect how materials are removed relative to one another. Plasma enhanced deposition can produce materials with certain properties that can affect the performance of a device. The properties of a material can be adjusted or enhanced by modifying deposition conditions, such as the chemical nature of the precursors provided during deposition and / or the processing conditions during deposition.

[0005] Accordingly, there is a need for improved systems and methods that can be used to produce high quality devices and structures. The present technology addresses these and other needs. SUMMARY

[0006] Exemplary semiconductor processing methods can include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors can include silicon carbon and nitrogen containing precursors. A substrate can be disposed within the processing region. The methods can include forming a plasma effluents of the deposition precursors. The methods can include depositing a silicon carbon and nitrogen containing material layer on the substrate. The silicon carbon and nitrogen containing material layer can be characterized by a dielectric constant of less than or about 4.0. The silicon carbon and nitrogen containing material layer can be characterized by a leakage current at 2 MV / cm of less than or about 3E-08 A / cm2. 2 .

[0007] In some embodiments, the silicon-carbon and nitrogen-containing precursor may include more than or about four methyl groups. The silicon-carbon and nitrogen-containing precursors may be or include hexamethyl cyclotrisilazane (HMCTZ), hexamethyldisilazane (HMDS), bis(dimethylamino)-dimethylsilane (BDMADMS), bis(vinyldimethylsilyl)amine (BVDMSA), 1,3,5-trivinyl-1,3,5-trimethylcyclotrisilazane (3V3MCTZ), tris(dimethylamino)silane (TDMAS), bis(trimethylsilyl)methane, 1,1,3,3-tetramethyl-1,3-disilcyclobutane, trimethylsilane, or combinations thereof. These deposition precursors may further include nitrogen-containing precursors. The nitrogen-containing precursor may be or may include an amine (NH3). These methods may include providing helium, argon, or both along with the deposition precursor. The flow rate of the silicon-carbon and nitrogen-containing precursor may be greater than or about 500 sccm. The plasma effluent may be formed at a plasma power of less than or about 1,500 W. The temperature in the semiconductor processing chamber may be maintained at greater than or about 200°C. The pressure in the semiconductor processing chamber may be maintained at less than or about 15 Torr. The silicon-carbon and nitrogen-containing material layer may be characterized by a flow rate of 0.001 A / cm. 2 The breakdown voltage is greater than or about 5.5 MV / cm. The silicon-carbon-nitrogen-containing material layer is characterized by a dielectric constant of less than or about 3.5.

[0008] Some embodiments of this technology may cover semiconductor processing methods. These methods may include providing a deposition precursor to a processing region of a semiconductor processing chamber. The deposition precursor may include a silicon-containing precursor having more than or about four methyl groups. A substrate may be disposed within the processing region. These methods may include plasma effluents forming the deposition precursor. These methods may include depositing a silicon-carbon-nitrogen-containing material layer on the substrate. The silicon-containing material layer may be characterized by a dielectric constant of less than or about 4.0.

[0009] In some embodiments, the silicon-containing precursor may further comprise nitrogen. These deposition precursors may further comprise nitrogen-containing precursors, hydrogen-containing precursors, or both. The plasma effluent may be formed at a plasma power of less than or about 1,000 W. The silicon-carbon and nitrogen-containing material layer is characterized by a plasma power of 0.001 A / cm². 2The breakdown voltage is greater than or about 7.5 MV / cm. The temperature in the processing area can be maintained at less than or about 600°C.

[0010] Some embodiments of this technology may cover semiconductor processing methods. These methods may include providing a deposition precursor to a processing region of a semiconductor processing chamber. The deposition precursor may include a silicon-carbon and nitrogen-containing precursor. The silicon-carbon and nitrogen-containing precursor may include more than or about three methyl groups. A substrate may be disposed within the processing region. The method may include forming a plasma effluent of the deposition precursor at a plasma power of less than or about 1,500 W. These methods may include depositing a silicon-carbon and nitrogen-containing material layer on the substrate. The silicon-carbon and nitrogen-containing material layer may be characterized by a dielectric constant of less than or about 4.0. The silicon-carbon and nitrogen-containing material layer may be characterized by a leakage current of less than or about 1E-08 A / cm at 2 MV / cm. 2 .

[0011] In some embodiments, the silicon-carbon and nitrogen-containing precursor may be or include hexamethylcyclotrisilazane (HMCTZ).

[0012] Such techniques can offer numerous advantages over conventional processing methods. For example, utilizing silicon-containing precursors (such as silicon-carbon and nitrogen-containing precursors) that may include increased methyl groups during deposition can modify the atomic structure of the material to increase methyl groups, reduce Si-C-Si crosslinks, and / or reduce Si-H bonds in the material. Furthermore, the modified atomic structure of the material can reduce the dielectric constant, reduce leakage current, and / or increase the breakdown voltage. These and other embodiments, along with their many advantages and features, are described in more detail below with reference to the accompanying drawings. Attached Figure Description

[0013] A further understanding of the nature and advantages of the disclosed technology can be achieved by referring to the remainder of the specification and the accompanying drawings.

[0014] Figure 1 The figure shows a top view of an exemplary processing system according to some embodiments of the present technology.

[0015] Figure 2 The illustration shows a schematic cross-sectional view of an exemplary plasma system according to some embodiments of the present technology.

[0016] Figure 3 The illustration shows the operation of an exemplary semiconductor processing method according to some embodiments of the present technology.

[0017] Several figures in the accompanying drawings are included as schematic diagrams. It should be understood that these figures are for illustrative purposes and are not to be regarded as to scale unless specifically stated otherwise. Furthermore, as schematic diagrams, the drawings are provided to aid understanding, and compared to a realistic representation, the drawings may not include all aspects or information, and may include exaggerated material for illustrative purposes.

[0018] In the accompanying drawings, similar parts and / or features may have the same reference numerals. Furthermore, various parts of the same type may be distinguished by adding a letter after the reference numeral to differentiate them. If only the first reference numeral is used in the specification, the description applies to any similar part having the same first reference numeral, regardless of the lettering. Detailed Implementation

[0019] During back-end semiconductor processing, structures may be created to facilitate metallization, such as dual damascene structures. These structures can be produced using several processing steps utilizing a mask and a low-k film, which can then be processed and removed. Conventional techniques have consistently strived to balance dielectric constant with other electrical properties, such as leakage current and breakdown voltage. As feature sizes (such as the dimensions of metallized structures) continue to decrease, films with lower dielectric constants, reduced leakage currents, and increased breakdown voltages become increasingly important. Current conventional techniques may not meet the demands of future devices.

[0020] This technique overcomes these problems by providing low-k films, which are characterized in the deposited state by a reduced dielectric constant, reduced leakage current, and / or increased breakdown voltage. By performing deposition with specific precursors, such as silicon-containing precursors with intercalated nitrogen and / or increased methyl moieties, additional methyl groups, reduced Si-H bonds, and / or reduced Si-C-Si crosslinks can be incorporated into the deposited material. The increased amount of methyl groups in the deposited material can increase Si-CH3 bonding within the film to reduce the dielectric constant, while reducing Si-H bonds and / or Si-C-Si crosslinks to meet desired electrical properties. This overcomes the natural tendency to trade off between dielectric constant and electrical properties such as leakage current. Furthermore, this technique may not require post-deposition processing (including ultraviolet (UV) exposure, plasma treatment, or other processing operations) to post-process the film to improve mechanical properties such as dielectric constant or density. However, post-deposition processing can still be performed to further reduce the dielectric constant and / or increase the density.

[0021] While the remainder of the disclosure will conventionally identify specific deposition processes using the disclosed techniques, it will be readily understood that these systems and methods are equally applicable to other deposition chambers, and processes that may occur within the described chambers. Therefore, the techniques should not be considered limited to use only in these specific deposition processes or chambers. Before describing additional details of embodiments according to the present invention, this disclosure will discuss a possible system and chamber that can be used to perform deposition processes according to embodiments of the present invention.

[0022] Figure 1 The figure illustrates a top view of one embodiment of a processing system 100 having deposition, etching, baking, and UV processing chambers according to an embodiment. In this figure, a pair of front-opening wafer transfer cassettes 102 supply substrates of various sizes, which are received by a robotic arm 104 and placed in a low-pressure holding region 106, and subsequently placed into one of the substrate processing chambers 108a to 108f located in series sections 109a to 109c. A second robotic arm 110 is used to transfer substrate wafers from the holding region 106 to the substrate processing chambers 108a to 108f and back. Each substrate processing chamber 108a to 108f can be equipped to perform a variety of substrate processing operations, including plasma-enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, etching, UV processing, pre-cleaning, degassing, alignment, and other substrate processes, including annealing, ashing, etc.

[0023] The substrate processing chambers 108a to 108f may include one or more system components for depositing, annealing, UV treating, and / or etching dielectrics or other materials on the substrate. In one configuration, two pairs of processing chambers, such as 108c to 108d and 108e to 108f, may be used to deposit dielectric materials on the substrate, and a third pair of processing chambers, such as 108a to 108b, may be used to etch the deposited dielectric. In another configuration, all three pairs of chambers, such as 108a to 108f, may be configured to deposit alternating stacks of dielectric materials on the substrate. Any one or more of the described processes may be performed in chambers separate from the manufacturing systems shown in the different embodiments. It should be understood that system 100 considers additional configurations for chambers used for dielectric material deposition, etching, annealing, and UV treatment.

[0024] Figure 2A schematic cross-sectional view of an exemplary plasma system 200 according to some embodiments of the present technology is illustrated. The plasma system 200 may be shown as a pair of processing chambers 108, which may be mounted in one or more of the aforementioned series portions 109, and may include cover stack components according to embodiments of the present technology, as will be further explained below. The plasma system 200 typically includes a chamber body 202 having sidewalls 212, a bottom wall 216, and an inner sidewall 201, thereby defining a pair of processing regions 220A and 220B. Each of the processing regions 220A to 220B may be similarly configured and may include the same components.

[0025] For example, processing region 220B (whose components may also be included in processing region 220A) may include a base 228 disposed in the processing region through a channel 222 formed in the bottom wall 216 of the plasma system 200. The base 228 may provide a heater adapted to support a substrate 229 on an exposed surface of the base, such as a body portion. The base 228 may include a heating element 232, such as a resistance heating element, which can heat and control the substrate temperature at a desired process temperature. The base 228 may also be heated by a remote heating element, such as a lamp assembly or any other heating device.

[0026] The body of base 228 can be connected to rod 226 via flange 233. Rod 226 can electrically couple base 228 to a power output port or power box 203. Power box 203 may include a drive system that controls the lifting and movement of base 228 within processing area 220B. Rod 226 may also include a power interface to provide power to base 228. Power box 203 may also include interfaces for power and temperature indicators, such as thermocouple interfaces. Rod 226 may include base assembly 238 adapted to be detachably coupled to power box 203. Circumferential ring 235 is illustrated above power box 203. In some embodiments, circumferential ring 235 may be a shoulder adapted to serve as a mechanical stop or platform configured to provide a mechanical interface between base assembly 238 and upper surface of power box 203.

[0027] The rod 230 can be included through a channel 224 formed in the bottom wall 216 of the processing area 220B, and can be used to position a substrate lifting rod 261 passing through the main body of the base 228. The substrate lifting rod 261 can selectively separate the substrate 229 from the base to facilitate the exchange of the substrate 229 with a robot for transferring the substrate 229 into and out of the processing area 220B via the substrate transfer port 260.

[0028] A chamber cover 204 may be coupled to the top portion of the chamber body 202. The cover 204 may house one or more precursor distribution systems 208 coupled thereto. The precursor distribution system 208 may include a precursor inlet channel 240 that can deliver reactants and cleaning precursors through a dual-channel nozzle 218 into a processing area 220B. The dual-channel nozzle 218 may include an annular base plate 248 having a baffle plate 244 disposed therebetween to a panel 246. A radio frequency (RF) source 265 may be coupled to the dual-channel nozzle 218 to power the nozzle and facilitate the generation of a plasma region between the panel 246 and the base 228 of the dual-channel nozzle 218. The dual-channel nozzle 218 and / or the panel 246 may include one or more openings to allow precursors to flow from the precursor distribution system 208 into processing areas 220A and / or 220B. In some embodiments, the opening may include at least one of a straight opening and a tapered opening. In some embodiments, the RF source may be coupled to other parts of the chamber body 202, such as the base 228, to facilitate plasma generation. A dielectric isolator 258 may be disposed between the cover 204 and the dual-channel nozzle 218 to prevent RF power from being conducted to the cover 204. A shielding ring 206 may be disposed on the periphery of the base 228 and engage with the base 228.

[0029] An optional cooling channel 247 may be formed in the annular base plate 248 of the precursor distribution system 208 to cool the annular base plate 248 during operation. A heat transfer fluid, such as water, ethylene glycol, gas, or the like, may circulate through the cooling channel 247, allowing the base plate 248 to be maintained at a predetermined temperature. A liner assembly 227 may be disposed within the processing zone 220B, adjacent to the sidewalls 201, 212 of the chamber body 202, to prevent the sidewalls 201, 212 from being exposed to the processing environment within the processing zone 220B. The liner assembly 227 may include a circumferential pumping chamber 225, which may be coupled to a pumping system 264 configured to discharge gases and byproducts from the processing zone 220B and control the pressure within the processing zone 220B. A plurality of discharge ports 231 may be formed on the liner assembly 227. The discharge port 231 can be configured to allow gas to flow from the processing area 220B to the circumferential pump chamber 225 in a manner that facilitates processing within the system 200.

[0030] Figure 3 The illustration depicts the operation of an exemplary semiconductor processing method 300 according to some embodiments of the present technology. This method can be performed in various processing chambers, including the system 200 described above, and any other chamber in which plasma deposition can be performed. Method 300 may include a number of optional operations, which may or may not be specifically associated with some embodiments of the method according to the present technology.

[0031] Method 300 may include a plasma-enhanced chemical-vapor-deposition (PECVD) process to form a deposited low-k material. Method 300 may include optional operations prior to initiating method 300, or method 300 may include additional operations following the deposition of the low-k material. In embodiments, method 300, such as... Figure 3 As shown, operation 305 may include providing a deposition precursor to a processing region of a semiconductor processing chamber. When the deposition precursor is provided into the semiconductor processing chamber, a substrate may be housed within the processing region of the semiconductor processing chamber. At operation 310, a plasma effluent of the deposition precursor may be formed. At operation 315, a silicon-carbon and nitrogen-containing material layer may be deposited on the substrate. In an embodiment, at optional operation 320, the silicon-carbon and nitrogen-containing material layer may be exposed to ultraviolet (UV) light.

[0032] In embodiments, the deposition precursor may include a silicon-containing precursor, such as a silicon-carbon and nitrogen-containing precursor. Usable silicon-carbon and nitrogen-containing precursors may be, but are not limited to, hexamethylcyclotrisilazane (HMCTZ), hexamethyldisilazane (HMDS), bis(dimethylamino)-dimethylsilane (BDMADMS), bis(vinyldimethylsilyl)amine (BVDMSA), 1,3,5-trivinyl-1,3,5-trimethylcyclotrisilazane (3V3MCTZ), tri(dimethylamino)silane (TDMAS), bis(trimethylsilyl)methane, 1,1,3,3-tetramethyl-1,3-disilcyclobutane, trimethylsilane, or combinations thereof. In embodiments, the silicon-containing precursor may contain more than or about four methyl (CH3) groups, more than or about five CH3 groups, or more. By utilizing a silicon-containing precursor that also includes nitrogen and / or an increased amount of CH groups, an increased amount of CH bonds may be present in the CH3 groups in the deposition precursor and plasma effluent. Thus, in the deposited silicon-carbon and nitrogen-containing material layer, the CH3 groups can contain an increased amount of CH bonds. The increased amount of CH bonds in the CH3 groups can reduce the dielectric constant of the material, while also reducing the leakage current and / or increasing the breakdown voltage.

[0033] The deposition precursor may further include a nitrogen-containing precursor and / or a hydrogen-containing precursor. Usable nitrogen-containing precursors may include, but are not limited to, diatomic nitrogen (N2), ammonia (NH3), hydrazine (N2H4), and any other nitrogen-containing precursors that can be used for the formation of silicon-containing materials. Usable hydrogen-containing precursors may include, but are not limited to, diatomic hydrogen (H2), ammonia (NH3), hydrazine (N2H4), hydrogen peroxide (H2O2), and any other nitrogen-containing precursors that can be used for the formation of silicon-containing materials. In embodiments, the flow rate of the nitrogen-containing precursor and / or the flow rate of the hydrogen-containing precursor relative to the flow rate of the silicon-carbon and nitrogen-containing precursors can be maintained and / or adjusted to a flow rate ratio that contributes to the formation of a low-k material with a low dielectric constant (k value). The deposition precursor may also include one or more carrier gases, such as helium, argon, and nitrogen. Although one or more carrier gases may be transported together with other deposition precursors, the carrier gases can be considered inert gases that do not react with any part of the material to be deposited. The one or more carrier gases may be transported together with other deposition precursors as a diluent.

[0034] The flow rates of the silicon-carbon and nitrogen-containing precursors can be greater than or about 50 sccm, greater than or about 60 sccm, greater than or about 70 sccm, greater than or about 80 sccm, greater than or about 90 sccm, greater than or about 100 sccm, greater than or about 125 sccm, greater than or about 150 sccm, greater than or about 175 sccm, greater than or about 200 sccm, greater than or about 250 sccm, greater than or about 300 sccm, greater than or about 350 sccm, greater than or about 500 sccm, greater than or about 750 sccm, greater than or about 1,000 sccm, greater than or about 1,250 sccm, greater than or about 1,500 sccm, greater than or about 1,750 sccm, greater than or about 2,000 sccm, or greater. At increased flow rates of silicon-carbon and nitrogen-containing precursors, such as above 500 sccm, Si-C-Si crosslinking may decrease, which may reduce the dielectric constant and / or increase the material density. Conversely, at lower flow rates, NH bonding may decrease, and therefore the material's hermeticity may be reduced.

[0035] The flow rate of the nitrogen-containing precursor (if present) may be greater than or about 50 sccm, greater than or about 60 sccm, greater than or about 70 sccm, greater than or about 80 sccm, greater than or about 90 sccm, greater than or about 100 sccm, greater than or about 125 sccm, greater than or about 150 sccm, greater than or about 175 sccm, greater than or about 200 sccm, greater than or about 225 sccm, greater than or about 250 sccm, greater than or about 275 sccm, greater than or about 300 sccm, greater than or about 400 sccm, greater than or about 500 sccm, greater than or about 750 sccm, greater than or about 1,000 sccm, greater than or about 1,250 sccm, greater than or about 1,500 sccm, greater than or about 2,500 sccm, greater than or about 5,000 sccm, greater than or about 10,000 sccm. The flow rate of the nitrogen-containing precursor may also be less than or about 7,500 sccm, less than or about 5,000 sccm, less than or about 2,500 sccm, less than or about 2,250 sccm, less than or about 2,000 sccm, less than or about 1,750 sccm, less than or about 1,250 sccm, less than or about 1,000 sccm, less than or about 750 sccm, less than or about 500 sccm, less than or about 250 sccm, or smaller.

[0036] The flow rate of the one or more carrier gases may be greater than or about 200 sccm, greater than or about 300 sccm, greater than or about 400 sccm, greater than or about 500 sccm, greater than or about 750 sccm, greater than or about 1,000 sccm, greater than or about 2,000 sccm, greater than or about 3,000 sccm, greater than or about 3,000 sccm, greater than or about 4,000 sccm, greater than or about 5,000 sccm, or greater.

[0037] Implementations of method 300 may include forming a plasma effluent from a deposition precursor at operation 310. The plasma effluent may be generated from a deposition precursor within a processing region, such as by providing radio frequency (RF) power to the panel to generate plasma within a semiconductor processing chamber. In implementations, the plasma effluent may be formed at plasma power less than or about 2,000 W. Increased plasma power, such as greater than 2,000 W, may result in increased decomposition of silicon-carbon and nitrogen-containing precursors, and methyl groups may be pulled out from the deposited material. Conversely, at plasma power less than or about 2,000 W, less decomposition may occur, and Si-CH3 bonds may remain in the deposited material. However, lower plasma power may also reduce Si-C-Si crosslinking, which may maintain a lower dielectric constant and / or increased density. Therefore, plasma effluents can be formed at plasma powers of less than or about 1,750 W, less than or about 1,500 W, less than or about 1,400 W, less than or about 1,300 W, less than or about 1,200 W, less than or about 1,100 W, less than or about 1,000 W, less than or about 900 W, less than or about 800 W, less than or about 700 W, less than or about 600 W, less than or about 500 W, less than or about 400 W, less than or about 300 W, less than or about 200 W, or less.

[0038] In this embodiment, a bias power can be applied simultaneously at operation 310 to form a plasma effluent from the deposition precursor and / or at operation 315 to deposit a silicon-carbon and nitrogen-containing material on the substrate. The application of the bias power (which can be continuous or pulsed) can control the ion and radical ratios. The bias power can increase the density of the silicon-carbon and nitrogen-containing material.

[0039] Implementations of method 300 may include depositing a silicon-carbon and nitrogen-containing material on a substrate at operation 315. As previously discussed, the substrate may be located in a processing region of a semiconductor processing chamber, and the silicon-carbon and nitrogen-containing material may be formed from plasma effluent generated by deposition plasma also present in the processing region. The processing region and therefore the substrate may be characterized by a temperature during deposition of less than or about 600°C, less than or about 580°C, less than or about 560°C, less than or about 540°C, less than or about 520°C, less than or about 500°C, less than or about 480°C, less than or about 460°C, less than or about 440°C, less than or about 420°C, less than or about 400°C, less than or about 380°C, less than or about 360°C, less than or about 340°C, less than or about 320°C, less than or about 300°C, less than or about 280°C, less than or about 260°C, or lower. Furthermore, the processing area and therefore the substrate may be characterized by a deposition temperature greater than or about 200°C, greater than or about 225°C, greater than or about 250°C, greater than or about 275°C, greater than or about 300°C, greater than or about 325°C, greater than or about 350°C, greater than or about 375°C, greater than or about 400°C, greater than or about 425°C, greater than or about 450°C, greater than or about 475°C, greater than or about 500°C, or higher. At elevated temperatures, such as greater than or about 250°C, the density of silicon-carbon and nitrogen-containing materials may increase. At elevated temperatures, molecules absorbed in the material may diffuse further to join already formed atomic nuclei, rather than forming new atomic nuclei. Therefore, at elevated temperatures, absorbed molecules may have more thermal energy to arrange themselves in the material, and a denser material can be formed. In addition, at elevated temperatures, methyl incorporation may decrease, while lower temperatures may further reduce Si-C-Si crosslinking.

[0040] During method 300, the pressure in the semiconductor processing chamber during deposition can be greater than or about 1 Torr, greater than or about 2 Torr, greater than or about 3 Torr, greater than or about 4 Torr, greater than or about 5 Torr, greater than or about 6 Torr, greater than or about 7 Torr, greater than or about 8 Torr, greater than or about 9 Torr, greater than or about 10 Torr, greater than or about 15 Torr, greater than or about 20 Torr, or greater. However, at increased pressures, the residence time of the deposition precursor may increase, which may allow for more reaction time and reduce methyl incorporation in the deposited material. Alternatively, during deposition, the pressure in the semiconductor processing chamber can be less than or about 15 Torr, less than or about 14 Torr, less than or about 13 Torr, less than or about 12 Torr, less than or about 11 Torr, less than or about 10 Torr, less than or about 9 Torr, less than or about 8 Torr, less than or about 7 Torr, less than or about 6 Torr, less than or about 5 Torr, less than or about 4 Torr, less than or about 3 Torr, less than or about 2 Torr, less than or about 1 Torr, or less.

[0041] The deposition rate of the silicon-carbon and nitrogen-containing material layer can be greater than or about 500 Å / min, and can be greater than or about 525 Å / min, greater than or about 550 Å / min, greater than or about 575 Å / min, greater than or about 600 Å / min, greater than or about 625 Å / min, greater than or about 650 Å / min, greater than or about 675 Å / min, greater than or about 700 Å / min, greater than or about 725 Å / min, greater than or about 750 Å / min, greater than or about 775 Å / min, greater than or about 700 Å / min, or greater.

[0042] In an embodiment, the silicon-carbon and nitrogen-containing material layer is characterized by a leakage current of less than or about 3E-08 A / cm at 2 MV / cm. 2 The reduction in Si-H bonding in the material may decrease the leakage current due to a decrease in the amount of dangling hydrogen bonds. In an embodiment, the leakage current at 2 MV / cm can be less than or about 2E-08 A / cm. 2 Less than or approximately 1E-08A / cm 2 Less than or approximately 9E-09 A / cm 2 Less than or approximately 8E-09 A / cm 2 Less than or approximately 7E-09 A / cm 2 Less than or approximately 6E-09 A / cm 2 Less than or approximately 5.9E-09 A / cm 2 Less than or approximately 5.8E-09 A / cm 2 Less than or approximately 5.7E-09 A / cm 2 , or smaller.

[0043] The characteristic of the silicon-carbon-nitrogen material layer is that it has a strength of 0.001 A / cm. 2 The breakdown voltage is greater than or about 6.5 MV / cm. The increased Si-CH3 bonding in the material may be stronger than other possible bonds (such as Si-H bonding) and may lead to an increased breakdown voltage. In the embodiment, at 0.001 A / cm... 2 The breakdown voltage may be greater than or about 5.5 MV / cm, greater than or about 6.0 MV / cm, greater than or about 6.5 MV / cm, greater than or about 7.0 MV / cm, greater than or about 7.5 MV / cm, greater than or about 8.0 MV / cm, greater than or about 8.1 MV / cm, greater than or about 8.2 MV / cm, greater than or about 8.3 MV / cm, greater than or about 8.4 MV / cm, or greater.

[0044] As described above, the method of this technology includes embodiments utilizing a deposition precursor and processing conditions for forming a low-k material with a low dielectric constant. A reduction in the amount of Si-C-Si crosslinks in the material may decrease the dielectric constant. In an embodiment of method 300, the deposited low-k material can be formed as a silicon-carbon and nitrogen-containing material with a dielectric constant of less than or about 5.0, less than or about 4.8, less than or about 4.6, less than or about 4.4, less than or about 4.2, less than or about 4.0, less than or about 3.9, less than or about 3.8, less than or about 3.7, less than or about 3.6, less than or about 3.5, less than or about 3.4, less than or about 3.3, less than or about 3.2, less than or about 3.1, less than or about 3.0 or less.

[0045] This technology includes embodiments utilizing deposition precursors and processing conditions that can also form low-k materials with increased density. In an embodiment of method 300, the deposited low-k material can be formed to have a density greater than or about 2.0 g / cm³. 3 Greater than or approximately 2.05 g / cm³ 3 Greater than or approximately 2.1 g / cm³ 3 Greater than or approximately 2.15 g / cm³ 3 Greater than or approximately 2.2 g / cm³ 3 Greater than or approximately 2.25 g / cm³ 3 Greater than or approximately 2.3 g / cm³ 3 Greater than or approximately 2.35 g / cm³ 3 Greater than or approximately 2.4 g / cm³ 3 Greater than or approximately 2.45 g / cm³ 3 Greater than or approximately 2.5 g / cm³ 3 Or larger silicon-carbon and nitrogen-containing materials.

[0046] Implementations of method 300 may further include exposing the deposited silicon-carbon and nitrogen-containing material to ultraviolet (UV) light at optional operation 320. In one embodiment, the UV treatment may be performed in a semiconductor processing chamber used for depositing low-k materials. However, it is also contemplated that the substrate having the deposited low-k material may be transferred to another semiconductor processing chamber for performing the UV treatment operation. In one embodiment, the UV treatment at optional operation 320 may expose the silicon-carbon and nitrogen-containing material layer to ultraviolet light to provide a cured silicon-carbon and nitrogen-containing material layer. This treatment may produce a cured low-k material characterized by increased porosity and / or a lower dielectric constant (k value) compared to the deposited material.

[0047] In some embodiments, the deposited silicon-carbon and nitrogen-containing material can be deposited to a thickness greater than or about 750 Å, greater than or about 800 Å, greater than or about 850 Å, greater than or about 900 Å, greater than or about 950 Å, greater than or about 1,000 Å, greater than or about 1,100 Å, greater than or about 1,200 Å, greater than or about 1,300 Å, or greater. The deposited silicon-carbon and nitrogen-containing material can be deposited in two or more deposition and UV treatment cycles to establish the final UV-treated low-k material. For example, the number of deposition and treatment cycles can be greater than or about three cycles, greater than or about five cycles, greater than or about ten cycles, greater than or about 15 cycles, greater than or about 20 cycles, greater than or about 30 cycles, greater than or about 40 cycles, greater than or about 50 cycles, or more.

[0048] In the foregoing description, numerous details have been set forth for illustrative purposes in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0049] Several embodiments have been disclosed, and those skilled in the art will recognize that various modifications, alternative constructions, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, to avoid unnecessarily obscuring the technology, many well-known processes and components have not been described. Therefore, the above description should not be considered as limiting the scope of the technology.

[0050] When a range of values ​​is provided, it should be understood that, unless the context explicitly indicates otherwise, the minimum fraction between the upper and lower limits of each intermediate value of the range, extending to the lower limit unit, is also specifically disclosed. Any narrower range between any specified or unspecified intermediate value included within the specified range and any other specified or intermediate value within that specified range. The upper and lower limits of such narrower ranges may be independently included in or excluded from the range, and this technique also covers each range in which any limit value is included in the narrower range, no limit value is included in the narrower range, or both limit values ​​are included in the narrower range, subject to any specifically excluded limit value within the specified range. When a specified range includes one or both of such limit values, it also includes ranges in which one or both of the included limit values ​​are excluded.

[0051] As used herein and in the appended claims, unless the context clearly indicates otherwise, the singular forms “a,” “a,” and “the” include multiple references. Thus, for example, reference to “a layer” includes multiple such layers, and reference to “the precursor” includes reference to one or more precursors and their equivalents known to those skilled in the art, and so on.

[0052] Furthermore, when used in this specification and the following claims, the terms “comprise(s) / comprising,” “contain(s) / containing,” and “include(s) / including” are intended to specify the presence of the stated features, integers, components, or operations, but do not exclude the presence or addition of one or more other features, integers, components, operations, actions, or groups.

Claims

1. A semiconductor processing method, the semiconductor processing method comprising: A deposition precursor is provided to a processing region of a semiconductor processing chamber, wherein the deposition precursor comprises a silicon-carbon and nitrogen-containing precursor, and wherein a substrate is disposed within the processing region; The plasma effluent that forms the deposition precursor; and A silicon-carbon-nitrogen material layer is deposited on the substrate, wherein the silicon-carbon-nitrogen material layer is characterized by having a dielectric constant of less than or about 4.0, and wherein the silicon-carbon-nitrogen material layer is characterized by having a leakage current of less than or about 3E-08 A / cm at 2 MV / cm. 2 .

2. The semiconductor processing method of claim 1, wherein the silicon-carbon-nitrogen precursor comprises more than or about four methyl groups.

3. The semiconductor processing method of claim 1, wherein the silicon-carbon and nitrogen-containing precursor comprises hexamethylcyclotrisilazane (HMCTZ), hexamethyldisilazane (HMDS), bis(dimethylamino)-dimethylsilane (BDMADMS), bis(vinyldimethylsilyl)amine (BVDMSA), 1,3,5-trivinyl-1,3,5-trimethylcyclotrisilazane (3V3MCTZ), tri(dimethylamino)silane (TDMAS), bis(trimethylsilyl)methane, 1,1,3,3-tetramethyl-1,3-disilacyclobutane, trimethylsilane, or combinations thereof.

4. The semiconductor processing method of claim 1, wherein the deposition precursor further comprises a nitrogen-containing precursor.

5. The semiconductor processing method of claim 4, wherein the nitrogen-containing precursor comprises ammonia (NH3).

6. The semiconductor processing method of claim 1, further comprising: Helium, argon, or both are provided together with the deposition precursor.

7. The semiconductor processing method of claim 1, wherein the flow rate of the silicon-carbon and nitrogen-containing precursor is greater than or about 500 sccm.

8. The semiconductor processing method of claim 1, wherein the plasma effluent is formed at a plasma power of less than or about 1,500 W.

9. The semiconductor processing method of claim 6, wherein the temperature in the semiconductor processing chamber is maintained at a temperature greater than or about 200°C.

10. The semiconductor processing method of claim 1, wherein the pressure in the semiconductor processing chamber is maintained at less than or about 15 Torr.

11. The semiconductor processing method of claim 1, wherein the silicon-carbon-nitrogen-containing material layer is characterized in that it has a density of 0.001 A / cm 2 The breakdown voltage is greater than or about 5.5 MV / cm.

12. The semiconductor processing method of claim 1, wherein the silicon-carbon and nitrogen-containing material layer is characterized in that its dielectric constant is less than or about 3.

5.

13. A semiconductor processing method, the semiconductor processing method comprising: A deposition precursor is provided to a processing region of a semiconductor processing chamber, wherein the deposition precursor comprises a silicon-containing precursor comprising more than or about four methyl groups, and wherein a substrate is disposed within the processing region; The plasma effluent that forms the deposition precursor; and A silicon-carbon-nitrogen material layer is deposited on the substrate, wherein the silicon-carbon-nitrogen material layer is characterized by a dielectric constant of less than or about 4.

0.

14. The semiconductor processing method of claim 13, wherein the silicon-containing precursor further comprises nitrogen.

15. The semiconductor processing method of claim 13, wherein the deposition precursor further comprises a nitrogen-containing precursor, a hydrogen-containing precursor, or both.

16. The semiconductor processing method of claim 15, wherein the plasma effluent is formed at a plasma power of less than or about 1,000 W.

17. The semiconductor processing method of claim 13, wherein the silicon-carbon-nitrogen-containing material layer is characterized in that it has a density of 0.001 A / cm 2 The breakdown voltage is greater than or about 7.5 MV / cm.

18. The semiconductor processing method of claim 13, wherein the temperature within the processing region is maintained at or below 600°C.

19. A semiconductor processing method, the semiconductor processing method comprising: A deposition precursor is provided to a processing region of a semiconductor processing chamber, wherein the deposition precursor comprises a silicon-carbon and nitrogen-containing precursor, wherein the silicon-carbon and nitrogen-containing precursor comprises more than or about three methyl groups, and wherein a substrate is disposed within the processing region; Plasma effluent forming the deposition precursor at a plasma power of less than or about 1,500 W; and A silicon-carbon-nitrogen material layer is deposited on the substrate, wherein the silicon-carbon-nitrogen material layer is characterized by having a dielectric constant of less than or about 4.0, and wherein the silicon-carbon-nitrogen material layer is characterized by having a leakage current of less than or about 1E-08 A / cm at 2 MV / cm. 2 .

20. The semiconductor processing method of claim 19, wherein the silicon-carbon and nitrogen-containing precursor comprises hexamethylcyclotrisilazane (HMCTZ).

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