A fault diagnosis method and system for a solid state disk master control chip
By constructing health status correlation patterns through time series analysis and clustering algorithms, and combining decision tree and support vector machine algorithms, the diagnostic strategy is dynamically adjusted, which solves the problem of fault diagnosis of solid-state drive controller chips in complex environments, and realizes accurate fault location and comprehensive assessment of system health status.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ZHEJIANG RUIZHAOXIN SEMICON TECH CO LTD
- Filing Date
- 2026-05-08
- Publication Date
- 2026-06-05
AI Technical Summary
Existing technologies struggle to accurately diagnose faults in solid-state drive controller chips under complex operating environments, especially under high load conditions. Traditional methods are prone to false alarms or missed alarms, and it is difficult to build an adaptive mechanism to dynamically adjust the diagnostic strategy, affecting the timeliness and accuracy of fault warnings.
By collecting the main control chip's operation logs, latency distribution data, and multi-source information, a health status correlation pattern is constructed using time series analysis and clustering algorithms. Combined with decision tree and support vector machine algorithms, the evaluation criteria are dynamically adjusted, normal fluctuations are filtered out, and an adaptive model is built to achieve accurate fault location and risk assessment.
It improves the accuracy of fault identification under high load and heterogeneous environments, reduces false judgments, and enables precise location of complex fault scenarios and comprehensive assessment of system health status, forming a closed-loop process from data acquisition to strategy optimization.
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Figure CN122152584A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of solid-state drive technology, and in particular to a fault diagnosis method and system for solid-state drive controller chips. Background Technology
[0002] In solid-state drive (SSD) health monitoring and fault diagnosis, a key direction for current technological development is how to accurately assess the operating status of the controller chip through dynamic analysis of multi-source data. During actual operation, the SSD controller chip undertakes core tasks such as data reading and writing, error correction, and garbage collection. Its operating logs, latency distribution, and environmental parameters are intertwined and complex, making it difficult to accurately distinguish between normal fluctuations and potential faults using fixed thresholds or single indicators, easily leading to missed or false alarms. Especially under high load or complex operating environments, extracting effective dynamic change features from time-series data and establishing a reliable correlation between them and health status has become a pressing technical challenge.
[0003] Furthermore, the effective integration of historical logs and real-time signals during fault diagnosis also faces challenges. Traditional methods often struggle to handle the nonlinear coupling between multiple sources of information, especially when latency fluctuations exceed preset thresholds, and interference from external environmental factors can easily lead to misjudgments. How to build an adaptive mechanism to dynamically adjust diagnostic strategies and accurately locate the root cause of faults in complex fault scenarios, rather than being misled by normal fluctuations, is another technical bottleneck in current SSD controller chip fault diagnosis. Failure to effectively address this issue will directly affect the timeliness and accuracy of fault warnings.
[0004] Furthermore, assessing the overall risk level of a system requires integrating the relationships between multiple information sources. However, due to differences in the weight and reliability of different data sources, the assessment results are often biased and fail to accurately reflect the system's health status. Therefore, establishing a dynamic and optimizable assessment system to continuously improve diagnostic accuracy through ongoing feedback and form a closed-loop mechanism from fault identification to risk assessment has become an important direction for improving the stability and reliability of solid-state drive systems. Summary of the Invention
[0005] This application provides a fault diagnosis method and system for solid-state drive (SSD) controller chips, which improves the accuracy of fault warning and the adaptability of diagnostic strategies for SSD controller chips.
[0006] In a first aspect, this application provides a fault diagnosis method for solid-state drive controller chips, including: S1. Collect the operation log, latency distribution data and multi-source information of the solid-state drive controller chip, process the operation log, latency distribution data and multi-source information using time series analysis methods, generate a time series dataset, and obtain dynamic change characteristics based on the time series dataset; S2. Based on the dynamic change characteristics, combined with clustering algorithms, determine the association pattern of the health status of the solid-state drive controller chip; S3. If the correlation mode shows that the delay fluctuation exceeds the preset fluctuation threshold, the evaluation criteria are adjusted by integrating the multi-source information of the solid-state drive controller chip to identify potential abnormal fluctuations. S4. Use the decision tree algorithm to integrate the potential abnormal fluctuations and operation logs to obtain early warning indicators. Based on the early warning indicators, construct an adaptive model for complex fault scenarios and determine the update path of the diagnostic strategy. S5. If the update path involves a high-load operating environment, an anomaly detection mechanism is used to filter normal fluctuations in the operating data to obtain fault location. S6. Classify and integrate the multi-source information related to the fault location according to the data source, assess the overall risk level of the system performance where the solid-state drive controller chip is located, and generate a health status report.
[0007] Secondly, this application provides a fault diagnosis system for solid-state drive controller chips, comprising: The dynamic feature extraction module is used to collect the operation logs, latency distribution data and multi-source information of the solid-state drive controller chip, process the operation logs, latency distribution data and multi-source information using time series analysis methods, generate a time series dataset, and obtain dynamic change features based on the time series dataset; The health mode association module is used to determine the association mode of the health status of the solid-state drive controller chip based on the dynamic change characteristics and in combination with a clustering algorithm. The evaluation standard adjustment module is used to adjust the evaluation standard by integrating multi-source information from the solid-state drive controller chip if the latency fluctuation shown by the correlation mode exceeds a preset fluctuation threshold, thereby identifying potential abnormal fluctuations. The early warning model construction module is used to integrate the potential abnormal fluctuations and operation logs using a decision tree algorithm to obtain early warning indicators, and to construct an adaptive model for complex fault scenarios based on the early warning indicators to determine the update path of the diagnostic strategy. The high-load fault location module is used to filter normal fluctuations in operating data using an anomaly detection mechanism to obtain fault location if the update path involves a high-load operating environment. The overall risk assessment module is used to classify and integrate multi-source information related to the fault location according to the data source, assess the overall risk level of the system performance where the solid-state drive controller chip is located, and generate a health status report.
[0008] Thirdly, this application provides a computer device comprising: a memory and at least one processor, wherein the memory stores machine-readable instructions executable by the processor, and when the computer device is running, the processor communicates with the memory via a bus, and when the machine-readable instructions are executed by the processor, the steps of the above-described fault diagnosis method for a solid-state drive controller chip are performed.
[0009] Compared with the prior art, the beneficial effects of this application are at least as follows: 1. By integrating the main control chip's operation logs, latency distribution, and multi-source environmental information, and using time series analysis and clustering algorithms to construct a correlation pattern of health status, this application avoids the misjudgment problem caused by a single indicator or fixed threshold in complex operating scenarios of traditional methods. Compared with existing technologies, this application is more accurate in identifying abnormal fluctuations in high-load and heterogeneous environments and has stronger anti-interference capabilities.
[0010] 2. By constructing an adaptive model after obtaining early warning indicators, dynamically adjusting the update path of the diagnostic strategy, and filtering normal fluctuations by combining an anomaly detection mechanism, the root cause of the fault in complex fault scenarios is accurately located. Compared with the traditional method that relies on static rules or experience thresholds, this application has better adaptability in dealing with multi-fault coupled scenarios.
[0011] 3. By classifying and integrating multi-source information related to fault location according to its source, and by combining correlation analysis with risk stratification assessment, the overall risk level of the system where the solid-state drive controller chip is located is systematically assessed. Compared with the single-dimensional risk judgment in the prior art, this application can more realistically reflect the health status of the system in terms of the comprehensiveness of data fusion and risk assessment.
[0012] 4. By feeding the generated health status report back to the dynamic evaluation system, a closed-loop process is formed from data collection and fault identification to strategy optimization. This solves the problem of static and difficult-to-iterate-optimize diagnostic methods in the existing technology, enabling the diagnostic strategy to be continuously updated and the evaluation parameters to be adaptively adjusted. Attached Figure Description
[0013] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0014] Figure 1 This is a flowchart of a fault diagnosis method for a solid-state drive controller chip according to this application; Figure 2 This is a graph showing the trend of the diagnostic accuracy of this application as the strategy is updated; Figure 3 This is a schematic diagram of a fault diagnosis system for a solid-state drive controller chip according to this application; Figure 4 This is a schematic block diagram of a fault diagnosis device for a solid-state drive controller chip according to this application. Detailed Implementation
[0015] This application provides a fault diagnosis method and system for solid-state drive controller chips. The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in a sequence other than that illustrated or described herein. Furthermore, the terms "comprising" or "having" and any variations thereof are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0016] For ease of understanding, the specific process of the embodiments of this application is described below. Please refer to [link / reference]. Figure 1 One embodiment of a fault diagnosis method for a solid-state drive controller chip in this application includes: Step S1: Collect the operation logs, latency distribution data, and multi-source information of the solid-state drive controller chip. Use time series analysis methods to process the operation logs, latency distribution data, and multi-source information to generate a time series dataset. Based on the time series dataset, obtain dynamic change characteristics.
[0017] In one specific embodiment, the process of performing step S1 may specifically include the following steps: The system collects operation logs, latency distribution data, and multi-source information including main controller chip operation parameters, environmental parameters, and system load parameters from the main controller chip via the solid-state drive interface protocol. Time series analysis methods were used to clean the operation logs, latency distribution data, and multi-source information to obtain a time series dataset; Based on the time series dataset, key time points and events in the operation log are extracted, and the fluctuation of the main control chip's operating status is identified by combining the delay distribution data to obtain the status fluctuation characteristics. Based on the characteristics of state fluctuations, the variation pattern of delay distribution in different time periods is analyzed to obtain the delay variation pattern. Based on the delay variation pattern and state fluctuation characteristics, the delay characteristics of the main control chip are identified, and potential performance bottlenecks are determined. Time series analysis is used to decompose potential performance bottlenecks into time distributions to obtain dynamic change characteristics.
[0018] Specifically, the system collects operation logs, latency distribution data, and multi-source information including controller chip operating parameters, environmental parameters, and system load parameters from the controller chip via the solid-state drive's interface protocol. The interface protocol can use NVMe or SATA, and data is acquired through manufacturer-provided debugging interfaces or custom monitoring command sets via periodic polling. The operation logs record the controller chip's status information during read / write operations, garbage collection, wear leveling, and other tasks, including fields such as operation type, timestamp, and error count. Latency distribution data records the response time of each read / write operation, and can be statistically analyzed by time window, including mean, maximum, and percentile values. The multi-source information further covers the controller chip's operating parameters such as temperature, voltage, and operating frequency; environmental parameters such as temperature and humidity of the solid-state drive's environment; and system load parameters such as read / write operations per second and queue depth on the host side. The collected raw data may be discontinuous in time, contain outliers, or have inconsistent units; therefore, time series analysis methods are needed to clean the operation logs, latency distribution data, and multi-source information to obtain a time series dataset. The cleaning process first uses linear interpolation or forward imputation to handle missing data points caused by acquisition interruptions, ensuring the continuity of the time series. Then, it employs outlier detection methods based on statistical distributions, such as marking data points exceeding the mean ± 3 standard deviations as outliers. Next, it uses a time window-based smoothing method to process the outliers: for a single isolated outlier, it replaces the outlier with the weighted average of the normal values at the two times before and after it (if any), with the weight inversely proportional to the time distance (i.e., the closer the time, the higher the weight); for consecutive outlier sequences, if the number of consecutive outliers does not exceed three, linear interpolation is used, with the first normal value before and after the outlier sequence as the endpoint for linear imputation; if the number of consecutive outliers exceeds three, the entire consecutive outlier sequence is marked as missing data, not replaced, and removed in subsequent analysis. For the removed data points, the timestamps are retained in the time series, but the data fields are marked as null values to ensure the continuity of the time axis. Finally, the parameters of different dimensions in the multi-source information are normalized to uniformly map them to the [0,1] interval, eliminating the impact of the difference in dimensions on subsequent analysis and forming a regular time series dataset.
[0019] Based on the time-series dataset, key time points and events are extracted from the operation logs. Key time points can be extracted using a sliding window method, for example, setting the window length to 1 minute. Within each window, the number of error events is counted. When the frequency of an error event exceeds 1.5 times the historical average, the start time of that window is marked as a key time point. Key events include semantically clear events such as read / write operation timeouts, a sudden increase in error correction code counts, and temperature alarms. Then, latency distribution data is used to identify fluctuations in the main control chip's operating status. Specifically, an analysis window is formed by extending 30 seconds forward and backward from each key time point. The mean, variance, and difference between the latency distribution data within this window and the latency mean outside the window (i.e., during normal operation) are calculated. When the latency mean within the window exceeds the latency mean outside the window by more than two standard deviations, a status fluctuation is determined within that window. The occurrence time, duration, latency mean increase, and associated key event type of each status fluctuation are combined into a multi-dimensional vector, which represents a status fluctuation feature. By traversing all key time points in this way, a set of features representing the fluctuations in the operating state of the main control chip can be obtained.
[0020] Based on the acquired set of state fluctuation characteristics, the variation patterns of delay distribution over different time periods are analyzed to obtain delay variation patterns. This analysis can employ Fourier transform to extract periodic components from the delay sequence, such as identifying periodic fluctuations consistent with the waste collection cycle; or it can use autocorrelation analysis to calculate the autocorrelation coefficients of the delay sequence at different time offsets to determine the main period and duration of delay fluctuations.
[0021] Based on latency variation patterns and state fluctuation characteristics, the latency features of the main control chip are identified to determine potential performance bottlenecks. Latency features include the baseline latency level, fluctuation amplitude, fluctuation frequency, and duration of abnormal latency. Performance bottlenecks can be identified through correlation analysis. For example, when a latency surge occurs simultaneously with a high-load operation, the processing flow corresponding to that operation type can be marked as a potential bottleneck; when latency fluctuations are highly correlated with temperature changes, thermal management mechanisms or heat dissipation conditions can be listed as potential bottlenecks.
[0022] Finally, time series analysis is used to decompose the potential performance bottlenecks into their time distribution, revealing their dynamic characteristics. This decomposition process employs empirical mode decomposition (EMD), which decomposes the delay signal at the bottleneck into multiple intrinsic mode functions (IMFs) and a residual term. Each IMF corresponds to a fluctuation component at a different time scale, thereby separating the long-term trend component, periodic fluctuation component, and random noise component. Ultimately, this yields dynamic characteristics that reflect the essential laws governing the main control chip's operating state.
[0023] The above steps, starting from the underlying interface protocol, complete the process from raw data collection to structured feature extraction, clarify the specific implementation methods of key operations such as data cleaning, anomaly handling, and normalization, and reveal the periodic patterns and bottleneck distribution behind the delay fluctuations through time series analysis and decomposition methods.
[0024] Step S2: Based on dynamic change characteristics and combined with clustering algorithms, determine the association patterns of the health status of the solid-state drive controller chip.
[0025] In one specific embodiment, the process of performing step S2 may specifically include the following steps: Based on dynamic change characteristics, data segments of key time periods related to the operating status of solid-state drive controller chips are extracted from time series datasets to obtain preliminary classification criteria for status classification. Clustering algorithms are used to group the data fragments used for preliminary classification and divide them into operational status categories corresponding to different health levels; The operation status category that exceeds the preset abnormality level is marked as an abnormal status category, and the original data source corresponding to the abnormal status category is traced to obtain the source tracing record; Based on the source tracing records, a continuous tracking mechanism for the health status of solid-state drive controller chips is constructed to obtain the long-term trend of the controller chip's operating status. If the long-term trend deviates from the preset trend range, the status classification will be automatically adjusted to determine the association mode of the health status of the solid-state drive controller chip.
[0026] Specifically, based on dynamic change characteristics, key time period data segments related to the operating status of the solid-state drive controller chip are extracted from the time series dataset to obtain the preliminary classification basis for status classification. The extraction of key time periods can be achieved by setting trigger conditions. For example, when the local fluctuation amplitude of the latency sequence exceeds 1.2 times the historical average (this threshold is more lenient than the 1.5 times in step S1, aiming to capture patterned changes over a period of time rather than instantaneous events), the time window before and after the fluctuation is extracted as a key time period data segment; or when the frequency of error events exceeds a preset threshold for three consecutive time windows, the corresponding time period is marked as a key time period. Each data segment contains multi-dimensional features such as the mean latency, latency variance, operation frequency, error rate, and temperature change rate within that time period. These features together constitute the preliminary classification basis for status classification.
[0027] Clustering algorithms are used to group the data fragments used for preliminary classification, dividing them into operational status categories corresponding to different health levels. K-means clustering or density-based clustering algorithms can be used; this step uses K-means clustering as an example. The input to the clustering algorithm is all extracted data fragments, each fragment serving as a sample point, and its multidimensional features constitute the sample's feature vector. Before clustering, each feature dimension is normalized, mapping features with different dimensions, such as delay mean and operation frequency, to the [0,1] interval to avoid one feature dominating the clustering result due to excessively large dimensions. The number of cluster centers K is determined in the following ways: historical fault records are collected, each containing a feature vector and a health status label marked by maintenance personnel; a classification model is trained to count the number of decision boundaries; the number of decision boundaries is incremented by one to obtain the K value, and K is limited to between two and eight; or the K value with the largest silhouette coefficient is selected using the silhouette coefficient method. After determining the K value, four health levels are identified: normal state, watchful state, warning state, and abnormal state. The clustering process is achieved through iterative optimization: K cluster centers are randomly initialized, the Euclidean distance from each sample point to each cluster center is calculated, and the sample point is assigned to the category of the nearest cluster center; then, the cluster center of each category is recalculated, which is the feature mean of all sample points in that category; the above process is repeated until the cluster centers no longer change significantly or the preset number of iterations is reached. After clustering converges, each data segment is assigned to the corresponding running state category, and the distribution of different categories in the feature space shows obvious separability.
[0028] To label abnormal state categories, a "preset abnormality level" needs to be defined. One feasible definition is: calculate a comprehensive abnormality score based on key risk indicators (e.g., mean latency and error rate) for all sample points within each cluster. Specifically, first, calculate the median mean latency and median error rate for all sample points within the cluster, normalize them (by dividing by their respective maximum values across all clusters), then sum and average the two scores to obtain the abnormality score for that cluster. Set an abnormality score threshold of 0.7. When the abnormality score of a cluster exceeds 0.7, the corresponding operational state category for that cluster is labeled as an abnormal state category. Trace the original data source corresponding to the abnormal state category to obtain source tracing records. Source tracing is achieved by establishing a mapping relationship between data fragments and the original collected data. Each data fragment, when extracted, records its start and end timestamps and corresponding data indexes in the time series dataset. Through this mapping relationship, the original operational log entries, latency distribution records, and relevant parameter values in multi-source information corresponding to the abnormal state category can be located.
[0029] Based on source tracing records, a continuous tracking mechanism for the health status of solid-state drive (SSD) controller chips is constructed. This mechanism is specifically built as follows: a "health status tracking table" is created in system memory or persistent storage. This table contains at least the following fields: timestamp, data fragment ID, operating status category (e.g., normal, watch out, warning, abnormal), abnormal score (if it is an abnormal category), and associated original data index. Each time step S2 completes a cluster analysis (e.g., once per hour), the classification results of the latest batch of data fragments are appended as new records to this tracking table. By periodically querying and analyzing this tracking table, the long-term trend of the controller chip's operating status can be obtained, such as statistically analyzing the frequency of each category over the past 24 hours or plotting the change curve of each category's proportion over time.
[0030] To determine whether a long-term trend has deviated, a "preset trend range" needs to be defined. One feasible definition is as follows: Based on tracking data from historical normal operation periods (e.g., the first 100 hours after a solid-state drive is manufactured), calculate the average number of occurrences and its standard deviation of the "abnormal state category" within a 24-hour sliding window. Simultaneously, calculate the frequency of events where the number of occurrences of the "warning state category" increases continuously for three consecutive windows. The preset trend range is set as follows: the number of abnormal state occurrences ≤ average number of occurrences + 2 * standard deviation, and the number of consecutive windows of increasing warning status ≤ 2 times / week. When a long-term trend is detected to exceed this range, an automatic adjustment mechanism for state classification is triggered.
[0031] The automatic adjustment mechanism is implemented as follows: instead of re-executing the full, computationally expensive clustering algorithm, a fine-tuning strategy is adopted. New data fragments recently collected (e.g., within the past 24 hours) that have not yet been used in the current classification boundary calculation are used as a temporary sample set. The distances of these temporary samples to the existing cluster centers (i.e., the centers of normal, watch, warning, and abnormal clusters) are calculated. If most temporary samples can be correctly classified into existing categories, only the coordinates of each cluster center are updated (using the weighted average of samples within the original cluster and temporary samples). If the distances of a large number of temporary samples to the nearest cluster center are greater than a preset threshold, it indicates a significant change in the operating mode. At this point, a local, incremental clustering process is triggered: using only temporary samples as input, a K-means (K=2) algorithm is run once, dividing them into two new sub-clusters. These two sub-clusters are then merged into the nearest existing category, and the cluster centers of that category are adjusted accordingly. The association patterns determined after adjustment reflect the intrinsic relationships between latency fluctuations, load changes, environmental parameters, and health status.
[0032] Step S3: If the correlation mode shows that the latency fluctuation exceeds the preset fluctuation threshold, the evaluation criteria are adjusted by integrating the multi-source information of the solid-state drive controller chip to identify potential abnormal fluctuations.
[0033] In one specific embodiment, the process of performing step S3 may specifically include the following steps: If the correlation mode shows that the latency fluctuation of the solid-state drive controller chip exceeds the preset fluctuation threshold, then the multi-source information corresponding to the latency fluctuation is integrated to determine the initial impact range of the latency fluctuation. Based on the preliminary impact range, the support vector machine algorithm was used to analyze the correlation between delay fluctuations and multi-source information characteristics, and the classification results of potential risks were obtained. If the risk level of the potential risk classification results exceeds the preset risk threshold, the assessment criteria for delay fluctuations are adjusted by combining multi-source information to obtain the basis for fault determination. Based on the fault diagnosis criteria and combined with the real-time operating data of the solid-state drive controller chip, determine whether there is a continuous abnormal trend in latency fluctuations; If so, the correlation features between latency fluctuations and multi-source information features are extracted to determine the source of abnormal fluctuations and identify potential abnormal fluctuations in the solid-state drive controller chip.
[0034] Specifically, if the correlation mode shows that the latency fluctuation of the solid-state drive controller chip exceeds a preset fluctuation threshold, the detailed analysis process in this step is triggered. The preset fluctuation threshold is dynamically calculated from the correlation mode: all sample points corresponding to the normal state cluster are extracted from the correlation mode, and the statistical distribution of the latency mean field among these sample points is calculated. The mean of the normal state latency mean plus three standard deviations is used as the preset fluctuation threshold. When the value of a newly collected latency data point exceeds this dynamic threshold, the latency fluctuation is considered to exceed the preset range.
[0035] By integrating multi-source information corresponding to the current period of delay fluctuation, the initial impact range of the delay fluctuation is determined. This initial impact range is determined through time-series correlation analysis: the correlation coefficients between the delay fluctuation sequence and various multi-source information sequences from the same period are calculated. The operational components corresponding to the parameters with the strongest correlation to the delay fluctuation sequence and the smallest time delay difference are marked as the initial impact range.
[0036] Based on the preliminary impact range, the Support Vector Machine (SVM) algorithm is used to analyze the correlation between delay fluctuation characteristics and multi-source information characteristics, obtaining the classification results of potential risks. The principle of SVM analysis is as follows: delay fluctuation characteristics (such as fluctuation amplitude and duration) and multi-source information characteristics (such as temperature change and load change rate) together constitute a multi-dimensional feature space. This feature space is mapped to a higher-dimensional space using a kernel function. In this higher-dimensional space, the optimal classification hyperplane that can separate samples of different risk levels by the maximum margin is found. The weight coefficients of each dimension of the normal vector of this hyperplane reflect the relative importance and mutual influence of each delay fluctuation characteristic and multi-source information characteristic in distinguishing different risk levels, thereby achieving the modeling and analysis of the nonlinear correlation between delay fluctuation characteristics and multi-source information characteristics. The SVM model used here needs to be pre-trained, and its training process is as follows: First, model structure definition. This step employs a multi-class support vector machine model based on radial basis function (RBF) kernel function, with four risk levels: high risk, medium risk, low risk, and no risk. The multi-class strategy uses a one-to-one approach, training a binary support vector machine between any two classes. The final risk level is determined by the voting results of all sub-models. The choice of RBF kernel function enables the model to capture the complex nonlinear relationship between delay fluctuation features and multi-source information features. The extraction method for multi-source information features is as follows: Multi-source information features are derived quantities extracted from the original multi-source information data collected in step S1, used to characterize the changing patterns of multi-source information during delay fluctuations. The specific extraction method is as follows: (1) Temperature change: Extract the difference between the start and end values of the temperature sequence of the main control chip within the time window of the delayed fluctuation. If the temperature shows a continuous upward trend, take a positive value; if it shows a downward trend, take a negative value. At the same time, extract the difference between the maximum and minimum values of the temperature within the time window as the temperature fluctuation amplitude.
[0037] (2) Load change rate: Extract the difference between the start and end values of the read and write counts per second sequence on the host side within the time window of the delay fluctuation, divide it by the length of the time window to obtain the load change per unit time; at the same time, extract the standard deviation of the load sequence within the time window as the load fluctuation intensity.
[0038] (3) Error code occurrence frequency: The total number of times various error codes occur within the time window of the delay fluctuation is counted from the operation log, and divided by the length of the time window to obtain the error code occurrence frequency per unit time.
[0039] (4) Preliminary impact range flag: Based on the preliminary impact range determined in step S3, determine whether it involves the thermal management link, read / write scheduling link, and garbage collection link respectively. If so, the corresponding flag is set to 1; otherwise, it is set to 0.
[0040] The aforementioned multi-source information features, together with the delay fluctuation features (delay fluctuation amplitude, fluctuation duration, and rise rate), constitute the complete input feature vector of the support vector machine model.
[0041] Second, the input feature vector is defined. The feature vector of each training sample consists of the following fields in a fixed order: latency fluctuation amplitude, fluctuation duration, rise rate, temperature change, load change rate, error code frequency, and three Boolean flags indicating whether the initial impact range involves thermal management, read / write scheduling, and garbage collection. The combination of these features allows the model to automatically learn during training: when the temperature change and load change rate are in a certain combination, a specific amplitude of latency fluctuation will correspond to a higher risk level, thus quantifying the correlation strength between latency fluctuation features and multi-source information features.
[0042] Third, construct the training dataset. Delay fluctuation events from historical operation records are collected as the training sample set. Each sample contains the aforementioned feature vector and a manually labeled risk level. The training sample set is divided into a training subset and a validation subset according to a predetermined ratio.
[0043] Fourth, kernel function and parameter selection. A radial basis function kernel is used. The model needs to optimize two hyperparameters: the penalty factor and the kernel function parameters. Parameter selection is achieved using a grid search method combined with cross-validation: the candidate set of the penalty factor C is a sequence of powers of 2, ranging from... arrive The candidate value set for the kernel function parameter γ takes the sequence of powers of 2, and its range is... arrive On a pre-defined set of candidate values, cross-validation is performed on each parameter combination, and the set of parameters that results in the highest average classification accuracy on the validation subset is selected as the optimal hyperparameters.
[0044] Fifth, model training. After determining the optimal hyperparameters, the final classification model is trained using the entire training subset. The training process is transformed into solving a convex quadratic programming problem to obtain the support vectors and weight coefficients of each binary sub-model. After training, the model parameters, support vectors, kernel function type, and normalized parameters of each feature dimension are saved as a model file.
[0045] Sixth, model update mechanism. The model adopts a periodic retraining update strategy. After a fixed time period, the system automatically collects newly generated delay fluctuation events that have been verified by subsequent actual fault results within that period, adds them to the training sample set, and then retrains the support vector machine model on the entire updated training sample set.
[0046] Seventh, online prediction. In the online prediction phase, feature vectors of the current delayed fluctuation events are extracted in the same way, normalized using the normalization parameters saved during the training phase, and then input into a multi-class support vector machine model. The risk level is then voted out by each binary sub-model as the classification result of the potential risk.
[0047] If the risk level of the potential risk classification results exceeds the preset risk threshold, the evaluation criteria for delay fluctuations are adjusted by combining multi-source information to obtain the basis for fault determination. The preset risk threshold is set to a medium risk level, meaning that adjustment is triggered when the risk level output by the support vector machine is medium or high risk. The specific rules for adjusting the evaluation criteria are as follows: First, a baseline delay threshold is determined. This threshold is calculated statistically based on the mean delay of all sample points within the normal state cluster in the clustering analysis results of step S2. The average delay mean is added to the standard deviation of a preset multiple, which is determined based on the trade-off between false alarm rate and false negative rate in the actual application scenario. Second, an environmental compensation factor is introduced. The environmental compensation factor is determined based on the degree of deviation between the current environmental parameters and the standard environmental parameters. When the ambient temperature or load level is higher than the standard operating range, the environmental compensation factor takes a value greater than the baseline value. When the environmental parameters are within the standard operating range, the environmental compensation factor takes the baseline value. The adjusted dynamic delay threshold is equal to the baseline delay threshold multiplied by an adjustment coefficient including the environmental compensation factor. The mapping relationship between the environmental compensation factor and the adjustment coefficient is determined through a pre-established correspondence table between environmental parameters and delay tolerance. This correspondence table is constructed based on the statistical regularity of delay fluctuations under different environmental conditions in historical operating data and is stored in the detection system for online querying. Finally, this dynamic delay threshold function is used as the basis for fault judgment to determine whether delay fluctuations in subsequent real-time operating data constitute abnormal events requiring further diagnosis.
[0048] Based on the fault diagnosis criteria and combined with the real-time operating data of the solid-state drive controller chip, it is determined whether there is a continuous abnormal trend in latency fluctuations. The judgment criteria are as follows: a sliding window of fixed length is set, and the average latency is calculated within each window. If the average latency of a predetermined number of consecutive windows exceeds the dynamic latency threshold calculated by the fault diagnosis criteria, and the growth rate of the average latency of adjacent windows is continuously positive, then a continuous abnormal trend is determined to exist.
[0049] If a persistent abnormal trend is identified, the correlation features between latency fluctuations and multi-source information characteristics are extracted to determine the source of the abnormal fluctuations and identify potential abnormal fluctuations in the SSD controller chip. The extraction of correlation features employs cross-correlation analysis to calculate the latency correlation coefficient between the latency sequence and each multi-source information sequence. The parameter source with the strongest correlation to latency fluctuations and the smallest latency difference is identified, and this parameter source is determined as the source of the abnormal fluctuation. All the above information is then packaged into a potential abnormal fluctuation data object.
[0050] The above steps, by integrating multi-source information and using support vector machines for risk classification, enable dynamic adjustment of the assessment criteria, allowing the judgment of latency fluctuations to adapt to changes in the operating environment and reducing misjudgments caused by external factors such as temperature and load.
[0051] Step S4: Use the decision tree algorithm to integrate potential abnormal fluctuations and operation logs to obtain early warning indicators. Based on the early warning indicators, construct an adaptive model for complex fault scenarios and determine the update path of the diagnostic strategy.
[0052] In one specific embodiment, the process of performing step S4 may specifically include the following steps: The operation logs associated with the solid-state drive controller chip and potential abnormal fluctuations are retrieved, and the potential abnormal fluctuations and operation logs are classified and processed using a decision tree algorithm to obtain preliminary early warning indicators. Based on the preliminary early warning indicators, we extract the abnormal points in potential abnormal fluctuations and compare them with the complex fault scenarios in the operation log to determine the risk level of the abnormal points. If the risk level exceeds the preset risk level, the risk evolution trend of potential abnormal fluctuations is analyzed by combining the time series information of the operation log, and the preset fault rule base is matched to obtain early warning indicators. Based on early warning indicators, an adaptive model is constructed by combining the fault characteristics of complex fault scenarios with historical fault cases to dynamically classify fault scenarios and determine the direction of adjustment of diagnostic strategies. Based on the adjustment direction, the diagnostic strategy is dynamically updated by combining the real-time operating data of the solid-state drive controller chip, and the update path of the diagnostic strategy is determined.
[0053] Specifically, the operation logs associated with the potential abnormal fluctuations output in step S3 are retrieved from the solid-state drive controller chip. A decision tree algorithm is used to classify the potential abnormal fluctuations and the operation logs to obtain preliminary warning indicators. The input feature vector of the decision tree model includes the following fields: the delay amplitude, fluctuation duration, and rise rate of the potential abnormal fluctuations, as well as the error code type, error code frequency, and operation type distribution within the associated time window in the operation logs. The output of the decision tree is the warning level, divided into four levels: Level 1 warning, Level 2 warning, Level 3 warning, and no warning. The decision tree is trained using abnormal fluctuation events with labeled actual fault consequences from historical data as training samples. Information gain ratio is used as the feature selection criterion, and the decision tree is constructed through recursive partitioning until all samples in the subset belong to the same warning level or the preset tree depth limit is reached.
[0054] Based on preliminary early warning indicators, anomaly points are extracted from potential abnormal fluctuations. An anomaly point refers to the specific moment when a local extreme value or abrupt change occurs in a latency value, error rate, or operation response time indicator within the time series of potential abnormal fluctuations. The indicator characteristics at the anomaly point are pattern matched with the event sequences in the operation log, and a sequence alignment algorithm is used to calculate the similarity. The most similar historical complex fault scenario is identified, and the actual fault severity of the scenario is used as the risk level of the current anomaly point.
[0055] If the risk level exceeds the preset risk level, the risk evolution trend of potential abnormal fluctuations is analyzed by combining time series information from the operation logs. The risk evolution trend analysis employs time series forecasting methods, extracting delay, error rate, and load sequences from the operation logs before and after the potential abnormal fluctuation, and constructing a vector autoregressive model. This model uses these three sequences as endogenous variables, and the model order is determined by the Akaike Information Criterion, selecting the order that minimizes the Akaike Information Criterion value within a preset maximum order range. Model parameters are estimated using the least squares method. Data within a fixed time window before the potential abnormal fluctuation occurs is used as the training set. After training, the model is used to recursively predict the numerical change trajectory of each indicator within a fixed future step size. Then, the predicted risk evolution trend is matched with rules in a preset fault rule base.
[0056] The construction process of the preset fault rule base is as follows: Historical fault cases are collected. Each case includes a delay sequence, error rate sequence, load sequence within a fixed time window before the fault occurs, and a fault type label confirmed after the fault occurs. A sequence pattern mining algorithm is used to extract rules from these cases. Specifically, firstly, the continuous values of each sequence in each case are discretized into several state levels according to quantiles, converting the continuous sequence into a discrete symbol sequence. Then, the PrefixSpan algorithm is used to mine frequent sequence patterns, setting a minimum support threshold of 5%, meaning that a pattern is only retained if it appears in at least 5% of the cases. Each frequent pattern is associated with its corresponding fault type to generate candidate rules. The condition part of the rule is the frequent pattern, and the conclusion part is the fault type and the average time interval from the start point of the pattern to the time of the fault occurrence. A confidence score is calculated for each candidate rule, defined as the proportion of cases containing the pattern where the corresponding fault actually occurs. Rules with a confidence score of not less than 80% are retained to form the preset fault rule base. Each rule is stored in the rule base as a structured record, containing four fields: pattern description, fault type, average warning time interval, and confidence score.
[0057] If a match is successful, the warning time window and warning confidence level corresponding to the rule will be output as early warning indicators. The warning confidence level is defined as the frequency of actual failures occurring after the rule has historically matched.
[0058] Based on early warning indicators, an adaptive model is constructed by combining the fault characteristics of complex fault scenarios with historical fault cases to dynamically classify fault scenarios and determine the direction of adjustment of diagnostic strategies.
[0059] The adaptive model adopts an incremental learning framework based on random forest, and its structure and construction process are as follows.
[0060] First, the model input is defined. The input to the adaptive model consists of two parts: one is the early warning indicator, which includes the warning level, warning time window, and warning confidence level; the other is the real-time operating data of the solid-state drive controller chip, including the current average latency, temperature, load, and error rate.
[0061] Second, the model output is defined. The output of the adaptive model is the type of fault scenario currently in which the fault scenario occurs. The fault scenario type is categorized into several predefined classes based on historical fault cases, including but not limited to: high temperature-triggered frequency reduction fault scenarios, high load queuing fault scenarios, garbage collection anomaly fault scenarios, and flash memory read interference fault scenarios.
[0062] Third, the initial training process. The adaptive model is built based on the random forest algorithm. The random forest consists of a fixed number of decision trees. During training, each decision tree uses a bootstrap sampling method to randomly select the same number of training samples from the historical failure case dataset, and at each node, a subset of features is randomly selected for optimal splitting. The decision trees grow using a full growth strategy without pruning. The final failure scenario classification result is determined by the voting results of all decision trees.
[0063] Fourth, the incremental update mechanism. When a new failure case occurs, its features and labels are added to the historical failure case dataset. Incremental updates employ a periodic full retraining strategy, meaning that at fixed time intervals, the entire random forest model is retrained using the updated complete dataset, replacing the old model. This strategy ensures that the model can adapt to constantly emerging new failure modes while avoiding the complexity of online incremental update algorithms.
[0064] Fifth, determine the adjustment direction. After the adaptive model outputs the fault scenario type, the adjustment direction of the diagnostic strategy is determined according to the preset scenario-action mapping rules. For example, if the current scenario is classified as a high-temperature triggered frequency reduction fault scenario, the adjustment direction is to prioritize checking the heat dissipation conditions and temperature control parameters; if it is classified as a high-load queuing fault scenario, the adjustment direction is to optimize the command scheduling algorithm or increase cache resources.
[0065] Based on the adjustment direction and combined with real-time operating data of the SSD controller chip, the diagnostic strategy is dynamically updated to determine the update path. Dynamic updating of the diagnostic strategy refers to modifying the judgment logic, trigger thresholds, or processing priorities of each step in the diagnostic process according to the adjustment direction. The update path is a structured data object containing the following fields: adjustment direction identifier, list of modules to be updated, specific update operations for each module, execution order of update operations, and dependencies between modules. After the update path is determined, the system executes the strategy update operations of each module sequentially according to the execution order defined in the path, ensuring that the strategy adjustments between modules can take effect collaboratively without conflict. The update path also serves as the final output of this step.
[0066] refer to Figure 2 The figure shows the trend of diagnostic accuracy as the strategy is updated, demonstrating that the adaptive model can continuously optimize the diagnostic strategy and improve the accuracy of fault warning.
[0067] The above steps establish a complete link from abnormal fluctuation identification to diagnostic strategy adjustment through decision tree classification, risk evolution trend analysis, adaptive model construction, and dynamic updating of diagnostic strategies.
[0068] Step S5: If the update path involves a high-load operating environment, an anomaly detection mechanism is used to filter out normal fluctuations in the operating data to obtain fault location.
[0069] In one specific embodiment, the process of performing step S5 may specifically include the following steps: If the update path involves a high-load operating environment, the real-time operating load data of the solid-state drive controller chip is collected to obtain a load change record; If the operating load recorded by the load change exceeds the preset load threshold, an anomaly detection mechanism is used to analyze the real-time operating data, filter out abnormal fluctuation points, and determine potential fault triggering conditions. Based on potential fault triggering conditions, standard fluctuation patterns under historical high-load scenarios are retrieved for matching, and normal load fluctuations and abnormal fault fluctuations in the operating data are distinguished, and normal fluctuation data is filtered out. Based on the filtering results, the original data source of the abnormal fluctuations and the fault triggering link are traced to obtain the fault location of the solid-state drive controller chip.
[0070] Specifically, if the update path output in step S4 contains load-related policy adjustment items, such as adjusting the high load judgment threshold or modifying load-related anomaly detection parameters, then the update path is determined to involve a high load operating environment, triggering the detailed analysis process of this step.
[0071] Real-time operational load data of the solid-state drive (SSD) controller chip is collected to obtain load change records. This real-time load data includes host-side read / write operations per second, queue depth, bandwidth utilization, and the length of the command processing queue within the controller chip. The collection process employs continuous sampling, with the sampling interval dynamically adjusted based on the drastic changes in load.
[0072] If the operating load in the load change record exceeds the preset load threshold, an anomaly detection mechanism is used to analyze the real-time operating data, filter out abnormal fluctuation points, and determine potential fault triggering conditions.
[0073] The preset load threshold is measured as follows: queue depth is used as the primary load indicator, with the threshold set as a specific percentage of the maximum supported queue depth specified in the SSD's specifications; read / write operations per second (LPS) is used as an auxiliary load indicator, with the threshold set as a specific percentage of the nominal maximum LPS. When any load indicator in the load change record continuously exceeds its corresponding threshold for a predetermined time period, it is determined that the preset load threshold has been exceeded.
[0074] The anomaly detection mechanism uses the isolated forest algorithm, with the following parameter settings: the isolated forest contains 100 isolated trees; during the training of each isolated tree, 256 samples are randomly selected from the real-time running data as a subset; each isolated tree recursively divides the data by randomly selecting features and randomly selecting split values until the preset maximum tree depth is reached or it is no longer possible to divide.
[0075] For each data point, calculate its anomaly score within the isolated forest. The anomaly score is calculated based on the average path length of the data point across all isolated trees, with a score ranging from 0 to 1. An anomaly score threshold is set; data points with anomaly scores exceeding this threshold are marked as anomalous fluctuation points.
[0076] For each abnormal fluctuation point, the potential fault triggering conditions are determined by combining the operational context at the time of its occurrence. The potential fault triggering conditions are expressed in the form of conditional statements, which describe the rules that may trigger a fault under specific load conditions and indicator combinations.
[0077] Based on potential fault triggering conditions, standard fluctuation patterns from historical high-load scenarios are retrieved for matching, and normal load fluctuations and abnormal fault fluctuations in the operating data are distinguished, while normal fluctuation data is filtered out.
[0078] Standard fluctuation patterns under historical high-load scenarios are stored in a pattern library. The pattern library uses structured storage, and each pattern record contains the following fields: scenario type identifier, fluctuation pattern feature vector, typical duration, and expected indicator change range. The sources of standard fluctuation patterns include, but are not limited to: periodic load pulse patterns generated by read-write intensive applications during peak business periods, and short-term load increases and latency jitter patterns generated when garbage collection mechanisms are triggered.
[0079] The matching process uses a dynamic time warping algorithm to calculate the similarity between the waveform of the current abnormal fluctuation point and each standard waveform in the pattern library. The input of the dynamic time warping algorithm is two time series, and the output is the minimum distance between the two series. This distance is converted into a similarity score, with the score ranging from 0 to 1. A similarity threshold is set, and the method for determining the similarity threshold is as follows: based on the statistical analysis of labeled normal fluctuation samples and abnormal fault fluctuation samples under historical high load scenarios, the lower quantile of the similarity score between the normal fluctuation sample and the standard waveform is used as the threshold, so that normal fluctuations can be effectively identified and abnormal fault fluctuations are not falsely filtered. This threshold is calculated and stored in the pattern library during system initialization, and is recalculated and adjusted after each pattern library update. If the similarity score with a normal fluctuation pattern is greater than or equal to the threshold, the fluctuation is judged as a normal load fluctuation and filtered out; if the similarity score with all normal fluctuation patterns is less than the threshold, it is judged as an abnormal fault fluctuation and retained.
[0080] Based on the abnormal fault fluctuations retained after filtering, the original data source of the abnormal fluctuations and the fault triggering link are traced to obtain the fault location of the solid-state drive controller chip.
[0081] The tracing process begins by using data lineage tracing technology to trace back along the path of data collection, processing, and aggregation to determine the original operational log entries, latency distribution records, and multi-source information parameters corresponding to the abnormal fluctuation. Data lineage tracing is achieved by maintaining metadata for each data point, including data source identifiers, collection timestamps, and processing path records.
[0082] The fault-triggered link is constructed using a Bayesian network-based causal inference method. The specific steps are as follows: starting from the moment of the abnormal fluctuation, time-series data of all relevant indicators within a predetermined time window before and after that moment are collected; an initial causal graph is constructed based on domain knowledge, where nodes represent various indicator variables and directed edges represent possible causal relationships; a Bayesian network structure learning algorithm is used to test the conditional independence relationships between nodes based on the data, and the structure of the causal graph is adjusted; the most probable fault propagation path is determined by calculating the posterior probability of each causal path. The final constructed fault-triggered link is represented in the form of a directed graph, where nodes are fault events or abnormal indicators, edges are causal relationships, and the confidence level of each edge is labeled.
[0083] By tracing the original data source and constructing the fault triggering chain, the root cause of the abnormal fluctuations and the specific module in which they occurred were ultimately located. The fault location results are encapsulated as a structured data object, containing the following fields: fault occurrence time window, fault module identifier, fault type classification, root cause description, fault triggering chain diagram, and associated original data index.
[0084] Step S6: Classify and integrate the multi-source information related to fault location according to the data source, assess the overall risk level of the system performance where the solid-state drive controller chip is located, and generate a health status report.
[0085] In one specific embodiment, the process of performing step S6 may specifically include the following steps: Multi-source information related to fault location is extracted from the time series dataset to obtain the core analysis dataset; For the core analysis dataset, the multi-source information is classified and integrated according to the data source to obtain a set of indicators corresponding to system performance; For the set of indicators, the operational deviations of each performance indicator are compared through correlation analysis to determine the basis for risk assessment of system performance; If the risk assessment indicates abnormal fluctuations in system performance, the original data source and impact chain of the abnormal fluctuations will be traced to obtain the anomaly tracing results. Based on the results of anomaly tracing, and combined with the operational deviations of various performance indicators, risk levels are stratified and classified to assess the overall risk level of the system performance where the solid-state drive controller chip is located. By integrating the overall risk level and fault location, a health status report of the solid-state drive controller chip is generated.
[0086] Specifically, multi-source information related to the fault location obtained in step S5 is extracted from the time-series dataset generated in step S1 to obtain the core analysis dataset. The extraction filtering conditions include: the fault occurrence time window in the fault location as the time range; and the fault module and fault type in the fault location as filter labels. The core analysis dataset contains operation log entries, delay distribution statistics, main control chip operating parameters, environmental parameters, and system load parameters related to the fault module within this time window. Simultaneously, data from an extended time window prior to the fault occurrence is extracted as a baseline comparison window.
[0087] For the core analysis dataset, multi-source information is categorized and integrated according to its source to obtain a set of indicators corresponding to system performance. The data sources are divided into two main categories: internal sources from the main control chip and external sources. The subset of indicators from internal sources includes operation counts, error counts, and command processing times from the operation logs; the subset of indicators from external sources includes read / write bandwidth, read / write operations per second, and queue depth collected from the host side. Each subset of indicators contains multiple performance indicators related to that source and their time-series values.
[0088] For the set of indicators, the operational deviations of each performance indicator are compared through correlation analysis to determine the basis for risk assessment of system performance.
[0089] Operational deviation refers to the degree of difference between the actual values of each indicator and the normal baseline values under the current operating state. The normal baseline value is dynamically calculated based on historical normal operating data, selecting data from when the solid-state drive is in good health, and taking the average value of each indicator within the same period as the baseline value. The baseline value is updated every 7 days. The update method is as follows: taking the data from the past 30 days of good health as the endpoint, recalculating the average value of each indicator as the new baseline value, and replacing the original baseline value.
[0090] The correlation analysis employed canonical correlation analysis. The first set of variables, including fault type code, fault module identification, and fault duration, were used to identify fault location-related characteristic variables. The second set of variables consisted of the deviations of various performance indicators. The goal of canonical correlation analysis was to find the linear combinations of the first and second sets of variables that maximized the correlation coefficient between the two sets. The calculated canonical correlation coefficients reflected the overall strength of the association between fault location and performance indicator deviations. Simultaneously, partial correlation analysis was used to eliminate the influence of other variables, yielding the net deviation of each performance indicator after controlling for other factors. By synthesizing the correlation analysis results, the key risk factors causing the fault were identified, and the deviations were determined to be normal fluctuations, forming the basis for risk assessment of system performance.
[0091] If the risk assessment indicates abnormal fluctuations in system performance, the original data source and impact chain of the abnormal fluctuations will be traced to obtain the anomaly tracing results.
[0092] The criteria for judging abnormal fluctuations are: the operational deviation of one or more performance indicators exceeds a preset deviation threshold, and the partial correlation coefficient between this indicator and fault location exceeds a predetermined threshold. The deviation threshold is measured as a relative deviation percentage, with the unit being percentage, and a specific value is set as the threshold.
[0093] The tracing process employs a cause-effect graph method. Starting with fault location, a causal relationship graph in the form of a directed acyclic graph is constructed by combining the temporal sequence relationships and partial correlation analysis results among various indicators. The construction steps of the causal graph are as follows: First, the fault event in fault location is taken as the root node; second, performance indicators that have a significant partial correlation with the fault event and are temporally later than the fault occurrence are taken as child nodes, and directed edges are added; then, for each newly added indicator node, other indicators that have a significant partial correlation with it and are temporally later than that indicator are identified, and directed edges are added; finally, the causal graph is pruned through a conditional independence test, removing edges that do not satisfy the conditional independence assumption. The constructed causal graph records the propagation path of abnormal fluctuations in the system, that is, the influence link from the root cause of the fault to the abnormal performance of various performance indicators.
[0094] Based on the results of anomaly tracing, and combined with the operational deviations of various performance indicators, risk levels are stratified and classified to assess the overall risk level of the system performance where the solid-state drive controller chip is located.
[0095] The risk level stratification adopts a multi-indicator weighted comprehensive evaluation method. First, the operational deviations of each performance indicator are normalized, mapping deviations of different dimensions and magnitudes to a uniform range of 0 to 1. Then, based on the propagation depth and number of branches in the causal graph of the anomaly tracing results, a weight coefficient is assigned to each affected performance indicator. The rule for determining the weight coefficient is: in the causal graph, the closer the indicator is to the root node, the higher its weight; the longer the propagation path, the lower the weight; when multiple branches appear on the same path, the weight of the branch indicators is evenly distributed according to the number of branches. A weighted summation method is used to calculate the comprehensive risk score, that is, summing the products of the normalized deviation value of each indicator and its corresponding weight. For example, suppose in a fault diagnosis, the causal graph contains a root node (fault event) and three affected performance indicators A, B, and C. Indicator A is a direct child node of the root node, with a distance of 1; Indicator B is a child node of indicator A, with a distance of 2; Indicator C and Indicator B are both child nodes of indicator A, forming two branches. According to the weighting rules: First, calculate the base weight of each indicator. The base weight for a distance of 1 is 1.0. For each additional 1 unit of distance, the base weight is multiplied by a decay coefficient. For example, if the decay coefficient is 0.6, then the base weight of indicator A is 1.0, the base weight of indicator B is 0.6, and the base weight of indicator C is 0.6. Since indicators B and C are in the same branch, their weights remain unchanged after being evenly distributed across the number of branches. Normalize the weights of each indicator so that the sum of all weights is 1, resulting in a normalized weight of 0.45 for indicator A, 0.275 for indicator B, and 0.275 for indicator C. Multiply the normalized deviation of each indicator by its corresponding normalized weight and sum them to obtain the comprehensive risk score. This example is only for illustrating the calculation method; the decay coefficient and normalization method in the actual weight calculation can be adjusted according to the specific needs of the application scenario. The comprehensive risk score ranges from 0 to 1. Based on the distribution of the comprehensive risk score, the overall risk level is divided into four levels: low risk, medium risk, high risk, and severe risk. The score ranges for each level are as follows: a comprehensive risk score greater than or equal to 0 and less than 0.25 indicates a low risk level; greater than or equal to 0.25 and less than 0.5 indicates a medium risk level; greater than or equal to 0.5 and less than 0.75 indicates a high risk level; and greater than or equal to 0.75 and less than or equal to 1 indicates a severe risk level.
[0096] By integrating the overall risk level and fault location, a health status report for the solid-state drive controller chip is generated. The health status report is organized in a structured format and includes the following parts: fault location results, clearly identifying the specific module where the fault occurred and the root cause; overall risk level, providing a quantitative score and corresponding risk grade; affected key performance indicators and their degree of deviation; the impact chain obtained from anomaly tracing, presented in the form of a cause-and-effect diagram or text description; and recommended handling measures, providing actionable suggestions based on the risk grade and fault type.
[0097] After the health status report is generated, the system executes corresponding follow-up actions based on the overall risk level. Simultaneously, the system feeds back key information from this health status report to the adaptive model in step S4, adding it to the training dataset as historical fault cases for incremental model updates in the future, thus achieving a closed-loop process from data collection and fault identification to strategy optimization.
[0098] The above describes a fault diagnosis method for a solid-state drive (SSD) controller chip according to an embodiment of this application. The following describes a fault diagnosis system for a SSD controller chip according to an embodiment of this application. Please refer to [link / reference]. Figure 3 One embodiment of a fault diagnosis system for solid-state drive controller chips in this application includes: The dynamic feature extraction module is used to collect the operation logs, latency distribution data and multi-source information of the solid-state drive controller chip, process the operation logs, latency distribution data and multi-source information using time series analysis methods, generate a time series dataset, and obtain dynamic change features based on the time series dataset; The health mode association module is used to determine the association mode of the health status of the solid-state drive controller chip based on the dynamic change characteristics and in combination with a clustering algorithm. The evaluation standard adjustment module is used to adjust the evaluation standard by integrating multi-source information from the solid-state drive controller chip if the latency fluctuation shown by the correlation mode exceeds a preset fluctuation threshold, thereby identifying potential abnormal fluctuations. The early warning model construction module is used to integrate the potential abnormal fluctuations and operation logs using a decision tree algorithm to obtain early warning indicators, and to construct an adaptive model for complex fault scenarios based on the early warning indicators to determine the update path of the diagnostic strategy. The high-load fault location module is used to filter normal fluctuations in operating data using an anomaly detection mechanism to obtain fault location if the update path involves a high-load operating environment. The overall risk assessment module is used to classify and integrate multi-source information related to the fault location according to the data source, assess the overall risk level of the system performance where the solid-state drive controller chip is located, and generate a health status report.
[0099] Through the collaborative efforts of the aforementioned components, this invention constructs a complete fault diagnosis process from data acquisition to health status output. The dynamic feature extraction module first performs time-series analysis on the operation logs, latency distribution, and multi-source information to obtain dynamic change features reflecting the operating status of the main control chip, providing a reliable data foundation for subsequent analysis. Based on this, the health pattern association module uses a clustering algorithm to group multi-source information according to health status, establishing a correlation pattern between latency fluctuations and abnormal risks. When latency fluctuations exceed a preset threshold, the evaluation standard adjustment module dynamically adjusts the judgment criteria by integrating environmental data, reducing misjudgments caused by changes in the operating environment. The early warning model construction module further integrates abnormal fluctuations and historical logs, generates early warning indicators through a decision tree algorithm, and constructs adaptive models for complex fault scenarios, enabling the diagnostic strategy to be dynamically updated as the scenario changes. If the update path involves a high-load environment, the high-load fault location module introduces an anomaly detection mechanism to effectively filter normal fluctuations and accurately locate the source of the fault. Finally, the overall risk assessment module classifies and integrates multi-source information related to the fault according to its source, comprehensively assesses the overall risk level of system performance, and generates a health status report.
[0100] above Figure 3 This application describes in detail a fault diagnosis system for a solid-state drive controller chip from the perspective of modular functional entities. The following describes in detail a fault diagnosis device for a solid-state drive controller chip from the perspective of hardware processing.
[0101] Figure 4 This is a schematic diagram of a fault diagnosis device for a solid-state drive (SSD) controller chip provided in an embodiment of this application. The fault diagnosis device 300 for an SSD controller chip can vary significantly due to different configurations or performance characteristics. It may include one or more central processing units (CPUs) 310 (e.g., one or more processors) and a memory 320, and one or more storage media 330 (e.g., one or more mass storage devices) storing application programs 333 or data 332. The memory 320 and storage media 330 can be temporary or persistent storage. The program stored in the storage media 330 may include one or more modules (not shown in the diagram), each module including a series of instruction operations within the fault diagnosis device 300 for an SSD controller chip. Furthermore, the processor 310 may be configured to communicate with the storage media 330 and execute a series of instruction operations from the storage media 330 on the fault diagnosis device 300 for an SSD controller chip to implement the steps of the aforementioned fault diagnosis method for an SSD controller chip.
[0102] A fault diagnosis device 300 for a solid-state drive controller chip may further include one or more power supplies 340, one or more wired or wireless network interfaces 350, one or more input / output interfaces 360, and / or one or more operating systems 331, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc. Those skilled in the art will understand that... Figure 4 The illustrated fault diagnosis device structure for a solid-state drive controller chip does not constitute a limitation on the fault diagnosis device for a solid-state drive controller chip provided in this application. It may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.
[0103] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.
Claims
1. A fault diagnosis method for a solid-state drive controller chip, characterized in that, include: S1. Collect the operation log, latency distribution data and multi-source information of the solid-state drive controller chip, process the operation log, latency distribution data and multi-source information using time series analysis methods, generate a time series dataset, and obtain dynamic change characteristics based on the time series dataset; S2. Based on the dynamic change characteristics, combined with clustering algorithms, determine the association pattern of the health status of the solid-state drive controller chip; S3. If the correlation mode shows that the delay fluctuation exceeds the preset fluctuation threshold, the evaluation criteria are adjusted by integrating the multi-source information of the solid-state drive controller chip to identify potential abnormal fluctuations. S4. Use the decision tree algorithm to integrate the potential abnormal fluctuations and operation logs to obtain early warning indicators. Based on the early warning indicators, construct an adaptive model for complex fault scenarios and determine the update path of the diagnostic strategy. S5. If the update path involves a high-load operating environment, an anomaly detection mechanism is used to filter normal fluctuations in the operating data to obtain fault location. S6. Classify and integrate the multi-source information related to the fault location according to the data source, assess the overall risk level of the system performance where the solid-state drive controller chip is located, and generate a health status report.
2. The method according to claim 1, characterized in that, S1 includes: The system collects operation logs, latency distribution data, and multi-source information including main controller chip operation parameters, environmental parameters, and system load parameters from the main controller chip via the solid-state drive interface protocol. The operation logs, latency distribution data, and multi-source information were cleaned using time series analysis methods to obtain a time series dataset. Based on the time series dataset, key time points and events in the operation log are extracted, and the fluctuation of the main control chip's operating status is identified by combining the delay distribution data to obtain the status fluctuation characteristics. Based on the state fluctuation characteristics, the variation pattern of delay distribution in different time periods is analyzed to obtain the delay variation pattern; Based on the delay change pattern and the state fluctuation characteristics, the delay characteristics of the main control chip are identified, and potential performance bottlenecks are determined. The potential performance bottlenecks are decomposed into time distributions using time series analysis to obtain their dynamic change characteristics.
3. The method according to claim 1, characterized in that, S2 includes: Based on the dynamic change characteristics, data segments of key time periods related to the operating status of the solid-state drive controller chip are extracted from the time series dataset to obtain preliminary classification criteria for status classification. Clustering algorithms are used to group the data fragments used for the preliminary classification, and to divide them into operational status categories corresponding to different health levels; The operation status category that exceeds the preset abnormality level is marked as an abnormal status category, and the original data source corresponding to the abnormal status category is traced to obtain the source tracing record; Based on the source tracing records, a continuous tracking mechanism for the health status of the solid-state drive controller chip is constructed to obtain the long-term trend of the controller chip's operating status. If the long-term trend deviates from the preset trend range, the status classification will be automatically adjusted to determine the association mode of the health status of the solid-state drive controller chip.
4. The method according to claim 1, characterized in that, S3 includes: If the correlation mode shows that the latency fluctuation of the solid-state drive controller chip exceeds the preset fluctuation threshold, then the multi-source information corresponding to the latency fluctuation is integrated to determine the initial impact range of the latency fluctuation. Based on the preliminary impact range, the support vector machine algorithm is used to analyze the correlation between the delay fluctuation and multi-source information features to obtain the classification results of potential risks; If the risk level of the classification result of the potential risk exceeds the preset risk threshold, the evaluation criteria for delay fluctuation are adjusted in combination with the multi-source information to obtain the fault determination basis. Based on the aforementioned fault determination criteria and combined with the real-time operating data of the solid-state drive controller chip, it is determined whether the latency fluctuation has a continuous abnormal trend. If so, the correlation features between the delay fluctuations and multi-source information features are extracted to determine the source of the abnormal fluctuations and identify potential abnormal fluctuations in the solid-state drive controller chip.
5. The method according to claim 1, characterized in that, S4 includes: The operation logs associated with the solid-state drive controller chip and the potential abnormal fluctuations are retrieved, and the potential abnormal fluctuations and operation logs are classified and processed using a decision tree algorithm to obtain preliminary early warning indicators. Based on the preliminary early warning indicators, the abnormal points in the potential abnormal fluctuations are extracted, and the risk level of the abnormal points is determined by comparing them with the complex fault scenarios in the operation log. If the risk level exceeds the preset risk level, the risk evolution trend of the potential abnormal fluctuations is analyzed by combining the time series information of the operation log, and a preset fault rule base is matched to obtain an early warning indicator. Based on the aforementioned early warning indicators, an adaptive model is constructed by combining the fault characteristics of complex fault scenarios with historical fault cases to dynamically classify fault scenarios and determine the adjustment direction of the diagnostic strategy. Based on the adjustment direction, the diagnostic strategy is dynamically updated by combining the real-time operating data of the solid-state drive controller chip, and the update path of the diagnostic strategy is determined.
6. The method according to claim 1, characterized in that, S5 includes: If the update path involves a high-load operating environment, then collect the real-time operating load data of the solid-state drive controller chip to obtain a load change record; If the operating load recorded by the load change exceeds the preset load threshold, an anomaly detection mechanism is used to analyze the real-time operating data, filter out abnormal fluctuation points, and determine potential fault triggering conditions. Based on the potential fault triggering conditions, standard fluctuation patterns under historical high-load scenarios are retrieved for matching, and normal load fluctuations and abnormal fault fluctuations in the operating data are distinguished, and normal fluctuation data is filtered out. Based on the filtering results, the original data source of the abnormal fluctuations and the fault triggering link are traced to obtain the fault location of the solid-state drive controller chip.
7. The method according to claim 1, characterized in that, S6 includes: Multi-source information related to the fault location is extracted from the time series dataset to obtain the core analysis dataset; For the core analysis dataset, the multi-source information is classified and integrated according to the data source to obtain a set of indicators corresponding to system performance; For the aforementioned set of indicators, the operational deviations of each performance indicator are compared through correlation analysis to determine the basis for risk assessment of system performance; If the risk assessment criteria indicate abnormal fluctuations in system performance, the original data source and impact chain of the abnormal fluctuations are traced to obtain the anomaly tracing results; Based on the anomaly tracing results, and combined with the operational deviations of various performance indicators, risk levels are stratified and classified to assess the overall risk level of the system performance where the solid-state drive controller chip is located. By integrating the overall risk level with the fault location, a health status report of the solid-state drive controller chip is generated.
8. A fault diagnosis system for a solid-state drive controller chip, used to implement the method as described in any one of claims 1-7, characterized in that, include: The dynamic feature extraction module is used to collect the operation logs, latency distribution data and multi-source information of the solid-state drive controller chip, process the operation logs, latency distribution data and multi-source information using time series analysis methods, generate a time series dataset, and obtain dynamic change features based on the time series dataset; The health mode association module is used to determine the association mode of the health status of the solid-state drive controller chip based on the dynamic change characteristics and in combination with a clustering algorithm. The evaluation standard adjustment module is used to adjust the evaluation standard by integrating multi-source information from the solid-state drive controller chip if the latency fluctuation shown by the correlation mode exceeds a preset fluctuation threshold, thereby identifying potential abnormal fluctuations. The early warning model construction module is used to integrate the potential abnormal fluctuations and operation logs using a decision tree algorithm to obtain early warning indicators, and to construct an adaptive model for complex fault scenarios based on the early warning indicators to determine the update path of the diagnostic strategy. The high-load fault location module is used to filter normal fluctuations in operating data using an anomaly detection mechanism to obtain fault location if the update path involves a high-load operating environment. The overall risk assessment module is used to classify and integrate multi-source information related to the fault location according to the data source, assess the overall risk level of the system performance where the solid-state drive controller chip is located, and generate a health status report.
9. A fault diagnosis device for solid-state drive controller chips, characterized in that, The device includes: a memory and at least one processor, wherein the memory stores instructions; The processor invokes the instructions in the memory to cause the fault diagnosis device for a solid-state drive controller chip to perform a fault diagnosis method for a solid-state drive controller chip as described in any one of claims 1-7.