Audio bus automated verification method, device and equipment for complex system on chip

Abstract

The application relates to an audio bus automatic verification method and device of a complex system on chip, computer equipment, a computer readable storage medium and a computer program product. The method comprises the following steps: obtaining a test task file and an audio reference file generated for an audio bus of a complex system on chip; determining a test mode according to the test task file; transmitting the test task file to the complex system on chip, and transmitting the audio reference file to a signal generating module connected with the complex system on chip through a line or the complex system on chip according to the test mode, so that the complex system on chip outputs an audio signal file. The method can improve the audio bus verification efficiency and accuracy through an automatic verification process and accurate data comparison.

Description

Technical Field

[0001] This application relates to the field of automated testing technology, and in particular to an automated verification method, apparatus, computer device, computer-readable storage medium, and computer program product for an audio bus of a complex on-chip system. Background Technology

[0002] In traditional technologies, in complex system-on-chip (SoC) designs, thorough verification of the audio bus design is typically required to ensure design reliability. Currently, data comparison is often used for audio bus verification.

[0003] However, audio buses are quite diverse, with the same IP address often having multiple audio formats, modes, and pin multiplexing capabilities. Given these limitations, relying solely on manual data comparison is time-consuming and repetitive, resulting in low efficiency for audio bus verification. Furthermore, in special scenarios, such as errors occurring in both transmission and reception, and identical errors in the sent and received data, misjudgments can occur, affecting verification accuracy. Therefore, traditional audio bus verification methods for complex on-chip systems suffer from low efficiency and low accuracy. Summary of the Invention

[0004] Therefore, it is necessary to provide an automated verification method, apparatus, computer device, computer-readable storage medium, and computer program product for audio buses of complex on-chip systems that can improve the efficiency and accuracy of audio bus verification, in order to address the above-mentioned technical problems.

[0005] In a first aspect, this application provides an automated verification method for the audio bus of a complex on-chip system, including:

[0006] Obtain the test task file and audio benchmark file generated for the audio bus of a complex on-chip system;

[0007] Determine the test mode based on the test task file;

[0008] The test task file is transferred to the complex on-chip system, and according to the test mode, the audio reference file is transferred to the signal generation module or the complex on-chip system that can be connected to the complex on-chip system via a line, so that the complex on-chip system outputs the audio signal file.

[0009] Based on the data comparison results between the audio signal file and the audio reference file, the functional verification results of the audio bus in test mode are generated.

[0010] In one embodiment, according to the test mode, an audio reference file is transmitted to a signal generation module or the complex on-chip system that is connected via a line, causing the complex on-chip system to output an audio signal file, including:

[0011] When the test mode is input test mode, the audio reference file is transmitted to the signal generation module that can be connected to the complex on-chip system via a line, and the connection line that matches the audio reference file is selected from multiple candidate lines connected to the complex on-chip system.

[0012] With the system parameters configured by the received test task file, the complex on-chip system is controlled to execute the input test mode, so that the complex on-chip system can acquire the standard signal generated by the signal generation module based on the audio reference file through the connection line, and output the first audio signal file.

[0013] In one embodiment, based on the data comparison results between the audio signal file and the audio reference file, a functional verification result of the audio bus in test mode is generated, including:

[0014] The first audio signal file is compared with the audio reference file to obtain the verification results of the audio bus input function in the input test mode.

[0015] The input function verification results and the test process records in the input test mode are stored in the test log corresponding to the input test mode.

[0016] In one embodiment, according to the test mode, an audio reference file is transmitted to a signal generation module or the complex on-chip system that is connected via a line, causing the complex on-chip system to output an audio signal file, including:

[0017] When the test mode is output test mode, the audio reference file and the test task file are transferred together to the complex on-chip system;

[0018] With the system parameters configured by the received test task file, the complex on-chip system is controlled to execute the output test mode, causing the complex on-chip system to output a second audio signal file to the signal receiving module connected to the complex on-chip system.

[0019] In one embodiment, based on the data comparison results between the audio signal file and the audio reference file, a functional verification result of the audio bus in test mode is generated, including:

[0020] The signal receiving module receives the audio parsing file output by the signal receiving module; the signal receiving module is used to perform audio protocol analysis on the second audio signal file and convert the second audio signal file into an audio parsing file.

[0021] The audio parsing file is compared with the audio benchmark file to obtain the verification results of the audio bus output function in the output test mode;

[0022] The output function verification results and the test process records in the output test mode are stored in the test log corresponding to the output test mode.

[0023] In one embodiment, system parameters are configured via the received test task file, including:

[0024] The system parameter configuration fields of the test task file are parsed to determine the system parameters of the complex on-chip system.

[0025] Configure the audio function blocks and pins of the complex on-chip system according to the system parameters.

[0026] Secondly, this application also provides an automated verification device for an audio bus of a complex on-chip system, including: a host, a signal generation module, a signal receiving module, and a connection selection module;

[0027] The host is used to acquire test task files and audio benchmark files generated for the audio bus of complex on-chip systems, and to determine the test mode based on the test task files.

[0028] In input test mode, the host is also used to transmit the test task file to the complex on-chip system and the audio reference file to the signal generation module; through the connection selection module, it controls the line connection between the signal generation module and the complex on-chip system, so that the complex on-chip system can acquire the standard signal generated by the signal generation module based on the audio reference file and output the first audio signal file; it receives the first audio signal file and generates the input function verification result of the audio bus based on the data comparison result between the first audio signal file and the audio reference file;

[0029] In output test mode, the host is also used to transmit the test task file and audio reference file to the complex on-chip system, so that the complex on-chip system outputs a second audio signal file to the signal receiving module. The signal receiving module is used to perform audio protocol analysis on the second audio signal file and convert the second audio signal file into an audio parsing file. The host receives the audio parsing file output by the signal receiving module and generates the output function verification result of the audio bus in output test mode based on the data comparison result between the audio parsing file and the audio reference file.

[0030] Thirdly, this application also provides another automated verification device for the audio bus of a complex on-chip system, including:

[0031] The file acquisition module is used to acquire test task files and audio benchmark files generated for the audio bus of complex on-chip systems.

[0032] The mode determination module is used to determine the test mode based on the test task file.

[0033] The file distribution module is used to transmit test task files to the complex on-chip system and, according to the test mode, transmit audio reference files to the signal generation module or the complex on-chip system that can be connected to the complex on-chip system via a line, so that the complex on-chip system outputs audio signal files.

[0034] The data comparison module is used to generate functional verification results of the audio bus in test mode based on the data comparison results between the audio signal file and the audio reference file.

[0035] Fourthly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above embodiments.

[0036] Fifthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps in the above embodiments.

[0037] Sixthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps in the above embodiments.

[0038] The aforementioned automated verification method, apparatus, computer equipment, computer-readable storage medium, and computer program product for the audio bus of a complex on-chip system first acquires a test task file and an audio reference file generated for the audio bus of the complex on-chip system to meet the diverse automated verification needs of the audio bus. Further, a test mode is determined based on the test task file. Then, the test task file is transmitted to the complex on-chip system, and according to the test mode, the audio reference file is transmitted to a signal generation module or the complex on-chip system that can be connected via a line, causing the complex on-chip system to output an audio signal file. Furthermore, based on the data comparison results between the audio signal file and the audio reference file, the functional verification results of the audio bus in the test mode can be accurately generated. Using this verification method, no manual operation of the verification process is required, thereby improving the efficiency of audio bus verification. In addition, the data comparison between the audio signal and the audio reference file can be automatically performed to accurately verify whether there are data transmission and reception errors in the input or output functions of the audio bus. Based on this, the efficiency and accuracy of audio bus verification can be improved through automated verification processes and precise data comparison. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is an application environment diagram of an automated verification method for an audio bus of a complex on-chip system in one embodiment.

[0041] Figure 2 This is a flowchart illustrating an automated verification method for an audio bus of a complex on-chip system in one embodiment.

[0042] Figure 3 This is a schematic diagram of a complex on-chip system in one embodiment;

[0043] Figure 4 This is a flowchart illustrating a fully automated testing method for the audio bus input function in one embodiment.

[0044] Figure 5 This is a flowchart illustrating a fully automated testing method for the audio bus output function in one embodiment.

[0045] Figure 6 This is a flowchart illustrating a fully automated testing method for audio bus input and output in one embodiment;

[0046] Figure 7 This is a schematic diagram of an automated verification device for the audio bus of a complex on-chip system in one embodiment.

[0047] Figure 8 This is a structural block diagram of an automated verification device for an audio bus of a complex on-chip system, as described in another embodiment.

[0048] Figure 9 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0050] The automated verification method for audio buses of complex on-chip systems provided in this application can be applied to, for example... Figure 1In the application environment shown, host 102 can first obtain the test task file and audio reference file generated for the audio bus of complex system-on-a-chip 104. Host 102 can determine the test mode according to the test task file and transmit the test task file to complex system-on-a-chip 104. According to the test mode, host 102 transmits the audio reference file to the signal generation module or complex system-on-a-chip 104 that can be connected to the complex system-on-a-chip 104 via a line, so that the complex system-on-a-chip 104 outputs an audio signal file. Furthermore, host 102 can generate the functional verification result of the audio bus in the test mode based on the data comparison result between the audio signal file and the audio reference file.

[0051] The host 102 can be, but is not limited to, various personal computers, laptops, smartphones, tablets, IoT devices, etc. The Complex System-on-Chip (CSoC) 104 is a highly integrated, fully functional semiconductor chip system. It integrates a processor core, digital and analog functional modules, memory units, input / output interfaces, and dedicated acceleration circuits on a single silicon chip, forming a complete electronic system that can operate independently or serve as a core component. The audio bus in the Complex System-on-Chip 104 is a highly specialized on-chip communication subsystem designed specifically for audio data transmission. It is a complete architecture integrating physical interfaces, protocols, clock management, and data paths. Its core objective is to ensure high-fidelity, low-latency, and highly synchronized audio stream transmission between modules within the chip. The aforementioned automated verification method for the audio bus of the Complex System-on-Chip 104 is mainly used to verify the input and output functions of the audio bus, achieving fully automated prototype verification of the audio (low-speed) bus of the Complex System-on-Chip.

[0052] In one exemplary embodiment, such as Figure 2 As shown, an automated verification method for the audio bus of a complex on-chip system is provided, which can be applied to... Figure 1 Taking host 102 as an example, the explanation includes the following steps 202 to 208. Wherein:

[0053] Step 202: Obtain the test task file and audio benchmark file generated for the audio bus of the complex on-chip system.

[0054] The test task files include: test task files for testing the audio bus input function and test task files for testing the audio bus output function. The audio benchmark file, or golden file, is an audio file used as a reference standard during the development, testing, and verification of the audio system.

[0055] Optionally, the host can respond to the user-triggered audio bus automated verification command and automatically generate test task files and audio benchmark files for the audio bus of a complex on-chip system according to the test requirement parameters configured by the user, thereby obtaining the test task files and audio benchmark files.

[0056] Specifically, the test task file can be a structured data file (such as JSON, XML, or a binary file in a specific format) used to describe and control the test scenario. The test task file does not contain the audio data itself, but rather serves to define the test content and methods. The audio benchmark file can be a high-precision digital audio file (such as WAV or PCM format) serving as a reference standard for the test input stimulus and expected output.

[0057] For example, such as Figure 3 The diagram illustrates a complex system-on-a-chip (SoC). The complex SoC can be broadly divided into three layers: a software layer, a kernel layer, and a hardware layer. The software layer receives and parses the test task file sent by the host computer, and then performs audio file input or output operations. Furthermore, the software layer can control the hardware layer through the kernel layer, enabling the audio bus to generate or receive audio signals corresponding to the test task file.

[0058] Step 204: Determine the test mode based on the test task file.

[0059] Specifically, the test modes may include: an input test mode for testing the audio bus input function, and an output test mode for testing the audio bus output function.

[0060] Optionally, the host can determine the test mode based on the test content specified in the test task file, such as whether to test the input or output function of the audio bus.

[0061] Step 206: Transfer the test task file to the complex on-chip system, and according to the test mode, transfer the audio reference file to the signal generation module or the complex on-chip system that can be connected to the complex on-chip system via a line, so that the complex on-chip system outputs the audio signal file.

[0062] Optionally, the host can transmit the test task file to the complex system-on-a-chip (SoC), which then parses the test task file and, according to a file transmission method matching the test mode, transmits the audio reference file (as a reference standard for input stimulus and expected output) to the signal generation module or the SoC that can be connected to the SoC via a line.

[0063] Specifically, in input test mode, the host computer can transmit an audio reference file to a signal generation module connected to the complex system-on-a-chip (SoC) via a line. The signal generation module then generates a standard signal based on the audio reference file. The SoC then acquires this standard signal via the connection line and outputs a first audio signal file based on the received test task file and the standard signal. In output test mode, the host computer can transmit both the audio reference file and the test task file to the SoC, allowing the SoC to output a second audio signal file based on the received test task file and audio reference file.

[0064] Step 208: Based on the data comparison results between the audio signal file and the audio reference file, generate the functional verification results of the audio bus in test mode.

[0065] Optionally, the host can automatically perform data comparison operations between the audio signal file and the audio reference file, including but not limited to: waveform / sample-level comparison, frequency analysis comparison, time-domain analysis comparison, etc., to determine whether there are differences between the audio signal file and the audio reference file, and the specific content of the differences, to obtain data comparison results. Furthermore, the host can generate functional verification results for the audio bus in test mode based on the data comparison results.

[0066] It should be noted that, during the execution of steps 202 to 208, in order to ensure the accuracy and sufficiency of the verification and to comprehensively improve the verification efficiency, the complex on-chip system can expose all the audio IPs under test and the pins used by all the audio IPs, achieving comprehensive coverage. Based on this, the embodiments of this application can use a complex on-chip system to generate a full-coverage combination of various audio buses according to audio IP type, pin multiplexing, mode, etc., through script control, and then combine it with logic tools for signal analysis, automatic data dumping, and automatic data comparison to ensure the accuracy and sufficiency of the verification and comprehensively improve the efficiency of prototype verification.

[0067] The aforementioned automated verification method for the audio bus of a complex on-chip system (SoC) first acquires a test task file and an audio reference file generated for the audio bus of the complex SoC to meet the diverse automated verification requirements of the audio bus. Further, the test mode is determined based on the test task file. Then, the test task file is transmitted to the complex SoC, and according to the test mode, the audio reference file is transmitted to a signal generation module or the complex SoC that can be connected to it via a wire, causing the complex SoC to output an audio signal file. Furthermore, based on the data comparison results between the audio signal file and the audio reference file, the functional verification results of the audio bus in the test mode can be accurately generated. Using this verification method, no manual operation of the verification process is required, thereby improving the efficiency of audio bus verification. In addition, the data comparison between the audio signal and the audio reference file can be automatically performed to accurately verify whether there are data transmission and reception errors in the input or output functions of the audio bus. Based on this, the efficiency and accuracy of audio bus verification can be improved through automated verification processes and precise data comparison.

[0068] In an exemplary embodiment, according to a test mode, an audio reference file is transmitted to a signal generation module or the complex on-chip system that is connected via a line, causing the complex on-chip system to output an audio signal file, including:

[0069] When the test mode is input test mode, the audio reference file is transmitted to the signal generation module that can be connected to the complex on-chip system via a line, and the connection line that matches the audio reference file is selected from multiple candidate lines connected to the complex on-chip system.

[0070] With the system parameters configured by the received test task file, the complex on-chip system is controlled to execute the input test mode, so that the complex on-chip system can acquire the standard signal generated by the signal generation module based on the audio reference file through the connection line, and output the first audio signal file.

[0071] The input test mode primarily verifies the audio input path of a complex on-chip system. Test objectives may include at least: input sensitivity, signal-to-noise ratio, total harmonic distortion, channel isolation, interface protocol compatibility, and clock jitter resistance. The tested audio bus input functions must include at least the input functions of the microphone and line input interface. During testing, an externally generated audio reference file needs to be injected into a specific input pin of the complex on-chip system through a physically correct, electrically matched, and protocol-compatible connection line.

[0072] It should be noted that the host computer can connect to and control the signal generation module and the connection selection module via a network. Furthermore, the connection selection module can connect to the signal generation module via a network, and it can also connect to a complex on-chip system. The connection selection module acts as a bridge between the signal generation module and the complex on-chip system, determining the connection relationship between them.

[0073] Optionally, when the test mode is the input test mode: (1) While the host sends the test task file to the complex on-chip system, the host can send the audio reference file to the signal generation module, so that the signal generation module generates a standard signal based on the audio reference file. (2) The host can control the connection selection module to select a line from multiple candidate lines connected to the complex on-chip system. The candidate line that is physically correct, electrically matched, and protocol compatible is selected as the connection line that matches the audio reference file, so that the complex on-chip system and the signal generation module can establish a connection through the connection line. (3) After the host sends the test task file to the complex on-chip system, the complex on-chip system will automatically parse the test task file and update and configure the system parameters of the complex on-chip system through the received test task file. (4) When the complex on-chip system has configured the system parameters through the received test task file, the host can control the complex on-chip system to execute the input test mode, so that the complex on-chip system connects to the signal generation module through the connection line selected by the connection selection module and collects the standard signal generated by the signal generation module. (5) The complex on-chip system outputs the first audio signal file to the host based on the test task file and standard signal.

[0074] In this embodiment, precise line selection can ensure that the complex on-chip system can successfully receive the audio reference file (golden file) as the excitation input. Combined with the signal generation module and the selection connection module, the efficiency and accuracy of automated verification of audio bus input functions can be improved.

[0075] In one possible implementation, based on the data comparison results between the audio signal file and the audio reference file, functional verification results of the audio bus in test mode are generated, including:

[0076] The first audio signal file is compared with the audio reference file to obtain the verification results of the audio bus input function in the input test mode.

[0077] The input function verification results and the test process records in the input test mode are stored in the test log corresponding to the input test mode.

[0078] The first audio signal file is the actual response of the complex on-chip system to known stimuli. By comparing it with the expected audio reference file, the verification results of the audio bus input function can be effectively analyzed.

[0079] Optionally, after receiving the first audio signal file, the host can automatically compare the first audio signal file with an audio reference file, including but not limited to: waveform / sample-level comparison, frequency analysis comparison, and time-domain analysis comparison, thereby obtaining the input function verification result of the audio bus in input test mode. Furthermore, the host can store the input function verification result and the test process recording data in input test mode in the corresponding test log. After completing the log storage, the host can control the connection selection module to disconnect from the complex on-chip system, awaiting the next test of the audio bus input function.

[0080] For example, the test logs corresponding to the input test mode can be structured files (such as JSON, XML, or database records), which can organically integrate "input function verification results" and "test process record data" to form a test archive with a complete chain of evidence for traceability.

[0081] Exemplary examples are based on various embodiments of the input test mode, such as Figure 4 The diagram shows a flowchart of a fully automated testing method for audio bus input functions, which mainly includes the following steps:

[0082] (1) The host sends the test task file to the complex on-chip system and sends the audio reference file to the signal generation module, so that the signal generation module generates a standard signal based on the audio reference file.

[0083] (2) The host control connection selection module selects the line.

[0084] (3) The complex on-chip system parses the test task file and waits for signal input.

[0085] (4) Complex on-chip systems acquire standard signals generated by signal generation modules by selecting the connection line through the connection selection module.

[0086] (5) The complex on-chip system outputs the first audio signal file to the host.

[0087] (6) The host compares the data of the first audio signal file with the audio reference file, outputs and stores the log.

[0088] (7) The host control connection selection module is disconnected and waits for the next test.

[0089] In this embodiment, the automated testing process for the audio bus input function can improve the efficiency and accuracy of automated verification of the audio bus input function through a series of orderly operations including automatic triggering, automatic sampling, and automatic comparison.

[0090] In some embodiments, according to a test mode, an audio reference file is transmitted to a signal generation module or the complex on-chip system that is connected via a line, causing the complex on-chip system to output an audio signal file, including:

[0091] When the test mode is output test mode, the audio reference file and the test task file are transferred together to the complex on-chip system;

[0092] With the system parameters configured by the received test task file, the complex on-chip system is controlled to execute the output test mode, causing the complex on-chip system to output a second audio signal file to the signal receiving module connected to the complex on-chip system.

[0093] The output test mode primarily verifies the audio output path of a complex on-chip system. Test objectives can include at least: output signal quality (distortion, noise), drive capability, clock accuracy and jitter, digital interface protocol compliance, and multi-output synchronization. In output test mode, because the complex on-chip system needs to actively play audio data, the audio reference file must be pre-transmitted and stored in the system's directly accessible memory. This differs from the input test mode, where the audio reference file is injected in real-time via an external connection.

[0094] It should be noted that the host can also be connected to a signal receiving module via a network. The signal receiving module is connected to the complex on-chip system and can be used to receive the second audio signal file output by the complex on-chip system, convert the second audio signal file into an audio parsing file, and then send it to the host.

[0095] Optionally, in the case of the test mode being the output test mode: (1) The host can transmit the audio reference file and the test task file together to the complex on-chip system, and can also send the audio type to the signal receiving module. (2) After the host sends the test task file to the complex on-chip system, the complex on-chip system automatically parses the test task file and updates and configures the system parameters of the complex on-chip system through the received test task file. When the complex on-chip system has configured the system parameters through the received test task file, the host can control the complex on-chip system to execute the output mode, so that the complex on-chip system outputs the second audio signal file based on the received test task file and the audio reference file. (3) The complex on-chip system sends the second audio signal file to the signal receiving module so that the signal receiving module can perform audio protocol analysis on the second audio signal file, convert the second audio signal file into an audio parsing file, and then send it to the host.

[0096] For example, in output test mode, the host can send the test task file and audio benchmark file as a data packet to the complex on-chip system via the network.

[0097] In this embodiment, the second audio signal file can be parsed and dumped by the signal receiving module, so that the host can obtain the audio parsing file after data dumping, thereby improving the efficiency and accuracy of subsequent automated verification of the audio bus output function.

[0098] In one embodiment, based on the data comparison results between the audio signal file and the audio reference file, a functional verification result of the audio bus in test mode is generated, including:

[0099] The signal receiving module receives the audio parsing file output by the signal receiving module; the signal receiving module is used to perform audio protocol analysis on the second audio signal file and convert the second audio signal file into an audio parsing file.

[0100] The audio parsing file is compared with the audio benchmark file to obtain the verification results of the audio bus output function in the output test mode;

[0101] The output function verification results and the test process records in the output test mode are stored in the test log corresponding to the output test mode.

[0102] Specifically, audio protocol analysis can refer to decoding the second audio signal file.

[0103] Optionally, the signal receiving module can perform audio protocol analysis on the second audio signal file, converting it into an audio parsing file that can be directly compared with the audio reference file. The parsing file is then sent to the host, completing the data parsing and data dumping of the second audio signal file. Furthermore, the host can compare the audio parsing file with the audio reference file to obtain the output function verification result of the audio bus in output test mode. The output function verification result, along with the test process recording data in output test mode, is then stored in the test log corresponding to output test mode. The test log corresponding to output test mode can organically integrate the "output function verification result" and "test process recording data" for traceability.

[0104] Specifically, when the data stored in the second audio signal file is in digital bitstream format, its waveform cannot be directly compared with the audio reference file. Therefore, the digital audio sample sequence can be parsed and restored from the second audio signal file according to the communication protocol it follows, so that it can be compared with the audio reference file.

[0105] Exemplary examples are based on various embodiments in the output test mode, such as Figure 5 As shown, a flowchart illustrating a fully automated testing method for audio bus output functionality is provided, mainly including the following steps:

[0106] (1) The host transmits the audio reference file and the test task file together to the complex on-chip system.

[0107] (2) The complex on-chip system parses the test task file and outputs the second audio signal file to the signal receiving module.

[0108] (3) The signal receiving module performs audio protocol analysis on the second audio signal file and converts the second audio signal file into an audio parsing file.

[0109] (4) The signal receiving module sends the audio parsing file to the host.

[0110] (5) The host compares the audio parsing file with the audio reference file, outputs and stores the log.

[0111] In this embodiment, the automated testing process for the audio bus output function can improve the efficiency and accuracy of automated verification of the audio bus output function through a series of orderly operations, including automatic triggering, automatic sampling, automatic dumping, and automatic comparison.

[0112] In one possible implementation, system parameters are configured via the received test task file, including:

[0113] The system parameter configuration fields of the test task file are parsed to determine the system parameters of the complex on-chip system.

[0114] Configure the audio function blocks and pins of the complex on-chip system according to the system parameters.

[0115] Optionally, after the host sends the test task file to the complex on-chip system via the network, the complex on-chip system can automatically parse the test task file. For example, it can parse the system parameter configuration fields in the test task file to determine the system parameters of the complex on-chip system. Furthermore, the complex on-chip system can configure its audio function block (audio IP) and pins according to the system parameters.

[0116] For example, a complex on-chip system can locate and extract system parameter configuration fields from a test task file by performing syntax parsing on the test task file.

[0117] In this embodiment, the complex system-on-a-chip can accurately configure the audio IP and pins used for testing according to the test task file.

[0118] In some embodiments, based on Figure 4 and Figure 5 The method shown is as follows: Figure 6 The diagram shows a flowchart of a fully automated testing method for audio bus input and output, which mainly includes the following steps:

[0119] (1) The host submits a test task and determines the test mode.

[0120] (2) In input test mode, execute the following procedure:

[0121] The host sends the test task file to the complex on-chip system and the audio reference file to the signal generation module. The host controls the connection selection module to select a line. The complex on-chip system parses the test task file and waits for the standard signal input. The complex on-chip system acquires the standard signal generated by the signal generation module based on the audio reference file through the connection line. The complex on-chip system outputs the first audio signal file to the host. The host compares the first audio signal file with the audio reference file, outputs and stores the log. The host controls the connection selection module to disconnect and waits for the next test.

[0122] (3) In output test mode, execute the following procedure:

[0123] The host transmits the audio reference file and the test task file together to the complex on-chip system → The complex on-chip system parses the test task file and outputs the second audio signal file to the signal receiving module → The signal receiving module performs audio protocol analysis on the second audio signal file and converts the second audio signal file into an audio parsing file → The signal receiving module sends the audio parsing file to the host → The host compares the audio parsing file with the audio reference file, outputs and stores the log.

[0124] (4) If the test is not completed, return to (1). Wherein:

[0125] In input test mode, the host sends the test task file to the complex on-chip system. Then, the control connection selection module selects the connection line to ensure a normal connection. The complex on-chip system parses the test task file, selects the corresponding audio IP and pin, and waits for the standard signal input. After the complex on-chip system acquires the standard signal generated by the signal generation module based on the audio reference file, it can output the first audio signal file, save it, and send it back to the host. The host performs data comparison and stores the relevant data comparison logs. Finally, the host determines whether the test is complete; if not, the above process is repeated.

[0126] In output test mode, the host sends the test task file and audio benchmark file to the complex system-on-a-chip (SoC). After parsing the test task file, the SoC selects the corresponding audio IP and pin and outputs the second audio signal file to the signal receiving module. The signal receiving module performs audio protocol analysis on the second audio signal file, converts it, and sends it to the host. The host performs data comparison and stores relevant logs. Finally, the host determines whether the test is complete; if not, it repeats the above process.

[0127] In this embodiment, the aforementioned fully automated audio bus input and output testing method is adopted. During hardware simulation verification, this results in higher verification coverage and more thorough verification of the audio (low-speed) bus. Furthermore, the fully automated verification enables automatic triggering, sampling, dumping, and comparison, significantly improving verification efficiency. It also avoids errors introduced by manual operation and inconsistencies between sent and received data, thus preventing misjudgments in data comparison results and improving verification accuracy.

[0128] In one specific embodiment, such as Figure 7 As shown, a schematic diagram of an automated verification device for an audio bus of a complex on-chip system is provided. This device is used to execute the aforementioned automated verification method for the audio bus of a complex on-chip system, and can realize fully automated prototype verification of the audio (low-speed) bus of a complex on-chip system. Figure 7The automated audio bus verification device for a complex on-chip system, as shown, includes: a host, a signal generation module, a signal receiving module, and a connection selection module. The host is connected to the signal receiving module, the connection selection module, the signal generation module, and the complex on-chip system. The complex on-chip system can also be connected to both the signal receiving module and the connection selection module, and the connection selection module can also be connected to the signal generation module.

[0129] Complex system-on-a-chip (SoC) is used to control the generation of signals with different audio IPs, different pin angle multiplexing, and different combinations of input / output modes.

[0130] The host is used to distribute test task files, receive files, compare data, store logs, and control various components in the automated verification system. Programs can run on top of the host to automate test task file distribution, file transfer and sending, data comparison, and related control functions.

[0131] The signal receiving module is used to receive and parse signals, dump data, and send data files. It can receive audio signals output from complex on-chip systems, perform audio protocol analysis on the received audio signals, dump the audio signals into the required files, and send them to the host computer for data comparison after dumping.

[0132] The select connection module controls the connection between the complex on-chip system and the signal generation module. This module is only used in test input mode and connects the signal generation module to the complex on-chip system module. Since the complex on-chip system has brought out all usable pins, the select connection module can connect the corresponding pins according to test requirements.

[0133] The signal generation module is used to output the corresponding audio IP signal according to the test requirements in input test mode. Complex on-chip systems can also acquire the standard signal output by the signal generation module by selecting the connection line through the connection selection module.

[0134] This embodiment enables automated testing and comparison of complex on-chip system audio (low-speed) buses, making audio (low-speed) bus testing more efficient, accurate, and stable. It overcomes the challenge of complete coverage of multiple audio IPs, multiple multiplexed pins, and multiple modes, reducing the occurrence of insufficient verification. Simultaneously, it avoids human error and improves the accuracy of test results. Based on this, through the orderly coordination of various components, it can complete functions such as automatic triggering, automatic sampling, automatic data dumping, and automatic comparison, executing automated testing tasks and providing feedback on automated test results, effectively improving the testing efficiency and accuracy of the audio bus.

[0135] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0136] Based on the same inventive concept, this application also provides another apparatus for implementing the above-described automated verification method for audio buses of complex on-chip systems. The solution provided by this apparatus is similar to the implementation described in the above method. Therefore, the specific limitations in one or more embodiments of the automated verification apparatus for audio buses of complex on-chip systems provided below can be found in the limitations of the automated verification method for audio buses of complex on-chip systems described above, and will not be repeated here.

[0137] In one exemplary embodiment, such as Figure 8 As shown, another automated verification device for the audio bus of a complex on-chip system is provided, including: a file acquisition module 802, a mode determination module 804, a file distribution module 806, and a data comparison module 808, wherein:

[0138] The file acquisition module is used to acquire test task files and audio benchmark files generated for the audio bus of complex on-chip systems.

[0139] The mode determination module is used to determine the test mode based on the test task file.

[0140] The file distribution module is used to transmit test task files to the complex on-chip system and, according to the test mode, transmit audio reference files to the signal generation module or the complex on-chip system that can be connected to the complex on-chip system via a line, so that the complex on-chip system outputs audio signal files.

[0141] The data comparison module is used to generate functional verification results of the audio bus in test mode based on the data comparison results between the audio signal file and the audio reference file.

[0142] The aforementioned automated verification device for the audio bus of a complex on-chip system first acquires a test task file and an audio reference file generated for the audio bus of the complex on-chip system to meet the diverse automated verification requirements of the audio bus. Further, it determines the test mode based on the test task file. Then, it transmits the test task file to the complex on-chip system and, according to the test mode, transmits the audio reference file to a signal generation module or the complex on-chip system that can be connected via a line, causing the complex on-chip system to output an audio signal file. Furthermore, based on the data comparison results between the audio signal file and the audio reference file, it accurately generates the functional verification results of the audio bus in the test mode. Using this verification method, no manual operation of the verification process is required, thereby improving the efficiency of audio bus verification. In addition, it can automatically perform data comparison between the audio signal and the audio reference file to accurately verify whether there are data transmission and reception errors in the input or output functions of the audio bus. Based on this, the efficiency and accuracy of audio bus verification can be improved through automated verification processes and precise data comparison.

[0143] In one embodiment, the file distribution module includes:

[0144] The input test preparation unit is used to transmit the audio reference file to the signal generation module that can be connected to the complex on-chip system via a line when the test mode is input test mode, and select the connection line that matches the audio reference file from multiple candidate lines connected to the complex on-chip system.

[0145] The input test output unit is used to control the complex on-chip system to execute the input test mode after the system parameters have been configured by the received test task file. This allows the complex on-chip system to acquire the standard signal generated by the signal generation module based on the audio reference file through the connection line and output the first audio signal file.

[0146] In one embodiment, the data comparison module includes:

[0147] The input test comparison unit is used to compare the data of the first audio signal file with the audio reference file to obtain the input function verification result of the audio bus in the input test mode.

[0148] The input log storage unit is used to store the input function verification results and the test process recording data in the input test mode in the test log corresponding to the input test mode.

[0149] In one embodiment, the file distribution module further includes:

[0150] The output test preparation unit is used to transmit the audio reference file and the test task file to the complex on-chip system when the test mode is output test mode.

[0151] The output test output unit is used to control the complex on-chip system to execute the output test mode when the system parameters have been configured by the received test task file, so that the complex on-chip system outputs a second audio signal file to the signal receiving module connected to the complex on-chip system.

[0152] In one embodiment, the data comparison module further includes:

[0153] The file conversion and storage unit is used to receive the audio parsing file output by the signal receiving module; the signal receiving module is used to perform audio protocol analysis on the second audio signal file and convert the second audio signal file into an audio parsing file.

[0154] The output test comparison unit is used to compare the data of the audio parsing file with the audio benchmark file to obtain the verification results of the audio bus output function in the output test mode;

[0155] The output log storage unit is used to store the output function verification results and the test process recording data in the output test mode in the test log corresponding to the output test mode.

[0156] In one embodiment, the automated verification device for the audio bus of a complex on-chip system includes a parameter configuration module, which includes:

[0157] The configuration field parsing unit is used to parse the system parameter configuration fields of the test task file to determine the system parameters of complex on-chip systems;

[0158] The system parameter configuration unit is used to configure the audio function blocks and pins of a complex on-chip system according to the system parameters.

[0159] Each module in the aforementioned automated verification device for the audio bus of a complex on-chip system can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independent of the processor in a computer device, or stored in software within the memory of the computer device, so that the processor can call and execute the corresponding operations of each module.

[0160] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 9As shown, this computer device includes a processor, memory, input / output (I / O) interfaces, and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores automated verification data for the audio bus of a complex on-chip system. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communication with external terminals via a network connection. When the computer program is executed by the processor, it implements an automated verification method for the audio bus of a complex on-chip system.

[0161] Those skilled in the art will understand that Figure 9 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0162] In one exemplary embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0163] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps in the above method embodiments.

[0164] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0165] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0166] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, database, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0167] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0168] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An automated verification method for an audio bus of a complex on-chip system, characterized in that, The method includes: Obtain the test task file and audio benchmark file generated for the audio bus of a complex on-chip system; Determine the test mode based on the test task file; The test task file is transmitted to the complex on-chip system, and according to the test mode, the audio reference file is transmitted to the signal generation module or the complex on-chip system that can be connected to the complex on-chip system via a line, so that the complex on-chip system outputs an audio signal file; Based on the data comparison results between the audio signal file and the audio reference file, the functional verification results of the audio bus in the test mode are generated.

2. The method according to claim 1, characterized in that, The step of transmitting the audio reference file to a signal generation module or the complex on-chip system that can be connected via a line, according to the test mode, so that the complex on-chip system outputs an audio signal file, includes: When the test mode is input test mode, the audio reference file is transmitted to the signal generation module that can be connected to the complex on-chip system via a line, and the connection line that matches the audio reference file is selected from multiple candidate lines connected to the complex on-chip system. With the system parameters configured via the received test task file, the complex on-chip system is controlled to execute the input test mode, enabling it to acquire the standard signal generated by the signal generation module based on the audio reference file through the connection line, and output the first audio signal file.

3. The method according to claim 2, characterized in that, Based on the data comparison results between the audio signal file and the audio reference file, a functional verification result of the audio bus in the test mode is generated, including: The first audio signal file is compared with the audio reference file to obtain the input function verification result of the audio bus in the input test mode; The input function verification results and the test process recording data in the input test mode are stored in the test log corresponding to the input test mode.

4. The method according to claim 1, characterized in that, The step of transmitting the audio reference file to a signal generation module or the complex on-chip system that can be connected via a line, according to the test mode, so that the complex on-chip system outputs an audio signal file, includes: When the test mode is output test mode, the audio reference file and the test task file are transmitted together to the complex on-chip system; With the system parameters configured by the received test task file, the complex on-chip system is controlled to execute the output test mode, causing the complex on-chip system to output a second audio signal file to the signal receiving module connected to the complex on-chip system.

5. The method according to claim 4, characterized in that, Based on the data comparison results between the audio signal file and the audio reference file, a functional verification result of the audio bus in the test mode is generated, including: The system receives the audio parsing file output by the signal receiving module; the signal receiving module is used to perform audio protocol analysis on the second audio signal file and convert the second audio signal file into the audio parsing file. The audio parsing file is compared with the audio benchmark file to obtain the output function verification result of the audio bus in the output test mode; The output function verification results and the test process recording data in the output test mode are stored in the test log corresponding to the output test mode.

6. The method according to claim 2 or 4, characterized in that, The configuration of system parameters through the received test task file includes: The system parameter configuration fields of the test task file are parsed to determine the system parameters of the complex on-chip system; Configure the audio function block and pins of the complex on-chip system according to the system parameters.

7. An automated verification device for an audio bus of a complex on-chip system, characterized in that, include: Main unit, signal generating module, signal receiving module, connection selection module; The host is used to acquire test task files and audio benchmark files generated for the audio bus of a complex on-chip system, and to determine the test mode based on the test task files. In input test mode, the host is also used to transmit the test task file to the complex on-chip system and the audio reference file to the signal generation module; The connection selection module controls the line connection between the signal generation module and the complex on-chip system, enabling the complex on-chip system to acquire the standard signal generated by the signal generation module based on the audio reference file and output a first audio signal file; it receives the first audio signal file and generates the input function verification result of the audio bus based on the data comparison result between the first audio signal file and the audio reference file; In output test mode, the host is also used to transmit the test task file and the audio reference file to the complex on-chip system, so that the complex on-chip system outputs a second audio signal file to the signal receiving module. The signal receiving module is used to perform audio protocol analysis on the second audio signal file and convert the second audio signal file into an audio parsing file. The system receives the audio parsing file output by the signal receiving module and generates the output function verification result of the audio bus in the output test mode based on the data comparison result between the audio parsing file and the audio reference file.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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