Time-reversal symmetry low-frequency coreless transformer applied to fractional frequency transmission system

Abstract

The application discloses a parity-time symmetry low-frequency coreless transformer applied to a fractional frequency power transmission system, which is divided into a boost-type parity-time symmetry low-frequency coreless transformer and a step-down type parity-time symmetry low-frequency coreless transformer. When applied to the fractional frequency power transmission system, the boost-type parity-time symmetry low-frequency coreless transformer can directly boost the rectified DC bus voltage to 16.7Hz AC high voltage, and then the 16.7Hz AC high voltage is transmitted through a cable for a long distance, thereby replacing the original low-frequency power boost transformer. The step-down type parity-time symmetry low-frequency coreless transformer can step down the 16.7Hz high-voltage AC power in the fractional frequency power transmission system, and then the fractional frequency AC power is converted into power frequency AC power through an AC / AC frequency converter and is transmitted to the land power grid. The application realizes efficient power transmission without a core. The application removes the low-frequency core, greatly reduces the number of turns of the winding, improves the problems of the fractional frequency power transmission system, such as large weight and volume of the power transformer and easy saturation, and saves the production and manufacturing cost of the core.

Description

Technical Field

[0001] This invention relates to the technical field of transformers and power electronic conversion, and in particular to a parity-time symmetrical low-frequency coreless transformer for use in frequency division transmission systems. Background Technology

[0002] In recent years, frequency-division transmission, as a transmission technology suitable for long-distance, high-capacity power transmission, has shown significant advantages in long-distance scenarios such as offshore wind power development. Frequency-division transmission technology significantly reduces line resistance and reactance, and increases transmission capacity by lowering the power frequency by 50 Hz to 50 / 3 Hz, while retaining the advantages of AC systems in terms of ease of transformation, networking, and fault handling. However, low-frequency power transformers bring new technical drawbacks and challenges: at low frequencies, to maintain the same induced electromotive force and magnetic flux density, the core cross-sectional area needs to be increased or the number of winding turns increased, resulting in a significant increase in transformer size and weight; the core is prone to saturation at low frequencies, requiring the use of high magnetic flux density core materials. Therefore, frequency-division transmission systems require a series of new technologies to optimize low-frequency power transformers. Among these, coreless transformers offer the greatest advantage. If a high-performance coreless transformer can be developed and applied to frequency-division transmission, it will have the following significant advantages: 1. Elimination of core production and manufacturing costs; 2. Significantly reduced transformer size and weight; 3. Elimination of iron losses and saturation problems; 4. Elimination of surge and harmonic currents caused by core nonlinear characteristics, and noise caused by interlayer mechanical oscillations; 5. Elimination of the need for insulating oil and the need to consider insulation between the core and windings. Therefore, high-performance coreless transformers will greatly improve the cost-effectiveness of frequency-division transmission and significantly promote the practical application of frequency-division transmission technology. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings and deficiencies of existing technologies and provide a parity-time symmetric low-frequency coreless transformer for use in frequency-division power transmission systems. Based on the principle of parity-time symmetry, a mechanism for a low-frequency coreless transformer is proposed, which effectively increases the excitation impedance and solves problems such as small main magnetic flux, high excitation current, and large leakage flux inherent in coreless transformers. It achieves the same AC voltage conversion function as traditional iron-core power transformers. Furthermore, the proposed coreless transformer can operate at a frequency of 16.7Hz, which helps to mitigate a series of problems associated with low-frequency iron-core transformers, such as significantly increased size and weight, and easy core saturation.

[0004] To achieve the above objectives, the technical solution provided by the present invention is: a parity-time symmetrical low-frequency coreless transformer applied to a frequency division transmission system, wherein the coreless transformer has two forms, namely a step-up parity-time symmetrical low-frequency coreless transformer and a step-down parity-time symmetrical low-frequency coreless transformer.

[0005] The step-up parity-time symmetrical low-frequency coreless transformer includes a first input filter, a primary-side full-bridge inverter, a first primary-side resonant capacitor, a first coreless winding, a first secondary-side resonant capacitor, a first secondary-side AC-AC converter, and a first output filter. The first input filter serves as a filter and is connected in parallel to the input terminal of the primary-side full-bridge inverter. The primary-side full-bridge inverter comprises two bridge arms, each consisting of two semiconductor switches connected in series, with the center of the two bridge arms forming the output terminal of the primary-side full-bridge inverter. The output terminal of the primary-side full-bridge inverter is connected in series with the first primary-side resonant capacitor. Connections: The first coreless winding includes a first primary winding and a first secondary winding, which are mutually coupled only through an air magnetic circuit; the first primary resonant capacitor is connected in series with the first primary winding; the first secondary winding is connected in series with the first secondary resonant capacitor and is connected in series into the input terminal of the first secondary AC-AC inverter; the first secondary AC-AC inverter is a full-bridge switching network composed of bidirectional switches, including two parallel bridge arms, each bridge arm having two bidirectional switches connected in series, and the center of the two bridge arms forming the output terminal; the first output filter is connected in parallel to the output terminal of the first secondary AC-AC inverter;

[0006] The step-down parity-time symmetrical low-frequency coreless transformer includes a second input filter, a primary-side AC-AC converter, a second primary-side resonant capacitor, a second coreless winding, a second secondary-side resonant capacitor, a second secondary-side AC-AC converter, and a second output filter. The output of the second input filter is connected in parallel to the input of the primary-side AC-AC converter and is composed of an LC passive network or an active network. The primary-side AC-AC converter is a half-bridge switching network composed of two bidirectional switches, each consisting of two semiconductor switching transistors connected in reverse series. The center of the two bidirectional switches of the primary-side AC-AC converter serves as the positive output terminal, forming the output terminal with the negative input terminal. The output terminal of the primary-side AC-AC converter is connected to the second primary-side AC-AC converter. The resonant capacitors are connected in series; the second coreless winding includes a second primary winding and a second secondary winding, which are mutually coupled only through an air magnetic circuit; the second primary resonant capacitor is connected in series with the second primary winding; the second secondary winding is connected in series with the second secondary resonant capacitor; the second secondary AC-AC inverter is a full-bridge switching network composed of bidirectional switches, including two parallel bridge arms, each bridge arm with two bidirectional switches connected in series, each bidirectional switch consisting of two anti-parallel series semiconductor switching transistors, and the center of the two bridge arms forming the input terminal; the input terminal of the second secondary AC-AC inverter is connected in series with the second secondary resonant capacitor and the second secondary winding; the second output filter is connected in parallel to the output terminal of the second secondary AC-AC inverter.

[0007] Furthermore, for the step-up parity-time symmetrical low-frequency coreless transformer, the switching of the semiconductor switching transistors of the primary-side full-bridge inverter is controlled by the current of the first primary winding, so that the output voltage and output current are in phase, and the primary-side full-bridge inverter is equivalent to a negative resistor; the switching of the semiconductor switching transistors of the first secondary-side AC-AC inverter is controlled by the current of the first secondary winding, so that its input voltage and input current are in phase, and the first secondary-side AC-AC inverter is equivalent to a pure positive resistor.

[0008] Furthermore, for the aforementioned step-down parity-time symmetrical low-frequency coreless transformer, the switching of the semiconductor switching transistor of the primary-side AC-AC converter is controlled by the current of the second primary winding, so that the output voltage and output current are in phase, and the primary-side AC-AC converter is equivalent to a negative resistor; the input voltage and input current of the second secondary-side AC-AC converter are in phase, and are equivalent to a purely positive resistor.

[0009] Furthermore, the circuit parameters and operating angular frequency of the coreless transformer meet the following conditions:

[0010] ;

[0011] In the formula, It is the natural resonant angular frequency. Where is the operating angular frequency of the coreless transformer, C1 is the capacitance of the first and second primary resonant capacitors, C2 is the capacitance of the first and second secondary resonant capacitors, L1 is the self-inductance of the first and second primary windings, L2 is the self-inductance of the first and second secondary windings, and R... N R is the absolute value of the equivalent negative resistance. ac1 R represents the AC internal resistance of the first and second primary windings. ac2 R1 is the AC internal resistance of the first and second secondary windings, R2 is the equivalent load resistance of the first and second secondary windings, and k is the AC internal resistance of the first and second secondary windings. 12 This is the coupling coefficient between the primary and secondary windings.

[0012] Furthermore, for the aforementioned step-up parity-time symmetrical low-frequency coreless transformer, after satisfying the above conditions, when the input DC voltage V... i At that time, without an iron core, it outputs a low-frequency voltage of 16.7Hz. o v o The amplitude is denoted as V om Voltage ratio n su for:

[0013] .

[0014] Furthermore, for the aforementioned step-down parity-time symmetrical low-frequency coreless transformer, with an input 16.7Hz low-frequency sinusoidal voltage v... i At that time, without an iron core, it outputs a low-frequency voltage of 16.7Hz.o And the voltage transformation ratio n sd satisfy:

[0015] .

[0016] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0017] 1. Compared with traditional low-frequency iron core power transformers, this invention eliminates the low-frequency iron core, significantly reducing weight and volume, thus reducing construction costs such as transportation and installation, and eliminating the production and manufacturing costs of the iron core.

[0018] 2. Compared with traditional low-frequency iron core transformers, the transformer of this invention no longer needs to use insulating oil and there is no need to consider the insulation problem between the iron core and the winding.

[0019] 3. Compared with traditional low-frequency iron-core transformers, the transformer of this invention greatly reduces the number of winding turns, thus improving the problems of excessive weight and volume and easy saturation of power transformers in frequency-division transmission systems. Attached Figure Description

[0020] Figure 1 This is the circuit topology diagram for a step-up parity-time symmetrical low-frequency coreless transformer.

[0021] Figure 2 This is a control strategy diagram for a step-up parity-time symmetrical low-frequency coreless transformer.

[0022] Figure 3 This is the circuit topology diagram for a step-down parity-time symmetric low-frequency coreless transformer.

[0023] Figure 4 This diagram illustrates the control strategy for a step-down parity-time symmetrical low-frequency coreless transformer.

[0024] Figure 5 Conceptual diagram of a frequency division transmission system for connecting to a parity-time symmetrical low-frequency coreless transformer.

[0025] Figure 6 For a step-up parity-time symmetrical low-frequency coreless transformer with load resistance R L Waveforms of input DC voltage and output voltage when the resistance is 80Ω.

[0026] Figure 7 This is a load regulation curve for a step-up parity-time symmetrical low-frequency coreless transformer.

[0027] Figure 8 This is an efficiency curve of a step-up parity-time symmetrical low-frequency coreless transformer.

[0028] Figure 9The waveforms of input voltage, output voltage, input current, and output current of a step-down parity-time symmetrical low-frequency coreless transformer are shown.

[0029] Figure 10 This is a graph showing the input power factor of a step-down parity-time symmetrical low-frequency coreless transformer.

[0030] Figure 11 This is a load regulation curve for a step-down parity-time symmetrical low-frequency coreless transformer.

[0031] Figure 12 This is an efficiency curve of a step-down parity-time symmetrical low-frequency coreless transformer. Detailed Implementation

[0032] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0033] This embodiment discloses a parity-time symmetrical low-frequency coreless transformer for use in a frequency division transmission system. The coreless transformer has two forms: a step-up parity-time symmetrical low-frequency coreless transformer and a step-down parity-time symmetrical low-frequency coreless transformer.

[0034] like Figure 1 As shown, the step-up parity-time symmetrical low-frequency coreless transformer includes a first input filter, a primary-side full-bridge inverter, a first primary-side resonant capacitor, a first coreless winding, a first secondary-side resonant capacitor, a first secondary-side AC-AC converter, and a first output filter. The first input filter serves as a filter and is connected in parallel to the input of the primary-side full-bridge inverter. The primary-side full-bridge inverter is composed of power switches Q1, Q2, Q3, and Q4, and its output is connected in series with the first primary-side resonant capacitor. The first coreless winding includes a first primary winding and a first secondary winding, which are coupled only through an air magnetic circuit; therefore, the first coreless winding can be referred to as an air core. The first primary-side resonant capacitor is connected in series with the first primary winding. The first secondary winding is connected in series with the first secondary-side resonant capacitor and the input of the first secondary-side AC-AC converter. The first secondary-side AC-AC converter consists of two semiconductor switches Q' connected in reverse series. 1A Q' 1B Q' 2A Q' 2B Q' 3A Q' 3B Q' 4A Q' 4B The first output filter is connected in parallel with the output terminal of the first secondary AC-AC converter.

[0035] Control strategies for step-up parity-time symmetrical low-frequency coreless transformers, such as Figure 2As shown. The primary current sampling signal is used to generate a square wave signal in phase through a zero-crossing comparator. The phase-shift controller uses this square wave signal and the reference voltage v as inputs. ref This generates the switching transistors Q1-Q4 of the primary-side full-bridge inverter and the switching transistor Q' of the first secondary-side AC-AC inverter. 1A Q' 1B -Q' 4A Q' 4B The control signal ensures that the output voltage and output current of the primary-side full-bridge inverter are in phase. The primary-side full-bridge inverter can be considered a negative resistor, and the input voltage and input current of the first secondary-side AC-AC inverter are in phase, and can be considered a pure positive resistor. The phase-shift controller can be a digital controller or an analog controller. Let the duty cycle of the primary-side full-bridge inverter output voltage after phase shifting be D. Then, the transformer output voltage (i.e., the output frequency-divided AC voltage) in one switching cycle is:

[0036] ;

[0037] Therefore, by comparing with the reference voltage v ref By comparing and adjusting the phase shift angle, and subsequently adjusting the duty cycle D, the transformer output voltage can be modulated to match v. ref Low-frequency AC voltage with consistent phase and frequency.

[0038] Voltage turns ratio of step-up parity-time symmetrical low-frequency coreless transformer for:

[0039] ;

[0040] In the formula, V i Indicates the input DC voltage, V om L1 represents the amplitude of the output low-frequency AC voltage, L2 represents the self-inductance of the first primary winding, and L3 represents the self-inductance of the first secondary winding. It can be seen that the turns ratio of the proposed coreless transformer is consistent with that of the traditional cored transformer.

[0041] The efficiency expression for a step-up parity-time symmetrical low-frequency coreless transformer is:

[0042] ;

[0043] In the formula, R ac1 R is the AC internal resistance value of the first primary winding. ac2 R1 is the AC internal resistance of the first secondary winding, and R2 is the equivalent load resistance of the first secondary winding.

[0044] like Figure 3As shown, the step-down parity-time symmetrical low-frequency coreless transformer includes a second input filter, a primary-side AC-AC converter, a second primary-side resonant capacitor, a second coreless winding, a second secondary-side resonant capacitor, a second secondary-side AC-AC converter, and a second output filter. The output of the second input filter is connected in parallel to the input of the primary-side AC-AC converter and is composed of an LC passive network or an active network. The primary-side AC-AC converter is a half-bridge switching network composed of bidirectional switches, containing four power switching transistors S. 1A S 1B S 2A S 2B Each bidirectional switch consists of two semiconductor switching transistors connected in reverse series, such as S. 1A S 1B This constitutes a bidirectional switch; the output terminal of the primary-side AC-AC inverter is connected to the second primary-side resonant capacitor; the second coreless winding includes a second primary winding and a second secondary winding, which are mutually coupled only through an air magnetic circuit. Therefore, the second coreless winding, like the first coreless winding, is also an air core. The self-inductance values ​​of the second primary winding and the second secondary winding are the same as those of the first coreless winding, namely L1 and L2, respectively; the second primary-side resonant capacitor is connected in series with the second primary winding; the second secondary winding is connected in series with the second secondary resonant capacitor; the second secondary-side AC-AC inverter is a full-bridge switching network composed of bidirectional switches, containing 8 power switching transistors S'. 1A S' 1B S' 2A S' 2B S' 3A S' 3B S' 4A S' 4B The second output filter is connected in parallel to the output terminal of the second secondary AC-AC converter.

[0045] Control strategies for step-down parity-time symmetrical low-frequency coreless transformers, such as Figure 4 As shown. The current sampling signal of the primary current i1 is passed through a zero comparator to generate a square wave signal with the same phase, and the input voltage v i The sampled signal is passed through a zero comparator to generate a square wave signal in phase. The controller generates the switching transistor S of the primary-side AC-AC inverter based on these two square wave signals. 1A S 1B S 2A S 2B The control signal ensures that the output voltage and output current of the primary-side AC-AC inverter are in phase, and the primary-side AC-AC inverter can be considered as a negative resistor; the current sampling signal of the secondary-side current i2 is passed through a zero comparator to generate a square wave signal in phase, and the controller generates the switching transistor S' of the second secondary-side AC-AC inverter based on this square wave signal. 1A S' 1B S'2A S' 2B S' 3A S' 3B S' 4A S' 4B The control signal is such that the input voltage and input current of the second auxiliary AC inverter are in phase, and it is considered a pure positive resistor. Figure 4 The controller can be a digital controller or an analog controller.

[0046] Voltage turns ratio n of step-down parity-time symmetrical low-frequency coreless transformer sd for:

[0047] ;

[0048] In the formula, v i This represents the input frequency-divided AC voltage, v o The output frequency-divided AC voltage indicates that the turns ratio of the proposed coreless transformer is consistent with that of a traditional cored transformer. The efficiency expression for the step-down parity-time symmetrical low-frequency coreless transformer is the same as that for the step-up type.

[0049] When applied to frequency-division transmission systems, the boost-type parity-time symmetrical low-frequency coreless transformer can directly step up the rectified DC bus voltage to a 16.7Hz AC high voltage, which can then be transmitted over long distances via cables. This replaces the original low-frequency power step-up transformer, and reduces the original AC / DC / AC link to a single rectification link. The step-down type parity-time symmetrical low-frequency coreless transformer in a frequency-division transmission system can step down the 16.7Hz high-voltage AC, which is then converted to power frequency AC by an AC / AC frequency converter before being transmitted to the onshore power grid. Figure 5 The concept of a frequency division transmission system is demonstrated when both a step-up parity-time symmetrical low-frequency coreless transformer (hereinafter referred to as a step-up coreless transformer) and a step-down parity-time symmetrical low-frequency coreless transformer (hereinafter referred to as a step-down coreless transformer) are connected simultaneously.

[0050] To illustrate the accuracy and feasibility of this invention, a step-up parity-time symmetrical low-frequency coreless transformer and a step-down parity-time symmetrical low-frequency coreless transformer are designed in this embodiment. The parameters of the designed step-up coreless transformer are as follows: Input DC voltage is... The output AC voltage is 220 kV with an effective value of 16.7 Hz. The coreless transformer has 3 turns in the primary winding and 22 turns in the secondary winding. The winding height is 2.4 m, the winding diameter is 2 m, the self-inductance L1 = 12 μH, L2 = 490 μH, and the resonant frequency f0 is 110 kHz. Both the primary and secondary windings are made of 5 cm diameter multi-strand stranded wire. The primary AC resistance is 3 mΩ, and the secondary AC resistance is 30 mΩ. Under the same input and output voltage and load conditions, if a saturated magnetic flux density B is used... m =1.5T silicon steel sheet core, core lamination cross-sectional diameter 1m, effective cross-sectional area A c =0.636m 3 Taking E = 220kV and f = 50 / 3Hz, then according to the formula for induced voltage E... = 4.44fNB m A c Traditional iron-core power transformers require at least 3110 turns in their secondary winding.

[0051] Step-up parity-time symmetrical low-frequency coreless transformer with load resistance R L When the resistance is 80Ω, the input DC voltage and output voltage are v o Waveform as Figure 6 As shown. Figure 7 The load regulation rate is shown to be within 5% for the proposed coreless transformer. Figure 8 To calculate the efficiency curve, it can be seen from the figure that when switching transistor losses and resonant capacitor losses are ignored, and only winding losses are considered, the calculated efficiency of the proposed coreless power frequency transformer can reach up to 99.8%. When the switching transistor losses and resonant capacitor losses account for less than 1% of the total input power, the transformer efficiency can reach 98.8%, close to 99%.

[0052] The designed step-down coreless transformer has the following parameters: input AC voltage RMS value of 220kV, output AC voltage RMS value of 110kV, frequency of 16.7Hz; the primary winding has 14 turns, the secondary winding has 14 turns, winding height is 2m, diameter is 2m, self-inductance L1=144.2μH, L2=145.5μH, resonant frequency f0 is 120kHz; both primary and secondary windings are wound with 5cm diameter multi-strand stranded wire, and AC resistance is 20mΩ. Under the same input and output voltage and load conditions, if a saturated magnetic flux density B is used... m =1.5T silicon steel sheet core, the diameter of the core lamination cross section is still taken as 1m, and the effective cross-sectional area A c =0.636m 3 According to the formula for calculating induced voltage, both the primary and secondary windings of a traditional iron-core power transformer require at least 3110 turns.

[0053] Step-down parity-time symmetrical low-frequency coreless transformer with load resistance R L When the Ω is 20Ω, the input voltage v i Output voltage v o Input current i in Output current i o Waveform as Figure 9 As shown. The input power factor curve is as follows. Figure 10 As shown, the input power factor is close to 1, with a maximum of 0.998. Figure 11 As shown in the load regulation rate, the proposed step-down coreless transformer has a load regulation rate of less than 5%. Figure 12 To calculate the efficiency curve, when only winding losses are considered, the calculated efficiency of the proposed step-down coreless transformer can reach up to 99.6%. When the switching transistor losses and resonant capacitor losses account for less than 1% of the total input power, the transformer efficiency can reach 98.6%, close to 99%.

[0054] Based on the above analysis, both the step-up parity-time symmetrical low-frequency coreless transformer and the step-down parity-time symmetrical low-frequency coreless transformer described in this invention can meet the voltage transformation requirements of frequency-division transmission systems, and therefore can be fully applied to frequency-division transmission systems. Compared with traditional low-frequency iron-core power transformers, the parity-time symmetrical low-frequency coreless transformer proposed in this invention significantly reduces the number of winding turns and has no transformer core, thus greatly reducing its size and weight, solving the problem of significantly increased weight and size of low-frequency transformers in frequency-division transmission systems. Furthermore, besides 16.7Hz frequency division, the coreless transformer proposed in this invention is also suitable for other low-frequency transmission systems. The advantages of this invention are obvious and worthy of promotion.

[0055] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A parity-time symmetrical low-frequency coreless transformer for use in frequency division transmission systems, characterized in that, The coreless transformer comes in two forms: step-up parity-time symmetrical low-frequency coreless transformer and step-down parity-time symmetrical low-frequency coreless transformer. The step-up parity-time symmetrical low-frequency coreless transformer includes a first input filter, a primary-side full-bridge inverter, a first primary-side resonant capacitor, a first coreless winding, a first secondary-side resonant capacitor, a first secondary-side AC-AC converter, and a first output filter. The first input filter serves as a filter and is connected in parallel to the input terminal of the primary-side full-bridge inverter. The primary-side full-bridge inverter comprises two bridge arms, each consisting of two semiconductor switches connected in series, with the center of the two bridge arms forming the output terminal of the primary-side full-bridge inverter. The output terminal of the primary-side full-bridge inverter is connected in series with the first primary-side resonant capacitor. Connections: The first coreless winding includes a first primary winding and a first secondary winding, which are mutually coupled only through an air magnetic circuit; the first primary resonant capacitor is connected in series with the first primary winding; the first secondary winding is connected in series with the first secondary resonant capacitor and is connected in series into the input terminal of the first secondary AC-AC inverter; the first secondary AC-AC inverter is a full-bridge switching network composed of bidirectional switches, including two parallel bridge arms, each bridge arm having two bidirectional switches connected in series, and the center of the two bridge arms forming the output terminal; the first output filter is connected in parallel to the output terminal of the first secondary AC-AC inverter; The step-down parity-time symmetrical low-frequency coreless transformer includes a second input filter, a primary-side AC-AC converter, a second primary-side resonant capacitor, a second coreless winding, a second secondary-side resonant capacitor, a second secondary-side AC-AC converter, and a second output filter. The output of the second input filter is connected in parallel to the input of the primary-side AC-AC converter and is composed of an LC passive network or an active network. The primary-side AC-AC converter is a half-bridge switching network composed of two bidirectional switches, each consisting of two semiconductor switching transistors connected in reverse series. The center of the two bidirectional switches of the primary-side AC-AC converter serves as the positive output terminal, forming the output terminal with the negative input terminal. The output terminal of the primary-side AC-AC converter is connected to the second primary-side AC-AC converter. The resonant capacitors are connected in series; the second coreless winding includes a second primary winding and a second secondary winding, which are mutually coupled only through an air magnetic circuit; the second primary resonant capacitor is connected in series with the second primary winding; the second secondary winding is connected in series with the second secondary resonant capacitor; the second secondary AC-AC inverter is a full-bridge switching network composed of bidirectional switches, including two parallel bridge arms, each bridge arm with two bidirectional switches connected in series, each bidirectional switch consisting of two anti-parallel series semiconductor switching transistors, and the center of the two bridge arms forming the input terminal; the input terminal of the second secondary AC-AC inverter is connected in series with the second secondary resonant capacitor and the second secondary winding; the second output filter is connected in parallel to the output terminal of the second secondary AC-AC inverter.

2. The parity-time symmetrical low-frequency coreless transformer for use in frequency division transmission systems according to claim 1, characterized in that, For the aforementioned step-up parity-time symmetrical low-frequency coreless transformer, the switching of the semiconductor switching transistors of the primary-side full-bridge inverter is controlled by the current of the first primary winding, so that the output voltage and output current are in phase, and the primary-side full-bridge inverter is equivalent to a negative resistor; the switching of the semiconductor switching transistors of the first secondary-side AC-AC inverter is controlled by the current of the first secondary winding, so that its input voltage and input current are in phase, and the first secondary-side AC-AC inverter is equivalent to a pure positive resistor.

3. The parity-time symmetrical low-frequency coreless transformer for use in frequency division transmission systems according to claim 2, characterized in that, For the aforementioned step-down parity-time symmetrical low-frequency coreless transformer, the switching of the semiconductor switching transistor of the primary-side AC-AC converter is controlled by the current of the second primary winding, so that the output voltage and output current are in phase, and the primary-side AC-AC converter is equivalent to a negative resistor; the input voltage and input current of the second secondary-side AC-AC converter are in phase, and are equivalent to a purely positive resistor.

4. The parity-time symmetrical low-frequency coreless transformer for use in frequency division transmission systems according to claim 3, characterized in that, The circuit parameters and operating angular frequency of the coreless transformer meet the following conditions: ； In the formula, It is the natural resonant angular frequency. Where is the operating angular frequency of the coreless transformer, C1 is the capacitance of the first and second primary resonant capacitors, C2 is the capacitance of the first and second secondary resonant capacitors, L1 is the self-inductance of the first and second primary windings, L2 is the self-inductance of the first and second secondary windings, and R... N R is the absolute value of the equivalent negative resistance. ac1 R represents the AC internal resistance of the first and second primary windings. ac2 R1 is the AC internal resistance of the first and second secondary windings, R2 is the equivalent load resistance of the first and second secondary windings, and k is the AC internal resistance of the first and second secondary windings. 12 This is the coupling coefficient between the primary and secondary windings.

5. The parity-time symmetrical low-frequency coreless transformer for use in frequency division transmission systems according to claim 4, characterized in that, For the aforementioned step-up parity-time symmetrical low-frequency coreless transformer, after satisfying the above conditions, when the input DC voltage V... i At that time, without an iron core, it outputs a low-frequency voltage of 16.7Hz. o v o The amplitude is denoted as V om Voltage ratio n su for: 。 6. The parity-time symmetrical low-frequency coreless transformer for use in frequency division transmission systems according to claim 5, characterized in that, For the aforementioned step-down parity-time symmetrical low-frequency coreless transformer, with an input 16.7Hz low-frequency sinusoidal voltage v i At that time, without an iron core, it outputs a low-frequency voltage of 16.7Hz. o And the voltage transformation ratio n sd satisfy: 。

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