Power module lockout output undervoltage and short circuit protection circuit based on analog circuit

Abstract

The application discloses a power module lock output under-voltage and short-circuit protection circuit based on an analog circuit, which comprises two input ends of an under-voltage and short-circuit detection circuit, which are electrically connected with a positive output end and a negative output end of a power module, respectively, for detecting whether the output voltage of the power module is under-voltage through an internal photo-coupler and outputting an under-voltage signal when the output voltage of the power module is under-voltage; a state transformation processing circuit for performing delay processing on the photo-coupler state output by the under-voltage and short-circuit detection circuit and outputting a corresponding state detection signal; and an input end of an enable control circuit and an output end of the state transformation processing circuit are electrically connected, for controlling an enable end of the power module according to the state detection signal. The application can lock the output of the power module for a certain time when the power module has an under-voltage and short-circuit fault, so as to protect the subsequent equipment, and the normal output state can be restored when the power module is powered on again after power-off.

Description

Technical Field

[0001] This invention relates to the field of undervoltage and short-circuit protection circuit technology, and in particular to a power module output undervoltage and short-circuit protection circuit based on analog circuits. Background Technology

[0002] For undervoltage and short-circuit protection of power module outputs, the hiccup protection mode built into the internal chip of the power module is often used, which is not suitable for special application scenarios. When the power module experiences undervoltage or short-circuit faults and output lockout is required, software protection is currently the primary method. Software protection mainly involves sampling the output voltage; when the output voltage falls below a set threshold, the MCU issues a corresponding protection signal to achieve protection. However, software protection has drawbacks such as high accuracy requirements for the sampling circuit, slow response speed, and poor reliability. Furthermore, software protection involves a large number of unit circuits (sampling circuit, MCU), resulting in high overall cost. Therefore, this invention proposes a hardware protection method.

[0003] In order to solve the above-mentioned problems, the present invention utilizes semiconductor devices to build a simple analog circuit to achieve output lock-up undervoltage and short-circuit protection. Summary of the Invention

[0004] To address the shortcomings of the existing technology, the technical problem to be solved by the present invention is to provide a power module output lockout undervoltage and short circuit protection circuit based on analog circuits. When the power module experiences undervoltage and short circuit faults, the power module output is locked after a certain delay to protect downstream equipment. Normal output can only be restored when power is restored after a power outage.

[0005] One technical solution adopted by this invention is: providing a power module output lockout undervoltage and short-circuit protection circuit based on analog circuits, including: an undervoltage and short-circuit detection circuit, a state transition processing circuit, and an enable control circuit, wherein, The two input terminals of the undervoltage and short-circuit detection circuit are electrically connected to the positive and negative output terminals of the power module, respectively, and are used to detect whether the output voltage of the power module is undervoltage through the internal optocoupler, and output an undervoltage signal when the output voltage of the power module is undervoltage. The four input terminals of the state transition processing circuit are electrically connected to the positive and negative output terminals of the undervoltage and short circuit detection circuit and the positive and negative input terminals of the power module, respectively, and are used to output the corresponding state detection signal after delaying the output signal of the undervoltage and short circuit detection circuit. The input terminal of the enable control circuit is electrically connected to the output terminal of the state transition processing circuit, and is used to output a corresponding control signal to the enable terminal of the power module according to the state detection signal.

[0006] Furthermore, the undervoltage and short-circuit detection circuit includes: The first resistor has its first end serving as the first input terminal of the undervoltage and short-circuit detection circuit, and its first end is electrically connected to the first end of the second resistor. The first Zener diode has its first terminal electrically connected to the second terminal of the first resistor and the first terminal of the third resistor, and its second terminal serves as the second input terminal of the undervoltage and short-circuit detection circuit. The first transistor has its base electrically connected to the second end of the third resistor, its emitter electrically connected to the second end of the second resistor, and its collector electrically connected to the first end of the fourth resistor and the first end of the optocoupler. The optocoupler has its second terminal electrically connected to the second terminal of the first Zener diode, and its third and fourth terminals serve as the two output terminals of the undervoltage and short-circuit detection circuit, respectively.

[0007] Furthermore, the state transition processing circuit includes: The first diode has its first end electrically connected to the third end of the optocoupler, and its second end electrically connected to the first end of the fifth resistor and the first end of the sixth resistor; the second end of the fifth resistor is electrically connected to the positive input terminal of the power module. The seventh resistor has its first end electrically connected to the second end of the sixth resistor, and its second end electrically connected to the fourth end of the optocoupler and the negative input terminal of the power module. The base of the second transistor is electrically connected to the first end of the seventh resistor, and the emitter is electrically connected to the negative input terminal of the power supply module. The eighth resistor has its first end electrically connected to the positive input terminal of the power module and its second end electrically connected to the emitter of the second transistor. The base of the third transistor is electrically connected to the second terminal of the eighth resistor, and the emitter is electrically connected to the negative input terminal of the power supply module. The ninth resistor has its first end electrically connected to the collector of the third transistor; The tenth resistor has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the second end of the ninth resistor. The eleventh resistor has its first end electrically connected to the second end of the tenth resistor, and its second end electrically connected to the negative input terminal of the power module. The first capacitor has its two ends connected in parallel across the eleventh resistor; The twelfth resistor has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the first end of the thirteenth resistor; the second end of the thirteenth resistor is electrically connected to the second end of the seventh resistor. The first comparator has its non-inverting input terminal electrically connected to the second terminal of the ninth resistor, the first terminal of the eleventh resistor, and the first terminal of the first capacitor; its inverting input terminal electrically connected to the second terminal of the twelfth resistor and the first terminal of the thirteenth resistor; its two power input terminals electrically connected to the positive and negative input terminals of the power module, respectively; and its output terminal serving as the output terminal of the state transition processing circuit.

[0008] Furthermore, the state transition processing circuit also includes: An auxiliary power supply is provided, the input of which is electrically connected to the positive input of the power module. The second capacitor has its first end electrically connected to the output terminal of the auxiliary power supply, and its second end electrically connected to the negative input terminal of the power module.

[0009] Furthermore, the enable control circuit includes: The fourteenth resistor has its first end electrically connected to the output terminal of the state transition processing circuit, and its second end electrically connected to the first end of the third capacitor and the first end of the second diode. The second terminal of the third capacitor is electrically connected to the negative input terminal of the power module; The second terminal of the second diode is electrically connected to the collector of the fourth transistor, the first terminal of the sixteenth resistor, and the base of the fifth transistor; the second terminal of the sixteenth resistor is electrically connected to the negative input terminal of the power supply module. The fifteenth resistor has its first end electrically connected to the emitter of the fourth transistor, and its second end electrically connected to the base of the fourth transistor and the collector of the fifth transistor; the emitter of the fifth transistor is electrically connected to the negative input terminal of the power supply module. The seventeenth resistor has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the first end of the fifteenth resistor. The fourth capacitor has its first end electrically connected to the second end of the seventeenth resistor, and its second end electrically connected to the negative input terminal of the power module. The eighteenth resistor has its first end electrically connected to the second end of the seventeenth resistor, and its second end electrically connected to the first end of the second Zener diode, the first end of the fifth capacitor, the first end of the nineteenth resistor, and the base of the sixth transistor. The second terminal of the second Zener diode, the second terminal of the fifth capacitor, the second terminal of the nineteenth resistor, and the emitter of the sixth transistor are all electrically connected to the negative input terminal of the power module. The twentieth resistor has its first end electrically connected to the positive input terminal of the power module, its second end electrically connected to the collector of the sixth transistor and the first end of the sixth capacitor, and the second end of the twentieth resistor, the collector of the sixth transistor and the first end of the sixth capacitor are all connected to the output terminal of the enable control circuit. The emitter of the sixth transistor and the second terminal of the sixth capacitor are both electrically connected to the negative input terminal of the power supply module.

[0010] Furthermore, the first to fourth resistors are all conventional ordinary resistors, with the first resistor having a resistance of 8-12kΩ, the second resistor having a resistance of 0.8-1.2kΩ, the third resistor having a resistance of 0.8-1.2kΩ, and the fourth resistor having a resistance of 8-12kΩ.

[0011] Furthermore, the fifth through thirteenth resistors are all conventional ordinary resistors, with the fifth resistor having a resistance of 8-12kΩ, the sixth resistor having a resistance of 18-22kΩ, the seventh resistor having a resistance of 8-12kΩ, the eighth resistor having a resistance of 8-12kΩ, the ninth resistor having a resistance of 8-12Ω, the tenth resistor having a resistance of 18-22kΩ, the eleventh resistor having a resistance of 90-110kΩ, the twelfth resistor having a resistance of 8-12kΩ, and the thirteenth resistor having a resistance of 18-22kΩ.

[0012] Furthermore, the fourteenth to twentieth resistors are conventional ordinary resistors, wherein the resistance of the fourteenth resistor is 1.8-2.2kΩ, the resistance of the fifteenth resistor is 8-12kΩ, the resistance of the sixteenth resistor is 8-12kΩ, the resistance of the seventeenth resistor is 40-45kΩ, the resistance of the eighteenth resistor is 8-12kΩ, the resistance of the nineteenth resistor is 8-12kΩ, and the resistance of the twentieth resistor is 90-110kΩ.

[0013] Furthermore, the second capacitor is a conventional ordinary capacitor with a capacitance value of 0.08-0.12uF.

[0014] Furthermore, the first, third, fourth, fifth, and sixth capacitors are all conventional ordinary capacitors. Specifically, the capacitance of the first capacitor is 7-9 uF, the capacitance of the third capacitor is 0.08-0.12 uF, the capacitance of the fourth capacitor is 0.008-0.012 uF, the capacitance of the fifth capacitor is 0.008-0.012 uF, and the capacitance of the sixth capacitor is 0.08-0.12 uF.

[0015] The analog circuit-based power module output undervoltage and short-circuit protection circuit of the present invention has at least the following beneficial effects: 1.1. The circuit of this invention uses a conventional undervoltage and short-circuit detection circuit. When the power module output is normal, the output voltage M_VOUT (i.e., the voltage between 1_IN+ and 1_IN-, the same below) is higher than the Zener voltage VZ1 of the Zener diode Z1 (different Zener diodes Z1 can be selected according to different output voltages). Zener diode Z1 breaks down, providing a drive current ib1 to the base of transistor V1, and transistor V1 is in the on state, and optocoupler U1 is turned on. When the power module output is undervoltage or short-circuited, the output voltage M_VOUT is lower than the Zener voltage VZ1 of Zener diode Z1. Zener diode Z1 cannot break down, there is no drive current ib1 at the base of transistor V1, transistor V1 is in the off state, and optocoupler U1 is turned off. When the output voltage state of the power module changes, a state transition processing circuit is added, and an RC charging circuit is used to delay for a certain period of time to reflect the change in the output voltage state of the power module.When optocoupler U1 is in the ON state (after normal output or output undervoltage / short circuit disappears), diode D1 conducts. The input voltage M_VIN (i.e., the voltage between 2_IN2+ and 2_IN2-, equivalent to the voltage between 3_IN1+ and 3_IN1-, the same below) flows to ground through resistor R5 and diode D1 after passing through the +5V auxiliary power supply. There is no drive current ib2 at the base of transistor V2, so transistor V2 is off. At this time, the +5V auxiliary power supply provides drive current ib3 to the base of transistor V3 through resistor R8, so transistor V3 conducts. The voltage at the positive input terminal of comparator U2 is lower than the voltage at the negative input terminal, and comparator U2... Output 2_OUT is low; when optocoupler U1 is in the off state (output undervoltage / short circuit), diode D1 is off, and the +5V auxiliary power supply voltage is applied to the base of transistor V2 after being divided by resistors R5, R6, and R7, providing a drive current ib2 to the base of transistor V2, turning on transistor V2. At this time, the base voltage of transistor V3 is pulled low, there is no base drive current ib3, and transistor V3 is off. The +5V auxiliary power supply charges capacitor C1 through resistor R10. After approximately time t1, the voltage at the positive input terminal of comparator U2 is higher than the voltage at the negative input terminal, and the output 2_OUT of comparator U2 flips to high; subsequently... Then, through an enable control circuit, for different states of the output terminal 2_OUT of the state transition processing circuit 2, when 2_OUT (i.e., 3_IN2) is low, transistor V5 has no base drive current ib5, and transistor V5 is cut off. At this time, the base voltage of transistor V4 is high, there is no base drive current ib4, and transistor V4 is cut off. The input voltage M_VIN is applied to the base of transistor V6 after being divided by resistors R17, R18, and R19, providing a drive current ib6 to the base of transistor V6, transistor V6 is turned on, and the voltage of its output terminal 3_OUT is pulled low; when 2_OUT (i.e., 3_IN2) is low, transistor V5 is cut off. 2) When 3_IN2 is high, after filtering by resistor R14 and capacitor C3, diode D2 provides base drive current ib5 to transistor V5, turning on transistor V5. At this time, the base voltage of transistor V4 is pulled low, providing base drive current ib4, turning on transistor V4 and forming a latch-up state. It no longer responds to the state transition processing circuit 2. Even when 3_IN2 flips to low again, transistors V4 and V5 will continue to conduct. At this time, the base voltage of transistor V6 is pulled low, there is no drive current ib6, and transistor V6 is cut off. Its output terminal 3_OUT is pulled up to the positive input terminal of the power module by resistor R20. Finally, 3_OUT is connected to the EN terminal (enable port) of the power module, thereby controlling the high and low levels of the EN terminal of the module and realizing the protection of the power module.

[0016] 2. The circuit of this invention can lock the power module to have no output when the power module experiences undervoltage or short circuit faults to protect the downstream power supply equipment. The power module can only resume normal output when the power input is cut off and then powered on again.

[0017] 3. This invention effectively avoids malfunctions during power-on startup by using the delay function of the state transition processing circuit. The protection action time can be set by adjusting the resistor or capacitor, and the output undervoltage protection range can also be adjusted by changing the Zener diode.

[0018] 4. This invention can achieve undervoltage / short-circuit protection for multi-output power modules through parallel connection. When any output undervoltage / short-circuit fault occurs, all output channels of the power module will be locked and there will be no output.

[0019] 5. The resistors, capacitors, diodes, Zener diodes, transistors, and optocouplers used in this invention are all conventional devices with a wide range of applications.

[0020] 6. The circuit of this invention uses fewer types of components, has low cost, and high flexibility. Attached Figure Description

[0021] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a circuit block diagram of the present invention.

[0022] Figure 2 This is a circuit diagram of the undervoltage and short-circuit detection circuit of the present invention.

[0023] Figure 3 This is a circuit diagram of the state transition processing circuit of the present invention.

[0024] Figure 4 This is a circuit diagram of the enable control circuit of the present invention.

[0025] Figure 5 This is a simulation result diagram of the protective action time of the present invention.

[0026] Explanation of reference numerals in the attached figures: Undervoltage and short-circuit detection circuit-1; State transition processing circuit-2; Enable control circuit-3. Detailed Implementation The invention will now be further described with reference to the accompanying drawings.

[0027] Please see Figure 1 This is a circuit block diagram of the present invention. The power module lockout output undervoltage and short-circuit protection circuit based on analog circuits includes: an undervoltage and short-circuit detection circuit 1, a state transition processing circuit 2, and an enable control circuit 3, wherein... The two input terminals of the undervoltage and short - circuit detection circuit 1 are respectively electrically connected to the positive output terminal and the negative output terminal of the power supply module, and are used to detect whether the output voltage of the power supply module is undervoltage through the optocoupler inside it, and output an undervoltage signal when the output voltage of the power supply module is undervoltage; this undervoltage and short - circuit detection circuit 1 is directly connected to the output terminal (positive and negative terminals of M_VOUT) of the power supply module, can directly sample the output voltage (M_VOUT) of the power supply module, and convert this continuous analog voltage signal into a discrete switching signal with electrical isolation characteristics (the on / off state of the optocoupler U1). This conversion is the basis for all subsequent logic processing.

[0028] Please refer to Figure 2 , that is, the circuit diagram of the undervoltage and short - circuit detection circuit of the present invention. The undervoltage and short - circuit detection circuit 1 specifically includes: The first resistor R1, its first end is used as the first input terminal of the undervoltage and short - circuit detection circuit 1, and the first end is electrically connected to the first end of the second resistor R2; this first resistor R1 serves as an input - terminal current - limiting resistor, and its primary function is to protect subsequent precision devices. It limits the current flowing in from the power - supply output terminal, preventing over - current damage to the first zener diode Z1 and the first triode V1 due to accidental over - voltage or surge.

[0029] The first zener diode Z1, its first end is electrically connected to the second end of the first resistor R1 and the first end of the third resistor R3, and the second end is used as the second input terminal of the undervoltage and short - circuit detection circuit 1; this first zener diode Z1 is the voltage - reference element of the entire detection circuit. It sets an accurate undervoltage threshold (VZ1). When M_VOUT > VZ1, the first zener diode Z1 breaks down, providing a bias for the subsequent circuit; when M_VOUT < VZ1 (undervoltage or short - circuit), the first zener diode Z1 is cut off. It is the key criterion for converting the continuous voltage into a logical event (whether it is undervoltage).

[0030] The first triode V1, its base is electrically connected to the second end of the third resistor R3, its emitter is electrically connected to the second end of the second resistor R2, and its collector is electrically connected to the first end of the fourth resistor R4 and the first end of the optocoupler U1; this third resistor R3 provides base current for the first triode V1. The first triode V1 serves as a current - driven switch, and its working state is completely determined by the first zener diode Z1. When the first zener diode Z1 breaks down, the first triode V1 conducts, and when the first zener diode Z1 is cut off, the first triode V1 is cut off. The role of the first triode V1 is to amplify the weak current signal generated by the first zener diode Z1 into a strong current signal sufficient to drive the optocoupler U1.

[0031] Optocoupler U1 has its second terminal electrically connected to the second terminal of the first Zener diode Z1, and its third and fourth terminals serve as the two output terminals of the undervoltage and short-circuit detection circuit 1, respectively. The fourth resistor R4 is the current-limiting resistor for the internal LED of optocoupler U1, ensuring its operating current remains within a safe range. Optocoupler U1 is the core of electrical isolation and signal conversion. When the first transistor V1 is turned on, current flows through the LED of optocoupler U1, causing it to light up, which in turn turns on the phototransistor inside optocoupler U1; conversely, it is turned off. Thus, the high-voltage signal is safely and reliably converted into the optocoupler switch status signal on the low-voltage side.

[0032] In addition, the first to fourth resistors mentioned above are all conventional ordinary resistors, wherein the resistance of the first resistor is 8-12kΩ (preferably 10kΩ), the resistance of the second resistor is 0.8-1.2kΩ (preferably 1kΩ), the resistance of the third resistor is 0.8-1.2kΩ (preferably 10kΩ), and the resistance of the fourth resistor is 8-12kΩ (preferably 10kΩ).

[0033] The four input terminals of the state transition processing circuit 2 are electrically connected to the positive and negative output terminals of the undervoltage and short-circuit detection circuit 1, as well as the positive and negative input terminals of the power module, respectively. This allows the circuit to delay the output signal of the undervoltage and short-circuit detection circuit 1 before outputting the corresponding state detection signal. When an undervoltage or short-circuit fault is detected, the state transition processing circuit 2 generates a delay through its internal RC charging circuit. Approximately t1 time later, the signal at its output terminal (2_OUT) flips. This delay function effectively prevents false protection operations during power-on startup and other instantaneous processes, improving the accuracy and anti-interference capability of the protection. Furthermore, the aforementioned delay time t1 can be adjusted by modifying the parameters of the corresponding resistors or capacitors in the circuit, thereby setting the required protection action time according to actual application needs.

[0034] Please see Figure 3 The circuit diagram of the state transition processing circuit of the present invention is shown. Specifically, the state transition processing circuit 2 may include: The first diode D1 has its first terminal electrically connected to the third terminal of the optocoupler U1, and its second terminal electrically connected to the first terminals of the fifth resistor R5 and the sixth resistor R6. The second terminal of the fifth resistor R5 is electrically connected to the positive input terminal of the power supply module. This first diode D1 serves as a unidirectional conduction and level shifter. When the optocoupler U1 is turned on, the anode of the first diode D1 is pulled low and conducts, clamping the level of subsequent nodes to a low level.

[0035] The seventh resistor R7 has its first end electrically connected to the second end of the sixth resistor R6, and its second end electrically connected to the fourth end of the optocoupler U1 and the negative input terminal of the power module. The fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 form a voltage divider and bias network. When the first diode D1 is off (i.e., optocoupler U1 is off, indicating a fault), the power supply provides sufficient base drive current to the second transistor V2 through the voltage division of the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7, causing it to saturate and conduct. This network ensures that the input signal can reliably drive the switching transistor.

[0036] The base of the second transistor V2 is electrically connected to the first end of the seventh resistor R7, and the emitter is electrically connected to the negative input terminal of the power supply module. The eighth resistor R8 has its first end electrically connected to the positive input terminal of the power module and its second end electrically connected to the emitter of the second transistor V2; the power supply provides a drive current ib3 to the base of the third transistor V3 through this eighth resistor R8.

[0037] The base of the third transistor V3 is electrically connected to the second terminal of the eighth resistor R8, and its emitter is electrically connected to the negative input terminal of the power module. This third transistor V3 and the second transistor V2 form a complementary switching pair. When the second transistor V2 is turned on, it directly causes the third transistor V3 to be turned off (because the second transistor V2 pulls the base of the third transistor V3 low), and vice versa. This circuit stage converts the switching state of the optocoupler U1 into control over the collector voltage of the third transistor V3.

[0038] The ninth resistor R9 has its first end electrically connected to the collector of the third transistor V3; The tenth resistor R10 has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the second end of the ninth resistor R9. The eleventh resistor R11 has its first end electrically connected to the second end of the tenth resistor R10, and its second end electrically connected to the negative input terminal of the power module. The first capacitor C1 is connected in parallel across the eleventh resistor R11; this first capacitor C1 and the aforementioned tenth resistor R10 form a classic RC delay circuit. When the third transistor V3 is turned off (indicating a fault), the power supply begins to charge the first capacitor C1 through the tenth resistor R10. The voltage across the first capacitor C1 rises slowly, the rate of rise determined by the time constant τ = R10 * C1. This slowly rising voltage is the physical manifestation of the "delay." Only when the charging voltage exceeds the reference voltage of the subsequent comparator is the fault considered persistent.

[0039] The twelfth resistor R12, its first end is electrically connected to the positive input terminal of the power supply module, and its second end is electrically connected to the first end of the thirteenth resistor R13; the second end of the thirteenth resistor R13 is electrically connected to the second end of the seventh resistor R7; the twelfth resistor R12 and the eleventh resistor R11 form a voltage dividing network to provide a stable reference voltage Vref for the inverting input terminal of the first comparator U2. The thirteenth resistor R13 is the pull-up resistor at the output terminal of the first comparator U2 to ensure the voltage value of the output high level.

[0040] The first comparator U2, its non-inverting input terminal is electrically connected to the second end of the ninth resistor R9, the first end of the eleventh resistor R11, and the first end of the first capacitor C1, its inverting input terminal is electrically connected to the second end of the twelfth resistor R12 and the first end of the thirteenth resistor R13, its two power input terminals are respectively electrically connected to the positive and negative input terminals of the power supply module, and its output terminal is used as the output terminal of the state transformation processing circuit. This first comparator U2 is the final decision maker. It can continuously compare its non-inverting input terminal (the delayed voltage on the first capacitor C1) and the inverting input terminal (stable Vref). When the delayed voltage < Vref, it outputs a low level (normal); when the delayed voltage > Vref, the output flips to a high level (fault confirmation). Thus, the final control signal after discrimination is generated.

[0041] And the above-mentioned state transformation processing circuit 2 may further include: Auxiliary power supply, its input terminal is electrically connected to the positive input terminal of the power supply module; this auxiliary power supply can convert the input voltage (M_VIN) of the power supply module that may have noise and fluctuations into a pure and stable low-voltage direct current (such as +5V) to supply power to precision devices such as comparators and triodes.

[0042] The second capacitor C2, its first end is electrically connected to the output terminal of the auxiliary power supply, and its second end is electrically connected to the negative input terminal of the power supply module. This second capacitor C2 is connected in parallel at the output terminal of the auxiliary power supply and serves as a power supply decoupling capacitor. Its function is to absorb high-frequency noise and instantaneous fluctuations on the power line, provide a "quiet" ground potential for the entire state processing circuit, and prevent power supply noise from interfering with the decision of the comparator and causing misoperation.

[0043] In addition, the above-mentioned first capacitor C1 and second capacitor C2 can be conventional ordinary capacitors, where the capacitance value of the first capacitor C1 is 7 - 9uF (preferably 8uF), and the capacitance value of the second capacitor C2 is 0.08 - 0.12uF (preferably 0.1uF).

[0044] It is worth mentioning that the fifth to thirteenth resistors mentioned above are all conventional ordinary resistors; among them, the resistance of the fifth resistor is 8-12kΩ (preferably 10kΩ), the resistance of the sixth resistor is 18-22kΩ (preferably 20kΩ), the resistance of the seventh resistor is 8-12kΩ (preferably 10kΩ), the resistance of the eighth resistor is 8-12kΩ (preferably 10kΩ), the resistance of the ninth resistor is 8-12Ω (preferably 10kΩ), the resistance of the tenth resistor is 18-22kΩ (preferably 20kΩ), the resistance of the eleventh resistor is 90-110kΩ (preferably 100kΩ), the resistance of the twelfth resistor is 8-12kΩ (preferably 10kΩ), and the resistance of the thirteenth resistor is 18-22kΩ (preferably 20kΩ).

[0045] The input terminal of the enable control circuit 3 is electrically connected to the output terminal of the state transition processing circuit, and is used to control the enable terminal of the power supply module according to the state detection signal. This enable control circuit 3 acts as the system's "switch," receiving control signals from the processing circuit. Its most critical function is to implement a "lock-up" function. It contains an internal latch (or bistable circuit), which, once triggered (a fault occurs), can maintain itself in a locked state even if the fault signal from the preceding stage disappears, until the main power supply is completely de-energized and reset. This ensures thorough protection and safety.

[0046] Please see Figure 4 The circuit diagram of the enable control circuit of the present invention is shown. Specifically, the enable control circuit 3 may include: The fourteenth resistor R14 has its first terminal electrically connected to the output terminal of the state transition processing circuit, and its second terminal electrically connected to the first terminal of the third capacitor C3 and the first terminal of the second diode D2. This fourteenth resistor R14 and the third capacitor C3 form an RC low-pass filter. Its function is to filter out any fast glitches or high-frequency interference that may exist in the output signal of the first comparator U2, preventing these interferences from falsely triggering the sensitive latching circuit. Only continuously valid level signals can pass through.

[0047] The second terminal of the third capacitor C3 is electrically connected to the negative input terminal of the power module; The second terminal of the second diode D2 is electrically connected to the collector of the fourth transistor V4, the first terminal of the sixteenth resistor R16, and the base of the fifth transistor V5; the second terminal of the sixteenth resistor R16 is electrically connected to the negative input terminal of the power supply module; wherein, the second diode D2 prevents reverse current. The fourth transistor V4 and the fifth transistor V5 form an SR latch (or a similar bistable circuit) through cross-coupling. When the filtered high-level signal arrives, it triggers the fifth transistor V5 to conduct, and the conduction of the fifth transistor V5 forces the fourth transistor V4 to conduct, and the conduction of the fourth transistor V4 will maintain the conduction state of the fifth transistor V5. Once this positive feedback process is established, even if the input signal disappears, the circuit will remain in a "locked-in" state where the fourth transistor V4 and the fifth transistor V5 are simultaneously conducting. This is the core mechanism for realizing the "locked-in" function.

[0048] The fifteenth resistor R15 has its first end electrically connected to the emitter of the fourth transistor V4, and its second end electrically connected to the base of the fourth transistor V4 and the collector of the fifth transistor V5; the emitter of the fifth transistor V5 is electrically connected to the negative input terminal of the power supply module. The seventeenth resistor R17 has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the first end of the fifteenth resistor R15. The fourth capacitor C4 has its first end electrically connected to the second end of the seventeenth resistor R17, and its second end electrically connected to the negative input terminal of the power supply module; the fourth capacitor C4 and the seventeenth resistor R17 together provide filtered power to the latching circuit.

[0049] The eighteenth resistor R18 has its first end electrically connected to the second end of the seventeenth resistor R17, and its second end electrically connected to the first end of the second Zener diode Z2, the first end of the fifth capacitor C5, the first end of the nineteenth resistor R19, and the base of the sixth transistor V6; the eighteenth resistor R18 and the nineteenth resistor R19 provide base bias for V6.

[0050] The second terminal of the second Zener diode Z2, the second terminal of the fifth capacitor C5, the second terminal of the nineteenth resistor R19, and the emitter of the sixth transistor V6 are all electrically connected to the negative input terminal of the power supply module. The second Zener diode Z2 clamps the base voltage of V6 to prevent overvoltage. The sixth transistor V6 acts as an output drive switch, and its base voltage is controlled by the latch circuit output. When the latch circuit activates (the fourth transistor V4 is turned on), the base of the sixth transistor V6 is at a low level and is cut off.

[0051] The twentieth resistor R20 has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the collector of the sixth transistor V6 and the first end of the sixth capacitor C6. The second end of the twentieth resistor R20, the collector of the sixth transistor V6, and the first end of the sixth capacitor C6 are all connected to the output terminal of the enable control circuit. This twentieth resistor R20 is a pull-up resistor. When the sixth transistor V6 is turned off, it pulls the output terminal (3_OUT) of the enable control circuit to a high level through the twentieth resistor R20, thereby turning off (locking up) the power module.

[0052] The emitter of the sixth transistor V6 and the second terminal of the sixth capacitor C6 are both electrically connected to the negative input terminal of the power supply module. This sixth capacitor C6 serves as a buffer and anti-interference agent at the output terminal.

[0053] In addition, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5, and the sixth capacitor C6 mentioned above can all be ordinary capacitors. Among them, the capacitance value of the third capacitor is 0.08-0.12uF (preferably 0.1uF), the capacitance value of the fourth capacitor is 0.008-0.012uF (preferably 0.01uF), the capacitance value of the fifth capacitor is 0.008-0.012uF (preferably 0.01uF), and the capacitance value of the sixth capacitor is 0.08-0.12uF (preferably 0.1uF).

[0054] In addition, the fourteenth to twentieth resistors mentioned above are conventional ordinary resistors, wherein the resistance of the fourteenth resistor is 1.8-2.2kΩ (preferably 2kΩ), the resistance of the fifteenth resistor is 8-12kΩ (preferably 10kΩ), the resistance of the sixteenth resistor is 8-12kΩ (preferably 10kΩ), the resistance of the seventeenth resistor is 40-45kΩ (preferably 43kΩ), the resistance of the eighteenth resistor is 8-12kΩ (preferably 10kΩ), the resistance of the nineteenth resistor is 8-12kΩ (preferably 10kΩ), and the resistance of the twentieth resistor is 90-110kΩ (preferably 100kΩ).

[0055] In summary, the principles of this solution can be found in [reference needed]. Figures 1-4 .

[0056] Therefore, when the power module output is normal, the output voltage M_VOUT (i.e., the voltage between 1_IN+ and 1_IN-, the same below) is higher than the regulation voltage VZ1 of the first Zener diode Z1 (different first Zener diodes Z1 can be selected according to different output voltages). The first Zener diode Z1 breaks down, providing a drive current ib1 to the base of the first transistor V1. The first transistor V1 is in the conducting state, and the optocoupler U1 is turned on. When the power module output is undervoltage or short-circuited, the output voltage M_VOUT is lower than the first Zener diode Z1. When the voltage regulation voltage of the first Zener diode Z1 is VZ1, the first Zener diode Z1 cannot break down, the base of the first transistor V1 has no driving current ib1, the first transistor V1 is in the cutoff state, and the optocoupler U1 is cut off; its input terminals 1_IN+ and 1_IN- are connected to the positive and negative terminals of the power module output M_VOUT respectively; the output terminal 1_OUT+ is connected to the input terminal 2_IN1+ of the state transition processing circuit 2; the output terminal 1_OUT- is connected to the input terminal 2_IN1- of the state transition processing circuit 2.

[0057] Then, the state transition processing circuit 2 processes the on / off state of optocoupler U1 (power module output state); when optocoupler U1 is in the on state (output is normal or output undervoltage / short circuit disappears), the first diode D1 is turned on, the input voltage M_VIN (i.e., the voltage between 2_IN2+ and 2_IN2-, which is equivalent to the voltage between 3_IN1+ and 3_IN1-, the same below) flows to ground through the fifth resistor R5 and the first diode D1 after passing through the +5V auxiliary power supply. The base of the second transistor V2 has no driving current ib2, and the second transistor V2 is turned off. At this time, the +5V auxiliary power supply provides the driving current ib3 to the base of the third transistor V3 through the eighth resistor R8, and the third transistor V3 is turned on. The voltage at the positive input terminal of the first comparator U2 is lower than the voltage at the negative input terminal, and the first comparator U2 outputs... When 2_OUT is low, and optocoupler U1 is in the off state (output undervoltage / short circuit), the first diode D1 is off. The +5V auxiliary power supply voltage is divided by the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 and applied to the base of the second transistor V2, providing a drive current ib2 to the base of the second transistor V2. The second transistor V2 is turned on. At this time, the base voltage of the third transistor V3 is pulled low, there is no base drive current ib3, and the third transistor V3 is off. The +5V auxiliary power supply charges the first capacitor C1 through the tenth resistor R10. After approximately t1 time (the protection action time can be adjusted by adjusting the tenth resistor R10 or the first capacitor C1), the voltage at the positive input terminal of the first comparator U2 is higher than the voltage at the negative input terminal, and the output 2_OUT of the first comparator U2 flips to a high level. The above t1 can be determined according to the formula: ; Furthermore, its input terminal 2_IN1+ is connected to the output terminal 1_OUT+ of the undervoltage and short circuit detection circuit 1; its input terminal 2_IN1- is connected to the output terminal 1_OUT- of the undervoltage and short circuit detection circuit 1; its input terminals 2_IN2+ and 2_IN2- are respectively connected to the positive and negative terminals of the power module input terminal M_VIN; and its output terminal 2_OUT is connected to the input terminal 3_IN2 of the enable control circuit 3. Then, the enable control circuit 3 processes the state transition information. When 2_OUT (i.e., 3_IN2) is low, the fifth transistor V5 has no base drive current ib5 and is cut off. At this time, the base voltage of the fourth transistor V4 is high, and there is no base drive current ib4, so the fourth transistor V4 is cut off. The input voltage M_VIN is divided by the seventeenth resistor R17, the eighteenth resistor R18, and the nineteenth resistor R19 and applied to the base of the sixth transistor V6, providing a drive current ib6 to the base of the sixth transistor V6. The sixth transistor V6 is turned on, and the voltage at its output terminal 3_OUT is pulled low. When 2_OUT (i.e., 3_IN2) is high, after being filtered by the fourteenth resistor R14 and the third capacitor C3, the second diode D2 provides a base drive current ib5 to the fifth transistor V5, turning on the fifth transistor V5. At this time, the base voltage of the fourth transistor V4 is pulled low. When 3_IN2 is low, it provides a driving current ib4 to the base, turning on the fourth transistor V4 and locking it in a latched state, no longer responding to the state transitions of the state transition processing circuit 2. When 3_IN2 flips to a low level, the fourth transistor V4 and the fifth transistor V5 will also continue to conduct. At this time, the base voltage of the sixth transistor V6 is pulled low, there is no driving current ib6, and the sixth transistor V6 is cut off. Its output terminal 3_OUT is pulled up to the positive input terminal of the power module by the twentieth resistor R20. Its input terminal 3_IN1+ is connected to the output terminal 2_IN2+ of the state transition processing circuit 2; its input terminal 3_IN1- is connected to the output terminal 2_IN2- of the state transition processing circuit 2; its input terminal 3_IN2 is connected to the output terminal 2_OUT of the state transition processing circuit 2; its output terminal 3_OUT is connected to the EN terminal (enable port) of the power module, thereby controlling the high and low levels of the EN terminal of the module and realizing the protection of the power module.

[0058] Simulation results of the circuit of this invention ( Figure 5Consistent with theoretical calculations, the protection action time of the circuit in this invention is approximately 253.55ms, which is basically consistent with the theoretical calculation value of 256ms for t1. During the power-on startup process of the power module, the output voltage M_VOUT is not properly established. Due to the delay function of the state transition processing circuit, it effectively avoids the erroneous operation during power-on startup that pulls the power module enable terminal EN (i.e., 3_OUT, the same below) to a high level and locks it without output. At 100ms, the power module experiences an output undervoltage / short circuit fault. After a delay of approximately 253.55ms, the power module enable terminal EN is pulled to a high level, and the power module output enable is invalid. If the output voltage M_VOUT can return to normal at 400ms, the power module enable terminal EN will still be at a high level, locking the power module without output to protect the downstream power supply equipment.

[0059] The above description merely illustrates preferred embodiments of the present invention and is quite specific and detailed; however, it should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the inventive concept, and these all fall within the scope of protection of the present invention. Therefore, the scope of protection of this invention should be determined by the appended claims.

Claims

1. A power module output undervoltage and short-circuit protection circuit based on analog circuits, characterized in that, include: The circuit includes undervoltage and short-circuit detection circuits, state transition processing circuits, and enable control circuits. The two input terminals of the undervoltage and short-circuit detection circuit are electrically connected to the positive and negative output terminals of the power module, respectively, and are used to detect whether the output voltage of the power module is undervoltage through the internal optocoupler, and output an undervoltage signal when the output voltage of the power module is undervoltage. The four input terminals of the state transition processing circuit are electrically connected to the positive and negative output terminals of the undervoltage and short circuit detection circuit and the positive and negative input terminals of the power module, respectively, and are used to output the corresponding state detection signal after delaying the output signal of the undervoltage and short circuit detection circuit. The input terminal of the enable control circuit is electrically connected to the output terminal of the state transition processing circuit, and is used to output a corresponding control signal to the enable terminal of the power module according to the state detection signal.

2. The power module output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 1, characterized in that, The undervoltage and short-circuit detection circuit includes: The first resistor has its first end serving as the first input terminal of the undervoltage and short-circuit detection circuit, and its first end is electrically connected to the first end of the second resistor. The first Zener diode has its first terminal electrically connected to the second terminal of the first resistor and the first terminal of the third resistor, and its second terminal serves as the second input terminal of the undervoltage and short-circuit detection circuit. The first transistor has its base electrically connected to the second end of the third resistor, its emitter electrically connected to the second end of the second resistor, and its collector electrically connected to the first end of the fourth resistor and the first end of the optocoupler. The optocoupler has its second terminal electrically connected to the second terminal of the first Zener diode, and its third and fourth terminals serve as the two output terminals of the undervoltage and short-circuit detection circuit, respectively.

3. The power module output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 2, characterized in that, The state transition processing circuit includes: The first diode has its first end electrically connected to the third end of the optocoupler, and its second end electrically connected to the first end of the fifth resistor and the first end of the sixth resistor; the second end of the fifth resistor is electrically connected to the positive input terminal of the power module. The seventh resistor has its first end electrically connected to the second end of the sixth resistor, and its second end electrically connected to the fourth end of the optocoupler and the negative input terminal of the power module. The base of the second transistor is electrically connected to the first end of the seventh resistor, and the emitter is electrically connected to the negative input terminal of the power supply module. The eighth resistor has its first end electrically connected to the positive input terminal of the power module and its second end electrically connected to the emitter of the second transistor. The base of the third transistor is electrically connected to the second terminal of the eighth resistor, and the emitter is electrically connected to the negative input terminal of the power supply module. The ninth resistor has its first end electrically connected to the collector of the third transistor; The tenth resistor has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the second end of the ninth resistor. The eleventh resistor has its first end electrically connected to the second end of the tenth resistor, and its second end electrically connected to the negative input terminal of the power module. The first capacitor has its two ends connected in parallel across the eleventh resistor; The twelfth resistor has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the first end of the thirteenth resistor; the second end of the thirteenth resistor is electrically connected to the second end of the seventh resistor. The first comparator has its non-inverting input terminal electrically connected to the second terminal of the ninth resistor, the first terminal of the eleventh resistor, and the first terminal of the first capacitor; its inverting input terminal electrically connected to the second terminal of the twelfth resistor and the first terminal of the thirteenth resistor; its two power input terminals electrically connected to the positive and negative input terminals of the power module, respectively; and its output terminal serving as the output terminal of the state transition processing circuit.

4. The power module output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 3, characterized in that, The state transition processing circuit further includes: An auxiliary power supply is provided, the input of which is electrically connected to the positive input of the power module. The second capacitor has its first end electrically connected to the output terminal of the auxiliary power supply, and its second end electrically connected to the negative input terminal of the power module.

5. The power module output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 3, characterized in that, The enabling control circuit includes: The fourteenth resistor has its first end electrically connected to the output terminal of the state transition processing circuit, and its second end electrically connected to the first end of the third capacitor and the first end of the second diode. The second terminal of the third capacitor is electrically connected to the negative input terminal of the power module; The second terminal of the second diode is electrically connected to the collector of the fourth transistor, the first terminal of the sixteenth resistor, and the base of the fifth transistor; the second terminal of the sixteenth resistor is electrically connected to the negative input terminal of the power supply module. The fifteenth resistor has its first end electrically connected to the emitter of the fourth transistor, and its second end electrically connected to the base of the fourth transistor and the collector of the fifth transistor; the emitter of the fifth transistor is electrically connected to the negative input terminal of the power supply module. The seventeenth resistor has its first end electrically connected to the positive input terminal of the power module, and its second end electrically connected to the first end of the fifteenth resistor. The fourth capacitor has its first end electrically connected to the second end of the seventeenth resistor, and its second end electrically connected to the negative input terminal of the power module. The eighteenth resistor has its first end electrically connected to the second end of the seventeenth resistor, and its second end electrically connected to the first end of the second Zener diode, the first end of the fifth capacitor, the first end of the nineteenth resistor, and the base of the sixth transistor. The second terminal of the second Zener diode, the second terminal of the fifth capacitor, the second terminal of the nineteenth resistor, and the emitter of the sixth transistor are all electrically connected to the negative input terminal of the power module. The twentieth resistor has its first end electrically connected to the positive input terminal of the power module, its second end electrically connected to the collector of the sixth transistor and the first end of the sixth capacitor, and the second end of the twentieth resistor, the collector of the sixth transistor and the first end of the sixth capacitor are all connected to the output terminal of the enable control circuit. The emitter of the sixth transistor and the second terminal of the sixth capacitor are both electrically connected to the negative input terminal of the power supply module.

6. The power module lockout output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 2, characterized in that, The first to fourth resistors are all conventional ordinary resistors, with the first resistor having a resistance of 8-12kΩ, the second resistor having a resistance of 0.8-1.2kΩ, the third resistor having a resistance of 0.8-1.2kΩ, and the fourth resistor having a resistance of 8-12kΩ.

7. The power module output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 3, characterized in that, The fifth through thirteenth resistors are all conventional ordinary resistors, with the fifth resistor having a resistance of 8-12kΩ, the sixth resistor having a resistance of 18-22kΩ, the seventh resistor having a resistance of 8-12kΩ, the eighth resistor having a resistance of 8-12kΩ, the ninth resistor having a resistance of 8-12Ω, the tenth resistor having a resistance of 18-22kΩ, the eleventh resistor having a resistance of 90-110kΩ, the twelfth resistor having a resistance of 8-12kΩ, and the thirteenth resistor having a resistance of 18-22kΩ.

8. The power module lockout output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 5, characterized in that, The fourteenth to twentieth resistors are conventional ordinary resistors, with the fourteenth resistor having a resistance of 1.8-2.2kΩ, the fifteenth resistor having a resistance of 8-12kΩ, the sixteenth resistor having a resistance of 8-12kΩ, the seventeenth resistor having a resistance of 40-45kΩ, the eighteenth resistor having a resistance of 8-12kΩ, the nineteenth resistor having a resistance of 8-12kΩ, and the twentieth resistor having a resistance of 90-110kΩ.

9. The power module lockout output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 4, characterized in that, The second capacitor is a conventional ordinary capacitor with a capacitance value of 0.08-0.12uF.

10. The power module output undervoltage and short-circuit protection circuit based on analog circuits as described in claim 5, characterized in that, The first, third, fourth, fifth, and sixth capacitors are all conventional ordinary capacitors. The capacitance of the first capacitor is 7-9 uF, the capacitance of the third capacitor is 0.08-0.12 uF, the capacitance of the fourth capacitor is 0.008-0.012 uF, the capacitance of the fifth capacitor is 0.008-0.012 uF, and the capacitance of the sixth capacitor is 0.08-0.12 uF.

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