Probabilistic bit circuit and control method of probabilistic bit circuit

By introducing a coupled module of adjustable response time unit and signal gain unit into the probabilistic bit circuit, the weights are continuously adjustable, which solves the area and complexity problems caused by the additional storage array in the prior art and improves the scalability and adaptability of the circuit.

CN122159858APending Publication Date: 2026-06-05青岛海存微电子有限公司

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
青岛海存微电子有限公司
Filing Date
2026-05-09
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

Existing probabilistic bit circuits require additional storage arrays for weight control, resulting in large area, high read/write and calibration overhead, and difficulty in achieving continuous dynamic adjustment.

Method used

The probability bits are connected by a coupling module of adjustable response time unit and signal gain unit. The weights are continuously adjustable by adjusting the response time, thus avoiding the need for an additional weight storage array.

Benefits of technology

It achieves continuously adjustable weights in probabilistic bit circuits, reducing circuit area and control complexity, supporting online reconfiguration and dynamic adaptation, and possessing high scalability and versatility.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the present application provides a kind of probability bit circuit and the control method of probability bit circuit.It includes at least two probability bits and at least one coupling module, the coupling module is connected between two probability bits;The coupling module includes adjustable response time unit, the adjustable response time unit is used to the output signal of the first probability bit in the two probability bits is time shaping and then input the second probability bit in the two probability bits, or, the output signal of the second probability bit is time shaping and then input the first probability bit.In the premise that additional storage array is not needed, the continuous dynamic adjustable of weight is realized.
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Description

Technical Field

[0001] This application relates to the semiconductor field, and more particularly to a probabilistic bit circuit and a control method for the probabilistic bit circuit. Background Technology

[0002] Probabilistic bits, or random binary units, output random, probabilistically adjustable binary states. Networks constructed from multiple probabilistic bits can statistically represent the energy distribution of a system and have been widely used in probabilistic reasoning, stochastic optimization, Bayesian networks, Ising model solving, and neuromorphic computing. In these probabilistic bit-based systems, the weight between two probabilistic bits, i.e., the effective coupling strength, is a key factor determining the network's statistical correlation, convergence trajectory, and ability to represent the target distribution. Therefore, weight adjustment is a core element determining the system's programmability and engineering value.

[0003] Existing weight control methods are mainly divided into two categories: First, weight control methods based on variable resistors or memristor arrays, which can express different weights, but require additional storage arrays, resulting in large area and high read / write and calibration overhead; Second, digital weight control methods based on field programmable gate arrays (FPGAs), digital-to-analog converters (DACs), or software control, which usually adjust weights in an discrete stepwise manner, making it difficult to achieve truly continuous dynamic adjustment. Summary of the Invention

[0004] This application provides a probability bit circuit and a control method for the probability bit circuit, which enables continuous dynamic adjustment of weights without the need for an additional storage array.

[0005] In a first aspect, embodiments of this application provide a probability bit circuit, comprising: at least two probability bits and at least one coupling module, wherein the coupling module is connected between the two probability bits;

[0006] The coupling module includes an adjustable response time unit, which is used to time-shape the output signal of the first probability bit among the two probability bits and then input it into the second probability bit among the two probability bits, or to time-shape the output signal of the second probability bit and then input it into the first probability bit.

[0007] In some implementations, the adjustable response time unit is connected to a voltage source, and the response time of the adjustable response time unit changes accordingly when the control voltage output by the voltage source changes.

[0008] In some implementations, the coupling module further includes a signal gain unit connected to the adjustable response time unit;

[0009] The signal gain unit is used to scale the output signal of the first probability bit or the second probability bit, or the signal gain unit is used to scale the output signal of the first probability bit or the second probability bit after time shaping.

[0010] In some implementations, a switching circuit is also included, through which the coupling module is connected between the two probability bits;

[0011] The switching circuit is used to control the signal coupling direction between the two probability bits.

[0012] In some implementations, the switching circuit includes a first switching unit, a second switching unit, a third switching unit, and a fourth switching unit;

[0013] The output of the first probability bit is connected to the input of the coupling module through the first switching unit, and the output of the coupling module is connected to the input of the second probability bit through the second switching unit.

[0014] The output of the second probability bit is connected to the input of the coupling module through the third switch unit, and the output of the coupling module is connected to the input of the first probability bit through the fourth switch unit.

[0015] When the first switch unit and the second switch unit are closed, and the third switch unit and the fourth switch unit are open, the output signal of the first probability bit is processed by the coupling module and then input to the second probability bit.

[0016] When the first and second switching units are open and the third and fourth switching units are closed, the output signal of the second probability bit is processed by the coupling module and then input to the first probability bit.

[0017] In some implementations, the at least two probability bits include a third probability bit, a fourth probability bit, and a fifth probability bit; the at least one coupling module includes a first coupling module and a second coupling module; the first coupling module is connected between the third probability bit and the fourth probability bit, and the second coupling module is connected between the fourth probability bit and the fifth probability bit;

[0018] When the product of the first gain value and the inverse temperature is less than 1, and the product of the second gain value and the inverse temperature is greater than the reciprocal of the product of the first gain value and the inverse temperature, the effective coupling strength of the third probability bit to the fifth probability bit changes with the target response time, while the effective coupling strength of the fifth probability bit to the third probability bit does not change with the target response time.

[0019] Wherein, the first gain value is the gain value of the signal gain unit in the first coupling module, the second gain value is the gain value of the signal gain unit in the second coupling module, and the target response time is the response time of the adjustable response time unit in the first coupling module and / or the second coupling module.

[0020] In some implementations, the adjustable response time unit includes an equivalent resistance module and a capacitor;

[0021] The first terminal of the equivalent resistance module is connected to the voltage source, the second terminal of the equivalent resistance module is used to receive the output signal of the first probability bit or the second probability bit, the third terminal of the equivalent resistance module is connected to the first terminal of the capacitor, and the second terminal of the capacitor is grounded.

[0022] The resistance value of the equivalent resistance module changes with the control voltage.

[0023] In some implementations, the probability bit is any of the following: a complementary metal-oxide-semiconductor assisted spin-orbit-moment random magnetic tunnel junction probability bit, a complementary metal-oxide-semiconductor assisted spin-transfer-moment random magnetic tunnel junction probability bit, or a complementary metal-oxide-semiconductor thermal noise oscillator type probability bit.

[0024] In some implementations, the adjustable response time unit can be any of the following: an analog resistor-capacitor network or a digital low-pass filter.

[0025] Secondly, this application provides a control method for a probability bit circuit, applied to the probability bit circuit described in the first aspect, the method comprising:

[0026] Determine the effective coupling strength between each probability bit in the probability bit circuit;

[0027] The response time of the adjustable response time unit in the probability bit circuit is adjusted according to the effective coupling strength.

[0028] The probability bit circuit is controlled to enter the working mode, and the output signal of each probability bit in the probability bit circuit is collected.

[0029] The probabilistic bit circuit and its control method provided in this application can effectively regulate the coupling strength between two probabilistic bits, i.e., weight regulation, by adjusting the response time of the adjustable response time unit in the coupling module. This eliminates the need for an additional weight storage array, reducing circuit area, read / write and calibration overhead, and control complexity. Furthermore, because the response time is continuously adjustable, the probabilistic bit circuit in this application can achieve continuously adjustable weights. The probabilistic bit circuit in this application can achieve continuously adjustable weights without changing the network topology, facilitating online reconstruction and dynamic adaptation tasks. It is compatible with various physical platforms, has high versatility, and high scalability. Attached Figure Description

[0030] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0031] Figure 1 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 1 ;

[0032] Figure 2 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 2 ;

[0033] Figure 3 A circuit diagram of a coupling module provided in an embodiment of this application;

[0034] Figure 4 A curve showing the response time versus control voltage provided for embodiments of this application;

[0035] Figure 5 The curve showing the effective coupling strength as a function of control voltage, provided for embodiments of this application;

[0036] Figure 6 A signal illustration of a probability bit circuit provided in an embodiment of this application. Figure 1 ;

[0037] Figure 7 A curve showing the effective coupling strength versus response time provided in the embodiments of this application;

[0038] Figure 8 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 3 ;

[0039] Figure 9 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 4 ;

[0040] Figure 10 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 5 ;

[0041] Figure 11 A signal illustration of a probability bit circuit provided in an embodiment of this application. Figure 2 ;

[0042] Figure 12 A curve showing the change of effective coupling strength over time as provided in the embodiments of this application;

[0043] Figure 13 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 6 ;

[0044] Figure 14 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 7 ;

[0045] Figure 15 A schematic diagram of the structure of a probability bit circuit provided in an embodiment of this application. Figure 8 ;

[0046] Figure 16 A schematic diagram of a random bit structure provided in an embodiment of this application;

[0047] Figure 17 This is a schematic diagram of the control unit provided in an embodiment of this application.

[0048] Figure label:

[0049] 101: First probability bit; 102: Second probability bit; 103: Coupling module; 1031: Adjustable response time unit; 1032: Signal gain unit; 300: Equivalent resistance module; 901: First coupling module; 902: Second coupling module; 903: Third probability bit; 904: Fourth probability bit; 905: Fifth probability bit; 171: Control unit; 1701: Processor; 1702: Memory; 1703: Communication component.

[0050] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0051] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0052] This application proposes a probabilistic bit circuit based on time-domain parameters. In this circuit, a coupling module connecting two probabilistic bits transmits the output signal of one probabilistic bit to the other. This coupling module can perform time shaping on the transmitted signal and has adjustable time-domain parameters. By adjusting these parameters, the signal transmitted to the other probabilistic bit can be changed, thereby affecting the state distribution of the output signal of that other probabilistic bit. This achieves adjustable effective coupling strength between the two probabilistic bits. Since the time-domain parameters can change continuously, this scheme can achieve continuously adjustable effective coupling strength between the two probabilistic bits, meaning the weights between them can be continuously adjusted without requiring an additional weight storage array. The following description is based on embodiments.

[0053] Figure 1 A probability bit circuit is provided in an embodiment of this application. The probability bit circuit includes at least two probability bits and at least one coupling module 103, wherein the coupling module 103 is connected between the two probability bits.

[0054] The coupling module 103 includes an adjustable response time unit 1031, which is used to input the output signal of the first probability bit 101 of the two probability bits into the second probability bit 102 of the two probability bits after time shaping, or to input the output signal of the second probability bit 102 into the first probability bit 101 after time shaping.

[0055] Optionally, the probability bit can be any of the following: a complementary metal-oxide-semiconductor assisted spin-orbit torque random magnetic tunnel junction probability bit (CMOS+SOT type random MTJ probability bit), a complementary metal-oxide-semiconductor assisted spin-transfer torque random magnetic tunnel junction probability bit (CMOS+STT type random MTJ probability bit), or a complementary metal-oxide-semiconductor thermal noise oscillator type probability bit (CMOS thermal noise oscillator type probability bit). The specific structure of the probability bit is not limited in the embodiments of this application, as long as the probability bit can output a statistically modelable random binary state.

[0056] The number of probability bits in the probability bit circuit can be set according to the actual application requirements, and this embodiment of the application does not limit this. Figure 1 The example below uses two probability bits for illustration. When there are two or more probability bits, for any two probability bits, they can be directly connected to a coupling module 103, or they can be indirectly connected to two or more coupling modules 103 through other probability bits.

[0057] The adjustable response time unit 1031 performs time shaping on the output signal of the first probability bit 101 or on the output signal of the second probability bit 102. Time shaping means modulating the time response characteristics of the signal, including integration, filtering, and time weighting.

[0058] The effective coupling strength between two probability bits includes two cases: First, the effective coupling strength between the output signal of the first probability bit 101 and the output signal of the second probability bit 102, characterizing the degree to which the output signal of the first probability bit 101 statistically influences the state distribution of the output signal of the second probability bit 102. Second, the effective coupling strength between the output signal of the second probability bit 102 and the output signal of the first probability bit 101, characterizing the degree to which the output signal of the second probability bit 102 statistically influences the state distribution of the output signal of the first probability bit 101. Effective coupling strength is a quantitative indicator of the actual interaction between the two probability bits; the value of the effective coupling strength reflects the effectiveness of signal transmission.

[0059] The time-domain parameter of the adjustable response time unit 1031 is its response time, which can also be called the time constant. By adjusting the response time, the signal integral characteristics, filtering bandwidth, and amplitude of the filtered signal can be changed, thereby altering the waveform shape after time shaping. Different response times of the adjustable response time unit 1031 result in different effective coupling strengths between the first probability bit 101 and the second probability bit 102. For example, with different response times, the output signal of the first probability bit 101, after passing through the adjustable response time unit 1031, will output different signals to the second probability bit 102, resulting in different state distributions of the output signal of the second probability bit 102. Alternatively, with different response times, the waveform shape of the output signal of the second probability bit 102, after passing through the adjustable response time unit 1031, will be different, resulting in different state distributions of the output signal of the first probability bit 101.

[0060] The probabilistic bit circuit of this embodiment achieves effective coupling weight control between two probabilistic bits by adjusting the response time of the adjustable response time unit 1031 in the coupling module 103. This scheme eliminates the need for an additional weight storage array, reducing circuit area, power consumption during data transfer, and control complexity. Furthermore, due to the continuously adjustable response time, the probabilistic bit circuit of this embodiment can achieve continuously adjustable weights. The probabilistic bit circuit of this embodiment achieves continuously adjustable weights without changing the network topology, facilitating online reconfiguration and dynamic adaptation tasks. It is compatible with various physical platforms, has high versatility, and high scalability.

[0061] Based on the above embodiments, the coupling module 103 of this application embodiment may further include a signal gain unit 1032, which is connected to the adjustable response time unit 1031. Figure 2 The diagram illustrates that the coupling module 103 includes a signal gain unit 1032 and an adjustable response time unit 1031. For example, the signal gain unit 1032 may include an operational transconductance amplifier (OTA). The signal gain unit 1032 can scale the received signal and perform conversion between voltage and current signals. Through the signal gain unit 1032, the output signal of the first probability bit 101, after processing by the coupling module 103, can satisfy the input characteristics of the second probability bit 102, or the output signal of the second probability bit 102, after processing by the coupling module 103, can satisfy the input characteristics of the first probability bit 101, thereby improving the adaptability of the coupling module 103.

[0062] In one implementation, the signal gain unit 1032 is used to scale the output signal of the first probability bit 101 or the second probability bit 102. That is, the signal entering the coupling module 103 is first scaled by the signal gain unit 1032 and then input to the adjustable response time unit 1031 for time shaping.

[0063] For example, the output signal of the first probability bit 101 is first scaled by the signal gain unit 1032, then time-shaped by the adjustable response time unit 1031, and finally input to the second probability bit 102; or, the output signal of the second probability bit 102 is first scaled by the signal gain unit 1032, then time-shaped by the adjustable response time unit 1031, and finally input to the first probability bit 101.

[0064] In another implementation, the signal gain unit 1032 is used to scale the output signal of the first probability bit 101 or the second probability bit 102 after time shaping. That is, the signal entering the coupling module 103 is first time-shaped by the adjustable response time unit 1031, and then input to the signal gain unit 1032 for scaling.

[0065] For example, the output signal of the first probability bit 101 is first time-shaped by the adjustable response time unit 1031, then scaled by the signal gain unit 1032, and finally input to the second probability bit 102; or, the output signal of the second probability bit 102 is first time-shaped by the adjustable response time unit 1031, then scaled by the signal gain unit 1032, and finally input to the first probability bit 101.

[0066] In some implementations, the adjustable response time unit 1031 is connected to a voltage source. When the control voltage output by the voltage source changes, the response time of the adjustable response time unit 1031 changes accordingly. Thus, by adjusting the control voltage output by the voltage source, the response time of the adjustable response time unit 1031 is set, thereby achieving the purpose of adjusting the effective coupling strength. Optionally, the adjustable response time unit 1031 may include, but is not limited to, analog resistor-capacitor networks, digital low-pass filters, etc. The specific structure of the adjustable response time unit 1031 is not limited in this application embodiment.

[0067] Figure 3 The diagram illustrates a circuit diagram of a coupling module 103, as shown below. Figure 3 As shown, the coupling module 103 includes an adjustable response time unit 1031 and a signal gain unit 1032. The adjustable response time unit 1031 is a low-pass filter circuit composed of an equivalent resistance module 300 and a capacitor C1. The first terminal of the equivalent resistance module 300 is connected to a voltage source, which is used to output the control voltage V_ctrl. Figure 3 The voltage source is not shown; only the control voltage V_ctrl is shown. The second terminal of the equivalent resistance module 300 is used to receive the output signal of the first probability bit 101 or the second probability bit 102. The third terminal of the equivalent resistance module 300 is connected to the first terminal of capacitor C1, and the second terminal of capacitor C1 is grounded. The resistance value of the equivalent resistance module 300 changes with the control voltage V_ctrl.

[0068] Reference Figure 3As shown, the equivalent resistance module 300 is composed of a first switch M1, a second switch M2, and a third switch M3. The control terminals of the first switch M1, the second switch M2, and the third switch M3 are all connected to a voltage source. The first terminal of the first switch M1 is used to receive the output signal of the first probability bit 101 or the output signal of the second probability bit 102. The second terminal of the first switch M1 is connected to the first terminal of the second switch M2. The second terminal of the second switch M2 is connected to the first terminal of the third switch M3. The second terminal of the third switch M3 is connected to the first terminal of the capacitor C1. The second terminal of the capacitor C1 is grounded.

[0069] The signal gain unit 1032 includes an OTA, a first resistor R1, and a second resistor R2. The first input terminal of the OTA is connected to the second terminal of the third switch M3, the second input terminal of the OTA is connected to the first terminal of the first resistor R1, the second terminal of the first resistor R1 is connected to the output terminal of the OTA, the first terminal of the first resistor R1 is connected to the first terminal of the second resistor R2, and the second terminal of the second resistor R2 is grounded.

[0070] The output signal of the first probability bit 101 or the output signal of the second probability bit 102 is time-shaped by the equivalent resistance module 300 and capacitor C1, and then scaled by OTA before being output. When the control voltage V_ctrl changes, the equivalent resistance value of the equivalent resistance module 300 changes. The response time of the adjustable response time unit 1031 changes. The coupling strength will also change accordingly, therefore, by adjusting the control voltage V_ctrl, effective coupling strength adjustment can be achieved. For example, Figure 4 The figure illustrates the curve of response time as a function of control voltage V_ctrl. Figure 5 The figure illustrates the curve of effective coupling strength as a function of control voltage V_ctrl.

[0071] Reference Figure 6 Taking the coupling module 103 inputting the time-shaped output signal of the first probability bit 101 to the second probability bit 102 as an example, the input signal of the first probability bit 101 is denoted as I1, and the output signal of the first probability bit 101 is denoted as m1. The coupling module 103 outputs the time-shaped output signal m1 of the first probability bit 101 to the second probability bit 102. The signal output by the coupling module 103 to the second probability bit 102 is denoted as I2, and the output signal of the second probability bit 102 is denoted as m2. In the coupling module 103, the response time of the adjustable response time unit 1031 is... The gain value of signal gain unit 1032 is G. When the output signal m1 of the first probability bit 101 is transmitted to the second probability bit 102 through coupling module 103, the signal transmission follows the following formula:

[0072]

[0073] If the coupling module 103 does not include the signal gain unit 1032, the gain G can be set to 1.

[0074] As can be seen from the above formula, by adjusting the response time... This can change the signal I2 output by the coupling module 103 to the second probability bit 102, thereby affecting the state distribution of the output signal m2 of the second probability bit 102.

[0075] The effective coupling strength between the output signal m1 of the first probability bit 101 and the output signal m2 of the second probability bit 102 is as follows:

[0076]

[0077] in, It is the reverse temperature. , is Boltzmann's constant, and T is the thermodynamic temperature.

[0078] Effective coupling strength It characterizes the degree of influence of the output signal m1 of the first probability bit 101 on the state distribution of the output signal m2 of the second probability bit 102 in a statistical sense. Figure 7 The effective coupling strength is illustrated in the diagram. With response time The changing curve shows that, with the response time... Increase effective coupling strength Gradually decrease.

[0079] Based on the above embodiments, the control method for the coupling direction of the two probability bits is further described. As previously introduced, the effective coupling strength between the two probability bits can be the effective coupling strength between the output signal of the first probability bit 101 and the output signal of the second probability bit 102, or it can be the effective coupling strength between the output signal of the second probability bit 102 and the output signal of the first probability bit 101. In a specific implementation, it can be... Figure 1 Based on the embodiment shown, a switching circuit is added to control the coupling direction. That is, the probability bit circuit also includes a switching circuit, and the coupling module 103 is connected between the two probability bits through the switching circuit. The switching circuit is used to control the signal coupling direction between the two probability bits to achieve symmetrical coupling between the two probability bits.

[0080] Reference Figure 8 As shown, the switching circuit includes a first switching unit S1, a second switching unit S2, a third switching unit S3, and a fourth switching unit S4.

[0081] The output of the first probability bit 101 is connected to the input of the coupling module 103 through the first switch unit S1, and the output of the coupling module 103 is connected to the input of the second probability bit 102 through the second switch unit S2.

[0082] The output of the second probability bit 102 is connected to the input of the coupling module 103 through the third switch unit S3, and the output of the coupling module 103 is connected to the input of the first probability bit 101 through the fourth switch unit S4.

[0083] When the first switch unit S1 and the second switch unit S2 are closed, and the third switch unit S3 and the fourth switch unit S4 are open, the output signal of the first probability bit 101 is processed by the coupling module 103 and then input to the second probability bit 102.

[0084] When the first switch unit S1 and the second switch unit S2 are open, and the third switch unit S3 and the fourth switch unit S4 are closed, the output signal of the second probability bit 102 is processed by the coupling module 103 and then input to the first probability bit 101.

[0085] By controlling the closing or opening of the first switch unit S1, the second switch unit S2, the third switch unit S3, and the fourth switch unit S4, the signal coupling direction between the first probability bit 101 and the second probability bit 102 can be controlled. Since the coupling module 103 traversed by the signals in both signal coupling directions is the same, the effective coupling strength in both signal coupling directions is the same, achieving symmetrical coupling between the two probability bits. Using a switching circuit to control the signal coupling direction between probability bits facilitates online reconstruction and dynamic adaptation tasks, improving the versatility of the probability bit circuit.

[0086] Based on the above embodiments, the case where the probability bit circuit includes multiple probability bits will be described. (Refer to...) Figure 9 As shown, the probability bit circuit includes at least two probability bits, including a third probability bit 903, a fourth probability bit 904, and a fifth probability bit 905; at least one coupling module includes a first coupling module 901 and a second coupling module 902; the first coupling module 901 is connected between the third probability bit 903 and the fourth probability bit 904, and the second coupling module 902 is connected between the fourth probability bit 904 and the fifth probability bit 905. The signal gain unit in the first coupling module 901 has a gain value of a first gain value G1, the signal gain unit in the second coupling module 902 has a gain value of a second gain value G2, and the adjustable response time unit in the first coupling module 901 has a response time of... The response time of the adjustable response time unit in the second coupling module 902 is .

[0087] Based on this, such as Figure 10 As shown, the coupling direction of the control signal is controlled by the switching circuit. When switching units S11, S12, S21, and S22 are closed, and switching units S13, S14, S23, and S24 are open, the output signal of the third probability bit 903 is input to the fourth probability bit 904 after passing through the first coupling module 901. The output signal of the fourth probability bit 904 is input to the fifth probability bit 905 after passing through the second coupling module 902, thus realizing the coupling of the output signal of the third probability bit 903 to the output signal of the fifth probability bit 905.

[0088] When switch units S11, S12, S21, and S22 are open and switch units S13, S14, S23, and S24 are closed, the output signal of the fifth probability bit 905 is input to the fourth probability bit 904 after passing through the second coupling module 902. The output signal of the fourth probability bit 904 is input to the third probability bit 903 after passing through the first coupling module 901, thereby achieving coupling between the output signal of the fifth probability bit 905 and the output signal of the third probability bit 903.

[0089] Reference Figure 11 Taking the output signal of the third probability bit 903 as being input to the fourth probability bit 904 after passing through the first coupling module 901, and the output signal of the fourth probability bit 904 as being input to the fifth probability bit 905 after passing through the second coupling module 902 as an example, in this case, the input signal of the third probability bit 903 is denoted as I3, the output signal of the third probability bit 903 is denoted as m3, the output signal of the first coupling module 901 is denoted as I4, the output signal of the fourth probability bit 904 is denoted as m4, the output signal of the second coupling module 902 is denoted as I5, and the output signal of the fifth probability bit 905 is denoted as m5. The signal transmission follows the following rules:

[0090]

[0091]

[0092] First gain value and inverse temperature The product is less than 1, second gain value and inverse temperature The product is greater than the first gain value. and inverse temperature In the case of the reciprocal of the product, that is, ,and In the case of the third probability bit 903 to the fifth probability bit 905, the effective coupling strength It varies with the target response time. For example, =0.1、 =50. In this case, when the output signal of the third probability bit 903 is... The signal becomes the input signal of the fourth probability bit 904 after passing through the first coupling module 901. The output signal of the fourth probability bit 904 Rapid random fluctuations, after passing through the second coupling module 902, can be considered as filtered input I5 to the fifth probability bit 905, which leads to... The strong correlation between the third probability bit 903 and the fifth probability bit 905 indicates the effective coupling strength between them. Subject to target response time adjustment, the target response time is the response time of the adjustable response time unit in the first coupling module 901 and / or the second coupling module 902.

[0093] When the signal transmission direction is reversed, that is, the output signal of the fifth probability bit 905 passes through the second coupling module 902 and is input to the fourth probability bit 904, and the output signal of the fourth probability bit 904 passes through the first coupling module 901 and is input to the third probability bit 903, due to the second gain value The output signal of the fourth probability bit 904 is biased to a fixed value, losing its ability to randomly flip. This reduces the effective coupling strength of the fifth probability bit 905 to the third probability bit 903. It does not change with the target response time.

[0094] Figure 12 The middle indicates in ,and In the case of time ratio The change in the effective coupling strength between the third probability bit 903 and the fifth probability bit 905 And the effective coupling strength of the fifth probability bit 905 to the third probability bit 903 A schematic diagram of the curve. Among them, It is the autocorrelation time of the fourth probability bit 904. It is the overall delay time of the first coupling module 901, the fourth probability bit 904, and the second coupling module 902. The response time of the adjustable response time unit in the first coupling module 901 And the response time of the adjustable response time unit in the second coupling module 902 Decision. From Figure 12 It can be seen from this that, with The increase in the effective coupling strength between the third probability bit 903 and the fifth probability bit 905 increases. Gradually decrease, Adjustable within the range of approximately 1.2 to 0.39, but the effective coupling strength of the fifth probability bit 905 to the third probability bit 903 is... It remains unchanged, hovering around 0.1.

[0095] The above embodiments achieve unidirectional coupling between the third probability bit 903 and the fifth probability bit 905. If it is necessary to change the coupling direction between the third probability bit 903 and the fifth probability bit 905, only the first gain value needs to be swapped. Second gain value , making ,and This allows the effective coupling strength between the fifth probability bit 905 and the third probability bit 903 to be increased. The effective coupling strength of the third probability bit 903 to the fifth probability bit 905 varies with the target response time. It does not change with the target response time. By adjusting the gain value of the coupling module, unidirectional coupling between probability bits is achieved, enabling the probability bit circuit to be applied to tasks requiring asymmetric coupling, thus improving its versatility.

[0096] Based on the above embodiments, the probability bit circuit of this application embodiment can have the following characteristics: Figure 13 , Figure 14 , Figure 15 The structure shown, Figure 13 , Figure 14 , Figure 15 The structure shown is for illustrative purposes only. In practical applications, probability bits and coupling modules can be combined in any way. The response time and gain value of the coupling module between any two probability bits can be set as needed to achieve statistical reconstruction.

[0097] Furthermore, in the embodiments of this application, in the system composed of probability bit circuits, the coupling direction of the probability bits can be configured at the system scheduling layer, such as unidirectional coupling or symmetrical coupling, or it can also be configured to partition by time, with different response times set in different partitions, forming a hierarchical time domain network, which can be set as needed in specific application scenarios.

[0098] In one implementation, the probability bits are implemented using a CMOS+SOT type random magnetic tunnel junction, such as... Figure 16 As shown. This random magnetic tunnel junction includes a reference layer, a tunnel barrier layer, a free layer, and a heavy metal layer for generating spin-orbit torque. A controlled write current I is applied to the heavy metal layer... in By leveraging the combined effects of thermal fluctuations and spin-orbit torque, the magnetization of the free layer randomly flips between parallel and antiparallel states. The random state is then read out via a sensing amplifier and a CMOS link, and a digitized signal V is output. outThis achieves probabilistic bit output. During writing, a spin-orbit moment (SOT) write path is used to perturb the magnetization of the free layer. Because the write current does not directly cross the tunnel barrier layer, read disturbances are reduced and device durability is improved. During readout, the difference in resistance state of the magnetic tunnel junction is used in conjunction with the logic levels output by the CMOS and sense amplifier to obtain the standard probabilistic bit output.

[0099] This application also provides a control method for a probability bit circuit, comprising: determining the required effective coupling strength between each probability bit in the probability bit circuit; adjusting the response time of an adjustable response time unit in the probability bit circuit according to the effective coupling strength; controlling the probability bit circuit to enter a working mode; acquiring the output signal of each probability bit in the probability bit circuit; or, determining the required weight between each probability bit in the probability bit circuit; adjusting the response time of an adjustable response time unit in the probability bit circuit according to the weight; controlling the probability bit circuit to enter a working mode; and acquiring the output signal of each probability bit in the probability bit circuit. The following description uses effective coupling strength as an example.

[0100] The required effective coupling strength between probabilistic bits in the probabilistic bit circuit can be determined based on the actual application scenario. Different application scenarios have different requirements for the effective coupling strength between probabilistic bits. After determining the required effective coupling strength, the response time of the adjustable response time unit is adjusted based on the correspondence between the effective coupling strength and the response time. This correspondence between the effective coupling strength and the response time can be derived from model calculations of the probabilistic bit circuit, actual calibration of the probabilistic bit circuit, etc.

[0101] For example, by adjusting the control voltage output of the voltage source through the correspondence between response time and control voltage, the effective coupling strength can be set. Then, a working current or working voltage is applied to the probability bit circuit to make the probability bit circuit enter the working mode; the output signal of each probability bit is read, and the corresponding application task is completed based on the output signal of the probability bit.

[0102] The control method for the probabilistic bit circuit provided in this application adjusts the response time of the adjustable response time unit in the probabilistic bit circuit to regulate the effective coupling strength between the probabilistic bits in the circuit, thereby ensuring that the output signal of the probabilistic bits meets the current task requirements. This method allows the probabilistic bit circuit to be adapted to different tasks, improving its versatility.

[0103] Figure 17 This is a schematic diagram of the control unit provided in an embodiment of this application. Figure 17As shown, the control unit 171 provided in this embodiment includes at least one processor 1701 and a memory 1702. Optionally, the control unit 171 further includes a communication component 1703. The processor 1701, memory 1702, and communication component 1703 are connected via a bus.

[0104] In a specific implementation, at least one processor 1701 executes computer execution instructions stored in memory 1702, causing at least one processor 1701 to perform the above-described method.

[0105] The specific implementation process of processor 1701 can be found in the above method embodiments, and its implementation principle and technical effect are similar. It will not be repeated here.

[0106] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. A general-purpose processor can be a microcontroller (MCU) or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.

[0107] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0108] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0109] The communication component 1703 is used to communicate with other devices via a transmission medium, thereby enabling the control unit 171 to communicate with other devices. The communication component 1703 may be, for example, a transceiver, interface, bus, circuit, or a device capable of transmitting and receiving functions. The processor 1701 can utilize the communication component 1703 to transmit and receive data and / or information, and to implement the methods provided in the embodiments of this application.

[0110] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0111] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described method.

[0112] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0113] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an application-specific integrated circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0114] The division of units is merely a logical functional division; in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0115] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0116] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0117] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0118] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0119] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A probabilistic bit circuit, characterized in that, include: At least two probability bits and at least one coupling module, the coupling module being connected between the two probability bits; The coupling module includes an adjustable response time unit, which is used to time-shape the output signal of the first probability bit among the two probability bits and then input it into the second probability bit among the two probability bits, or to time-shape the output signal of the second probability bit and then input it into the first probability bit.

2. The probability bit circuit according to claim 1, characterized in that, The adjustable response time unit is connected to a voltage source. When the control voltage output by the voltage source changes, the response time of the adjustable response time unit changes accordingly.

3. The probability bit circuit according to claim 1, characterized in that, The coupling module further includes a signal gain unit, which is connected to the adjustable response time unit. The signal gain unit is used to scale the output signal of the first probability bit or the second probability bit, or the signal gain unit is used to scale the output signal of the first probability bit or the second probability bit after time shaping.

4. The probability bit circuit according to any one of claims 1-3, characterized in that, It also includes a switching circuit, through which the coupling module is connected between the two probability bits; The switching circuit is used to control the signal coupling direction between the two probability bits.

5. The probability bit circuit according to claim 4, characterized in that, The switching circuit includes a first switching unit, a second switching unit, a third switching unit, and a fourth switching unit; The output of the first probability bit is connected to the input of the coupling module through the first switching unit, and the output of the coupling module is connected to the input of the second probability bit through the second switching unit. The output of the second probability bit is connected to the input of the coupling module through the third switch unit, and the output of the coupling module is connected to the input of the first probability bit through the fourth switch unit. When the first switch unit and the second switch unit are closed, and the third switch unit and the fourth switch unit are open, the output signal of the first probability bit is processed by the coupling module and then input to the second probability bit. When the first and second switching units are open and the third and fourth switching units are closed, the output signal of the second probability bit is processed by the coupling module and then input to the first probability bit.

6. The probability bit circuit according to claim 3, characterized in that, The at least two probability bits include a third probability bit, a fourth probability bit, and a fifth probability bit; the at least one coupling module includes a first coupling module and a second coupling module; the first coupling module is connected between the third probability bit and the fourth probability bit, and the second coupling module is connected between the fourth probability bit and the fifth probability bit; When the product of the first gain value and the inverse temperature is less than 1, and the product of the second gain value and the inverse temperature is greater than the reciprocal of the product of the first gain value and the inverse temperature, the effective coupling strength of the third probability bit to the fifth probability bit changes with the target response time, while the effective coupling strength of the fifth probability bit to the third probability bit does not change with the target response time. Wherein, the first gain value is the gain value of the signal gain unit in the first coupling module, the second gain value is the gain value of the signal gain unit in the second coupling module, and the target response time is the response time of the adjustable response time unit in the first coupling module and / or the second coupling module.

7. The probability bit circuit according to claim 2, characterized in that, The adjustable response time unit includes an equivalent resistance module and a capacitor; The first terminal of the equivalent resistance module is connected to the voltage source, the second terminal of the equivalent resistance module is used to receive the output signal of the first probability bit or the second probability bit, the third terminal of the equivalent resistance module is connected to the first terminal of the capacitor, and the second terminal of the capacitor is grounded. The resistance value of the equivalent resistance module changes with the control voltage.

8. The probability bit circuit according to any one of claims 1-3, characterized in that, The probability bit is any one of the following: complementary metal-oxide-semiconductor assisted spin-orbit-moment random magnetic tunnel junction probability bit, complementary metal-oxide-semiconductor assisted spin-transfer-moment random magnetic tunnel junction probability bit, and complementary metal-oxide-semiconductor thermal noise oscillator type probability bit.

9. The probability bit circuit according to any one of claims 1-3, characterized in that, The adjustable response time unit can be any of the following: an analog resistor-capacitor network or a digital low-pass filter.

10. A control method for a probabilistic bit circuit, characterized in that, Applied to the probability bit circuit as described in any one of claims 1-9, the method comprises: Determine the required effective coupling strength between each probability bit in the probability bit circuit; The response time of the adjustable response time unit in the probability bit circuit is adjusted according to the effective coupling strength. The probability bit circuit is controlled to enter the working mode, and the output signal of each probability bit in the probability bit circuit is collected.