A method for preparing an InGaAs short-wave infrared detector

Abstract

The application belongs to the technical field of InGaAs infrared focal plane detector, and particularly provides a preparation method of an InGaAs short-wave infrared detector. First, primary grinding and polishing are performed on an InGaAs epitaxial wafer with a lower electrode to obtain a smooth mirror surface, then indium columns are grown, and the wafer is sliced and cleaved into independent PDA chips; flip-chip interconnection is performed with corresponding readout circuits; the flip-chip soldered chips are thinned and polished again, and an anti-reflection coating (ARC) is grown at the PDA chip end to improve the quantum efficiency of the detector. The infrared detector prepared by the method can greatly reduce chip surface scratches and other pollution, and improve the performance of the infrared detector.

Description

Technical Field

[0001] This invention belongs to the field of InGaAs infrared focal plane detector technology, and specifically provides a method for fabricating an InGaAs short-wave infrared detector. Background Technology

[0002] Generally, the fabrication method of InGaAs infrared detectors involves passivation, photolithography, diffusion, and electrode fabrication on an InGaAs epitaxial wafer, followed by flip-chip interconnection of the fabricated diode array (PDA) and corresponding readout circuitry to create an infrared focal plane detector. However, during the flip-chip bonding process, the high bonding pressure often results in scratches of varying degrees on the PDA chip surface, ultimately reducing chip performance and affecting product yield. Summary of the Invention

[0003] This invention addresses the problem that during the flip-chip bonding process of infrared focal plane detectors, the high bonding pressure often results in scratches of varying degrees on the surface of the PDA chip, ultimately reducing chip performance and affecting product yield. The invention provides a method for fabricating an InGaAs short-wave infrared detector.

[0004] This invention is achieved by the following technical solution: a method for fabricating an InGaAs short-wave infrared detector, wherein an initial grinding and polishing is performed on an InGaAs epitaxial wafer after the lower electrode has been grown to obtain a flat mirror surface, then indium pillars are grown and diced into independent PDA chips; flip-chip interconnection is performed with the corresponding readout circuit; the flip-chip is thinned and polished again, and an anti-reflective coating ARC is grown on the PDA chip end to improve the quantum efficiency of the detector.

[0005] Furthermore, the specific steps include the following: (1) An N-type InP metal contact layer and an In absorption layer are sequentially grown on an InP substrate using MOCVD. 0.53 Ga 0.47 As, N-type InP as the top layer, and InGaAs as the sacrificial layer are used to obtain an InGaAs epitaxial wafer; (2) Remove the sacrificial layer on the surface of the InGaAs epitaxial wafer and grow a silicon nitride passivation layer; (3) Photolithography to open holes, dry etching of the first layer of silicon nitride, and zinc diffusion in the etched holes to form P-type doping; (4) Deposit a second layer of silicon nitride, perform photolithography to open holes on the silicon nitride, etch to form ohmic holes, and grow P electrodes; (5) Photolithography: dry etching of silicon nitride, wet etching of the N-type InP cap layer and the In absorption layer. 0.53 Ga 0.47 As, grow the N-electrode; (6) Anneal the P-type metal and the N-type metal to form an ohmic contact between the P-type metal and the N-type metal; (7) Growth of the bonding layer metal; (8) Growth of the lower electrode metal; (9) Silicon oxide passivation, photolithography opening, first thinning on InP substrate, polishing, forming a flat mirror surface; (10) Photolithography is used to create holes and indium pillars are grown to obtain a PDA chip; (11) The PDA chip and the readout circuit are flip-chip interconnected to obtain an InGaAs infrared focal plane detector chip; (12) The infrared focal plane detector chip surface is thinned and polished a second time; then an anti-reflective coating ARC is grown on the surface to improve the quantum conversion efficiency of the chip.

[0006] Compared with existing technologies, the infrared detector prepared by the method described in this invention can greatly reduce scratches and other contaminants on the chip surface, while improving the performance of the infrared detector. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of step (1) of the present invention; Figure 2 This is a schematic diagram of step (2) of the present invention; Figure 3 This is a schematic diagram of step (3) of the present invention; Figure 4 This is a schematic diagram of step (4) of the present invention; Figure 5 This is a schematic diagram of step (5) of the present invention; Figure 6 This is a schematic diagram of steps (6) and (7) of the present invention; Figure 7 This is a schematic diagram of step (8) of the present invention; Figure 8 This is a schematic diagram of step (9) of the present invention; Figure 9 This is a schematic diagram of step (10) of the present invention; Figure 10 This is a schematic diagram of step (11) of the present invention; Figure 11 This is a schematic diagram of step (12) of the present invention; In the figure: 1-InP substrate; 2-N-type InP metal contact layer; 3-Absorber layer In 0.53 Ga 0.47 As; 4-N-type InP top layer; 5-Sacrificial InGaAs layer; 6-Silicon nitride passivation layer; 7-Opening; 8-P-type doping; 9-P electrode; 10-N electrode; 11-Connecting layer metal; 12-Lower electrode metal; Figure 12 Images showing the back of the infrared detector PDA chip before and after secondary polishing in an experiment; In the image: A is before secondary polishing; B is after secondary polishing; Figure 13Images showing the back of the infrared detector PDA chip before and after secondary polishing in a repeated experiment; in the figure: A is before secondary polishing; B is after secondary polishing. Detailed Implementation

[0008] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0009] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains, and all materials publicly cited herein and cited by them are incorporated herein by reference.

[0010] Equivalent technologies of the specific embodiments described herein that are readily apparent to those skilled in the art through routine experimentation are included in this application.

[0011] Unless otherwise specified, the experimental methods used in the following examples are conventional methods. Unless otherwise specified, the instruments and equipment used in the following examples are all standard laboratory instruments and equipment; unless otherwise specified, the experimental materials used in the following examples were all purchased from regular biochemical reagent stores.

[0012] A method for fabricating an InGaAs short-wave infrared detector involves first grinding and polishing an InGaAs epitaxial wafer after the lower electrode has been grown to obtain a smooth mirror surface, then growing indium pillars and dicing them into independent PDA chips; performing flip-chip interconnection with the corresponding readout circuit; thinning and polishing the flip-chip again, and growing an anti-reflective coating (ARC) on the PDA chip end to improve the quantum efficiency of the detector.

[0013] Specifically, the steps include the following: (1) such as Figure 1 As shown, an N-type InP metal contact layer 2 and an absorption layer In are sequentially grown on an InP substrate 1 using MOCVD. 0.53 Ga 0.47 As 3, N-type InP 4, sacrificial InGaAs 5, to obtain an InGaAs epitaxial wafer.

[0014] (2) such as Figure 2 As shown, the sacrificial layer 5 on the surface of the InGaAs epitaxial wafer is removed, and a silicon nitride passivation layer 6 is grown.

[0015] (3) such as Figure 3As shown, photolithography creates an opening 7, dry etching is used to etch the first layer of silicon nitride, and zinc diffusion is performed inside the etched hole to form a P-type doped layer 8.

[0016] (4) such as Figure 4 As shown, a second layer of silicon nitride is deposited, and photolithography is performed on the silicon nitride to create ohmic holes, and a P electrode 9 is grown.

[0017] (5) such as Figure 5 As shown, photolithography, dry etching of silicon nitride, and wet etching of the N-type InP cap layer and the In absorption layer are performed. 0.53 Ga 0.47 As, grow N electrode 10.

[0018] (6) For example Figure 6 As shown, P-type and N-type metals are annealed to form an ohmic contact between them.

[0019] (7) For example Figure 6 As shown, the growth bonding layer metal 11 is grown.

[0020] (8) such as Figure 7 As shown, the lower electrode metal 12 is grown.

[0021] (9) For example Figure 8 As shown, silicon oxide passivation, photolithography to create openings, first thinning on the InP substrate, and polishing are performed to form a flat mirror surface.

[0022] (10) such as Figure 9 As shown, photolithography is used to create openings, and indium pillars are grown to obtain a diode array (PDA).

[0023] (11) such as Figure 10 As shown, a readout circuit of the corresponding specification is selected. The experimental design uses a 640 circuit. A 512-array diode array is required, therefore a 640-array diode array must also be selected. The readout circuit of the 512 array is formed by flip-chip interconnection of the diode array and the readout circuit to create an InGaAs infrared focal plane detector chip.

[0024] (12) such as Figure 11 As shown, a second thinning and polishing process is performed on the surface of the infrared focal plane detector chip. Then, an anti-reflective coating (ARC) is grown on the surface to improve the chip's quantum conversion efficiency.

[0025] By inspecting the back of the infrared detector PDA chip before and after secondary polishing, the results are as follows: Figure 12 , 13 As shown in Table 1, this can significantly reduce backside contamination caused by soldering or other process steps. See details... Figure 12 and Figure 13 .

[0026] Table 1: Performance test results of chips prepared in the two experiments before and after secondary polishing The data from both the pre- and post-secondary thinning tests show improvements in detectivity and quantum efficiency, as well as image quality. Dark current and inhomogeneity are also improved, though still within acceptable limits.

[0027] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for fabricating an InGaAs short-wave infrared detector, characterized in that: After the InGaAs epitaxial wafer with the lower electrode grown is first ground and polished to obtain a smooth mirror surface, indium pillars are then grown and diced into independent PDA chips. These chips are then flip-chip interconnected with the corresponding readout circuits. The flip-chip is then thinned and polished again, and an anti-reflective coating (ARC) is grown on the PDA chip to improve the quantum efficiency of the detector.

2. The method for fabricating an InGaAs short-wave infrared detector according to claim 1, characterized in that: Specifically, the steps include the following: (1) An N-type InP metal contact layer and an In absorption layer are sequentially grown on an InP substrate using MOCVD. 0.53 Ga 0.47 As, N-type InP as the top layer, and InGaAs as the sacrificial layer are used to obtain an InGaAs epitaxial wafer; (2) Remove the sacrificial layer on the surface of the InGaAs epitaxial wafer and grow a silicon nitride passivation layer; (3) Photolithography to open holes, dry etching of the first layer of silicon nitride, and zinc diffusion in the etched holes to form P-type doping; (4) Deposit a second layer of silicon nitride, perform photolithography to open holes on the silicon nitride, etch to form ohmic holes, and grow P electrodes; (5) Photolithography: dry etching of silicon nitride, wet etching of the N-type InP cap layer and the In absorption layer. 0.53 Ga 0.47 As, grow the N-electrode; (6) Anneal the P-type metal and the N-type metal to form an ohmic contact between the P-type metal and the N-type metal; (7) Growth of the bonding layer metal; (8) Growth of the lower electrode metal; (9) Silicon oxide passivation, photolithography opening, first thinning on InP substrate, polishing, forming a flat mirror surface; (10) Photolithography is used to open holes and grow indium pillars to obtain a PDA chip; (11) The PDA chip and the readout circuit are flip-chip interconnected to form an InGaAs infrared focal plane detector chip; (12) The infrared focal plane detector chip surface is thinned and polished a second time; then an anti-reflection coating is grown on the surface to improve the quantum conversion efficiency of the chip.

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