Multi-port charger, flyback converter and its secondary side control circuit and control method

Abstract

This disclosure provides a multi-port charger, a flyback converter, and its secondary-side control circuit and control method. The secondary-side control method includes: determining the load state of the flyback converter; under light load conditions, starting a timer when the secondary-side freewheeling ends, and after a certain time, distinguishing between the free oscillation stage and the primary-side conduction stage based on a first volt-second product; and enabling switching to different output voltages after the primary-side conduction stage. The first volt-second product represents the product of the voltage difference when the synchronous rectifier is turned off and the time, where the voltage difference is the difference between the drain-source voltage of the synchronous rectifier and the output voltage. This disclosure, under light load conditions, filters out the large first volt-second product at the beginning of the free oscillation stage by setting a timer, thereby accurately distinguishing between the free oscillation stage and the primary-side conduction stage after the timer expires, and thus providing an effective output switching enable signal to enable switching to different output voltages after the primary-side conduction stage.

Description

Technical Field

[0001] This disclosure relates to the field of power electronics technology, and in particular to a multi-port charger, a flyback converter and its secondary-side control circuit and control method. Background Technology

[0002] With the increasing popularity of portable electronic devices, consumers have a growing demand for multi-port chargers. Multi-port chargers charge multiple devices. Flyback converters are widely used in chargers due to their simple circuit structure, input-output electrical isolation, wide voltage regulation range, and ease of multi-output.

[0003] Currently, the flyback time-sharing output scheme, which is simpler in structure and lower in cost, is generally used to achieve the purpose of multiple outputs. In the flyback time-sharing output scheme, a suitable output switching enable signal is required to enable switching between different output voltages. However, under light load conditions, the peak current on the primary side is small, which can lead to a problem where the minimum value of the volt-second product during primary side conduction is less than the maximum value of the volt-second product during free oscillation. In this case, the timing of the output switching enable signal generation will be disordered. For example, the output switching enable signal may be incorrectly generated because the free oscillation stage is mistakenly identified as the primary side conduction stage, resulting in the collapse of the entire secondary side control.

[0004] Therefore, an effective method is needed to distinguish between the primary-side conduction stage and the free oscillation stage in order to accurately generate an effective output switching enable signal. Summary of the Invention

[0005] In view of the above problems, the purpose of this disclosure is to provide a multi-port charger, flyback converter and its secondary-side control circuit and control method that can effectively distinguish between the primary-side conduction stage and the free oscillation stage and thus accurately generate an effective output switching enable signal.

[0006] According to a first aspect of this disclosure, a secondary-side control method for a flyback converter is provided. The flyback converter includes an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier, and n output circuits. The n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1. The method includes: determining the load state of the flyback converter; and under the light load state of the flyback converter, starting a timer when the secondary freewheeling ends, and after a certain time, distinguishing between a free oscillation stage and a primary-side conduction stage based on a first volt-second product, and enabling switching to output different output voltages after the primary-side conduction stage, wherein the first volt-second product represents the product of the voltage difference and time when the synchronous rectifier is turned off, and the voltage difference is the difference between the drain-source voltage and the output voltage of the synchronous rectifier.

[0007] Optionally, enabling switching between different output voltages after the primary-side conduction phase includes:

[0008] After determining that the primary side is in the conduction phase, a valid edge of the first output switching enable signal is generated. The valid state of the first output switching enable signal includes the secondary side freewheeling phase. During the secondary side freewheeling phase, the n output circuits are controlled to switch to output different output voltages.

[0009] Optionally, determining the load state of the flyback converter includes: determining the load state of the flyback converter based on a first volt-second product and a preset volt-second reference, wherein the flyback converter is in a light load state when the first volt-second product is less than the volt-second reference, and the flyback converter is in a heavy load state when the first volt-second product is greater than or equal to the volt-second reference.

[0010] Optionally, after the timing reaches the preset shielding time, the distinction between the free oscillation stage and the primary side conduction stage based on the first volt-second product includes: when the first volt-second product is greater than or equal to the preset first volt-second product threshold, it is determined to be the primary side conduction stage.

[0011] Optionally, distinguishing between the free oscillation stage and the primary-side conduction stage based on the first volt-second product after the timing reaches the preset shielding time includes: obtaining the current peak voltage and peak sampling voltage of the drain-source voltage of the synchronous rectifier, wherein the peak sampling voltage is the previous peak voltage or the first peak voltage after the timing reaches the shielding time; and distinguishing between the free oscillation stage and the primary-side conduction stage based on the first volt-second product, the preset first volt-second product threshold, the current peak voltage, and the peak sampling voltage.

[0012] Optionally, when the first volt-second product is greater than or equal to the first volt-second product threshold and the current peak voltage is greater than the peak sampling voltage, it is determined to be in the primary side conduction stage.

[0013] Optionally, after the preset shielding time is reached, distinguishing between the free oscillation stage and the primary side conduction stage based on the first volt-second product includes: distinguishing between the free oscillation stage and the primary side conduction stage based on two adjacent first volt-second products and a preset first volt-second product threshold.

[0014] Optionally, if the previous first volt-second product is less than the first volt-second product threshold and the current first volt-second product is greater than or equal to the first volt-second product threshold, it is determined to be in the primary side conduction stage.

[0015] Optionally, the invalid edge of the first output switching enable signal indicates the end of the secondary side freewheeling. When the invalid edge of the first output switching enable signal arrives, the control switches to the output circuit that generates the maximum output voltage among the n output circuits. And when the valid edge of the first output switching enable signal arrives before the secondary side freewheeling begins, the control switches to the main output circuit among the n output circuits.

[0016] Optionally, the invalid edge of the first output switching enable signal indicates the end of the secondary side freewheeling. When the invalid edge of the first output switching enable signal arrives, the control switches to the output circuit that generates the maximum output voltage among the n output circuits. When the arrival time of the valid edge of the first output switching enable signal is the start time of the secondary side freewheeling, a second output switching enable signal is generated before the valid edge of the first output switching enable signal. The second output switching enable signal controls the switch to the main output circuit among the n output circuits.

[0017] Optionally, the invalid edge of the first output switching enable signal indicates the end of the secondary side freewheeling, and the valid edge of the first output switching enable signal is generated according to the drain-source voltage of the synchronous rectifier. The arrival time of the valid edge of the first output switching enable signal is the start time of the secondary side freewheeling, wherein the valid edge is generated when the drain-source voltage is less than or equal to the conduction reference.

[0018] Optionally, after the timing reaches the shielding time, a valid edge of the first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier, and a second output switching enable signal is generated based on the first volt-second product and a preset first volt-second product threshold. The valid edge of the first output switching enable signal is generated when the drain-source voltage is less than or equal to the conduction reference, and the valid edge of the second output switching enable signal is generated when the first volt-second product is greater than or equal to the first volt-second product threshold.

[0019] Optionally, after the timing reaches the shielding time, a valid edge of a first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier. A second output switching enable signal is generated based on the first volt-second product, a preset first volt-second product threshold, the current peak voltage of the drain-source voltage of the synchronous rectifier, and the peak sampling voltage. The peak sampling voltage is the previous peak voltage or the first peak voltage after the timing reaches the shielding time. A valid edge of the first output switching enable signal is generated when the drain-source voltage is less than or equal to the conduction reference. A valid edge of the second output switching enable signal is generated when the first volt-second product is greater than or equal to the first volt-second product threshold and the current peak voltage is greater than the peak sampling voltage.

[0020] Optionally, after the timing reaches the shielding time, a valid edge of the first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier, and a second output switching enable signal is generated based on two adjacent first volt-second products and a preset first volt-second product threshold. The valid edge of the first output switching enable signal is generated when the drain-source voltage is less than or equal to the conduction reference, and the valid edge of the second output switching enable signal is generated when the previous first volt-second product is less than the first volt-second product threshold and the current first volt-second product is greater than or equal to the first volt-second product threshold.

[0021] Optionally, an invalid edge of the first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier and the turn-off reference, wherein the invalid edge is generated when the drain-source voltage is greater than or equal to the turn-off reference.

[0022] Optionally, it further includes: outputting the first output switching enable signal and the second output switching enable signal through a multiplexed pin, wherein the amplitude of the effective state of the first output switching enable signal is different from the amplitude of the effective state of the second output switching enable signal, or the second output switching enable signal is a pulse width modulation signal.

[0023] Optionally, the timing duration can be set to a preset shielding time, and the timing can be stopped early based on the first volt-second product within the timing period.

[0024] Optionally, under the light load state of the flyback converter, timing begins when the secondary side freewheeling ends, and within a preset shielding time, the first volt-second product is always less than the second volt-second product threshold. After the shielding time, the free oscillation stage and the primary side conduction stage are distinguished based on the first volt-second product, wherein the first volt-second product threshold is less than the second volt-second product threshold.

[0025] Optionally, under the light load state of the flyback converter, if the timing starts when the secondary side freewheeling ends and before the preset shielding time is reached, and the first volt-second product is greater than or equal to the second volt-second product threshold, the timing ends, and it is determined that the current stage is the primary side conduction stage.

[0026] Optionally, it further includes: under the heavy load state of the flyback converter, obtaining a first volt-second product when the secondary side freewheeling ends, determining the primary side conduction stage when the first volt-second product is greater than or equal to a preset volt-second reference, and enabling switching to output different output voltages after the primary side conduction stage.

[0027] According to a second aspect of this disclosure, a secondary-side control circuit for a flyback converter is provided for executing the secondary-side control method described above.

[0028] According to a third aspect of this disclosure, a flyback converter is provided, the flyback converter including an input voltage circuit, a transformer, a main power transistor, a primary-side control circuit, a synchronous rectifier, n output circuits, and a secondary-side control circuit, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-division manner, where n is an integer and n>1, and the secondary-side control circuit is the secondary-side control circuit described above.

[0029] According to a fourth aspect of this disclosure, a multi-port charger is provided, including the flyback converter described above.

[0030] The beneficial effects of this disclosure include at least the following:

[0031] The multi-port charger, flyback converter, and their secondary-side control circuit and method disclosed herein determine the load state of the flyback converter. Under light load conditions, timing begins when the secondary-side freewheeling current ends. After a certain timing period, the free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product. Furthermore, different output voltages are enabled for switching after the primary-side conduction. This disclosure filters the large first volt-second product at the beginning of the free oscillation stage under light load conditions by setting the timing period. This allows for accurate differentiation between the free oscillation stage and the primary-side conduction stage based on the first volt-second product after the timing period, thereby providing an effective output switching enable signal to enable switching between different output voltages after the primary-side conduction. This achieves a low-cost, simple, and reliable multi-port charger and flyback converter.

[0032] Furthermore, the multi-port charger, flyback converter, and their secondary-side control circuit and control method provided in this disclosure, under light load conditions, determine and distinguish between primary-side conduction and free oscillation based on the first volt-second product, or based on the current peak voltage of the first volt-second product and the drain-source voltage of the synchronous rectifier, or based on two adjacent first volt-second products, after the shielding time. This allows for more accurate determination of the primary-side conduction stage under light load conditions, avoiding situations where a short shielding time cannot completely filter out the large first volt-second product during the free oscillation stage, thus preventing the misjudgment of free oscillation as primary-side conduction after the timing ends. Therefore, adding peak voltage comparison and adjacent first volt-second product comparison as judgment conditions can further improve the accuracy of the judgment result, thereby more accurately generating an effective output switching enable signal to enable switching to different output voltages after the primary side is turned on.

[0033] Furthermore, the multi-port charger, flyback converter, and their secondary-side control circuit and method provided in this disclosure, in order to cooperate with the primary-side ZVS, require the secondary side to switch its output to the maximum output circuit among the n-channel output circuits at the end of the freewheeling. In this case, it is necessary to switch the output to the main output circuit among the n-channel output circuits before the secondary-side freewheeling begins. This disclosure generates a first output switching enable signal before the secondary-side freewheeling begins, or generates a first output switching enable signal and a second output switching enable signal with different timings. Further, the effective edge of the first output switching enable signal or the second output switching enable signal is used to control the switching to the main output circuit among the n-channel output circuits, so that the minimum control time of the main circuit can be controlled to 0, thereby solving the output switching lag problem.

[0034] Furthermore, this disclosure also includes a multiplexed pin in the secondary control circuit to output a first output switching enable signal and a second output switching enable signal, which can achieve miniaturized packaging.

[0035] It should be noted that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this disclosure. Attached Figure Description

[0036] The above and other objects, features, and advantages of this disclosure will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0037] Figure 1 This diagram shows a circuit schematic of a flyback converter provided in an embodiment of the present disclosure;

[0038] Figure 2 Show Figure 1 A timing diagram of a flyback converter;

[0039] Figure 3 This diagram shows a circuit schematic of another flyback converter provided in an embodiment of the present disclosure;

[0040] Figure 4 Show Figure 3 A timing diagram of a flyback converter;

[0041] Figure 5 This diagram illustrates a flowchart of a secondary-side control method for a flyback converter provided in an embodiment of this disclosure.

[0042] Figure 6 This diagram illustrates a flow chart of step S220 in the secondary-side control method of a flyback converter provided in an embodiment of the present disclosure.

[0043] Figure 7 This diagram illustrates another flow chart of step S220 in the secondary-side control method of the flyback converter provided in an embodiment of the present disclosure.

[0044] Figure 8 This diagram illustrates another step S220 in the secondary-side control method of the flyback converter provided in this embodiment of the present disclosure.

[0045] Figure 9 This diagram illustrates another step S220 in the secondary-side control method of the flyback converter provided in this embodiment of the present disclosure.

[0046] Figure 10 This diagram illustrates a flowchart of a method for generating a first output switching enable signal in a secondary-side control method for a flyback converter provided in an embodiment of this disclosure.

[0047] Figure 11 This diagram illustrates a flowchart of a method for generating a second output switching enable signal in a flyback converter secondary-side control method provided in an embodiment of the present disclosure.

[0048] Figure 12 The diagram shows a pinout of a synchronous rectification control circuit in a flyback converter according to an embodiment of the present disclosure.

[0049] Figure 13 This diagram illustrates a waveform of a multiplexed pin in the synchronous rectification control circuit of a flyback converter provided in an embodiment of the present disclosure. Detailed Implementation

[0050] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0051] This disclosure provides a multi-port charger, including a flyback converter that supports multiple outputs, wherein the flyback converter is a flyback converter with multiple time-division outputs.

[0052] Figure 1 This diagram shows a circuit schematic of a flyback converter provided in an embodiment of the present disclosure; Figure 2 Show Figure 1 A timing diagram of a flyback converter.

[0053] like Figure 1 As shown, the flyback converter 100 includes an input voltage circuit 120, a transformer T, a main power transistor Qp, a synchronous rectifier transistor Qs, n output circuits, and a control circuit 110.

[0054] The transformer T includes a primary winding Np and a secondary winding Ns. The voltage input circuit 120 and the main power transistor Qp are connected to the primary winding Np, while the synchronous rectifier transistor Qs and the n-way output circuit are connected to the secondary winding Ns.

[0055] For example, the voltage input circuit 120 includes a rectifier circuit 121, a capacitor EC1, a capacitor EC2, and an inductor L. DM Resistor Rrcd, capacitor Crcd, diode Drcd. Capacitor EC1, capacitor EC2, inductor L DM An energy recovery circuit (exemplarily including resistor Rrcd, capacitor Crcd, and diode Drcd) connected between the first and second terminals of the primary winding Np is connected between the rectifier circuit 121 and the primary winding Np. Capacitor EC1, capacitor EC2, and inductor L... DM Used to realize the output signal V of rectifier circuit 121 DC It provides filtering and power factor calibration functions. In alternative embodiments, the filtering and power factor calibration functions can also be implemented using other common filtering circuits and power factor correction circuits.

[0056] n output circuits are connected in parallel to one end of the secondary winding Ns of transformer T, and output their corresponding output voltages in a time-sharing manner, where n is an integer and n>1.

[0057] For example, the n-channel output circuit includes a first output circuit 131 and a second output circuit 132. The first output circuit 131 includes switches Q1 and Q2, a capacitor Co1, a resistor Rl1, a resistor Rs1, and a switch Ql1 connected between the secondary winding N of the transformer T and the first output voltage Vbus1. Switches Q1, Q2, and Ql1 are controlled by control circuit 110 to output the first output voltage Vbus1. The second output circuit 132 includes switches Q3 and Q4, a capacitor Co2, a resistor Rl2, a resistor Rs2, and a switch Ql2 connected between the secondary winding N of the transformer T and the second output voltage Vbus2. Switches Q3, Q4, and Ql2 are controlled by control circuit 110 to output the second output voltage Vbus2.

[0058] Furthermore, a sampling resistor Rcs is also included. The main power transistor Qp and the sampling resistor Rcs are connected in series between the primary winding Np and the reference ground, and the synchronous rectifier Qs is connected between the secondary winding Ns and the reference ground. Exemplarily, the main power transistor Qp and the synchronous rectifier Qs are, for example, N-type field-effect transistors. In an alternative embodiment, the sampling resistor Rcs may not be provided in the flyback converter 100.

[0059] Currently, to match and control switches Q1, Q2, Q3, and Q4, a suitable output switching enable signal is needed for synchronization. Under light load conditions, when the minimum value of the volt-second product during primary-side conduction is less than the maximum value during free oscillation, the primary-side conduction phase and the free oscillation phase cannot be distinguished, resulting in the inability to generate an effective output switching enable signal.

[0060] The secondary-side control circuit and method of this application can generate an effective output switching enable signal.

[0061] See Figure 1 The control circuit 110 includes a primary-side control circuit 111 and a secondary-side control circuit 112.

[0062] For example, the primary-side control circuit 111 is connected to the control terminal of the main power transistor Qp, the sampling resistor Rcs, and the source of the main power transistor Qp. Based on the secondary-side feedback signal and the sampled primary-side current signal, it provides a primary-side control signal GON to the control terminal of the main power transistor Qp to control the main power transistor Qp to turn on or off.

[0063] For example, the secondary control circuit 112 is connected to the control terminal, drain, and connection terminal between the secondary winding Ns and the output circuit of the synchronous rectifier Qs. Based on the output voltage Vo of the secondary winding Ns and the drain-source voltage Vds_SR of the synchronous rectifier Qs, the synchronous rectifier Qs is provided with a synchronous rectification control signal SR to the control terminal of the synchronous rectifier Qs to control the synchronous rectifier Qs to be turned on or off.

[0064] Furthermore, the secondary-side control circuit 112 is also used to generate a first output switching enable signal FLAG1 to control the n-way output circuits to switch and output different output voltages during the secondary-side freewheeling phase.

[0065] For example, the secondary-side control circuit 112 includes a synchronous rectification control circuit 113 and an output control circuit 114. The synchronous rectification control circuit 113 generates a synchronous rectification control signal SR and a first output switching enable signal FLAG1. The output control circuit 114 is connected to the synchronous rectification control circuit 113 and controls the n output circuits to switch and output different output voltages during the secondary-side freewheeling phase according to the first output switching enable signal FLAG1. Further, during the effective state represented by the first output switching enable signal FLAG1 (e.g., a continuous high-level phase), the output control circuit 114 enables the switching of different output circuits to output corresponding output voltages. The output control circuit 114 generates the drive signals required for the switching transistors in the n output circuits.

[0066] like Figure 2 As shown, t0-t8 is an example of one switching cycle.

[0067] During the time intervals t1-t6, the secondary side is in the continuous current conduction phase.

[0068] At time t2, the output control circuit 114 controls switch Q2 to turn off, and controls switches Q3 and Q4 to remain off, while controlling switch Q1 to remain on. The first output circuit 131 outputs the intermediate voltage Vo1 of the first output voltage, and controls switch Q11 to turn on and output the first output voltage Vbus1 when the load requires the first output voltage Vbus1.

[0069] At time t3, the output control circuit 114 controls the switch Q3 to turn on, and controls the switches Q2 and Q4 to remain off, while controlling the switch Q1 to remain on.

[0070] At time t4, the output control circuit 114 controls switch Q1 to turn off, and controls switches Q2 and Q4 to remain off, while controlling switch Q3 to remain on. Correspondingly, the second output circuit 132 switches to output the intermediate voltage Vo2 of the second output voltage, and when the load requires the second output voltage Vbus2, it controls switch Q12 to turn on and output the second output voltage Vbus2.

[0071] At time t5, the output control circuit 114 controls the switch Q4 to turn on, and controls the switches Q1 and Q2 to remain off, while controlling the switch Q3 to remain on.

[0072] At time t6, the output control circuit 114 controls switch Q4 to turn off, and controls switches Q1 and Q2 to remain off, while controlling switch Q3 to remain on. Correspondingly, the first output circuit 131 outputs the intermediate voltage Vo1 of the first output voltage, and when the load requires the first output voltage Vbus1, it controls switch Q11 to turn on and output the first output voltage Vbus1.

[0073] Furthermore, at this moment, the drain-source voltage Vds_SR of the synchronous rectifier is greater than or equal to the turn-off reference of the secondary freewheeling. The synchronous rectification control signal SR generated by the synchronous rectification control circuit 113 in the secondary control circuit 112 controls the synchronous rectifier Qs to turn off, and generates the invalid edge of the first output switching enable signal FLAG1.

[0074] When the flyback converter is determined to be in a light-load state, timing begins at time t6, and the magnitude of the first volt-second product is determined within a preset shielding time. If, before the preset shielding time is reached, the first volt-second product is greater than or equal to the second volt-second product threshold, the converter transitions from a light-load state to a heavy-load state. If, within the preset shielding time, the first volt-second product is consistently less than the second volt-second product threshold, then at the end of the shielding time, a determination is made as to whether the primary side of the flyback converter is turned on.

[0075] At time t8, the primary current Ip rises, and the primary control signal GON generated by the primary control circuit 111 controls the main power transistor Qp to turn on. The period between time t8 and time t9 is considered the primary-side conduction phase.

[0076] At time t9, that is, after the primary-side conduction phase and at the moment when the synchronous rectifier is first detected to be on, the synchronous rectifier control circuit 113 in the secondary-side control circuit 112 generates a synchronous rectifier control signal SR to control the synchronous rectifier Qs to conduct, and generates the effective edge of the first output switching enable signal FLAG1. The secondary-side current I_SR decreases, and the drain voltage Vdrain of the main power transistor Qp increases. The gate-source voltage Vgs_SR of the synchronous rectifier increases.

[0077] When the flyback converter is determined to be under heavy load, starting at time t6, a valid edge of the first output switching enable signal is generated based on, for example, the first volt-second product, the volt-second reference, the drain-source voltage of the synchronous rectifier, and the conduction reference of the secondary freewheeling. Furthermore, until time t9, if the first volt-second product is greater than or equal to the volt-second reference of the secondary freewheeling, and the drain-source voltage of the synchronous rectifier is less than or equal to the conduction reference of the secondary freewheeling, a valid edge of the first output switching enable signal FLAG1 is generated.

[0078] This application also provides an embodiment of a flyback converter with a zero-voltage switching control scheme.

[0079] Figure 3 A circuit diagram of another flyback converter provided in an embodiment of this disclosure is shown. Figure 4 Show Figure 3 A timing diagram of a flyback converter.

[0080] like Figure 3 The flyback converter shown is in Figure 1 Based on the flyback converter shown, the transformer T has an additional auxiliary winding Nzvs, an auxiliary switch Qzvs, and a capacitor Czvs on the primary side. The first terminal of the auxiliary switch Qzvs is connected to one end of the auxiliary winding Nzvs, and the second terminal of the auxiliary switch Qzvs is grounded and connected to the other end of the auxiliary winding Nzvs via the capacitor Czvs.

[0081] And such as Figure 3 The control circuit 610 of the flyback converter shown is different from the control circuit 110.

[0082] See Figure 3 The control circuit 610 includes a primary-side control circuit 611 and a secondary-side control circuit 612.

[0083] For example, the primary-side control circuit 611 is further connected to the control terminal of the auxiliary switch Qzvs in addition to the primary-side control circuit 111, so as to provide an auxiliary control signal GAC to the control terminal of the auxiliary switch Qzvs to control the auxiliary switch Qzvs to turn on or off.

[0084] For example, the secondary-side control circuit 612, based on the primary-side control circuit 112, further generates a second output switching enable signal FLAG2 to control the switching to the main output circuit among the n output circuits. In this embodiment, the effective edge of the second output switching enable signal FLAG2 generated by the secondary-side control circuit 612 precedes the effective edge of the first output switching enable signal FLAG1 and is generated when it is determined that the primary side is in the on-state. The ineffective edge of the second output switching enable signal FLAG2 is, for example, started timing at the time of the effective edge generation and generated after a set time has been reached. The secondary-side control circuit 612 is also used to generate the first output switching enable signal FLAG1 to control the n output circuits to switch to output different output voltages during the secondary-side freewheeling phase.

[0085] In an alternative embodiment, the secondary-side control circuit 612 only outputs a first output switching enable signal FLAG1. This is used to control switching to the main output circuit among the n output circuits based on the valid edge of the first output switching enable signal FLAG1, and to determine the secondary-side freewheeling phase based on the valid state of the first output switching enable signal, and for example, based on the drain-source voltage of the synchronous rectifier Qs, to control the n output circuits to switch to different output voltages during the secondary-side freewheeling phase, and to control switching to the output circuit among the n output circuits that generates the maximum output voltage when the invalid edge of the first output switching enable signal arrives.

[0086] like Figure 4 As shown, t0-t9 is an example of one switching cycle.

[0087] Between times t2 and t7, the secondary side is in the continuous current conduction phase.

[0088] At time t3, the output control circuit 114 controls switch Q2 to turn off, and controls switches Q3 and Q4 to remain off, while controlling switch Q1 to remain on. The first output circuit 131 outputs the intermediate voltage Vo1 of the first output voltage, and controls switch Q11 to turn on and output the first output voltage Vbus1 when the load requires the first output voltage Vbus1.

[0089] At time t4, the output control circuit 114 controls the switch Q3 to turn on, and controls the switches Q2 and Q4 to remain off, while controlling the switch Q1 to remain on.

[0090] At time t5, the output control circuit 114 controls switch Q1 to turn off, and controls switches Q2 and Q4 to remain off, while controlling switch Q3 to remain on. Correspondingly, the second output circuit 132 switches to output the intermediate voltage Vo2 of the second output voltage, and when the load requires the second output voltage Vbus2, it controls switch Q12 to turn on and output the second output voltage Vbus2.

[0091] At time t6, the output control circuit 114 controls the switch Q4 to turn on, and controls the switches Q1 and Q2 to remain off, while controlling the switch Q3 to remain on.

[0092] At time t7, the output control circuit 114 controls switch Q4 to turn off, and controls switches Q1 and Q2 to remain off, while controlling switch Q3 to remain on. Correspondingly, the first output circuit 131 outputs the intermediate voltage Vo1 of the first output voltage, and when the load requires the first output voltage Vbus1, it controls switch Q11 to turn on and output the first output voltage Vbus1.

[0093] Furthermore, at this moment, the drain-source voltage Vds_SR of the synchronous rectifier is greater than or equal to the turn-off reference of the secondary freewheeling. The synchronous rectification control signal SR generated by the synchronous rectification control circuit 113 in the secondary control circuit 112 controls the synchronous rectifier Qs to turn off, and generates the invalid edge of the first output switching enable signal FLAG1.

[0094] When the flyback converter is determined to be in a light-load state, timing begins at time t7, and the magnitude of the first volt-second product is determined within the preset shielding time. If, before the preset shielding time is reached, the first volt-second product is greater than or equal to the second volt-second product threshold, the converter transitions from a light-load state to a heavy-load state. If, within the preset shielding time, the first volt-second product is less than the second volt-second product threshold, then at the end of the shielding time at time t8, it is determined whether the primary side of the flyback converter is turned on.

[0095] At time t9, the primary current Ip rises, and the primary control signal GON generated by the primary control circuit 111 controls the main power transistor Qp to turn on. The primary side is then considered to be in the conduction phase before time t11.

[0096] For example, at time t10, that is, after the primary side is turned on and before the first time the synchronous rectifier is detected to be turned on, the synchronous rectifier control circuit 113 in the secondary side control circuit 112 generates a second output switching enable signal FLAG2.

[0097] At time t11, after the primary-side conduction phase and at the moment when the synchronous rectifier is first detected to be on, the synchronous rectifier control circuit 113 in the secondary-side control circuit 112 generates a synchronous rectifier control signal SR to control the synchronous rectifier Qs to turn on, and generates the effective edge of the first output switching enable signal FLAG1. The secondary-side current I_SR decreases, and the drain voltage Vdrain of the main power transistor Qp increases. The gate-source voltage Vgs_SR of the synchronous rectifier increases.

[0098] When the flyback converter is determined to be under heavy load, a second output switching enable signal is generated starting at time t7, for example, based on the first volt-second product and the volt-second reference. The effective edge of the first output switching enable signal is generated, for example, based on the first volt-second product, the volt-second reference, the drain-source voltage of the synchronous rectifier, and the conduction reference of the secondary freewheeling.

[0099] Figure 5 The diagram shows a flowchart of a secondary-side control method for a flyback converter provided in an embodiment of this disclosure. Figure 6 This diagram illustrates a step S220 of the secondary-side control method for a flyback converter provided in an embodiment of the present disclosure. Figure 7 This diagram illustrates another flow chart of step S220 in the secondary-side control method of the flyback converter provided in an embodiment of the present disclosure. Figure 8 This diagram illustrates another step S220 of the flyback converter secondary-side control method provided in an embodiment of the present disclosure. Figure 9 This diagram illustrates another step S220 of the flyback converter secondary-side control method provided in an embodiment of the present disclosure. Figure 10 This diagram illustrates a flowchart of a method for generating a first output switching enable signal in a flyback converter secondary-side control method provided in an embodiment of the present disclosure. Figure 11 This diagram illustrates a flowchart of a method for generating a second output switching enable signal in a flyback converter secondary-side control method provided in an embodiment of the present disclosure.

[0100] like Figure 5 As shown, the secondary-side control method of the flyback converter includes the following steps. Wherein, Figure 1 , Figure 3 The flyback converter shown can perform the above-described secondary-side control method.

[0101] Step S210: Determine the load state of the flyback converter. Exemplarily, in each switching cycle, the secondary-side control circuit determines the load state of the flyback converter based on a first volt-second product VT(SR-VO) and a preset volt-second reference VT. Exemplarily, the first volt-second product VT(SR-VO) is compared with the preset volt-second reference VT. Wherein, if the first volt-second product VT(SR-VO) is greater than or equal to the secondary-side freewheeling volt-second reference VT, the flyback converter is in a heavy-load state. If the first volt-second product VT(SR-VO) is less than the secondary-side freewheeling volt-second reference VT, the flyback converter is in a light-load state.

[0102] Step S220: Under the light load condition of the flyback converter, timing begins when the secondary-side freewheeling ends, and after a certain timing period, the free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product. After the primary-side conduction stage, different output voltages are enabled and switched. The first volt-second product represents the product of the voltage difference and time when the synchronous rectifier Qs is turned off; the voltage difference is the difference between the drain-source voltage Vds_SR of the synchronous rectifier Qs and the output voltage VO.

[0103] Furthermore, it also includes step S230: under the heavy load state of the flyback converter, when the secondary side freewheeling ends, the first volt-second product is obtained, and when the first volt-second product is greater than or equal to the preset volt-second reference, it is determined to be the primary side conduction stage, and after the primary side conduction stage, different output voltages are enabled to be switched.

[0104] like Figure 6 As shown, step S220 further includes:

[0105] Step S221: Under light load conditions, start timing when the secondary side freewheeling ends, and determine the size of the first volt-second product within the preset shielding time.

[0106] Step S222: If the system remains under light load, the first volt-second product during the free oscillation phase is often less than the second volt-second product threshold. At this time, timing begins at the end of the secondary side freewheeling phase and the timing duration is set to a preset shielding time. Since the first volt-second product is always less than the second volt-second product threshold during the timing period, timing ends after the shielding time is reached. The first volt-second product is then acquired again after the shielding time, and the free oscillation phase and the primary side conduction phase are distinguished based on the first volt-second product. Further, the first volt-second product threshold is less than the second volt-second product threshold. Further, the second volt-second product threshold is less than or equal to the volt-second reference. The aforementioned first and second volt-second product thresholds can also be set, for example, to k * volt-second reference, where k is a positive number less than or equal to 1.

[0107] After step S222, step S223 is executed: after determining that the primary side is in the conduction stage, a valid edge of the first output switching enable signal is generated. The valid state of the first output switching enable signal includes the secondary side freewheeling stage. During the secondary side freewheeling stage, the n output circuits are controlled to switch to output different output voltages.

[0108] Step S224: Under light load conditions, considering the load transition to heavy load conditions, the first volt-second product during the free oscillation phase may change to be greater than or equal to the second volt-second threshold. In this case, timing begins when the secondary side freewheeling ends and the timing duration is set to a preset shielding time. During the timing period, due to the transition to heavy load, the first volt-second product may be greater than or equal to the second volt-second threshold. Therefore, when the first volt-second product is greater than or equal to the second volt-second threshold, timing ends immediately, and the current primary side conduction phase is determined directly based on the condition that the first volt-second product is greater than or equal to the second volt-second threshold. Subsequently, control is performed based on the secondary side control logic under heavy load conditions.

[0109] In the first embodiment, as Figure 7 As shown, step S223 includes step S2231: After determining that the primary side is in the conduction stage, a valid edge of the first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier. The invalid edge of the first output switching enable signal indicates the end of the secondary side freewheeling. The arrival time of the valid edge of the first output switching enable signal is the start time of the secondary side freewheeling. The valid state period of the first output switching enable signal includes the secondary side freewheeling stage. During the secondary side freewheeling stage, the n-way output circuit is controlled to switch and output different output voltages. For example... Figure 1 The secondary control circuit 112 of the flyback converter shown performs the above steps to generate, as... Figure 2 The first output switching enable signal FLAG1 shown is used to control the n-channel output circuit to switch different output voltages during the secondary freewheeling phase.

[0110] In the second embodiment, as Figure 8 As shown, to coordinate with the primary-side ZVS, step S223 includes step S2232: After determining that the primary side is in the conduction stage, the invalid edge of the first output switching enable signal indicates the end of the secondary-side freewheeling. When the invalid edge of the first output switching enable signal arrives, the control switches to the output circuit that generates the maximum output voltage among the n-way output circuits. The arrival time of the valid edge of the first output switching enable signal is the start time of the secondary-side freewheeling. The valid state period of the first output switching enable signal includes the secondary-side freewheeling stage. During the secondary-side freewheeling stage, the control switches the n-way output circuits to output different output voltages. A second output switching enable signal is generated before the valid edge of the first output switching enable signal. Before the secondary-side freewheeling begins, the second output switching enable signal controls the switch to the main output circuit among the n-way output circuits. For example... Figure 3The secondary control circuit 612 of the flyback converter shown performs the above steps to generate, as... Figure 4 The first output switching enable signal FLAG1 and the second output switching enable signal FLAG2 shown are used to control the switching to the main output circuit in the n-way output circuit according to the second output switching enable signal FLAG2 when it is determined to be the primary side conduction stage, and to control the n-way output circuit to switch to output different output voltages according to the valid state of the first output switching enable signal during the secondary side freewheeling stage, and to control the switching to the output circuit that generates the maximum output voltage in the n-way output circuit when the invalid edge of the first output switching enable signal arrives.

[0111] For example, such as Figure 10 As shown, under light load conditions of the flyback converter, timing begins when the secondary-side freewheeling ends, and the first volt-second product is acquired after the timing reaches the shielding time. A valid edge of the first output switching enable signal FLAG1 is generated when the first volt-second product is greater than or equal to a preset first volt-second product threshold and the drain-source voltage is less than or equal to the turn-on reference. Alternatively, a valid edge of the first output switching enable signal FLAG1 is generated when the first volt-second product is greater than or equal to the preset first volt-second product threshold, the current peak voltage is greater than the peak sampling voltage, and the drain-source voltage is less than or equal to the turn-on reference. Or, a valid edge of the first output switching enable signal FLAG1 is generated when the previous first volt-second product was less than the first volt-second product threshold, the current first volt-second product is greater than or equal to the first volt-second product threshold, and the drain-source voltage is less than or equal to the turn-on reference. An invalid edge of the first output switching enable signal FLAG1 is generated when the drain-source voltage is greater than or equal to the turn-off reference.

[0112] For example, such as Figure 11 As shown, under light load conditions of the flyback converter, timing begins when the secondary-side freewheeling ends, and the first volt-second product is acquired after the timing reaches the shielding time. A valid edge of the second output switching enable signal FLAG2 is generated when the first volt-second product is greater than or equal to a preset first volt-second product threshold. Alternatively, a valid edge of the second output switching enable signal FLAG2 is generated when the first volt-second product is greater than or equal to the preset first volt-second product threshold, and the current peak voltage is greater than the peak sampling voltage. Alternatively, a valid edge of the second output switching enable signal FLAG2 is generated when the previous first volt-second product was less than the first volt-second product threshold, and the current first volt-second product is greater than or equal to the first volt-second product threshold. An invalid edge of the second output switching enable signal FLAG2 is generated when the drain-source voltage is greater than or equal to the turn-off reference, or when timing begins on the valid edge of the second output switching enable signal FLAG2 and reaches a set time.

[0113] In addition, the above and Figure 9The following describes the process for generating a flyback converter under light load conditions: Timing begins when the secondary-side freewheeling ends. After the timing reaches the shielding time, the first volt-second product is obtained to accurately distinguish the primary-side conduction phase. During the primary-side conduction phase, a first output switching enable signal FLAG1 is generated. The effective edge of the first output switching enable signal FLAG1 is generated before the freewheeling time, and the ineffective edge is generated when the freewheeling ends. At the end of the freewheeling, the converter switches to the output circuit with the maximum output voltage. At the effective edge of the first output switching enable signal FLAG1, the converter switches to the main output circuit. For details on how the first output switching enable signal FLAG1 is generated under this condition, please refer to [reference needed]. Figure 11 The generation process of the second output switching enable signal FLGA2 is as follows: For example, after the timing reaches the shielding time, a valid edge of the first output switching enable signal is generated when the first volt-second product is greater than or equal to the first volt-second product threshold, and an invalid edge of the first output switching enable signal is generated when the drain-source voltage is greater than or equal to the turn-off reference. Alternatively, after the timing reaches the shielding time, a valid edge of the first output switching enable signal is generated when the first volt-second product is greater than or equal to the first volt-second product threshold, and the current peak voltage is greater than the peak sampling voltage, and an invalid edge of the first output switching enable signal is generated when the drain-source voltage is greater than or equal to the turn-off reference. Alternatively, a valid edge of the first output switching enable signal is generated when the previous first volt-second product is less than the first volt-second product threshold, and the current first volt-second product is greater than or equal to the first volt-second product threshold, and an invalid edge of the first output switching enable signal is generated when the drain-source voltage is greater than or equal to the turn-off reference.

[0114] In the third embodiment, as Figure 9 As shown, to coordinate with the primary-side ZVS, step S223 includes step S2233: After determining that the primary side is in the conduction stage, the invalid edge of the first output switching enable signal indicates the end of the secondary-side freewheeling. When the invalid edge of the first output switching enable signal arrives, the control switches to the output circuit in the n-way output circuit that generates the maximum output voltage. The arrival time of the valid edge of the first output switching enable signal is before the start of the secondary-side freewheeling. Before the secondary-side freewheeling, the control switches to the main output circuit in the n-way output circuit when the valid edge of the first output switching enable signal arrives. The valid state period of the first output switching enable signal includes the secondary-side freewheeling stage. During the secondary-side freewheeling stage, the control switches the n-way output circuit to output different output voltages, and sets corresponding detection feedback circuits and timing circuits in the secondary-side control circuit to start timing at the start of the secondary-side freewheeling, thereby controlling the total freewheeling time. For example... Figure 3The secondary-side control circuit 612 of the flyback converter shown performs the above steps to generate a first output switching enable signal FLAG1, which controls the switching to the main output circuit in the n-way output circuit according to the valid edge of the first output switching enable signal FLAG1, and determines the secondary-side freewheeling stage according to the valid state of the first output switching enable signal, for example, according to the drain-source voltage of the synchronous rectifier Qs, so as to control the n-way output circuit to switch to output different output voltages during the secondary-side freewheeling stage, and controls the switching to the output circuit that generates the maximum output voltage in the n-way output circuit when the invalid edge of the first output switching enable signal arrives.

[0115] In the three embodiments described above, an invalid edge of the first output switching enable signal FLAG1 is generated based on the drain-source voltage of the synchronous rectifier Qs and the turn-off reference. Specifically, an invalid edge of the first output switching enable signal FLAG1 is generated when the drain-source voltage is greater than or equal to the turn-off reference.

[0116] In the first and second embodiments, a valid edge of the first output switching enable signal FLAG1 is generated based on the drain-source voltage of the synchronous rectifier Qs and the conduction reference. Specifically, the valid edge of the first output switching enable signal FLAG1 is generated when the drain-source voltage is less than or equal to the conduction reference. In the third embodiment, the start time of the secondary-side freewheeling phase is determined based on the drain-source voltage of the synchronous rectifier Qs and the conduction reference, wherein the start time of the secondary-side freewheeling phase is when the drain-source voltage is less than or equal to the conduction reference.

[0117] In the second embodiment, the valid edge of the second output switching enable signal FLAG2 precedes the valid edge of the first output switching enable signal FLAG1 and is generated when the primary side is determined to be on. The invalid edge of the second output switching enable signal FLAG2 is generated, for example, starting the timer at the time the valid edge is generated and after a set time has elapsed.

[0118] Figure 12 The diagram shows a pinout of a synchronous rectification control circuit in a flyback converter according to an embodiment of the present disclosure. Figure 13 This diagram illustrates a waveform of a multiplexed pin in the synchronous rectification control circuit of a flyback converter provided in an embodiment of the present disclosure.

[0119] In a preferred embodiment, such as Figure 12As shown, the synchronous rectification control circuit 613 has an 8-pin chip structure. Exemplarily, pin 1 is the feedback pin VO, connected to the connection point between the secondary winding Ns and the output circuit to receive the output voltage Vo of the secondary winding Ns. Pin 2 is the secondary freewheeling volt-second reference setting pin VT, outputting the secondary freewheeling volt-second reference VT. Pin 3 is the volt-second product threshold setting pin FLAG_VT, outputting the volt-second product threshold. Pin 4 is the multiplexing pin FLAG, outputting the first output switching enable signal FLAG1 and the second output switching enable signal FLAG2. Pin 5 is the power supply pin VCC. Pin 6 is the feedback pin GT, connected to the drain of the synchronous rectifier Qs to receive the drain-source voltage Vds_SR of the synchronous rectifier Qs. Pin 7 is the reference ground pin GND. Pin 8 is the output pin SW, used to output the synchronous rectification control signal SR to the control terminal of the synchronous rectifier Qs.

[0120] In this embodiment, the multiplexed pin 4 uses different encoding methods to combine the first output switching enable signal FLAG1 and the second output switching enable signal FLAG2 into an output switching enable signal FLAG. Further, for example, the amplitudes of the effective states of the first output switching enable signal FLAG1 and the second output switching enable signal FLAG2 are different. Alternatively, the second output switching enable signal FLAG2 can be a pulse width modulation signal.

[0121] See Figure 13 The amplitude of the active state of the first output switching enable signal FLAG1 is, for example, greater than the amplitude of the active state of the second output switching enable signal FLAG2. In an alternative embodiment, the amplitude of the active state of the first output switching enable signal FLAG1 is, for example, less than the amplitude of the active state of the second output switching enable signal FLAG2.

[0122] The multi-port charger, flyback converter, and their secondary-side control circuit and method disclosed herein determine the load state of the flyback converter. Under light load conditions, timing begins when the secondary-side freewheeling current ends. After a certain timing period, the free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product. After the primary side conducts, different output voltages are enabled for switching. This disclosure filters out the large first volt-second product during the free oscillation stage under light load conditions by setting a timing interval. Therefore, after the timing period, the free oscillation stage and the primary-side conduction stage can be accurately distinguished based on the first volt-second product. This provides an effective output switching enable signal to enable switching between different output voltages after the primary side conducts. This achieves a low-cost, simple, and reliable multi-port charger and flyback converter.

[0123] Furthermore, the multi-port charger, flyback converter, and their secondary-side control circuit and control method provided in this disclosure, under light load conditions, determine and distinguish between primary-side conduction and free oscillation based on the first volt-second product, or based on the current peak voltage of the first volt-second product and the drain-source voltage of the synchronous rectifier, or based on two adjacent first volt-second products, after the shielding time. This allows for more accurate determination of the primary-side conduction stage under light load conditions, avoiding situations where a short shielding time cannot completely filter out the large first volt-second product during the free oscillation stage, thus preventing the error of misjudging free oscillation as primary-side conduction after timing. Therefore, adding peak voltage comparison and adjacent first volt-second product comparison as judgment conditions can further improve the accuracy of the judgment result, thereby more accurately generating an effective output switching enable signal to enable switching to different output voltages after the primary side is turned on.

[0124] Furthermore, the multi-port charger, flyback converter, and their secondary-side control circuit and method provided in this disclosure, in order to cooperate with the primary-side ZVS, require the secondary side to switch its output to the maximum output circuit among the n-channel output circuits at the end of the freewheeling. In this case, it is necessary to switch the output to the main output circuit among the n-channel output circuits before the secondary-side freewheeling begins. Based on this requirement, this invention proposes to generate a first output switching enable signal before the secondary-side freewheeling begins, or to generate a first output switching enable signal and a second output switching enable signal with different timings. Further, the effective edge of the first output switching enable signal or the second output switching enable signal is used to control the switching to the main output circuit among the n-channel output circuits, so that the minimum control time of the main circuit can be controlled to 0, thereby solving the output switching lag problem.

[0125] Furthermore, this disclosure also includes a multiplexed pin in the secondary control circuit to output a first output switching enable signal and a second output switching enable signal, which can achieve miniaturized packaging.

[0126] As described above, these embodiments of the present disclosure do not exhaustively cover all details, nor do they limit the disclosure to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the present disclosure, thereby enabling those skilled in the art to make good use of the present disclosure and modifications based on it. This disclosure is limited only by the claims and their full scope and equivalents.

Claims

1. A secondary-side control method for a flyback converter, the flyback converter comprising an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, and n output circuits, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1, characterized in that, include: Determine the load state of the flyback converter; as well as Under light load conditions, timing begins when the secondary-side freewheeling ends. After a certain timing period, the free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product. After the primary-side conduction stage, different output voltages are enabled for switching. The first volt-second product represents the product of the voltage difference and time when the synchronous rectifier is turned off, and the voltage difference represents the difference between the drain-source voltage and the output voltage of the synchronous rectifier.

2. The secondary-side control method according to claim 1, characterized in that, After the primary-side conduction phase, enabling switching to different output voltages includes: After determining that the primary side is in the conduction phase, a valid edge of the first output switching enable signal is generated. The valid state of the first output switching enable signal includes the secondary side freewheeling phase. During the secondary side freewheeling phase, the n output circuits are controlled to switch to output different output voltages.

3. The secondary-side control method according to claim 1, characterized in that, Determining the load state of the flyback converter includes: The load state of the flyback converter is determined based on the first volt-second product and the preset volt-second reference. When the first volt-second product is less than the volt-second reference, the flyback converter is in a light load state. When the first volt-second product is greater than or equal to the volt-second reference, the flyback converter is in a heavy load state.

4. The secondary-side control method according to claim 1, characterized in that, After the preset shielding time is reached, the free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product, including: When the first volt-second product is greater than or equal to the preset first volt-second product threshold, it is determined to be in the primary side conduction stage.

5. The secondary-side control method according to claim 1 or 4, characterized in that, After the preset shielding time is reached, the free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product, including: Obtain the current peak voltage and peak sampling voltage of the drain-source voltage of the synchronous rectifier, wherein the peak sampling voltage is the previous peak voltage or the first peak voltage after the timing reaches the shielding time; and The free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product, the preset first volt-second product threshold, the current peak voltage, and the peak sampling voltage.

6. The secondary-side control method according to claim 5, characterized in that, When the first volt-second product is greater than or equal to the first volt-second product threshold, and the current peak voltage is greater than the peak sampling voltage, it is determined to be in the primary side conduction stage.

7. The secondary-side control method according to claim 1 or 4, characterized in that, After the preset shielding time is reached, the free oscillation stage and the primary-side conduction stage are distinguished based on the first volt-second product, including: The free oscillation stage and the primary-side conduction stage are distinguished based on two adjacent first volt-second products and a preset first volt-second product threshold.

8. The secondary-side control method according to claim 7, characterized in that, If the previous first volt-second product is less than the first volt-second product threshold, and the current first volt-second product is greater than or equal to the first volt-second product threshold, it is determined to be in the primary side conduction stage.

9. The secondary-side control method according to claim 2, characterized in that, The invalid edge of the first output switching enable signal indicates the end of the secondary side freewheeling current. When the invalid edge of the first output switching enable signal arrives, the control switches to the output circuit that generates the maximum output voltage among the n output circuits.

10. The secondary-side control method as described in claim 9, characterized in that, The effective edge of the first output switching enable signal arrives before the secondary side freewheeling begins. When the effective edge of the first output switching enable signal arrives, the switch is controlled to the main output circuit in the n-channel output circuit.

11. The secondary-side control method according to claim 9, characterized in that, When the effective edge of the first output switching enable signal arrives at the start time of the secondary side freewheeling, a second output switching enable signal is generated before the effective edge of the first output switching enable signal. The second output switching enable signal controls the switching to the main output circuit in the n-channel output circuit.

12. The secondary-side control method according to claim 2, characterized in that, The invalid edge of the first output switching enable signal indicates the end of the secondary side freewheeling, and the valid edge of the first output switching enable signal is generated according to the drain-source voltage of the synchronous rectifier, wherein the valid edge is generated when the drain-source voltage is less than or equal to the conduction reference.

13. The secondary-side control method according to claim 11, characterized in that, After the timing reaches the shielding time, a first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier diode, and a second output switching enable signal is generated based on the first volt-second product and a preset first volt-second product threshold. Specifically, the effective edge of the first output switching enable signal is generated when the drain-source voltage is less than or equal to the conduction reference, and the second output switching enable signal is generated when the first volt-second product is greater than or equal to the first volt-second product threshold.

14. The secondary-side control method according to claim 11, characterized in that, After the timing reaches the shielding time, a first output switching enable signal is generated based on the effective edge of the drain-source voltage of the synchronous rectifier. A second output switching enable signal is generated based on the first volt-second product, a preset first volt-second product threshold, the current peak voltage of the drain-source voltage of the synchronous rectifier, and the peak sampling voltage. Wherein, the peak sampling voltage is the previous peak voltage or the first peak voltage after the timing reaches the shielding time; the effective edge of the first output switching enable signal is generated when the drain-source voltage is less than or equal to the conduction reference; the first volt-second product is greater than or equal to the first volt-second product threshold; and the second output switching enable signal is generated when the current peak voltage is greater than the peak sampling voltage.

15. The secondary-side control method according to claim 11, characterized in that, After the timing reaches the shielding time, a first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier diode, and a second output switching enable signal is generated based on two adjacent first volt-second products and a preset first volt-second product threshold. The effective edge of the first output switching enable signal is generated when the drain-source voltage is less than or equal to the conduction reference, and the second output switching enable signal is generated when the previous first volt-second product is less than the first volt-second product threshold and the current first volt-second product is greater than or equal to the first volt-second product threshold.

16. The secondary-side control method according to claim 10 or 11, characterized in that, An invalid edge of the first output switching enable signal is generated based on the drain-source voltage of the synchronous rectifier and the turn-off reference, wherein the invalid edge is generated when the drain-source voltage is greater than or equal to the turn-off reference.

17. The secondary-side control method according to claim 11, characterized in that, Also includes: The first output switching enable signal and the second output switching enable signal are output through a multiplexed pin. Wherein, the amplitude of the effective state of the first output switching enable signal is different from the amplitude of the effective state of the second output switching enable signal, or the second output switching enable signal is a pulse width modulation signal.

18. The secondary-side control method according to claim 1, characterized in that, Set the timing duration to the preset shielding time, and determine whether to end the timing prematurely based on the first volt-second product within the timing period.

19. The secondary-side control method according to claim 18, characterized in that, If the first volt-second product is consistently less than the second volt-second product threshold within the timing period, the timing ends after the shielding time is reached. The free oscillation phase and the primary-side conduction phase are then distinguished based on the first volt-second product obtained after the timing ends. If the first volt-second product is greater than or equal to the second volt-second product threshold within the timing period, then the timing ends when the first volt-second product is greater than or equal to the second volt-second product threshold, and it is determined that the current stage is the original side conduction phase. Among them, the first volt-second product threshold is less than the second volt-second product threshold.

20. The secondary-side control method according to claim 1, characterized in that, Also includes: Under heavy load conditions, the first volt-second product is obtained when the secondary side freewheeling ends. When the first volt-second product is greater than or equal to a preset volt-second reference, it is determined to be the primary side conduction stage. After the primary side conduction stage, different output voltages are enabled to switch.

21. A secondary-side control circuit for a flyback converter, the flyback converter further comprising an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, and n output circuits, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1, characterized in that, The secondary-side control circuit is used to execute the secondary-side control method as described in any one of claims 1-20.

22. A flyback converter, comprising an input voltage circuit, a transformer, a main power transistor, a primary-side control circuit, a synchronous rectifier, n output circuits, and a secondary-side control circuit, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1, characterized in that, The secondary control circuit is the secondary control circuit as described in claim 21.

23. A multi-port charger, characterized in that, Includes the flyback converter as described in claim 22.

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