A PFC power supply control system and method based on double closed-loop control

Abstract

The application provides a PFC power supply control system and method based on double closed-loop control, which identifies overshoot or drop trend of voltage loop output in switching process by monitoring running state data of double closed-loop control circuit in PFC power supply; determines dynamic response delay of current inner loop in working condition switching process according to reference signal of current inner loop and change rate of load current during power correction; compensates error signal of voltage loop output based on dynamic response delay and overshoot or drop trend, generates loop control parameter suitable for working condition switching process; adjusts reference amplitude of voltage loop output to current inner loop according to loop control parameter when switching working condition, so as to control dynamic response of PFC power supply. The application can realize time-varying saturation constraint of voltage loop based on dynamic response delay and overshoot trend, thereby improving dynamic response performance of PFC power supply in working condition switching.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and more specifically, to a PFC power control system and method based on dual closed-loop control. Background Technology

[0002] Power factor correction (PFC) technology, as a key means to improve the power quality of the power grid, has been widely used in industrial fields such as communication power supplies and server power supplies. Its classic dual closed-loop control structure stabilizes the DC bus voltage through the voltage outer loop and shapes the input current waveform through the current inner loop, providing a basic guarantee for achieving high-efficiency and low-harmonic pollution power conversion. With the continuous improvement of the dynamic response performance requirements of modern electrical equipment, how to balance response speed and operational stability when dealing with transient conditions such as load changes has become the research focus and development challenge in the field of power electronics technology.

[0003] In existing technologies, the dual-loop control strategy of PFC power supplies performs poorly under dynamic conditions such as load step changes. Traditional control methods mainly rely on fixed-parameter proportional-integral controllers and static limiting mechanisms. This structure has inherent defects. When the system detects a sudden load change, the voltage loop generates a large error signal. However, due to the inherent response delay of the inner current loop, it cannot instantaneously track rapidly changing reference commands. This mismatch between command and tracking capability leads to two adverse situations: if large changes in the voltage loop output are allowed, it will cause overshoot oscillation of the output voltage; if strict fixed limiting is used, it will make the system response sluggish and prolong the recovery time. Although some existing improvement schemes attempt to improve dynamic performance through simple feedforward, they have failed to establish a real-time adaptation mechanism between the voltage loop output and the dynamic response capability of the current loop, resulting in the system's dynamic performance being consistently limited. Therefore, how to achieve time-varying saturation constraints on the voltage loop based on dynamic response delay and overshoot trend, thereby improving the dynamic response performance of PFC power supplies during operating condition switching, has become a challenge for the industry. Summary of the Invention

[0004] This application provides a PFC power supply control system and method based on dual closed-loop control, which can realize time-varying saturation constraints of voltage loop based on dynamic response delay and overshoot trend, thereby improving the dynamic response performance of PFC power supply during operating condition switching.

[0005] In a first aspect, this application provides a PFC power supply control method based on dual closed-loop control, comprising the following steps: Obtain the operating status command of the PFC power supply and monitor the operating status data of the dual closed-loop control circuit in the PFC power supply. Based on the output value of the voltage loop and the magnitude of the load current of the dual closed-loop control circuit in the operating status data during the switching of operating conditions, the overshoot or drop trend of the voltage loop output during the switching process can be identified. Determine the reference signal of the current inner loop when the PFC power supply performs power correction, and determine the dynamic response delay of the current inner loop during the operating condition switching process based on the reference signal and the rate of change of the load current. Based on the dynamic response delay and the overshoot or drop trend, the error signal output by the voltage loop is dynamically limited and compensated to generate loop control parameters suitable for the operating condition switching process. When the operating condition command indicates a change in operating condition, the reference amplitude of the voltage loop output to the inner current loop is dynamically adjusted according to the loop control parameters to control the dynamic power response of the PFC power supply.

[0006] In some embodiments, identifying the overshoot or drop trend of the voltage loop output during the switching process based on the voltage loop output value and load current of the dual closed-loop control circuit during the operating condition switching in the operating status data specifically includes: When a change in the operating condition command is detected, the sequence of changes in the voltage loop output value over time is recorded. Calculate the change in the output value of the voltage loop per unit time; The change is compared with a preset positive or negative threshold. If the change continues to exceed the positive threshold, it is determined that there is an overshooting trend; If the change amount continues to be below the negative threshold, it is determined that there is a downward trend.

[0007] In some embodiments, determining the reference signal for the inner current loop when the PFC power supply performs power correction specifically includes: The output signal of the sampling voltage loop controller; Sample the grid input voltage and generate a unit sine wave signal that is in phase with the input voltage; The output signal of the voltage loop controller is multiplied by the unit sine wave signal; The signal after multiplication is normalized to generate the reference signal for the inner current loop.

[0008] In some embodiments, determining the dynamic response delay of the inner current loop during the operating condition switching process based on the reference signal and the rate of change of the load current specifically includes: At the start of the operating condition switch, record the initial value of the reference signal of the inner current loop; Calculate the first derivative of the load current with respect to time, which is used as the rate of change of the load current. The time difference between the change in the reference signal reaching a steady state and the change in the rate of change of the load current reaching a steady state is detected. The time difference is quantified as the dynamic response delay.

[0009] In some embodiments, based on the dynamic response delay and the overshoot or drop trend, dynamic limiting compensation is performed on the error signal output by the voltage loop to generate loop control parameters suitable for the operating condition switching process, specifically including: Based on the intensity of the dynamic response delay, the reference limit value of the error limiter is adjusted. The longer the dynamic response delay, the greater the downward adjustment of the reference limit value. Identify the direction and intensity of the overshoot or drop trend; If there is an overshoot trend, a negative compensation offset is applied based on the baseline limit value; If the trend is downward, a positive compensation offset is applied based on the baseline limit value; The final amplitude limit value after compensation adjustment is used as the dynamic amplitude limit parameter in the loop control parameters.

[0010] In some embodiments, dynamically adjusting the reference amplitude of the voltage loop output to the inner current loop according to the loop control parameters to control the dynamic power response of the PFC power supply specifically includes: The original error signal output by the voltage loop controller is input to a dynamic limiter, which uses the dynamic limiting parameter in the loop control parameters as the instantaneous amplitude limit boundary. Peak clipping is performed on the original error signal that exceeds the amplitude limit boundary; The error signal after amplitude limiting is used as the basis for adjusting the reference amplitude of the inner current loop. The amplitude of the reference signal input to the inner current loop is updated in real time according to the aforementioned adjustment criteria.

[0011] In some embodiments, the operating status data includes the output value of the voltage loop, inductor current, load current, and output voltage.

[0012] Secondly, this application provides a PFC power control system based on dual closed-loop control, comprising: Status monitoring module: used to acquire the operating status commands of the PFC power supply and monitor the operating status data of the dual closed-loop control circuit in the PFC power supply. Trend recognition module: used to identify the overshoot or drop trend of the voltage loop output during the switching process based on the voltage loop output value and load current of the dual closed-loop control circuit in the operating status data. Delay quantization module: used to determine the reference signal of the current inner loop when the PFC power supply performs power correction, and to determine the dynamic response delay of the current inner loop during the operating condition switching process based on the reference signal and the rate of change of the load current. Parameter decision module: Based on the dynamic response delay and the overshoot or drop trend, it performs dynamic amplitude limiting compensation on the error signal output by the voltage loop to generate loop control parameters suitable for the operating condition switching process. Loop execution module: When the operating condition command indicates a change in operating condition, it dynamically adjusts the reference amplitude of the voltage loop output to the current inner loop according to the loop control parameters to control the dynamic power response of the PFC power supply.

[0013] Thirdly, this application provides a computer device, the computer device including a memory and a processor, the memory storing code, and the processor being configured to acquire the code and execute the above-described PFC power control method based on dual closed-loop control.

[0014] Fourthly, this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the aforementioned PFC power control method based on dual closed-loop control.

[0015] The technical solutions provided by the embodiments disclosed in this application have the following beneficial effects: In this embodiment, the operating status command of the PFC power supply is first obtained, and the operating status data of the dual closed-loop control circuit in the PFC power supply is monitored. Based on the output value of the voltage loop and the magnitude of the load current of the dual closed-loop control circuit during operating condition switching in the operating status data, the overshoot or drop trend of the voltage loop output during the switching process is identified. Then, the reference signal of the current inner loop when the PFC power supply performs power correction is determined, and the dynamic response delay of the current inner loop during operating condition switching is determined based on the reference signal and the rate of change of the load current. Based on the dynamic response delay and the overshoot or drop trend, the error signal output by the voltage loop is dynamically limited and compensated to generate loop control parameters suitable for the operating condition switching process. When the operating status command indicates a switching operating condition, the reference amplitude of the voltage loop output to the current inner loop is dynamically adjusted according to the loop control parameters to control the power dynamic response of the PFC power supply.

[0016] Therefore, when the operating condition command indicates a change in operating condition, the reference amplitude of the voltage loop output to the current inner loop is dynamically adjusted according to the loop control parameters to control the dynamic power response of the PFC power supply. First, based on the voltage loop output value and load current magnitude of the dual closed-loop control circuit during operating condition switching in the operating status data, the overshoot or drop trend of the voltage loop output during the switching process is identified. Identifying this overshoot or drop trend allows for early warning of system dynamic instability, providing a crucial time window for proactive intervention. Second, the dynamic response delay of the current inner loop during operating condition switching is determined based on the reference signal and the rate of change of the load current. This dynamic response delay quantifies the system's inertial characteristics into calculable time-domain parameters, providing a basis for establishing accurate loop matching. The system provides quantitative data; then, based on the dynamic response delay and the overshoot or drop trend, the error signal output by the voltage loop is dynamically limited and compensated to generate loop control parameters suitable for the operating condition switching process. Through the loop control parameters, a feedforward-feedback composite decision-making mechanism based on the real-time dynamic characteristics of the system can be established to achieve adaptive matching between the voltage loop output command and the current loop tracking capability; finally, when the operating condition command indicates a switching condition, the reference amplitude of the voltage loop output to the inner current loop is dynamically adjusted according to the loop control parameters to achieve a smooth transition of power commands, ensuring stability while fully exploiting the dynamic response potential of the system; in summary, the solution of this application can realize time-varying saturation constraints of the voltage loop based on dynamic response delay and overshoot trend, thereby improving the dynamic response performance of the PFC power supply during operating condition switching. Attached Figure Description

[0017] Figure 1 This is an exemplary flowchart of a PFC power control method based on dual closed-loop control, according to some embodiments of this application. Figure 2 This is a schematic diagram of an application scenario architecture of a PFC power control system based on dual closed-loop control, according to some embodiments of this application. Figure 3 This is a flowchart illustrating the process of determining dynamic response delay according to some embodiments of this application; Figure 4 This is a schematic diagram of the structure of a PFC power control system based on dual closed-loop control, according to some embodiments of this application. Figure 5 This is a schematic diagram of the structure of a computer device implementing a PFC power control method based on dual closed-loop control, according to some embodiments of this application. Detailed Implementation

[0018] To better understand the technical solution of this application, the technical solution of this application will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0019] refer to Figure 1 The figure is an exemplary flowchart of a PFC power control method based on dual closed-loop control according to some embodiments of this application. The PFC power control method based on dual closed-loop control mainly includes the following steps: In step 101, the operating status command of the PFC power supply is obtained, and the operating status data of the dual closed-loop control circuit in the PFC power supply is monitored.

[0020] It should be noted that power factor correction (Power Factor) Power factor correction (PFC) power supplies are power electronic converters that enable the input current waveform to remain in phase with the input voltage waveform, thus exhibiting resistive load characteristics and achieving a high power factor. Their core function is to mitigate harmonic current pollution from the power grid. By employing a dual-loop control structure based on Boost topologies, the input current is forced to track the sinusoidal waveform of the input voltage in real time, raising the power factor to near 1 while providing a stable and controllable DC output voltage. They are widely used in servers, communication equipment, industrial power supplies, and other fields with stringent requirements for power grid quality and efficiency. Furthermore, the operating status command in this application is a load current step command or operating mode switching command from the system's main controller. The dual-loop control circuit refers to a cascaded control structure consisting of an outer voltage loop and an inner current loop. The voltage loop controls the stability of the DC bus voltage by adjusting its output value, which serves as the reference amplitude for the inner current loop. The inner current loop controls the duty cycle of the power switching transistors, forcing the input current to track the reference signal waveform synthesized from this reference amplitude and the grid voltage phase information in real time, thereby achieving power factor correction.

[0021] In some embodiments, the monitoring of the operating status data is achieved through an analog-to-digital converter module built into the digital signal processor. This module synchronously acquires key signals in the dual closed-loop control circuit at a fixed sampling frequency: directly reading the output register of the voltage loop controller inside the digital signal processor to obtain the voltage loop output value; acquiring the inductor current signal through a Hall current sensor and sending it to the analog-to-digital converter channel through a signal conditioning circuit; acquiring the load current signal through an output current sensor in the same way; sampling the output voltage through a high-precision resistor voltage divider network and inputting it into the analog-to-digital converter; finally, using the digitally filtered sequence of the voltage loop output value, inductor current, load current, and output voltage as the data basis for subsequent identification and compensation steps. It should be noted that the operating status data in this application includes the voltage loop output value, inductor current, load current, and output voltage.

[0022] In some embodiments, reference Figure 2 This figure is a schematic diagram of an application scenario architecture of a PFC power supply control system based on dual closed-loop control according to some embodiments of this application. The application scenario architecture includes sensors, a communication network, and a server. The sensors and the server are directly or indirectly connected through the communication network. The sensors are used to collect the operating status data of the dual closed-loop control circuit in the PFC power supply and upload it to the server through the communication network. The execution code of the PFC power supply control method based on dual closed-loop control in the server realizes the voltage loop time-varying saturation constraint based on dynamic response delay and overshoot trend, thereby improving the dynamic response performance of the PFC power supply during operating condition switching.

[0023] In step 102, based on the output value of the voltage loop and the magnitude of the load current of the dual closed-loop control circuit during the switching of operating conditions in the operating status data, the overshoot or drop trend of the voltage loop output during the switching process is identified.

[0024] In some embodiments, identifying the overshoot or drop trend of the voltage loop output during the switching process based on the voltage loop output value and load current of the dual closed-loop control circuit during operating condition switching in the operating status data can be achieved by the following steps: When a change in the operating condition command is detected, the sequence of changes in the voltage loop output value over time is recorded. Calculate the change in the output value of the voltage loop per unit time; The change is compared with a preset positive or negative threshold. If the change continues to exceed the positive threshold, it is determined that there is an overshooting trend; If the change amount continues to be below the negative threshold, it is determined that there is a downward trend.

[0025] It should be noted that the change sequence in this application is a time-series data set used to record the dynamic process of the voltage loop output; the change amount is a scalar value used to quantify the rate of change of the voltage loop output; the positive and negative thresholds are stability boundary parameters used to determine the trend direction; the overshoot trend is a system state indicator used to warn of possible overshoot of the output voltage; and the drop trend is a system state indicator used to warn of possible undershoot of the output voltage.

[0026] In specific implementation, firstly, when the digital signal processor detects that the operating status command has taken effect, it immediately starts the data recording function, storing the output value of the voltage loop controller into the circular buffer in chronological order to form a voltage loop output value change sequence; then, the differential calculation unit extracts the numerical difference between adjacent sampling periods from this sequence to obtain the change in the voltage loop output value per unit time; this change is input to the comparator module and compared in real time with preset positive and negative threshold parameters; if the comparator detects that the change is continuously greater than the positive threshold for multiple consecutive control periods, the trend judgment logic unit sets the overshoot trend flag; if the change is continuously less than the negative threshold for multiple consecutive control periods, the drop trend flag is set, and finally, the set trend flag is used as the trigger condition for dynamic limiting compensation; it should be further explained that the positive threshold is a stability boundary parameter determined by the following steps: based on the s-domain small-signal model of the PFC circuit, by solving the voltage loop error amplification The time-domain response equation of the amplifier under rated load step is used to calculate the extreme value of the voltage loop output change corresponding to the maximum overshoot of the output voltage. To address the uncertainties of component tolerances and dynamic response, the theoretical value is multiplied by a safety factor between 0.7 and 0.8 to set a threshold with a safety margin. Finally, in the digital signal processor, the calculated absolute physical value is quantized into a fixed-point digital quantity that the processor can process and stored in the corresponding configuration register. This value serves as the reference threshold for judging whether the system has accelerated overshoot. The negative threshold is a stability boundary parameter determined by the principle of symmetry with the positive threshold: its absolute value is usually set to be equal to the positive threshold, but with a negative sign. In specific implementation, an arithmetic negation operation is performed on the stored positive threshold fixed-point digital quantity in the digital signal processor, and the result is stored in another configuration register to generate a negative reference threshold for judging whether the voltage loop output has accelerated drop.

[0027] In step 103, the reference signal of the current inner loop when the PFC power supply performs power correction is determined, and the dynamic response delay of the current inner loop during the operating condition switching process is determined based on the reference signal and the rate of change of the load current.

[0028] In some embodiments, the reference signal for determining the inner current loop when the PFC power supply performs power correction can be implemented in the following manner: The output signal of the sampling voltage loop controller; Sample the grid input voltage and generate a unit sine wave signal that is in phase with the input voltage; The output signal of the voltage loop controller is multiplied by the unit sine wave signal; The signal after multiplication is normalized to generate the reference signal for the inner current loop.

[0029] It should be noted that the unit sine wave signal in this application refers to a normalized AC quantity used to provide a current waveform template; the reference signal is a time-varying reference quantity used to guide the current inner loop tracking behavior.

[0030] In specific implementation, the output signal of the voltage loop controller is first obtained by directly reading the internal registers of the digital signal processor. Simultaneously, a phase-locked loop circuit tracks the phase of the grid input voltage and generates a unit sine wave signal using a lookup table. Then, the two signals are input to a dedicated hardware multiplier module of the digital signal processor for multiplication to obtain an unnormalized current reference containing amplitude modulation information. Next, this signal is sent to a normalization processing unit, where amplitude normalization is performed by dividing by its own peak value or by using a digital multiplier with predetermined coefficients. Finally, the amplitude-normalized time-varying sine wave signal is used as the reference signal for the inner current loop and sent to the reference input terminal of the current loop controller. It should be further noted that the normalization processing unit is a functional module used to normalize the amplitude of the unnormalized current reference signal. It is implemented through a digital divider or a digital multiplier with predetermined coefficients, where the predetermined coefficients correspond to the maximum output value of the voltage loop, ultimately outputting a current inner loop reference signal with stable amplitude.

[0031] In some embodiments, reference Figure 3 As shown in the figure, this is a flowchart illustrating the determination of dynamic response delay in some embodiments of this application. In this embodiment, the determination of the dynamic response delay of the inner current loop during the operating condition switching process based on the reference signal and the rate of change of the load current can be achieved by the following steps: In step 1031, at the start of the operating condition switch, the initial value of the reference signal of the inner current loop is recorded; In step 1032, the first derivative of the load current with respect to time is calculated as the rate of change of the load current; In step 1033, the time difference between the change in the reference signal reaching a steady state and the change in the rate of change of the load current reaching a steady state is detected; In step 1034, the time difference is quantified as the dynamic response delay.

[0032] It should be noted that the initial value in this application refers to the reference value used to record the starting point of the reference signal change; the load current change rate refers to the differential value used to characterize how fast the load current changes; and the dynamic response delay is a system indicator used to characterize the current inner loop tracking performance.

[0033] In specific implementation, the moment the digital signal processor detects the activation of the operating condition switching command, it immediately records the current value of the inner current loop reference signal as the initial value through its storage unit; simultaneously, it starts the differential calculation unit to perform differential operations on the digitally filtered load current sampling sequence, continuously calculating the load current change rate; then, the steady-state detection module monitors the change process of the reference signal and the load current change rate respectively. When both enter and remain in their respective steady-state tolerance bands, the timestamp of the hardware timer is read. The steady-state tolerance band refers to the range centered on the target steady-state value, preset by the digital signal processor parameter configuration table, and the upper and lower boundaries of this range are respectively defined by the target steady-state value. The steady-state value is obtained by superimposing a fixed tolerance value. The judgment logic is that when the sampled value of the monitored signal is maintained within the boundary range for more than five consecutive control cycles, it is considered to have entered a steady state. Finally, this steady-state judgment condition based on the preset tolerance range is used as the basis for measuring the dynamic performance of the system. Finally, the time difference between the arrival times of the two steady states is calculated, and this time difference is used as the dynamic response delay parameter characterizing the dynamic performance of the system and output to the subsequent compensation stage. It should be further explained that the differential calculation unit is a processing module used to obtain the rate of change of the signal by performing differential operations, and the steady-state detection module is a logic unit used to determine that the signal has entered a steady state and trigger the state flag according to the preset steady-state tolerance band.

[0034] In step 104, based on the dynamic response delay and the overshoot or drop trend, the error signal output by the voltage loop is dynamically limited and compensated to generate loop control parameters suitable for the operating condition switching process.

[0035] In some embodiments, the following steps can be used to dynamically limit and compensate the error signal output by the voltage loop based on the dynamic response delay and the overshoot or drop trend to generate loop control parameters suitable for the operating condition switching process: Based on the intensity of the dynamic response delay, the reference limit value of the error limiter is adjusted. The longer the dynamic response delay, the greater the downward adjustment of the reference limit value. Identify the direction and intensity of the overshoot or drop trend; If there is an overshoot trend, a negative compensation offset is applied based on the baseline limit value; If the trend is downward, a positive compensation offset is applied based on the baseline limit value; The final amplitude limit value after compensation adjustment is used as the dynamic amplitude limit parameter in the loop control parameters.

[0036] It should be noted that the error limiter in this application refers to a functional module used to dynamically limit the amplitude of the original error signal output by the voltage loop controller. It achieves saturation protection of the reference amplitude of the inner current loop by constraining the input signal within a symmetrical or asymmetrical boundary determined by the dynamic limiting parameter. The reference limiting value is a reference parameter used to set the amplitude limit range of the error signal. The compensation offset is a correction parameter used to adjust the limiting value according to the trend direction. The dynamic limiting parameter is the amplitude limit value used to constrain the voltage loop output in real time.

[0037] In specific implementation, firstly, based on the specific value of the dynamic response delay, the corresponding reference limit value is determined through a limit value lookup table preset in the digital signal processor. The lookup table is established according to the principle that the longer the delay, the smaller the reference limit value. For example, when the dynamic response delay is 2 milliseconds, the corresponding reference limit value is 80% of the rated value, and when the delay is 3 milliseconds, the corresponding reference limit value is 70% of the rated value. This is only an example and is not intended to limit the invention. Then, the direction and intensity of the overshoot or drop trend are analyzed. The trend intensity is quantified by counting the number of consecutive periods exceeding the threshold. The larger the intensity value, the larger the compensation offset. If an overshoot trend is identified, the compensation offset calculated based on the trend intensity is subtracted from the reference limit value. If a drop trend is identified, the corresponding compensation offset is added to the reference limit value. Finally, the limit value adjusted by directional compensation is output as the dynamic limit parameter to the voltage loop error limiter.

[0038] It should also be noted that in the existing technology, the dual closed-loop control of PFC power supplies usually adopts a fixed limiting value or a simple feedforward control based on a single parameter. When dealing with dynamic conditions such as load step changes, the drastic changes in the voltage loop output will exceed the tracking capability of the current inner loop, causing the system to face a contradiction between response speed and stability: if a loose limiting is set in pursuit of fast response, it will cause output voltage overshoot or drop; if a conservative fixed limiting is adopted to ensure stability, it will delay the system recovery process. In contrast, this solution creatively constructs a feedforward-feedback composite intelligent decision-making mechanism by introducing two related parameters—dynamic response delay and overshoot / drop trend—that respectively characterize the system's inherent inertia and instantaneous dynamics. The technical problem it solves is that it achieves predictive and adaptive constraints on voltage loop commands, ensuring that the reference amplitude of the injected current inner loop always matches the loop's dynamic tracking capability. The resulting technical effect is that during operating condition switching, it can actively suppress output voltage overshoot caused by excessive excitation and effectively prevent slow recovery (drop) caused by insufficient excitation. Thus, while ensuring system stability, it significantly improves the speed and smoothness of the power dynamic response, resolving the technical contradiction of balancing response speed and stability in traditional control methods.

[0039] In step 105, when the operating condition command indicates a change in operating condition, the reference amplitude of the voltage loop output to the current inner loop is dynamically adjusted according to the loop control parameters to control the dynamic power response of the PFC power supply.

[0040] In some embodiments, dynamically adjusting the reference amplitude of the voltage loop output to the inner current loop according to the loop control parameters to control the dynamic power response of the PFC power supply can be achieved by the following steps: The original error signal output by the voltage loop controller is input to a dynamic limiter, which uses the dynamic limiting parameter in the loop control parameters as the instantaneous amplitude limit boundary. Peak clipping is performed on the original error signal that exceeds the amplitude limit boundary; The error signal after amplitude limiting is used as the basis for adjusting the reference amplitude of the inner current loop. The amplitude of the reference signal input to the inner current loop is updated in real time according to the aforementioned adjustment criteria.

[0041] It should be noted that the dynamic limiter in this application refers to a nonlinear processing module that adjusts its limiting boundary in real time according to the dynamic limiting parameter in the loop control parameters. By constraining the original error signal output by the voltage loop within the symmetrical or asymmetrical boundary determined by the dynamic limiting parameter, it achieves adaptive saturation limiting of the reference amplitude of the current inner loop. The instantaneous amplitude limiting boundary is a real-time variable threshold used to constrain the dynamic range of the error signal. The peak clipping process is a saturation cutoff operation used to eliminate the saturation cutoff of the signal exceeding the limit. The reference signal amplitude is a sinusoidal envelope used to control the magnitude of the input current.

[0042] In specific implementation, the original error signal output by the voltage loop controller is first input to the first input terminal of the dynamic limiter, and the dynamic limiting parameter in the loop control parameters is input to the second input terminal of the dynamic limiter as the instantaneous amplitude limit boundary. The dynamic limiting parameter is a value dynamically calculated according to the operating conditions. For example, when the load suddenly increases, the limiting value is set to 80% of the rated value. The comparator inside the dynamic limiter monitors the original error signal in real time. When its absolute value exceeds the set instantaneous amplitude limit boundary, peak clipping is initiated to limit the output signal within the boundary range. The error signal after limiting is used as the adjustment basis for the current inner loop reference amplitude and sent to the amplitude control terminal of the reference signal synthesis module. The reference signal synthesis module is a functional unit used to multiply the amplitude control signal output by the voltage loop with a unit sine wave and perform signal normalization to generate the current inner loop reference waveform. The reference signal synthesis module adjusts the amplitude gain of the unit sine wave signal in real time according to the adjustment basis, and finally outputs the amplitude-controlled sine wave signal as the reference signal amplitude of the current inner loop to the current loop controller.

[0043] On the other hand, in some embodiments, this application provides a PFC power control system based on dual closed-loop control. The device includes a PFC power control system based on dual closed-loop control. (Refer to...) Figure 4 The figure is a schematic diagram of a PFC power control system based on dual closed-loop control according to some embodiments of this application. The PFC power control system based on dual closed-loop control includes: a status monitoring module 401, a trend recognition module 402, a delay quantization module 403, a parameter decision module 404, and a loop execution module 405, which are described below: Status monitoring module 401: mainly used to acquire the operating status commands of the PFC power supply and monitor the operating status data of the dual closed-loop control circuit in the PFC power supply. Trend recognition module 402: mainly used to identify the overshoot or drop trend of the voltage loop output during the switching process based on the voltage loop output value and load current of the dual closed-loop control circuit in the operating status data. Delay quantization module 403: mainly used to determine the reference signal of the current inner loop when the PFC power supply performs power correction, and to determine the dynamic response delay of the current inner loop during the operating condition switching process based on the reference signal and the rate of change of the load current. Parameter decision module 404: mainly used to perform dynamic amplitude limiting compensation on the error signal output by the voltage loop based on the dynamic response delay and the overshoot or drop trend, and generate loop control parameters suitable for the working condition switching process; Loop execution module 405: mainly used to dynamically adjust the reference amplitude of the voltage loop output to the current inner loop according to the loop control parameters when the operating condition command indicates a switch of operating conditions, so as to control the dynamic power response of the PFC power supply.

[0044] In addition, this application also provides a computer device, the computer device including a memory and a processor, the memory storing code, the processor being configured to acquire the code and execute the above-described PFC power control method based on dual closed-loop control.

[0045] In some embodiments, reference Figure 5 The figure is a schematic diagram of the structure of a computer device implementing a PFC power control method based on dual closed-loop control, according to some embodiments of this application. The PFC power control method based on dual closed-loop control in the above embodiments can... Figure 5 The computer device shown is used to implement this, and the computer device 500 includes at least one processor 501, a communication bus 502, a memory 503, and at least one communication interface 504.

[0046] Processor 501 can be a general-purpose central processing unit (CPU) or an application-specific integrated circuit (ASIC).

[0047] The communication bus 502 can be used to transmit information between the aforementioned components.

[0048] Memory 503 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile optical discs, Blu-ray discs, etc.), magnetic disks or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. Memory 503 may exist independently and be connected to processor 501 via communication bus 502. Memory 503 may also be integrated with processor 501.

[0049] The memory 503 stores program code for executing the scheme of this application, and its execution is controlled by the processor 501. The processor 501 executes the program code stored in the memory 503. The program code may include one or more software modules. The PFC power control method based on dual closed-loop control in the above embodiments can be implemented by the processor 501 and one or more software modules in the program code in the memory 503.

[0050] Communication interface 504 uses any transceiver-like device to communicate with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc.

[0051] In a specific implementation, as one example, a computer device may include multiple processors, each of which may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. Here, a processor may refer to one or more devices, circuits, and / or processing cores used to process data (e.g., computer program instructions).

[0052] The aforementioned computer device can be a general-purpose computer device or a special-purpose computer device. In specific implementations, the computer device can be a desktop computer, a portable computer, a network server, a handheld digital assistant (PDA), a mobile phone, a tablet computer, a wireless terminal device, a communication device, or an embedded device. This application does not limit the type of computer device.

[0053] In addition, this application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described PFC power control method based on dual closed-loop control.

[0054] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0055] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A PFC power supply control method based on dual closed-loop control, characterized in that, Includes the following steps: Obtain the operating status command of the PFC power supply and monitor the operating status data of the dual closed-loop control circuit in the PFC power supply. Based on the output value of the voltage loop and the magnitude of the load current of the dual closed-loop control circuit in the operating status data during the switching of operating conditions, the overshoot or drop trend of the voltage loop output during the switching process can be identified. Determine the reference signal of the current inner loop when the PFC power supply performs power correction, and determine the dynamic response delay of the current inner loop during the operating condition switching process based on the reference signal and the rate of change of the load current. Based on the dynamic response delay and the overshoot or drop trend, the error signal output by the voltage loop is dynamically limited and compensated to generate loop control parameters suitable for the operating condition switching process. When the operating condition command indicates a change in operating condition, the reference amplitude of the voltage loop output to the inner current loop is dynamically adjusted according to the loop control parameters to control the dynamic power response of the PFC power supply.

2. The method as described in claim 1, characterized in that, Based on the output value of the voltage loop and the magnitude of the load current of the dual closed-loop control circuit during the switching of operating conditions in the aforementioned operating status data, identifying the overshoot or drop trend of the voltage loop output during the switching process specifically includes: When a change in the operating condition command is detected, the sequence of changes in the voltage loop output value over time is recorded. Calculate the change in the output value of the voltage loop per unit time; The change is compared with a preset positive or negative threshold. If the change continues to exceed the positive threshold, it is determined that there is an overshooting trend; If the change amount continues to be below the negative threshold, it is determined that there is a downward trend.

3. The method as described in claim 1, characterized in that, The reference signal for determining the inner current loop when the PFC power supply performs power correction specifically includes: The output signal of the sampling voltage loop controller; Sample the grid input voltage and generate a unit sine wave signal that is in phase with the input voltage; The output signal of the voltage loop controller is multiplied by the unit sine wave signal; The signal after multiplication is normalized to generate the reference signal for the inner current loop.

4. The method as described in claim 1, characterized in that, Determining the dynamic response delay of the inner current loop during the operating condition switching process based on the reference signal and the rate of change of the load current specifically includes: At the start of the operating condition switch, record the initial value of the reference signal of the inner current loop; Calculate the first derivative of the load current with respect to time, which is used as the rate of change of the load current. The time difference between the change in the reference signal reaching a steady state and the change in the rate of change of the load current reaching a steady state is detected. The time difference is quantified as the dynamic response delay.

5. The method as described in claim 1, characterized in that, Based on the dynamic response delay and the overshoot or drop trend, dynamic limiting compensation is performed on the error signal output by the voltage loop to generate loop control parameters suitable for the operating condition switching process. Specifically, this includes: Based on the intensity of the dynamic response delay, the reference limit value of the error limiter is adjusted. The longer the dynamic response delay, the greater the downward adjustment of the reference limit value. Identify the direction and intensity of the overshoot or drop trend; If there is an overshoot trend, a negative compensation offset is applied based on the baseline limit value; If the trend is downward, a positive compensation offset is applied based on the baseline limit value; The final amplitude limit value after compensation adjustment is used as the dynamic amplitude limit parameter in the loop control parameters.

6. The method as described in claim 1, characterized in that, Dynamically adjusting the reference amplitude of the voltage loop output to the inner current loop based on the loop control parameters to control the dynamic power response of the PFC power supply specifically includes: The original error signal output by the voltage loop controller is input to a dynamic limiter, which uses the dynamic limiting parameter in the loop control parameters as the instantaneous amplitude limit boundary. Peak clipping is performed on the original error signal that exceeds the amplitude limit boundary; The error signal after amplitude limiting is used as the basis for adjusting the reference amplitude of the inner current loop. The amplitude of the reference signal input to the inner current loop is updated in real time according to the aforementioned adjustment criteria.

7. The method as described in claim 1, characterized in that, The operating status data includes the voltage loop output value, inductor current, load current, and output voltage.

8. A PFC power control system based on dual closed-loop control, characterized in that, include: Status monitoring module: used to acquire the operating status commands of the PFC power supply and monitor the operating status data of the dual closed-loop control circuit in the PFC power supply. Trend recognition module: used to identify the overshoot or drop trend of the voltage loop output during the switching process based on the voltage loop output value and load current of the dual closed-loop control circuit in the operating status data. Delay quantization module: used to determine the reference signal of the current inner loop when the PFC power supply performs power correction, and to determine the dynamic response delay of the current inner loop during the operating condition switching process based on the reference signal and the rate of change of the load current. Parameter decision module: Based on the dynamic response delay and the overshoot or drop trend, it performs dynamic amplitude limiting compensation on the error signal output by the voltage loop to generate loop control parameters suitable for the operating condition switching process. Loop execution module: When the operating condition command indicates a change in operating condition, it dynamically adjusts the reference amplitude of the voltage loop output to the current inner loop according to the loop control parameters to control the dynamic power response of the PFC power supply.

9. A computer device comprising a memory and a processor, the memory storing code, characterized in that, The processor is configured to acquire the code and execute the PFC power control method based on dual closed-loop control as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the PFC power control method based on dual closed-loop control as described in any one of claims 1 to 7.

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