Flyback converter and method of controlling the same

Abstract

The application provides a flyback converter and a control method thereof. The flyback converter is provided with a first sampling unit and a second sampling unit to sample inductance current and resonance current of the flyback converter during the turn-on of a first switch tube and a second switch tube respectively, and a control circuit is arranged to receive sampling signals output by the first sampling unit and the second sampling unit through the same sampling pin, and then realize corresponding current control functions according to the received sampling signals. The different types of current sampling operations are performed by using the same pin time multiplexing mode, which ensures the diversity of the functions of the flyback converter, reduces the required pin number, is beneficial to simplifying the system structure and reducing the system cost.

Description

Technical Field

[0001] This application relates to the field of switching power supply technology, specifically to a flyback converter and its control method. Background Technology

[0002] With the rapid development of power electronics technology, people have increasingly higher requirements for the small size, high efficiency, and high reliability of switching converters. Flyback converters are widely used in low-power switching power supplies due to their simple topology, fewer components, and low cost. However, the hard switching of the primary-side switching transistors in ordinary flyback converters and the inability to recover leakage inductance energy result in significant losses, thus limiting the efficiency and size of small and medium power converters.

[0003] Compared with conventional PWM or quasi-resonant flyback converters, the asymmetric half-bridge converter (AHB) has lower voltage stress and can utilize the energy of leakage inductance to achieve zero-voltage turn-on of the switching transistors, realizing the recovery of leakage inductance energy and high efficiency. It is also easy to achieve self-driven synchronous rectification, effectively improving efficiency while reducing transformer size, making it a better application solution.

[0004] How to simplify the structure of the asymmetric half-bridge flyback converter while enabling it to achieve more functions is an important direction for the development of asymmetric half-bridge flyback converters. Summary of the Invention

[0005] In view of the above-mentioned technical problems, the purpose of this application is to provide a flyback converter and its control method, wherein different types of current sampling and detection are implemented using the same control circuit pin. By using the pin time-division multiplexing method, the functional diversity of the flyback converter is ensured while reducing the number of required pins, which helps to simplify the system structure and reduce the system cost.

[0006] According to a first aspect of this application, a flyback converter is provided, comprising:

[0007] A transformer has a primary winding and a secondary winding;

[0008] The first and second switching transistors are connected in series between the input terminal and the reference ground;

[0009] The first inductor and the resonant capacitor are connected to the primary winding and the second switching transistor to form a resonant circuit;

[0010] The first sampling unit is used to sample the current flowing through the first inductor during the turn-on period of the first switch to generate a first sampling signal;

[0011] The second sampling unit is used to sample the resonant current in the resonant circuit during the turn-on period of the second switch to generate a second sampling signal;

[0012] The control circuit receives the first sampling signal and the second sampling signal through the same sampling pin, and generates control signals for the first switching transistor and the second switching transistor based on the first sampling signal and the second sampling signal.

[0013] The control circuit determines the turn-off time of the first switch based on the first sampling signal, and the control circuit suppresses the peak current of the flyback converter based on the second sampling signal.

[0014] Optionally, the control circuit includes:

[0015] The first comparison circuit has a first input terminal connected to the sampling pin of the control circuit and a second input terminal receiving a first threshold signal. The first comparison circuit is used to output a first shutdown trigger signal to trigger the shutdown of the first switch when the first sampling signal received through the sampling pin is greater than the first threshold signal during the turn-on period of the first switch.

[0016] The second comparison circuit has a first input terminal connected to the sampling pin of the control circuit and a second input terminal receiving a second threshold signal. The second comparison circuit is used to output an overcurrent protection signal during the second switch's turn-on period when the second sampling signal received through the sampling pin is greater than the second threshold signal, thereby triggering the turn-off of the second switch.

[0017] Optionally, the flyback converter further includes:

[0018] A small signal blocking circuit is connected between the output terminals of the first sampling unit and the second sampling unit and the sampling pin. The small signal blocking circuit receives the first sampling signal and the second sampling signal respectively, and is used to block the transmission path of the relatively smaller signal in the first sampling signal and the second sampling signal to the sampling pin, so that the sampling pin can effectively receive the relatively larger signal in the first sampling signal and the second sampling signal.

[0019] Optionally, the small signal blocking circuit includes:

[0020] A first diode or a first RC filter structure connected between the output terminal of the first sampling unit and the sampling pin;

[0021] A second diode or a second RC filter structure connected between the output terminal of the second sampling unit and the sampling pin;

[0022] Wherein, when the small signal blocking circuit includes a first diode, the anode of the first diode is connected to the output terminal of the first sampling unit, and the cathode of the first diode is connected to the sampling pin;

[0023] When the small signal blocking circuit includes a second diode, the anode of the second diode is connected to the output terminal of the second sampling unit, and the cathode of the second diode is connected to the sampling pin.

[0024] Optionally, the flyback converter further includes:

[0025] At least one of a first selection switch and a second selection switch integrated inside the control circuit;

[0026] The first selection switch is connected between the first input terminal of the first comparator circuit and the sampling pin, and the first selection switch is controlled by the control signal of the first switch transistor to connect the signal transmission path between the first input terminal of the first comparator circuit and the sampling pin during the turn-on period of the first switch transistor; or, the first selection switch is connected between the output terminal of the first comparator circuit and the subsequent circuit, and the first selection switch is controlled by the control signal of the first switch transistor to connect the signal transmission path between the output terminal of the first comparator circuit and the subsequent circuit during the turn-on period of the first switch transistor.

[0027] The second selection switch is connected between the first input terminal of the second comparator circuit and the sampling pin, and the second selection switch is controlled by the control signal of the second switch transistor to connect the signal transmission path between the first input terminal of the second comparator circuit and the sampling pin during the turn-on period of the second switch transistor; or, the second selection switch is connected between the output terminal of the second comparator circuit and the subsequent circuit, and the second selection switch is controlled by the control signal of the second switch transistor to connect the signal transmission path between the output terminal of the second comparator circuit and the subsequent circuit during the turn-on period of the second switch transistor.

[0028] Optionally, the small signal blocking circuit includes:

[0029] At least one of the third and fourth selector switches;

[0030] The third selection switch is connected between the output terminal of the first sampling unit and the sampling pin, and the third selection switch is controlled by the control signal of the first switching transistor to connect the signal transmission path between the output terminal of the first sampling unit and the sampling pin during the period when the first switching transistor is turned on;

[0031] The fourth selection switch is connected between the output terminal of the second sampling unit and the sampling pin, and the second selection switch is controlled by the control signal of the second switching transistor to connect the signal transmission path between the output terminal of the second sampling unit and the sampling pin during the period when the second switching transistor is turned on.

[0032] Optionally, the first sampling unit includes:

[0033] A first sampling resistor is connected in series with the first and second switching transistors, and one end of the first sampling resistor is connected to a reference ground.

[0034] Optionally, the first sampling unit further includes:

[0035] The filter unit has its input terminal connected to the reference ground through the first sampling resistor, and its output terminal outputs the first sampled signal.

[0036] Optionally, when the first sampled signal and the second sampled signal are in phase, the flyback converter further includes:

[0037] An inverting circuit is connected between the output terminal of the second sampling unit and the anode of the second diode to invert the second sampling signal in order to distinguish between the first sampling signal and the second sampling signal.

[0038] Optionally, when the first sampled signal and the second sampled signal are in phase, the flyback converter further includes:

[0039] An inverting circuit is connected between the output of the second sampling unit and the fourth selection switch, or between the sampling pin and the first input of the second comparison circuit, to invert the second sampling signal so as to distinguish between the first sampling signal and the second sampling signal.

[0040] Optionally, one of the first diode and the second diode can be replaced with an RC filter structure.

[0041] Optionally, the first end of the resonant capacitor is connected to the static node in the flyback converter, and the second end of the resonant capacitor is connected to the second sampling unit. The static node includes any one of the following: a node connected to the input voltage terminal, a node connected to the primary side reference ground, and a node connected to the output terminal of the first sampling unit.

[0042] The second sampling unit includes:

[0043] The shunt capacitor and the second sampling resistor are connected in series between the second terminal of the resonant capacitor and the reference ground. The second sampling unit outputs the voltage at the common connection node of the shunt capacitor and the second sampling resistor as the second sampling signal.

[0044] Optionally, the second sampling unit is connected between the first and second ends of the resonant capacitor, and the first end of the resonant capacitor is connected to the dynamic node in the flyback converter, the dynamic node including the common connection node of the first switch and the second switch;

[0045] The second sampling unit includes:

[0046] The shunt capacitor and the second sampling resistor are connected in series between the second and first terminals of the resonant capacitor.

[0047] The differential sampling unit is used to differentially sample the voltage across the second sampling resistor, and the second sampling unit outputs the voltage at the output terminal of the differential sampling unit as the second sampling signal.

[0048] According to a second aspect of this application, a control method for a flyback converter is provided. The flyback converter includes: a first switch and a second switch forming a half-bridge, a first inductor, a resonant capacitor, and a primary winding of a transformer forming a resonant circuit with the second switch, as well as a first sampling unit, a second sampling unit, and a control circuit. The control method includes:

[0049] During the turn-on period of the first switch, the current flowing through the first inductor is sampled to generate a first sampling signal;

[0050] During the turn-on period of the second switch, the resonant current in the resonant circuit is sampled to generate a second sampling signal;

[0051] The control circuit receives the first sampling signal and the second sampling signal using the same sampling pin, and generates control signals for the first and second switching transistors based on the first and second sampling signals.

[0052] The first sampling signal is used to determine the turn-off time of the first switch, and the second sampling signal is used to suppress the spike current of the flyback converter.

[0053] The beneficial effects of this application include at least the following:

[0054] The flyback converter and its control method provided in this application include a first sampling unit and a second sampling unit in the flyback converter to sample the inductor current and resonant current of the flyback converter during the turn-on periods of the first and second switching transistors, respectively. A control circuit receives the sampling signals output by the first and second sampling units through the same sampling pin, and then implements corresponding current control functions based on the received sampling signals in a time-division manner. Compared with traditional solutions, this application's solution reuses a single pin of the control circuit to transmit different types of current sampling signals to the control circuit, ensuring the functional diversity of the flyback converter while reducing the number of pins required for the corresponding chip in the control circuit, thus simplifying the system structure and reducing system cost.

[0055] It should be noted that the above general description and the following detailed description are merely exemplary and explanatory, and do not limit this application. Attached Figure Description

[0056] Figure 1a A schematic diagram of an existing asymmetric half-bridge flyback converter is shown.

[0057] Figure 1b A schematic diagram of another existing asymmetric half-bridge flyback converter is shown.

[0058] Figure 2 This diagram shows a structural schematic of a flyback converter according to a first embodiment of this application;

[0059] Figure 3 A schematic diagram of the structure of a flyback converter according to a second embodiment of this application is shown;

[0060] Figure 4 This diagram illustrates the structure of a flyback converter according to a third embodiment of this application.

[0061] Figure 5 A schematic diagram of the structure of a flyback converter according to the fourth embodiment of this application is shown;

[0062] Figure 6 A schematic diagram of the structure of a flyback converter according to the fifth embodiment of this application is shown;

[0063] Figure 7 A schematic diagram of the structure of a flyback converter according to the sixth embodiment of this application is shown;

[0064] Figure 8 The following is a schematic diagram showing the timing waveforms of some signals of the flyback converter in various embodiments of this application;

[0065] Figure 9A flowchart illustrating the control method for a flyback converter according to an embodiment of this application is shown. Detailed Implementation

[0066] The preferred embodiments of this disclosure are described in detail below with reference to the accompanying drawings, but this disclosure is not limited to these embodiments. This disclosure covers any alternatives, modifications, equivalent methods, and solutions made within the spirit and scope of this disclosure.

[0067] In order to provide the public with a thorough understanding of this disclosure, specific details are described in detail in the following preferred embodiments of this disclosure, but those skilled in the art can fully understand this disclosure without these details.

[0068] The present disclosure is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise scales, and are only used to facilitate and clarify the illustration of the embodiments of the present disclosure.

[0069] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application may be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0070] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0071] In the description of this application, words such as "exemplary" or "for example" are used to indicate that they are examples, illustrations, or descriptions. Any embodiment described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments. The term "and / or" in this document describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. "Multiple" refers to two or more. Furthermore, to facilitate a clear description of the technical solutions of the embodiments of this application, the terms "first," "second," etc., are used to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first," "second," etc., do not limit the quantity or execution order, and that "first," "second," etc., do not necessarily imply differences.

[0072] In addition, the same reference numerals in the figures indicate the same or similar structures, so repeated descriptions of them will be omitted. That is, the various parts in this specification are described in a combination of parallel and progressive manner. Each part focuses on the differences from other parts, and the same or similar parts between the various parts can be referred to each other.

[0073] Figure 1a and Figure 1b The circuit structures of two existing asymmetric half-bridge flyback converters are shown respectively, such as Figure 1a and 1b As shown, where Figure 1a In this circuit, switch Q2 is the upper switch and switch Q1 is the lower switch; Figure 1b In the middle switch, Q1 is the upper switch, and Q2 is the lower switch. Figure 1a and Figure 1b The two circuits operate on essentially the same principle, differing only in the connection method between the transformer TR and the switching transistor. For example, in... Figure 1a In the circuit, the same-name terminal of the primary winding Np is connected to the drain of the upper switching transistor Q2 via the first inductor Lm, and the opposite-name terminal of the primary winding Np is connected to the source of the upper switching transistor Q2 via the resonant capacitor Cr; while... Figure 1b In the circuit, the same-name terminal of the primary winding Np is connected to the drain of the lower switching transistor Q2 through the first inductor Lm, and the opposite-name terminal of the primary winding Np is connected to the source of the lower switching transistor Q2 through the resonant capacitor Cr.

[0074] Figures 2 to 6 Schematic diagrams of the flyback converters provided in different embodiments of this application are shown respectively. Figures 2 to 6The application of this invention in asymmetric half-bridge flyback converters is only listed in part. However, it is understood that this invention can be applied not only to asymmetric half-bridge flyback converters, but also to other types of flyback converters such as active clamp flyback converters, and the principle is basically the same.

[0075] refer to Figures 2 to 6 The flyback converter 100 provided in this application includes: a transformer TR containing a primary winding Np and a secondary winding Ns, a first switch Q1 (corresponding to the main switch in the flyback converter 100, hereinafter referred to as switch Q1), a second switch Q2 (corresponding to the auxiliary switch in the flyback converter, hereinafter referred to as switch Q2), a resonant capacitor Cr, a rectifier diode (such as a diode) D1, an output capacitor Co, a first sampling unit, a second sampling unit 30, and a control circuit 10.

[0076] Switches Q1 and Q2 are connected in series between the input voltage terminal and the primary-side reference ground. The gates of both switches Q1 and Q2 are connected to control circuit 10. Capacitors C1 and C2 are the junction capacitances of switches Q1 and Q2, respectively. During the same switching cycle, switches Q1 and Q2 are turned on in a time-division manner to transfer the input voltage Vin from the primary side to the secondary side of the flyback converter. In one possible embodiment, switches Q1 and Q2 are both NMOS field-effect transistors or GA devices. Figure 3 , Figure 4 and Figure 5 In the illustrated embodiment, switch Q1 is the upper switch and switch Q2 is the lower switch. Specifically, the first transmission terminal (e.g., drain) of switch Q1 is connected to the input voltage terminal, which receives the input voltage Vin. The first transmission terminal (e.g., drain) of switch Q2 is connected to the second transmission terminal (e.g., source) of switch Q1, and the second transmission terminal (e.g., source) of switch Q2 is connected to the primary-side reference ground through a sampling resistor Rcs. Figure 2 and Figure 6 In the embodiment shown, switch Q2 is the upper switch and switch Q1 is the lower switch. That is, the first transmission terminal (such as the drain) of switch Q2 is connected to the input voltage terminal, which receives the input voltage Vin. The first transmission terminal (such as the drain) of switch Q1 is connected to the second transmission terminal (such as the source) of switch Q2. The second transmission terminal (such as the source) of switch Q1 is connected to the primary side reference ground through the sampling resistor Rcs.

[0077] The magnetizing inductance and leakage inductance of the primary winding Np are equivalent to inductances Lm and Lk, respectively, and together with the resonant capacitor Cr and the switching transistor Q2, they form a resonant circuit when the switching transistor Q2 is turned on. Figures 2 to 8Although no example of inductor Lk is given, the application of inductors Lm and Lk is prior art and does not affect the understanding of the technical solution of this application.

[0078] In the secondary side of the flyback converter 100, the anode of rectifier diode D1 is connected to the secondary winding Ns, and the cathode of rectifier diode D1 is connected to the output terminal of the flyback converter. The positive terminal of the output capacitor Co is connected to the output terminal of the flyback converter, and the negative terminal of the output capacitor Co is connected to the secondary reference ground. Simultaneously, the corresponding terminal of the secondary winding Ns is also connected to the secondary reference ground. Furthermore, the output terminal of the flyback converter is connected to a load, which receives the electrical energy (e.g., voltage and current) converted by the flyback converter. In some other embodiments, rectifier diode D1 may also be configured to be coupled to the secondary reference ground.

[0079] The first sampling unit is used to sample the current flowing through the inductor Lm during the turn-on period of the switch Q1, generating a first sampling signal Vcs. Specifically, the first sampling unit samples the voltage across the sampling resistor Rcs during the turn-on period of the switch Q1 to obtain the first sampling signal Vcs characterizing the current flowing through the inductor Lm. The sampling resistor Rcs is connected in series with the switches Q1 and Q2, and the second end of the sampling resistor Rcs is connected to the primary-side reference ground. Further preferably, the output of the first sampling unit is also provided with a filtering unit, such as an RC filter unit. The input of the filter unit is connected to the output of the first sampling unit (i.e., the first end of the sampling resistor Rcs), and the filter unit is used to filter the first sampling signal Vcs before outputting it.

[0080] The second sampling unit 30 is used to sample the resonant current in the resonant circuit during the turn-on period of the switch Q2 to generate a second sampling signal Vsense. Specifically, the second sampling unit 30 samples the voltage across the resonant capacitor Cr during the turn-on period of the switch Q2 to obtain the generated second sampling signal Vsense, which characterizes the resonant current in the resonant circuit.

[0081] The control circuit 10 receives a first sampling signal Vcs and a second sampling signal Vsense through the same sampling pin (e.g., the CS pin), and generates control signals Vgs1 and Vgs2 based on the first sampling signal Vcs and the second sampling signal Vsense to drive switching transistors Q1 and Q2 respectively. Specifically, during the turn-on period of switching transistor Q2, the control circuit 10 determines the turn-off time of switching transistor Q1 based on the received first sampling signal Vcs, and during the turn-on period of switching transistor Q2, it suppresses the peak current of the flyback converter based on the received second sampling signal Vsense.

[0082] The control circuit 10 further includes a comparator circuit 110 and a comparator circuit 120. In some embodiments, the first input terminal of the comparator circuit 110 is connected to the sampling pin CS of the control circuit 10, and the second input terminal of the comparator circuit 110 receives a first threshold signal Vref1. The comparator circuit 110 is configured to output a first turn-off trigger signal Voff when the first sampling signal Vcs received through the sampling pin CS is greater than the first threshold signal Vref1 during the turn-on period of the switch Q1, thereby triggering the turn-off of the switch Q1 and determining the turn-off time of the switch Q1. The first input terminal of the comparator circuit 120 is connected to the sampling pin CS of the control circuit 10, and the second input terminal of the comparator circuit 120 receives a second threshold signal Vref2. The comparator circuit 120 is configured to output an overcurrent protection signal OCP when the second sampling signal Vsense received through the sampling pin CS is greater than the second threshold signal Vref2 during the turn-on period of the switch Q2, thereby triggering the turn-off of the switch Q2 and suppressing the spike current of the flyback converter.

[0083] In transient states, such as output short circuits or output voltage regulation in fast charging applications, the voltage across the resonant capacitor Cr will differ significantly from its normal steady-state value N*Vout, where N is the turns ratio of the primary and secondary windings of the transformer TR in the flyback converter, and Vout is the output voltage of the flyback converter. Consequently, when the switching transistor Q1 is turned on, large current spikes will be generated on the primary winding Np and secondary winding Ns of the transformer TR, which can easily pose a significant risk to the power devices and system reliability in the flyback converter. This application sets up a second sampling unit 30 to sample and detect the current signal in the resonant circuit during each switching cycle of the flyback converter, and sets up a comparison circuit 120 to compare the sampling result (i.e., the second sampling signal Vsense) with the corresponding preset threshold. This can effectively detect the moment when a certain large current appears in the circuit during the conduction of the switch Q2 in the flyback converter, thereby taking measures to turn off the switch Q2 in advance (i.e., turn off the switch Q2 when the second sampling signal Vsense is greater than the second threshold signal Vref2). This effectively suppresses the large current spikes caused by load changes in the flyback converter and improves the reliability of the system.

[0084] Furthermore, the flyback converter 100 also includes a small-signal blocking circuit 20, such as... Figures 2-7As shown, the small signal blocking circuit 20 is connected between the output terminals of the first sampling unit and the second sampling unit 30 and the sampling pin CS of the control circuit 10. The small signal blocking circuit 20 receives the first sampling signal Vcs and the second sampling signal Vsense respectively, and is used to block the transmission path of the relatively smaller signal in the first sampling signal Vcs and the second sampling signal Vsense to the sampling pin CS of the control circuit 10. In this way, the influence of the relatively smaller signal in the first sampling signal Vcs and the second sampling signal Vsense on the relatively larger signal can be effectively avoided, so that the sampling pin CS of the control circuit 10 can effectively and accurately receive the relatively larger signal in the first sampling signal Vcs and the second sampling signal Vsense.

[0085] Alternatively, in some embodiments, such as Figure 2 and Figure 3 As shown, the small signal blocking circuit 20 includes diodes D0 and D1. The anode of diode D0 is connected to the output terminal of the first sampling unit (i.e., the first end of the sampling resistor Rcs), and the cathode of diode D0 is connected to the sampling pin CS of the control circuit 10. The anode of diode D1 is connected to the output terminal of the second sampling unit 30, and the cathode of diode D1 is connected to the sampling pin CS of the control circuit 10. By setting diodes D0 and D1, the negative voltage portion of the first sampling signal Vcs and the second sampling signal Vsense can be effectively shielded, enabling the sampling pin CS of the control circuit 10 to accurately receive the correct sampling signal within any time period.

[0086] Alternatively, diodes D0 and / or D1 can be replaced with corresponding RC filter structures. In this case, the outputs of the first sampling unit and / or the second sampling unit 30 will be connected to the sampling pin CS of the control circuit 10 via the corresponding RC filter structure. For example, as Figure 7 As shown, Figure 7 The text shows that... Figure 2 In an embodiment where diode D0 is replaced with the first RC filter structure (including resistor R7 and capacitor C7), and based on the same principle, it is also possible to choose to replace diode D0 with the first RC filter structure (including resistor R7 and capacitor C7). Figure 2 The diode D1 in the filter is replaced with a similar second RC filter structure.

[0087] Further preferably, the flyback converter 100 further includes at least one of a selection switch S1 and a selection switch S2, and the selection switches S1 and S2 are integrated inside the control circuit 10. The selection switch S1 can, for example, be connected between the first input terminal of the comparator circuit 110 and the sampling pin CS of the control circuit 10. In this case, the selection switch S1 is controlled by the control signal Vgs1 of the switching transistor Q1 and connects the signal transmission path between the first input terminal of the comparator circuit 110 and the sampling pin CS of the control circuit 10 during the on-state of the switching transistor Q1. Figure 2 and Figure 3 As shown; or, for example, the selector switch S1 can also be connected between the output of the comparator circuit 110 and the subsequent circuit (not shown). In this case, the selector switch S1 is controlled by the control signal Vgs1 of the switch Q1 and connects the signal transmission path between the output of the comparator circuit 110 and the subsequent circuit during the turn-on period of the switch Q1; the selector switch S2 can be connected between the first input of the comparator circuit 120 and the sampling pin CS of the control circuit 10. In this case, the selector switch S2 is controlled by the control signal Vgs2 of the switch Q2 and connects the signal transmission path between the first input of the comparator circuit 120 and the sampling pin CS of the control circuit 10 during the turn-on period of the switch Q2; or, for example, the selector switch S2 can also be connected between the output of the second comparator circuit 120 and the subsequent circuit (not shown). In this case, the selector switch S2 is controlled by the control signal of the switch Q2 and connects the signal transmission path between the output of the second comparator circuit 120 and the subsequent circuit during the turn-on period of the switch Q2.

[0088] In these embodiments, when the waveforms of the first sampling signal Vcs and the second sampling signal Vsense are in phase during the conduction of the switch Q1, such as Figure 3 As shown, the flyback converter 100 also includes an inverting circuit 31, which is connected between the output terminal of the second sampling unit 30 and the anode of the diode D1. The inverting circuit 31 is used to invert the second sampling signal Vsense in order to distinguish the first sampling signal Vcs and the second sampling signal Vsense, so that the control circuit 10 can obtain the accurate first sampling signal Vcs during the conduction of the switching transistor Q1.

[0089] It should be noted that this application is in Figure 2 and Figure 3 The diagram shows a flyback converter 100 that includes both selection switch S1 and selection switch S2. However, in practical applications, either selection switch S1 or selection switch S2 can be omitted.

[0090] In other embodiments, such as Figure 4 , Figure 5 and Figure 6As shown, the small signal blocking circuit 20 includes at least one of a selection switch S3 and a selection switch S4 disposed outside the control circuit 10. In these embodiments, the selection switch S3 is connected between the output terminal of the first sampling unit and the sampling pin CS of the control circuit 10, and the selection switch S3 is controlled by the control signal Vgs1 of the switching transistor Q1, thus connecting the signal transmission path between the output terminal of the first sampling unit and the sampling pin CS of the control circuit 10 during the on-state of the switching transistor Q1; the selection switch S4 is connected between the output terminal of the second sampling unit 30 and the sampling pin CS of the control circuit 10, and the selection switch S4 is controlled by the control signal Vgs2 of the switching transistor Q2, thus connecting the signal transmission path between the output terminal of the second sampling unit 30 and the sampling pin CS of the control circuit 10 during the on-state of the switching transistor Q2.

[0091] Optionally, in these embodiments, when the waveforms of the first sampling signal Vcs and the second sampling signal Vsense are in phase during the conduction of the switching transistor Q1, the flyback converter 100 further includes an inverting circuit 41, such as... Figure 4 and Figure 6 As shown, the inverting circuit 41 is connected between the sampling pin CS of the control circuit 10 and the first input terminal of the second comparator circuit 120. It is used to invert the received second sampling signal Vsense to distinguish between the first sampling signal Vcs and the second sampling signal Vsense, and to enable the second comparator circuit 120 to determine the moment when the second sampling signal Vsense is greater than the second threshold signal Vref2 based on a comparison of the positive voltage. Furthermore, in some other embodiments, when the inverting circuit 41 is required, it can also be located between the output terminal of the second sampling unit 30 and the selection switch S4.

[0092] It should be noted that this application is in Figure 4 , Figure 5 and Figure 6 The diagram shows the case where the flyback converter 100 includes both selector switch S3 and selector switch S4. However, in practical applications, one of selector switch S3 and selector switch S4 can be omitted.

[0093] In this application, the second sampling unit 30 specifically includes a shunt capacitor Csense and a sampling resistor Rsense connected in series, and the shunt capacitor Csense and the sampling resistor Rsense are connected to at least one end of the resonant capacitor Cr. The second sampling unit 30 obtains the second sampling signal Vsense by sampling the voltage across the sampling resistor Rsense. In different topologies of the flyback converter 100, the second sampling unit 30 has different connection methods relative to the resonant capacitor Cr.

[0094] For example, when the first terminal of the resonant capacitor Cr is connected to a static node in the flyback converter 100 (including any one of node A1 connected to the input voltage terminal, node connected to the primary side reference ground, and node A2 connected to the output terminal of the first sampling unit (i.e., the first terminal of the sampling resistor Rcs) as... Figure 2 , Figure 3 and Figure 4 As shown ( Figure 2 In the process, the first end of the resonant capacitor Cr is connected to node A1, and node A1 is connected to the input voltage terminal in the flyback converter 100. Figure 3 and Figure 4 In the process, the first end of the resonant capacitor Cr is connected to node A2, and node A2 is connected to the first end of the sampling resistor Rcs in the flyback converter 100. The second sampling unit 30 is connected between the second end of the resonant capacitor Cr and the primary side reference ground. Specifically, the shunt capacitor Csense and the sampling resistor Rsense are connected in series between the second end of the resonant capacitor Cr and the primary side reference ground. At this time, the second sampling unit 30 outputs the voltage at the common connection node of the shunt capacitor Csense and the sampling resistor Rsense as the second sampling signal Vsense.

[0095] When the first terminal of the resonant capacitor Cr is connected to the dynamic node in the flyback converter 100 (including the common connection node SW of switches Q1 and Q2), as follows: Figure 5 and Figure 6 As shown, the second sampling unit 30 is connected between the first and second ends of the resonant capacitor Cr. Specifically, the shunt capacitor Csense and the sampling resistor Rsense are connected in series between the second and first ends of the resonant capacitor Cr. At this time, the second sampling unit 30 also includes a differential sampling unit 51. The differential sampling unit 51 is used to differentially sample the voltage across the sampling resistor Rsense, and the second sampling unit 30 outputs the voltage at the output end of the differential sampling unit 51 as the second sampling signal Vsense.

[0096] by Figure 2 Taking the flyback converter 100 shown as an example, during operation, refer to Figure 8 During the period when the switching transistor Q1 is turned on, i.e., during the high level period of the control signal Vgs1, the signal received at the sampling pin CS of the control circuit 10 is the inductor current i sampled by the first sampling unit. Lm The first sampling signal Vcs; during the turn-on period of switch Q2, i.e., during the high level period of control signal Vgs2, the signal received at the sampling pin CS of control circuit 10 is the characterization current i sampled by the second sampling unit 30. LK The second sampled signal Vsense.

[0097] It is understood that in this application, the sampling pin CS of the control circuit 10 receives the second sampling signal Vsense, which characterizes the resonant current, and the signal i, which characterizes the inductor current. Lm The first sampling signal Vcs is equivalent to using the same pin of the control circuit 10 to realize time-division sampling and detection of different types of current signals. By using this pin multiplexing method, the number of pins required by the corresponding chip of the control circuit can be reduced while ensuring the functional diversity of the flyback converter, which is conducive to simplifying the system structure and reducing the system cost.

[0098] Furthermore, this application sets up a first sampling unit and a second sampling unit 30 in the flyback converter to sample and detect the inductor current and resonant current respectively based on their respective sampling resistors. Thus, by adjusting the resistance values ​​of the sampling resistors of the first sampling unit and the second sampling unit 30, the peak current sampling threshold (i.e., the first threshold signal) and the overcurrent protection threshold (i.e., the second threshold signal) can be adjusted independently, making the control more flexible.

[0099] Furthermore, the present invention also discloses a control method for a flyback converter. This control method can be applied to the flyback converter 100 shown in any embodiment of this application, and can also be applied to other types of flyback converters such as active clamp flyback converters. Specifically, as... Figure 9 As shown, the control method includes performing the following steps:

[0100] Step 910: Sample the current flowing through the first inductor during the turn-on period of the first switch to generate a first sampling signal;

[0101] Step 920: During the turn-on period of the second switch, the resonant current in the resonant circuit is sampled to generate a second sampling signal;

[0102] Step 930: Receive the first sampling signal and the second sampling signal using the same sampling pin of the control circuit, and generate control signals for the first switch and the second switch based on the first sampling signal and the second sampling signal. The first sampling signal is used to determine the turn-off time of the first switch, and the second sampling signal is used to suppress the spike current of the flyback converter.

[0103] In practice, the specific implementation of each step in the control method of the flyback converter described above and the technical effects that can be achieved after implementation can be found in the relevant content of the flyback converter described in the foregoing embodiments, and will not be repeated here.

[0104] In summary, this application samples the current in the resonant circuit by detecting the voltage across the resonant capacitor and compares the second sampling signal characterizing the current in the resonant circuit with the corresponding threshold signal. This effectively detects the moment when a large current flows during the turn-on of the second switch, allowing for early turn-off measures. This effectively suppresses large current spikes caused by the significant difference between the voltage across the resonant capacitor and N*Vout, improving system reliability. Simultaneously, the control circuit receives the second sampling signal characterizing the resonant current and the inductor current i through a multiplexed CS pin. Lm The first sampling signal simplifies the control method of the flyback converter. At the same time, the solution of this application can also independently adjust the peak current sampling threshold (i.e., the first threshold signal) and the overcurrent protection threshold (i.e., the second threshold signal) through external parameters, making the control more flexible.

[0105] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating this application and are not intended to limit the implementation. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A flyback converter, comprising: A transformer has a primary winding and a secondary winding; The first and second switching transistors are connected in series between the input terminal and the reference ground; The first inductor and resonant capacitor are connected to the primary winding and the second switching transistor to form a resonant circuit; The first sampling unit is used to sample the current flowing through the first inductor during the turn-on period of the first switch to generate a first sampling signal; The second sampling unit is used to sample the resonant current in the resonant circuit during the turn-on period of the second switch to generate a second sampling signal; The control circuit receives the first sampling signal and the second sampling signal through the same sampling pin, and generates control signals for the first switching transistor and the second switching transistor based on the first sampling signal and the second sampling signal. The control circuit determines the turn-off time of the first switch based on the first sampling signal, and the control circuit suppresses the peak current of the flyback converter based on the second sampling signal.

2. The flyback converter according to claim 1, wherein, The control circuit includes: The first comparison circuit has a first input terminal connected to the sampling pin of the control circuit and a second input terminal receiving a first threshold signal. The first comparison circuit is used to output a first shutdown trigger signal to trigger the shutdown of the first switch when the first sampling signal received through the sampling pin is greater than the first threshold signal during the turn-on period of the first switch. The second comparison circuit has a first input terminal connected to the sampling pin of the control circuit and a second input terminal receiving a second threshold signal. The second comparison circuit is used to output an overcurrent protection signal during the second switch's turn-on period when the second sampling signal received through the sampling pin is greater than the second threshold signal, thereby triggering the turn-off of the second switch.

3. The flyback converter according to claim 2, wherein, The flyback converter also includes: A small signal blocking circuit is connected between the output terminals of the first sampling unit and the second sampling unit and the sampling pin. The small signal blocking circuit receives the first sampling signal and the second sampling signal respectively, and is used to block the transmission path of the relatively smaller signal in the first sampling signal and the second sampling signal to the sampling pin, so that the sampling pin can effectively receive the relatively larger signal in the first sampling signal and the second sampling signal.

4. The flyback converter according to claim 3, wherein, The small signal blocking circuit includes: A first diode or a first RC filter structure connected between the output terminal of the first sampling unit and the sampling pin; A second diode or a second RC filter structure connected between the output terminal of the second sampling unit and the sampling pin; Wherein, when the small signal blocking circuit includes a first diode, the anode of the first diode is connected to the output terminal of the first sampling unit, and the cathode of the first diode is connected to the sampling pin; When the small signal blocking circuit includes a second diode, the anode of the second diode is connected to the output terminal of the second sampling unit, and the cathode of the second diode is connected to the sampling pin.

5. The flyback converter according to claim 4, wherein, The flyback converter also includes: At least one of a first selection switch and a second selection switch integrated inside the control circuit; The first selection switch is connected between the first input terminal of the first comparator circuit and the sampling pin, and the first selection switch is controlled by the control signal of the first switch transistor to connect the signal transmission path between the first input terminal of the first comparator circuit and the sampling pin during the turn-on period of the first switch transistor; or, the first selection switch is connected between the output terminal of the first comparator circuit and the subsequent circuit, and the first selection switch is controlled by the control signal of the first switch transistor to connect the signal transmission path between the output terminal of the first comparator circuit and the subsequent circuit during the turn-on period of the first switch transistor. The second selection switch is connected between the first input terminal of the second comparator circuit and the sampling pin, and the second selection switch is controlled by the control signal of the second switch transistor to connect the signal transmission path between the first input terminal of the second comparator circuit and the sampling pin during the turn-on period of the second switch transistor; or, the second selection switch is connected between the output terminal of the second comparator circuit and the subsequent circuit, and the second selection switch is controlled by the control signal of the second switch transistor to connect the signal transmission path between the output terminal of the second comparator circuit and the subsequent circuit during the turn-on period of the second switch transistor.

6. The flyback converter according to claim 3, wherein, The small signal blocking circuit includes: At least one of the third and fourth selector switches; The third selection switch is connected between the output terminal of the first sampling unit and the sampling pin, and the third selection switch is controlled by the control signal of the first switching transistor to connect the signal transmission path between the output terminal of the first sampling unit and the sampling pin during the period when the first switching transistor is turned on; The fourth selection switch is connected between the output terminal of the second sampling unit and the sampling pin, and the second selection switch is controlled by the control signal of the second switching transistor to connect the signal transmission path between the output terminal of the second sampling unit and the sampling pin during the period when the second switching transistor is turned on.

7. The flyback converter according to claim 4, wherein, When the first sampled signal and the second sampled signal are in phase, the flyback converter further includes: An inverting circuit is connected between the output terminal of the second sampling unit and the anode of the second diode to invert the second sampling signal in order to distinguish between the first sampling signal and the second sampling signal.

8. The flyback converter according to claim 6, wherein, When the first sampled signal and the second sampled signal are in phase, the flyback converter further includes: An inverting circuit is connected between the output of the second sampling unit and the fourth selection switch, or between the sampling pin and the first input of the second comparison circuit, to invert the second sampling signal so as to distinguish between the first sampling signal and the second sampling signal.

9. The flyback converter according to any one of claims 1-8, wherein, The first end of the resonant capacitor is connected to the static node in the flyback converter, and the second end of the resonant capacitor is connected to the second sampling unit. The static node includes any one of the following: a node connected to the input voltage terminal, a node connected to the primary side reference ground, and a node connected to the output terminal of the first sampling unit. The second sampling unit includes: The shunt capacitor and the second sampling resistor are connected in series between the second terminal of the resonant capacitor and the reference ground. The second sampling unit outputs the voltage at the common connection node of the shunt capacitor and the second sampling resistor as the second sampling signal.

10. The flyback converter according to any one of claims 1-8, wherein, The second sampling unit is connected between the first and second ends of the resonant capacitor, and the first end of the resonant capacitor is connected to the dynamic node in the flyback converter. The dynamic node includes the common connection node of the first switch and the second switch. The second sampling unit includes: The shunt capacitor and the second sampling resistor are connected in series between the second and first terminals of the resonant capacitor. The differential sampling unit is used to differentially sample the voltage across the second sampling resistor, and the second sampling unit outputs the voltage at the output terminal of the differential sampling unit as the second sampling signal.

11. A control method for a flyback converter, the flyback converter comprising: The control method comprises a first and a second switching transistor constituting a half-bridge, a first inductor and a resonant capacitor forming a resonant circuit with the second switching transistor, the primary winding of a transformer, a first sampling unit, a second sampling unit, and a control circuit, wherein the control method includes: During the turn-on period of the first switch, the current flowing through the first inductor is sampled to generate a first sampling signal; During the turn-on period of the second switch, the resonant current in the resonant circuit is sampled to generate a second sampling signal; The control circuit receives the first sampling signal and the second sampling signal using the same sampling pin, and generates control signals for the first and second switching transistors based on the first and second sampling signals. The first sampling signal is used to determine the turn-off time of the first switch, and the second sampling signal is used to suppress the peak current of the flyback converter.

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