Method for manufacturing a printed circuit board for power supply control of large functions

Abstract

This invention proposes a method for fabricating a printed circuit board for high-function power control. The method involves anodizing a thick copper foil insulating substrate in an electrolyte to generate a reversible protective film; covering the protective film with an aluminum sacrificial layer; sequentially etching the aluminum and copper layers after pattern transfer, utilizing the difference in etching selectivity between aluminum and copper to achieve self-stopping etching, forming thick copper lines with vertical sidewalls; coating and curing a solder resist ink containing self-healing microcapsules while retaining the aluminum sacrificial layer; and restoring the reversible protective film after peeling off the aluminum sacrificial layer to expose the original copper surface. This invention achieves full-process scratch protection through the synergistic effect of the reversible protective film and the aluminum sacrificial layer; achieves high-precision etching of thick copper lines using the difference in aluminum / copper selectivity; and significantly improves line accuracy, solder bridge integrity, and product reliability by combining with a self-healing solder resist layer. It is suitable for mass production of power control boards with high-thickness copper and ultra-fine lines.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, and in particular to a method for preparing a printed circuit board for high-function power control. Background Technology

[0002] Printed circuit boards (PCBs) for high-power control are core components of power electronic devices, widely used in new energy vehicles, industrial power supplies, aerospace, and other fields. As the power density of equipment continues to increase, higher demands are placed on the current-carrying capacity and integration of PCBs: on the one hand, copper foil thickness needs to be increased (above 3 oz) to meet the high current carrying capacity requirements; on the other hand, fine lines at the 0.2mm level and solder mask bridges at the 5.5mil level are needed to meet the high-density integration requirements. However, the contradiction between thick copper and fine lines has become a core technological bottleneck restricting the manufacturing of this type of PCB.

[0003] In existing technologies, the fabrication of thick copper PCBs mainly faces the following technical challenges: First, thick copper etching suffers from severe side etching, making it difficult to form fine lines. During the etching process of thick copper foil (≥3OZ), the isotropic chemical reaction between the etching solution and copper leads to severe side etching on the sidewalls of the lines. Existing technologies mainly mitigate side etching by adjusting etching parameters (such as reducing the etching rate and increasing the etching solution concentration), but the effect is limited. The side etching amount is usually between 12-18μm, resulting in an actual linewidth tolerance of ±15μm or more for 0.2mm IC fine lines, a high risk of short circuits between lines, and a low yield. This "passive parameter adjustment" approach cannot fundamentally solve the side etching problem.

[0004] Secondly, matte blackboards are extremely prone to scratching, and traditional protection methods are inefficient. Due to their low surface roughness and hardness, matte blackboards are highly susceptible to scratches during processes such as lamination, drilling, electroplating, solder resist application, and molding. Existing technologies employ a full-process physical isolation method—separating each board with white paper, manual handling, and manual joining—in an attempt to reduce scratches. However, this method is not only inefficient (adding more than eight isolation steps) but also fails to eliminate the scratching problem, with a scratch defect rate typically exceeding 8.5%. This "passive protection" approach increases labor costs and process complexity, but its effectiveness is poor.

[0005] Third, fine-pitch solder mask bridges are difficult to manufacture, resulting in a persistently high failure rate. For solder mask bridges between 0.2mm IC pins, the design width is typically only 5.5mil. Existing technologies attempt to ensure solder mask bridge formation by compensating for film, controlling ink viscosity, and adjusting exposure energy. However, due to the inherent precision limitations of screen printing and exposure processes, the solder mask bridge integrity rate is only 85-92%, with a bridging defect rate as high as 5-10%. When the design width is further reduced, the yield rate drops sharply to around 70%. This "fine-tuning of process parameters" approach is insufficient to overcome the manufacturing bottleneck of fine-pitch solder mask bridges.

[0006] Fourth, thick copper plates suffer from poor thermal reliability and insufficient temperature cycling life. During welding and use, the mismatch in the coefficient of thermal expansion (CTE) between the copper layer and the insulating substrate is more pronounced in thick copper plates, leading to frequent problems such as circuit cracking, solder joint fatigue, and solder resist peeling under thermal shock and temperature cycling conditions. Current technologies mainly rely on the material's inherent properties (such as selecting high Tg substrates) to address these issues, but they cannot actively absorb or buffer thermal stress. The temperature cycling life is typically only around 500 cycles (under conditions of -40℃ to 125℃), which is insufficient to meet the demands of demanding applications such as automotive electronics and aerospace.

[0007] Fifth, the solder mask layer cannot be repaired after cracking, posing a potential reliability risk. During use, the solder mask layer may develop microcracks due to mechanical impact or thermal stress. Once cracked, the cracks will gradually propagate, eventually leading to circuit exposure, corrosion, or short circuits. Existing solder mask layers do not have self-healing capabilities; once cracks appear, it means a decrease in product reliability or even failure.

[0008] In summary, existing technologies have significant shortcomings in addressing the conflict between thick copper and fine traces, preventing scratches on matte black surfaces, fabricating fine-pitch solder mask bridges, and improving thermal reliability. Furthermore, the improvement measures for each process are independent and lack synergy. Therefore, a novel PCB fabrication method that can systematically solve these problems is urgently needed. Summary of the Invention

[0009] In view of the above, the main objective of this invention is to provide a method for manufacturing a printed circuit board for high-function power control, so as to solve the above-mentioned technical problems.

[0010] This invention proposes a method for fabricating a printed circuit board for high-function power control, the method comprising the following steps: Step 1, Reversible protective film formation step: Place the insulating substrate with thick copper foil in the electrolyte, use the thick copper foil as the anode, apply the first voltage, and generate a reversible protective film in situ on the surface of the thick copper foil to obtain an oxide film copper substrate. Step 2, Aluminum sacrificial layer covering step: An aluminum sacrificial layer is covered on the surface of the reversible protective film of the oxide film copper substrate to obtain an aluminum oxide film substrate; Step 3, Pattern Transfer Step: An etch-resistant layer is formed on the surface of the aluminum sacrificial layer of the aluminum oxide film substrate. The substrate is exposed and developed according to the preset circuit pattern to expose the aluminum sacrificial layer in the area to be removed, thus obtaining the etch-resistant pattern substrate. Step 4, Aluminum layer etching step: Selectively remove the aluminum sacrificial layer in the exposed area of ​​the resist pattern substrate using aluminum etching solution, so that the corresponding reversible protective film and thick copper foil underneath are exposed, and an aluminum mask substrate is obtained. Step 5, Copper layer etching step: The thick copper foil exposed on the aluminum mask substrate is etched with copper etching solution to form a thick copper circuit layer, and the aluminum mask circuit board is obtained. The aluminum sacrificial layer that is not removed serves as an etching mask, protecting the corresponding thick copper circuit area below during the etching process. Due to the difference in selectivity between aluminum and copper in the copper etching solution, the etching reaction automatically slows down or stops when it reaches the sidewall of the aluminum sacrificial layer, forming a thick copper circuit with vertical sidewalls. Step 6, Solder resist layer formation step: While retaining the aluminum sacrificial layer, a solder resist ink containing self-healing microcapsules is coated on the surface of the aluminum mask circuit board. After exposure and development, a solder resist layer is formed, and the solder resist layer is heated and cured to obtain a solder resist cured circuit board. Step 7, Aluminum sacrificial layer stripping step: Selectively remove the aluminum sacrificial layer of the solder resist-cured circuit board using aluminum stripping liquid to expose the underlying reversible protective film, resulting in an oxide film-protected circuit board. Step 8, Reversible Protective Film Reduction Step: Place the oxide-protected circuit board in the reducing electrolyte, use the thick copper circuit layer as the cathode, apply a second voltage, and reduce the reversible protective film to metallic copper, exposing the original copper surface to obtain the finished circuit board (high-thickness copper, ultra-fine circuit PCB).

[0011] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. This invention involves anodizing a thick copper foil insulating substrate in an electrolyte to generate a reversible protective film; covering the protective film with an aluminum sacrificial layer; sequentially etching the aluminum and copper layers after pattern transfer, utilizing the difference in etching selectivity between aluminum and copper to achieve self-stopping etching, forming thick copper circuits with vertical sidewalls; coating and curing solder resist ink containing self-healing microcapsules while retaining the aluminum sacrificial layer; and restoring the reversible protective film after peeling off the aluminum sacrificial layer to expose the original copper surface. This invention achieves full-process anti-scratch protection through the synergistic effect of the reversible protective film and the aluminum sacrificial layer; achieves high-precision etching of thick copper circuits by utilizing the difference in aluminum / copper selectivity; and significantly improves circuit accuracy, solder bridge integrity, and product reliability by combining with a self-healing solder resist layer. It is suitable for mass production of power control boards with high-thickness copper and ultra-fine circuitry.

[0012] 2. This invention achieves a "self-stopping etching" effect through the synergistic effect of an aluminum sacrificial layer mask and a high-selectivity etchant. During copper etching, because the selectivity ratio of aluminum to copper in the etchant reaches 10:1 or higher, when the etching reaction reaches the sidewall of the aluminum sacrificial layer, the etching rate automatically slows down to less than 1 / 15 of the original rate, thereby reducing the side etching depth from 12-18μm in the prior art to 2-4μm, a reduction of more than 70%; the linewidth tolerance is reduced from ±15μm to ±3-6μm, a tolerance reduction of more than 50%; the perpendicularity of the line sidewall is improved from 60-75° to 85-88°, a perpendicularity improvement of more than 15%; and the short-circuit / open-circuit defect rate is reduced from 3.2% to less than 0.5%, a defect rate reduction of more than 84%.

[0013] 3. This invention achieves full-process protection for the copper surface through a "dual-layer protection mechanism" of a reversible protective film and an aluminum sacrificial layer. In all easily scratched processes such as lamination, drilling, outer layer patterning, electroplating, and solder resist application, the aluminum sacrificial layer absorbs external friction. The hardness of the aluminum layer (Mohs 2.75) is higher than that of the matte black copper surface, and the dense oxide film formed on the aluminum layer surface further enhances wear resistance. Finally, a perfect copper surface is exposed through peeling and reduction steps, achieving "zero-contact production."

[0014] 4. This invention utilizes the weak adhesion between the aluminum sacrificial layer and the solder resist ink (contact angle of aluminum surface 92-97°, contact angle of copper surface 50-53°) to automatically remove residual ink from the solder resist bridge area during the development process, forming a clean opening. This design completely solves the technical problem of fine-pitch solder resist bridges easily falling off.

[0015] 5. This invention significantly improves the reliability of PCBs under thermal cycling and thermal shock environments through the dual mechanism of a self-healing microcapsule solder mask layer and a shape memory polymer layer.

[0016] 6. The process integration effect of the present invention is significant. The aluminum sacrificial layer has "one material for multiple uses" (etching mask + solder resist aid + anti-scratch protection), which integrates the functions of multiple processes. The reversible protective film replaces the micro-etching and anti-oxidation treatment in the traditional pretreatment process. The self-healing solder resist layer does not require an additional surface coating protection process.

[0017] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by means of embodiments of the invention. Attached Figure Description

[0018] Figure 1 This is a comparison chart of the lateral erosion amount between the present invention and the prior art; Figure 2 This is a comparison chart of the line width tolerances of the present invention and the prior art; Figure 3This is a comparison chart of the integrity rate of the weld bridge between the present invention and the prior art; Figure 4 This is a comparison chart of bridging defect rates between the present invention and existing technologies; Figure 5 This is a comparison chart of the scratch defect rates of the present invention and the prior art; Figure 6 This is a comparison diagram of the final copper surface roughness of the present invention and the prior art; Figure 7 This is a comparison chart of the temperature cycle life of the present invention and the prior art; Figure 8 This is a comparison chart of the number of key processes in this invention and the prior art; Figure 9 This is a comparison chart of the overall yield of the present invention and the prior art; Figure 10 This is a comparison chart of the unit cost of the present invention and the prior art. Detailed Implementation

[0019] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0020] These and other aspects of the embodiments of the present invention will become clear from the following description and accompanying drawings. In these descriptions and drawings, some specific embodiments of the present invention are specifically disclosed to illustrate some ways of implementing the principles of the embodiments of the present invention; however, it should be understood that the scope of the embodiments of the present invention is not limited thereto.

[0021] Example 1 This embodiment provides a method for fabricating a printed circuit board for high-function power control, the specific steps of which are as follows: Step 1: Formation of the reversible protective film; An FR-4 insulating substrate with a 3OZ thick copper foil was placed in a weakly alkaline electrolyte (pH=8.5) containing 20g / L boric acid and 15g / L tartaric acid. The thick copper foil was used as the anode, a first voltage of 1.5V was applied, the current density was controlled at 0.5A / dm², and the electrolysis time was 5min. A reversible protective film with a thickness of 0.5μm was generated in situ on the surface of the thick copper foil, resulting in an oxide film copper substrate.

[0022] Thickness measurement method: Nine measurement points were evenly selected on the plate surface using an eddy current thickness gauge (model: Fisher Dualscope FMP40). The thickness range was 0.48-0.52μm, and the average thickness was 0.50μm.

[0023] Step 2: Aluminum sacrificial layer covering step; Plasma activation treatment (oxygen plasma, power 200W, time 2min) was performed on the reversible protective film surface of the copper oxide substrate. After treatment, the water contact angle decreased from 85° to 25° (using a JC2000D contact angle meter, test solution was deionized water, temperature 25℃) to enhance interfacial adhesion. Subsequently, an aluminum sacrificial layer with a thickness of 35μm (purity ≥99.5%) was deposited by electrochemical deposition at a current density of 1.0A / dm² to obtain the aluminum oxide-coated substrate.

[0024] Step 3: Graphic transfer steps; A positive photoresist (model: AZ MIR 701) with a thickness of 15 μm was coated on the surface of the aluminum sacrificial layer of the aluminum oxide film substrate as an etch resist layer. The substrate was exposed according to a preset circuit pattern using an LDI laser direct imaging device. After development with a developer, the aluminum sacrificial layer in the area to be removed was exposed, resulting in an etch resist patterned substrate.

[0025] Step 4: Aluminum layer etching step; A phosphoric acid-based aluminum etching solution (65% phosphoric acid, 5% nitric acid, 5% acetic acid, and the remainder water) was used to selectively remove the aluminum sacrificial layer in the exposed area of ​​the resist pattern substrate at 45°C. The etching time was 60 seconds (preliminary tests showed that the etching rate of this etching solution on aluminum was 0.6 μm / s, and 60 seconds could completely etch the 35 μm aluminum layer without damaging the underlying protective film), exposing the corresponding reversible protective film and thick copper foil, thus obtaining the aluminum mask substrate.

[0026] Step 5: Copper layer etching step; The exposed thick copper foil was etched at 50°C using an acidic copper chloride etching solution (CuCl2 120 g / L, HCl 30 g / L, H2O 25 g / L) to form a thick copper circuit layer.

[0027] Verification of the self-stopping etching mechanism: Etching rate tests were conducted on test boards of the same material beforehand. Under conditions of 50℃ and constant etching solution composition, the etching rate for exposed copper foil was 1.2 μm / s. For the area covered by the aluminum layer, after the etching solution came into contact with the aluminum layer, the reaction kinetics were hindered due to the rapid formation of an oxide film on the aluminum surface and the electrochemical potential difference between aluminum and copper (standard potential of aluminum: -1.66V, copper: +0.34V). The measured etching rate dropped to below 0.08 μm / s. Based on this, the etching time in this step was controlled to 90s, based on the time required to completely etch 3OZ copper foil (approximately 105 μm). At this time, the copper etching depth reached 108 μm. Since the etching rate in the aluminum mask area was only less than 1 / 15 of that of the exposed copper, the lateral etching amount of copper below the sidewall of the aluminum layer was controlled to ≤3 μm (measurement method: using a metallographic microscope, 5 boards were randomly selected, and 10 line edges were measured on each board, with the maximum value taken). The remaining aluminum sacrificial layer, used as an etching mask, effectively protects the corresponding thick copper circuit area below, resulting in an aluminum mask circuit board.

[0028] Step 6: Solder mask layer formation step; With the aluminum sacrificial layer retained, Rongda H-8100 solder resist ink containing self-healing microcapsules was screen-printed onto the surface of the aluminum mask circuit board. The viscosity was controlled at 50 Pa·s (using a Brookfield DV2T viscometer, 25℃). The self-healing microcapsules had a particle size of 5 μm (measured using a laser particle size analyzer, D90 = 5.2 μm), accounting for 5% of the total volume of the solder resist layer. The microcapsule shell was made of urea-formaldehyde resin, the encapsulating repair agent was dicyclopentadiene, and Grubbs catalyst was dispersed in the solder resist layer.

[0029] Quantitative Verification of Weak Adhesion: Contact angle tests of solder resist ink were performed on aluminum (after plasma activation in step 2) and copper surfaces. A JC2000D contact angle meter was used, with uncured solder resist ink (25℃) as the test solution. Results showed a contact angle of 95° on the aluminum surface and 52° on the copper surface. The higher contact angle indicates poor wettability and weak adhesion of the solder resist ink on the aluminum surface. After exposure and development, the residual ink in the solder bridge area of ​​the aluminum surface automatically detached under the washing of the developing solution due to weak adhesion, forming a clean opening. After development, AOI (Automated Optical Inspection) was used to statistically analyze 500 solder bridges. The solder bridge integrity rate was 99.5%, and the bridging defect rate caused by residual ink was ≤0.5%.

[0030] Subsequently, the microcapsules were heated and cured at 80°C for 60 minutes to activate their self-healing mechanism (DSC testing showed that the polymerization initiation temperature of dicyclopentadiene under the action of Grubbs catalyst was 75°C), enabling the solder resist layer to acquire initial self-healing ability and obtaining a solder resist cured circuit board.

[0031] Step 7: Peeling off the aluminum sacrificial layer; A weakly alkaline aluminum stripping solution (NaOH 5 g / L, pH=10.5) was used to selectively remove the aluminum sacrificial layer from the solder resist-cured circuit board at 40℃, with a stripping time of 90 s. Preliminary tests showed that the stripping solution had an etching rate of 0.4 μm / s on aluminum, and could completely etch a 35 μm aluminum layer in 90 s; an etching rate of 0.08 μm / min on the reversible protective film; and an etching rate of 0.05 μm / min on the thick copper circuit layer (testing method: changes in copper and aluminum ion concentrations in the immersion solution were measured using inductively coupled plasma optical emission spectrometry (ICP-OES)). The resulting circuit board was protected by an oxide film.

[0032] Step 8: Reversible protective film restoration step; The oxide-protected circuit board was placed in a dilute sulfuric acid reducing electrolyte (H₂SO₄ 5%, pH=2.0), with the thick copper circuit layer as the cathode. A second voltage of 0.5V and a current density of 0.2A / dm² were applied for a reduction time of 3 min. The reduction rate was measured using X-ray photoelectron spectroscopy (XPS). + The intensity of the characteristic peak (932.5 eV) and Cu 0 The intensity ratio of the characteristic peak (932.0 eV) was 0.04:1, and the conversion reduction rate was 96%. The roughness of the reduced copper surface was measured using a white light interferometer (model: Bruker ContourGT), Ra=0.20μm (measurement conditions: objective lens 50×, measurement area 250μm×250μm, average value of 5 points), resulting in the finished circuit board.

[0033] The finished circuit board prepared in this embodiment was verified through the following tests: Circuit dimensions: 0.2mm IC line width was measured using AOI, with tolerance controlled within ±5μm (sample size 50 lines); Thermal shock test: According to IPC-TM-650 2.6.7.2 method, 288℃×10 seconds×3 cycles, no cracking of solder mask layer and no warping of circuit (sample size 10 boards). Insulation resistance test: Refer to IPC-TM-650 2.5.7, insulation resistance ≥10¹¹Ω under 500V DC conditions.

[0034] Example 2 This embodiment provides a method for fabricating a printed circuit board for high-function power control, the specific steps of which are as follows: Step 1: Formation of the reversible protective film; The electrolyte contained 25 g / L boric acid and 20 g / L tartaric acid, with a pH of 9.0. An initial voltage of 2.5 V and a current density of 1.2 A / dm² were applied, with an electrolysis time of 8 min. The reversible protective film thickness was 1.8 μm (measured at 9 points using an eddy current thickness gauge, ranging from 1.75 to 1.85 μm).

[0035] Step 2: Aluminum sacrificial layer covering step; Plasma activation treatment (oxygen plasma, power 300W, time 3min) reduced the water contact angle from 85° to 20°. An aluminum sacrificial layer was applied using mechanical lamination to a thickness of 40μm (measured using a thickness gauge, averaged at 9 points under 0.5N pressure), at a lamination temperature of 120℃ and a pressure of 2.0MPa. Adhesion testing was performed after lamination (referring to the cross-cut adhesion test in GB / T9286-2021), and the adhesion rating reached level 0 (no peeling).

[0036] Step 3: Graphic transfer steps; The anti-etching layer is 18μm thick and uses a traditional film exposure method. The exposure energy is controlled in 7 divisions (using a 21-division exposure ruler, retaining 7 divisions as the baseline after development).

[0037] Step 4: Aluminum layer etching step; The etching solution used was nitrate-based aluminum (15% nitric acid, 10% phosphoric acid, and the remainder water), at a temperature of 50°C and an etching time of 50 seconds (aluminum etching rate 0.8 μm / s).

[0038] Step 5: Copper layer etching step; Alkaline ammonia etching solution (NH3·H2O 150g / L, NH4Cl 80g / L, pH=8.5) was used at a temperature of 55℃. Preliminary tests showed that the etching rate of this solution was 1.0 μm / s for copper and ≤0.06 μm / s for aluminum (due to the formation of a passivation film on aluminum under alkaline conditions), with a selectivity ratio ≥16:1. The etching time was controlled at 105 s for complete etching of a 3OZ copper foil (105 μm), with a side etching depth ≤2 μm (measured using a metallographic microscope, sample size 5 boards × 10 lines). The sidewalls of the lines were measured using an image measuring instrument, achieving a perpendicularity of 88° (defined as the angle between the sidewall and the normal to the board surface).

[0039] Step 6: Solder mask layer formation step; The solder resist ink has a viscosity of 60 Pa·s, and the self-healing microcapsules have a particle size of 30 μm (D90=31.2 μm), accounting for 12.5% ​​of the total volume of the solder resist layer. The microcapsule shell is made of melamine-formaldehyde resin, the encapsulation and repair agent is epoxy resin monomer (E-51), and the catalyst is a latent imidazole catalyst.

[0040] Weak adhesion verification: The contact angle between the aluminum surface and the solder resist ink was 92° (test method same as in Example 1), and the contact angle between the copper surface and the solder resist ink was 50°. After development, AOI analysis showed 1000 solder resist bridges with an integrity rate of 99.8%.

[0041] The curing temperature was 115℃, and the curing time was 45 min. The degree of curing was monitored by DSC, and the degree of curing was ≥95% (refer to the method of GB / T19466.2-2004).

[0042] Step 7: Peeling off the aluminum sacrificial layer; Weakly alkaline aluminum stripping solution (NaOH 10g / L, with benzotriazole 0.5g / L corrosion inhibitor, pH=11.0), temperature 45℃, stripping time 60s. Corrosion rate test: etching rate on aluminum was 0.67μm / s, corrosion rate on reversible protective film was 0.06μm / min, and corrosion rate on thick copper circuit layer was 0.03μm / min.

[0043] Step 8: Reversible protective film restoration step; The reducing electrolyte was a dilute sodium hydroxide solution (NaOH 2%, pH=12.0). A second voltage of 1.0V was applied, the current density was 0.4A / dm², and the reduction time was 2 min. XPS analysis showed a reduction rate of 98%, Cu + / Cu 0 Peak intensity ratio: 0.02:1. The surface roughness of the reduced copper surface, Ra = 0.15 μm (measured with a white light interferometer).

[0044] The finished circuit board prepared in this embodiment was verified through the following tests: Circuit dimensions: 0.2mm IC line width tolerance ±3μm (sample size 50 lines); Thermal shock test: 288℃×10 seconds×5 cycles, no cracking of the solder mask layer (sample size 10 boards). Thermal stress test: Referring to IPC-TM-650 2.6.8, the circuit was reflowed 3 times at 260℃, and there were no bubbles or delamination. Self-healing function verification of solder resist layer: Microcracks (load 100g, indentation depth 10μm) were created on the surface of the solder resist layer using a Vickers hardness tester. After heating at 120℃ for 30min, the cracks were completely healed and the surface insulation resistance was restored to above 10¹²Ω.

[0045] Example 3 This embodiment provides a method for fabricating a printed circuit board for high-function power control, the specific steps of which are as follows: Step 1: Formation of the reversible protective film; The electrolyte contained 30 g / L boric acid, 25 g / L tartaric acid, and pH 9.5. An initial voltage of 3.5 V and a current density of 2.0 A / dm² were applied. The electrolysis time was 12 min, and the reversible protective film thickness was 3.0 μm (measured at 9 points using an eddy current thickness gauge, ranging from 2.95 to 3.08 μm).

[0046] Step 2: Aluminum sacrificial layer covering step; Plasma activation treatment (oxygen plasma, power 400W, time 4min) reduced the water contact angle from 85° to 18°. The aluminum sacrificial layer was deposited electrochemically at a current density of 2.0A / dm², with a deposition thickness of 45μm (deposition time calculated using Faraday's law and verified by a thickness gauge).

[0047] Step 3: Graphic transfer steps; The anti-etching layer is 20μm thick, and LDI laser direct imaging is used, with exposure energy controlled in 9 divisions.

[0048] Step 4: Aluminum layer etching step; The etching solution used was an iron-based aluminum etching solution (FeCl3 15%, HCl 3%), at a temperature of 55℃, for a time of 40s (aluminum etching rate 1.125μm / s).

[0049] Step 5: Copper layer etching step; An acidic copper chloride etching solution (CuCl2 150 g / L, HCl 40 g / L, H2O 28 g / L) was used at a temperature of 55℃. Preliminary tests showed that the etching rate of this solution was 1.5 μm / s for copper and ≤0.12 μm / s for aluminum, with a selectivity ratio ≥12:1. The etching time was controlled to 95 s for completely etching a 4 oz copper foil (140 μm), with a side etching depth ≤4 μm (measured using a metallographic microscope). The perpendicularity of the circuit sidewalls reached 85°.

[0050] Step 6: Solder mask layer formation step; The solder resist ink has a viscosity of 70 Pa·s, and the self-healing microcapsules have a particle size of 50 μm (D90=52.1 μm), accounting for 20% of the total volume of the solder resist layer. The microcapsule shell is made of polyurethane, the encapsulation repair agent is acrylate monomer, and the catalyst is benzoyl peroxide.

[0051] Weak adhesion verification: contact angle 97° on aluminum surface, contact angle 53° on copper surface. AOI analysis after development revealed 800 solder bridges with a 99.2% integrity rate.

[0052] The curing temperature is 150℃, and the time is 30 minutes. The degree of curing is ≥96% (DSC measurement).

[0053] Step 7: Peeling off the aluminum sacrificial layer; Weakly alkaline aluminum stripping solution (NaOH 15g / L, with added sodium silicate corrosion inhibitor 1.0g / L, pH=11.5), temperature 50℃, stripping time 45s. Corrosion rate: aluminum etching rate 1.0μm / s, corrosion rate of reversible protective film 0.10μm / min, corrosion rate of thick copper circuit layer 0.08μm / min.

[0054] Step 8: Reversible protective film restoration step; The reducing electrolyte was a dilute sulfuric acid solution (8% H₂SO₄, pH=1.5). A second voltage of 1.5V was applied, the current density was 0.6A / dm², and the reduction time was 1.5 min. XPS analysis showed a reduction rate of 95%, Cu + / Cu 0 Peak intensity ratio: 0.05:1. The surface roughness of the reduced copper surface, Ra = 0.18 μm (measured with a white light interferometer).

[0055] The finished circuit board prepared in this embodiment was verified through the following tests: Circuit dimensions: 0.2mm IC line width tolerance ±6μm (sample size 50 lines); Thermal shock test: 288℃×10 seconds×3 cycles, no cracking of the solder mask layer (sample size 10 boards). Withstand voltage test: Refer to IPC-TM-650 2.5.6, 1500V AC, 60 seconds without breakdown; Applicability: The finished copper thickness of this embodiment is 4OZ, which is suitable for ultra-high current power supply control modules (rated current ≥50A).

[0056] Example 4 This embodiment provides a method for fabricating a printed circuit board for high-function power control. Based on Embodiment 2, a shape memory polymer layer is further introduced to enhance thermal stress buffering capability.

[0057] Step 1: Formation of the reversible protective film; Same as in Example 2, a reversible protective film with a thickness of 1.8 μm is formed.

[0058] Step 2: Shape memory polymer layer coating step; A layer of polyurethane-based shape memory polymer (SMP) with a thickness of 12 μm (measured using a film thickness gauge, ranging from 11.5 to 12.5 μm) was coated onto the surface of the reversible protective film. The glass transition temperature (Tg) of this polyurethane-based shape memory polymer was 180 °C (determined using DSC at a heating rate of 10 °C / min), and the phase transition temperature range was 170–190 °C. After coating, the film was pre-baked at 120 °C for 10 min to form a semi-cured polyurethane-based shape memory polymer layer.

[0059] Etching resistance test: A polyurethane shape memory polymer layer was pre-prepared on a fiberglass board and immersed in the aluminum etching solution (nitric acid-based, 50℃) in step 4 and the copper etching solution (alkaline ammonia, 55℃) in step 5, respectively, for immersion times of 60s and 105s (corresponding to the actual etching time in the process). The test showed that the mass loss rate of the polyurethane shape memory polymer layer in the aluminum etching solution was ≤0.5%, and the mass loss rate in the copper etching solution was ≤0.8%. Furthermore, no swelling occurred in either etching solution (dimensional change ≤0.1%), indicating that the polyurethane shape memory polymer layer exhibits good chemical stability during the etching process.

[0060] Step 3: Aluminum sacrificial layer covering step; Plasma activation treatment (oxygen plasma, 300W, 3min) was performed on the surface of the polyurethane shape memory polymer layer, reducing the water contact angle from 80° to 22°. Subsequently, a 40μm thick aluminum sacrificial layer was mechanically laminated at 120℃ and 2.0MPa. During lamination, the polyurethane shape memory polymer layer further cured, forming a strong bond with the reversible protective film and the aluminum sacrificial layer. The interfacial bonding quality was inspected using a scanning ultrasonic microscope (C-SAM) after lamination, and no delamination defects were found.

[0061] Step 4: Graphic transfer steps; Same as Example 2.

[0062] Step 5: Aluminum layer etching step; Same as Example 2. The polyurethane-based shape memory polymer layer remained intact during the aluminum etching process (measured by a surface profilometer, the reduction in the thickness of the polyurethane-based shape memory polymer layer was ≤0.2μm).

[0063] Step 6: Copper layer etching step; Same as Example 2. The polyurethane shape memory polymer layer and the aluminum sacrificial layer are used together as an etching mask. After etching, the polyurethane shape memory polymer layer was observed with an optical microscope. There were no obvious etching marks on the polyurethane shape memory polymer layer, and the etch depth on the circuit side was ≤2μm (same as Example 2).

[0064] Step 7: Solder mask layer formation step; With the aluminum sacrificial layer retained, the solder resist layer was coated, exposed, developed, and cured by heat, just like in Example 2. The curing temperature was 115°C, at which point the polyurethane shape memory polymer layer remained solid (Tg=180°C) and did not deform.

[0065] Step 8: Peeling off the aluminum sacrificial layer; Similar to Example 2, a weakly alkaline aluminum stripping solution was used to selectively remove the aluminum sacrificial layer, with a stripping time of 60 seconds. Testing showed that the polyurethane shape memory polymer layer exhibited a mass loss rate of ≤0.3% in this stripping solution, remaining intact and exposing the underlying reversible protective film.

[0066] Step 9: Reversible protective film restoration step; Similar to Example 2, the reversible protective film is reduced to metallic copper.

[0067] Step 10: Activation and functional verification of the shape memory polymer layer; To verify the temperature cycle life of each embodiment of the present invention, temperature cycling tests were conducted according to the IPC-9701A standard. Conditions: -40℃ to 125℃, cycle time 30 min (heating / cooling rate 15℃ / min), total number of cycles 1000. Test equipment: Temperature cycling chamber (model: ESPEC TSA-71L). Four-wire resistance measurement was used, with a sampling frequency of once every 50 cycles. The sample size for each embodiment was 10 test plates, and the average value was taken.

[0068] Existing technology (control group): Employs conventional thick copper plate manufacturing processes within the industry, lacking the reversible protective film, aluminum sacrificial layer, self-healing microcapsules, and shape memory polymer layer described in this invention. Test results: After 400 cycles, the resistance change rate exceeds 10%; after 500 cycles, the resistance change rate exceeds 15%, meeting the failure criteria. Using a resistance change rate exceeding 15% as the failure criterion, the existing technology has a temperature cycle life of 400 cycles.

[0069] The finished board of Embodiment 1 of this invention exhibits the following resistance change rates: 2.8% after 200 cycles, 6.2% after 400 cycles, 11.5% after 600 cycles, 18.9% after 800 cycles, and 28.6% after 1000 cycles. Using a resistance change rate exceeding 15% as the failure criterion, this embodiment reaches the failure threshold after 800 cycles. Test results show that the temperature cycle life of this embodiment is 800 cycles, which is twice that of the prior art (400 cycles).

[0070] The finished board of Embodiment 2 of this invention exhibits the following resistance change rates: 2.2% after 200 cycles, 4.8% after 400 cycles, 8.6% after 600 cycles, 14.2% after 800 cycles, and 22.5% after 1000 cycles. Using a resistance change rate exceeding 15% as the failure criterion, this embodiment reaches the failure threshold after 1000 cycles. Test results show that the temperature cycle life of this embodiment is 1000 cycles, which is 1.5 times higher than the prior art (400 cycles).

[0071] The finished board of Embodiment 3 of this invention exhibits the following resistance change rates: 3.1% after 200 cycles, 6.9% after 400 cycles, 12.8% after 600 cycles, 21.3% after 800 cycles, and 32.1% after 1000 cycles. Using a resistance change rate exceeding 15% as the failure criterion, this embodiment shows a resistance change rate of 12.8% after 600 cycles, close to but not exceeding the threshold. Test results indicate that the temperature cycle life of this embodiment is 800 cycles, double that of the prior art (400 cycles). The copper thickness of this embodiment is 4 oz, thicker than that of Embodiments 1 and 2, resulting in greater thermal stress and therefore a relatively shorter temperature cycle life, but still superior to the prior art.

[0072] Comparative Sample (Same as Example 2 but without the polyurethane shape memory polymer layer): To verify the stress buffering function of the polyurethane shape memory polymer layer, a comparative sample (same as Example 2 but without the polyurethane shape memory polymer layer) was set up. Before the finished board underwent temperature cycling testing, an activation pretreatment was performed: the finished board was heated at 200℃ for 3 minutes (above Tg180℃) to cause controllable deformation of the polyurethane shape memory polymer layer. Using a digital holographic interferometer, the thickness change of the polyurethane shape memory polymer layer was measured to be +0.5μm to -0.3μm, forming a micron-level gap between the circuit layer and the substrate, actively absorbing the thermal expansion coefficient mismatch stress during subsequent thermal cycling. Test Results: After 500 cycles, the solder joint resistance change rate exceeded 15%, and after 800 cycles, circuit delamination occurred.

[0073] Example 4 of this invention: Finished board (containing a polyurethane-based shape memory polymer layer): Based on Example 2, a polyurethane-based shape memory polymer layer is introduced. Test results: After 200 cycles, the resistance change rate is 1.2%; after 400 cycles, the resistance change rate is 2.4%; after 600 cycles, the resistance change rate is 3.5%; after 800 cycles, the resistance change rate is 4.2%; and after 1000 cycles, the resistance change rate is 5.0%. Using a resistance change rate exceeding 15% as the failure criterion, this example shows a resistance change rate of only 5% after 1000 cycles, far below the failure threshold, and the expected temperature cycle life can exceed 1500 cycles. Test results show that the temperature cycle life of Example 4 of this invention is more than 2.5 times higher than the prior art (400 cycles) and more than 2 times higher than the comparative sample (failure after 500 cycles), fully demonstrating the stress buffering function of the polyurethane-based shape memory polymer layer.

[0074] For conventional applications that do not require stress buffering, the activation pretreatment step can be omitted. The polyurethane shape memory polymer layer exists as a structural reinforcement layer and can still provide a certain degree of mechanical support (tensile strength is increased by about 12% compared to the absence of a polyurethane shape memory polymer layer).

[0075] The temperature cycling lifetimes of Examples 1 to 4 of this invention are 800, 1000, 600, and over 1500 cycles, respectively, all significantly better than the 400 cycles of the prior art. Example 4, by introducing a polyurethane-based shape memory polymer layer, achieves the optimal temperature cycling lifetime, more than 2.5 times that of the prior art. The above test results demonstrate that this invention, through the synergistic effect of the reversible protective film, the aluminum sacrificial layer, the self-healing microcapsules, and the shape memory polymer layer, significantly improves the reliability of PCBs under temperature cycling conditions, making it particularly suitable for demanding applications such as automotive electronics and aerospace.

[0076] To demonstrate the advantages of this invention and its advancements in technical performance compared to existing technologies (conventional PCB manufacturing processes), this verification section uses comparative test data to conduct a quantitative comparative analysis across six dimensions: circuit accuracy, solder mask integrity, anti-scratch effect, thermal reliability, self-healing capability, and process efficiency.

[0077] Existing technology (control group): Employing conventional thick copper plate manufacturing processes within the industry, including: Traditional dry film pattern transfer + acid etching; Standard solder mask printing (without self-healing function); The entire process uses physical paper separators to prevent scratches; Irreversible protective film, aluminum-free sacrificial layer, and shape-memory polymer layer; Process parameters are executed according to industry standard operating procedures (SOPs).

[0078] This invention (experimental group): finished circuit boards prepared using the methods described in Examples 1-4.

[0079] All comparative tests used the same testing standards and instruments to ensure data comparability.

[0080] Compare and verify the data; 1. Comparison of circuit precision for 0.2mm IC fine lines (Table 1);

[0081] As can be seen from Table 1, the present invention achieves the "self-stopping etching" effect through aluminum sacrificial layer mask + high selectivity etching, fundamentally solving the problem of severe side etching in thick copper etching, and greatly improving the mass production feasibility of 0.2mm IC fine lines.

[0082] Figure 1 This paper presents a comparison of lateral erosion amounts between existing technologies and four embodiments of the present invention. The horizontal axis represents different technical solutions, and the vertical axis represents the lateral erosion amount (unit: μm). The height of the bars visually reflects the quality of lateral erosion control. Figure 1 It can be seen that, The lateral etching amount in the prior art is between 12-18μm, and the upper limit of 18μm is taken as the comparison benchmark; the lateral etching amount in Example 3 of this invention (parameter upper limit) is ≤4μm; the lateral etching amount in Example 1 (parameter lower limit) is ≤3μm; the lateral etching amount in Examples 2 and 4 (intermediate parameters and the introduction of polyurethane-type shape memory polymers) is ≤2μm.

[0083] from Figure 1 The results show that the lateral etching depth decreased from 18μm to 2μm, a reduction of 89%. This means that the linewidth control precision of the 0.2mm IC fine lines has been significantly improved, the spacing between adjacent lines has been maintained, and the risk of short circuits has been significantly reduced. The significant reduction in lateral etching depth is due to the synergistic effect of the aluminum sacrificial layer mask and the high-selectivity etchant, which achieves a "self-stopping etching" effect—when the etching reaches the sidewall of the aluminum layer, the reaction rate automatically slows down to less than 1 / 15 of the original rate.

[0084] Figure 2 The paper presents a comparison of linewidth tolerances between the prior art and four embodiments of the present invention. Specifically, the prior art has a linewidth tolerance of ±15μm; Embodiment 3 has ±6μm; Embodiment 1 has ±5μm; and Embodiments 2 and 4 have ±3μm.

[0085] However, reducing the linewidth tolerance from ±15μm to ±3μm significantly improves the consistency of line dimensions, providing a technological basis for high-density interconnect (HDI) design. Data from Examples 1 (lower limit), 2 (intermediate), and 3 (upper limit) show that the linewidth tolerance is optimal when the parameters are at the intermediate value, indicating the existence of an optimal process window.

[0086] 2. Comparison of the integrity of weld resistance bridges (Table 2);

[0087] As can be seen from Table 2, this invention utilizes the weak adhesion between the aluminum sacrificial layer and the solder resist ink (contact angle of aluminum surface 92-97° vs. copper surface 50-53°) to automatically remove residual ink in the solder resist bridge area during the development process, forming a clean opening and completely solving the problem of fine-pitch solder resist bridges easily falling off in traditional processes.

[0088] Figure 3 This demonstrates a comparison of the weld bridge integrity rates of existing technologies with four embodiments of the present invention. Figure 3 As can be seen, the integrity rate of the existing resistive welding bridge is between 85-92% (taking the median of 88.5%); Example 3 of the present invention has an integrity rate of 99.2%; Example 1 has an integrity rate of 99.5%; and Examples 2 and 4 reach 99.8%.

[0089] from Figure 3As can be seen, the integrity rate increased from 88.5% to 99.8%, which means that the number of defects decreased from 115 to 2 per 1000 weld bridges, indicating a significant improvement in quality.

[0090] The contact angle between the aluminum sacrificial layer surface and the solder resist ink is 92-97°, while the contact angle on the copper surface is only 50-53°. The higher contact angle indicates poor wettability and weak adhesion of the solder resist ink on the aluminum surface. During development, due to the weak adhesion, the residual ink on the aluminum surface in the solder bridge area automatically detaches under the washing of the developing solution, forming a clean opening.

[0091] Figure 4 The comparison of bridging defect rates between the prior art and four embodiments of the present invention is presented. The bridging defect rate of the prior art is between 5-10% (median value 7.5%); the bridging defect rate of embodiment 3 of the present invention is 0.8%; embodiment 1 is 0.5%; and embodiments 2 and 4 are 0.2%.

[0092] from Figure 4 As can be seen, the defect rate dropped from 7.5% to 0.2%, a reduction of 97.3%, which basically eliminated the core bottleneck of the fine-pitch design of the weld resistance bridging.

[0093] Among them, Example 2 (intermediate parameter value) and Example 4 (introduction of polyurethane-based shape memory polymer) performed best, indicating that parameter optimization and the introduction of polyurethane-based shape memory polymer layer have no negative impact on the solder resist process. On the contrary, the smooth surface provided by the polyurethane-based shape memory polymer layer further improves the uniformity of ink coating.

[0094] 3. Comparison of anti-scratch effects (Table 3);

[0095] As can be seen from Table 3, existing technologies rely on "passive protection" (using white paper and handling with care), which cannot completely eliminate the scratching problem. This invention, through a "double-layer protection mechanism" of a reversible protective film (step 1) and an aluminum sacrificial layer (step 2), ensures that the aluminum layer bears the friction in all processes before molding, and finally exposes the perfect copper surface through peeling and restoration steps, achieving "zero-contact production" and completely solving the scratching problem of matte blackboards.

[0096] Figure 5 The paper presents a comparison of scratch defect rates between the prior art and four embodiments of the present invention. The scratch defect rate of the prior art is 8.5%; that of Embodiment 3 of the present invention is 0.5%; that of Embodiment 1 is 0.4%; and that of Embodiments 2 and 4 is 0.3%.

[0097] from Figure 5As can be seen, the scratch defect rate dropped from 8.5% to 0.3%, a reduction of 96.5%. This means that out of every 1,000 boards, the number of scrapped due to scratches decreased from 85 to 3, resulting in a significant improvement in yield.

[0098] This invention employs a "dual-layer protection mechanism" consisting of a reversible protective film (step 1) and an aluminum sacrificial layer (step 2). In all processes prior to molding, the aluminum layer bears the friction, and its hardness (Mohs 2.75) is higher than that of the matte black copper surface. Furthermore, the dense oxide film formed on the aluminum layer surface further enhances wear resistance. Finally, a perfect copper surface is exposed through peeling and reduction steps, achieving "zero-contact production."

[0099] Figure 6 The final copper surface roughness is compared between the prior art and four embodiments of the present invention. The final copper surface roughness of the prior art is 0.25-0.35 μm; that of Embodiment 3 is 0.18 μm; that of Embodiment 1 is 0.20 μm; and that of Embodiments 2 and 4 is 0.15 μm.

[0100] from Figure 6 As can be seen, a reduction of more than 30% in copper surface roughness means better solder wettability and lower contact resistance, which has a positive impact on subsequent surface mount technology (SMT) processes.

[0101] The reduction process of the reversible protective film is essentially an electrochemical reduction, which causes less damage to the copper surface compared to mechanical grinding or chemical micro-etching, resulting in a smoother and more even copper surface after reduction.

[0102] 4. Comparison of thermal reliability (Table 4);

[0103] As shown in Table 4, this invention significantly improves the reliability of PCBs under thermal cycling and thermal shock environments through a dual mechanism of self-healing microcapsules (automatic healing of solder mask cracks) and shape memory polymer layers (actively absorbing thermal stress). Data from Example 4 demonstrates that polyurethane-based shape memory polymer layers can more than double the temperature cycling life, making them particularly suitable for high-reliability applications such as automotive electronics and aerospace.

[0104] Figure 7 The paper demonstrates the trend of resistance change rate with the number of cycles in temperature cycling tests using existing technology and embodiments 1 to 4 of the present invention.

[0105] from Figure 7As can be seen, the existing technology reaches the failure standard when the resistance change rate exceeds 10% after 400 cycles and exceeds 15% after 500 cycles; Example 3 (parameter upper limit) reaches the failure standard when the resistance change rate exceeds 15% after 800 cycles (the resistance change rate is 12.8% after 600 cycles, close to but not exceeding the threshold); Example 1 (parameter lower limit) reaches the failure standard when the resistance change rate exceeds 15% after 800 cycles; Example 2 (parameter middle) reaches the failure standard when the resistance change rate exceeds 15% after 1000 cycles; Example 4 (including SMP layer) reaches the failure standard when the resistance change rate is only 5% after 1000 cycles, far below the failure threshold of 15%, and the expected lifespan can exceed 1500 cycles.

[0106] In Example 4, the temperature cycle life is improved by more than 2.5 times compared to the prior art, increasing from 400 cycles to over 1500 cycles. Example 2 has a temperature cycle life of 1000 cycles, a 1.5-fold improvement over the prior art; Example 1 has 800 cycles, a 1-fold improvement; and Example 3 has 800 cycles, a 1-fold improvement. These results demonstrate that the temperature cycle life of each embodiment of the present invention is significantly superior to the prior art, while Example 4 achieves optimal thermal reliability improvement by introducing a shape memory polymer layer. This means that in demanding applications such as automotive electronics and aerospace, the lifespan of PCBs prepared using this invention is significantly extended.

[0107] Example 4 introduces a shape memory polymer layer with a phase transition temperature (180°C) designed to be above the normal operating temperature of the PCB but below the lead-free soldering temperature. During temperature cycling, the polyurethane-based shape memory polymer layer undergoes controlled deformation, actively absorbing the CTE mismatch stress between the circuit layer and the substrate, protecting the solder joints and interfaces from fatigue damage.

[0108] Furthermore, the existing technology has a cracking rate of 10% after 3 thermal shock cycles and increases to 25% after 5 cycles; however, the cracking rates of Embodiments 2 and 4 of the present invention are both 0% after 5 cycles.

[0109] Thermal shock life has increased from 3 cycles to over 5 cycles, more than doubling. Thermal shock testing simulates the PCB's ability to withstand extreme temperature changes, and this improvement signifies a significant enhancement in product reliability under harsh environments.

[0110] Example 4 combines a self-healing solder mask layer and a polyurethane-based shape memory polymer stress buffer layer, which work synergistically to achieve optimal thermal reliability.

[0111] 5. Comparison of process efficiency and cost (Table 5);

[0112] As shown in Table 5, the process integration effect of this invention is significant. The aluminum sacrificial layer, with its "one material, multiple uses" (etching mask + solder resist aid + scratch protection), integrates the functions of multiple processes, reducing the number of independent processes. The transparency of the reversible protective film does not affect AOI optical inspection, eliminating the need for additional inspection processes. Ultimately, this results in comprehensive economic benefits such as improved yield, reduced costs, and shortened delivery cycles.

[0113] Figure 8 The document compares the number of key processes in the prior art with those in four embodiments of the present invention. The prior art has approximately 25 key processes; the present invention reduces this to approximately 18, a reduction of 28%.

[0114] from Figure 8 As can be seen, the aluminum sacrificial layer has multiple uses (etching mask + solder resist aid + anti-scratch protection), which integrates the functions of multiple processes; the reversible protective film replaces the micro-etching and anti-oxidation treatment in the traditional pretreatment process; and the self-healing solder resist layer does not require an additional surface coating protection process.

[0115] Figure 9 The presentation shows a comparison of the overall yield of the prior art and four embodiments of the present invention. The overall yield of the prior art is approximately 82%; the present invention improves this to approximately 94%, an improvement of 12 percentage points.

[0116] from Figure 9 As can be seen, improved circuit precision reduced the short-circuit / open-circuit defect rate by 84%; improved weld bridge integrity reduced the bridging defect rate by 97%; and improved anti-scratch effect reduced the scratch defect rate by 96%. The significant reduction in these three core defects together led to a significant improvement in yield.

[0117] Chart 10: Bar chart comparing unit costs; Figure 10 The document presents a comparison of the unit cost of existing technologies with four embodiments of the present invention. The unit cost of the existing technology is set as a baseline of 100; the unit cost of the present invention is reduced to approximately 85%, a reduction of 15%.

[0118] from Figure 10 As can be seen, improved yield leads to reduced scrap costs (accounting for approximately 40% of the total cost reduction); fewer processes lead to reduced labor and energy costs (approximately 30%); elimination of physical isolation processes leads to reduced material costs (approximately 20%); and fewer AOI inspections lead to reduced inspection costs (approximately 10%).

[0119] In summary, compared with the prior art, the present invention has achieved significant progress in the following aspects: (a) Technical performance Line accuracy is improved by 2-4 times: lateral erosion is reduced from 18μm to 2μm, and line width tolerance is reduced from ±15μm to ±3μm; The ability to achieve fine-pitch weld bridges has been broken through to 5.5 mil: the bridging defect rate has been reduced from 7.5% to 0.2%, and the integrity rate has reached 99.8%. Scratch removal defect rate reduced by 96%: from 8.5% to 0.3%, completely solving the problem of scratches on dull blackboards; Thermal cycling life is increased by more than 100 times: from 400 times to 1500 times, and thermal shock life is increased from 3 times to more than 5 times.

[0120] (ii) Reliability Introducing self-healing microcapsule function: microcracks in the solder resist layer can automatically heal, and the insulation resistance can be restored to more than 10¹²Ω; Introducing a shape memory polymer layer: actively absorbs thermal stress, increasing temperature cycle life by more than 100%; Achieving "zero-contact production": Double protection with a reversible protective film and an aluminum sacrificial layer, resulting in a perfectly intact copper surface.

[0121] (III) Process efficiency The number of key processes has been reduced by 28%, from 25 to 18. The entire process time was reduced by 19%, from 72 hours to 58 hours; Completely eliminate 8 physical isolation processes to achieve automated continuous production.

[0122] (iv) Economic benefits The overall yield rate increased from 82% to 94%, an increase of 12 percentage points; The unit cost is reduced by 15%, giving it significant market competitiveness.

[0123] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for fabricating a printed circuit board for high-function power control, characterized in that, The method includes the following steps: Step 1: Place the insulating substrate with thick copper foil in the electrolyte, use the thick copper foil as the anode, apply a first voltage, and generate a reversible protective film in situ on the surface of the thick copper foil to obtain an oxide film copper substrate. Step 2: Cover the reversible protective film surface of the copper oxide substrate with an aluminum sacrificial layer to obtain an aluminum oxide substrate. Step 3: Form an etching resist layer on the surface of the aluminum sacrificial layer of the aluminum oxide film substrate, expose and develop according to the preset circuit pattern to expose the aluminum sacrificial layer of the area to be removed, and obtain the etching resist pattern substrate. Step 4: Selectively remove the aluminum sacrificial layer in the exposed area of ​​the resist pattern substrate using aluminum etching solution, so that the corresponding reversible protective film and thick copper foil underneath are exposed, and an aluminum mask substrate is obtained. Step 5: Use copper etching solution to etch the exposed thick copper foil on the aluminum mask substrate to form a thick copper circuit layer, and obtain the aluminum mask circuit board. Step 6: While retaining the aluminum sacrificial layer, apply solder resist ink containing self-healing microcapsules to the surface of the aluminum mask circuit board, expose and develop to form a solder resist layer, and heat and cure the solder resist layer to obtain a solder resist cured circuit board. Step 7: Selectively remove the aluminum sacrificial layer of the solder resist-cured circuit board using aluminum stripping solution to expose the underlying reversible protective film, thus obtaining an oxide-protected circuit board. Step 8: Place the oxide-protected circuit board in a reducing electrolyte, use the thick copper circuit layer as the cathode, apply a second voltage to reduce the reversible protective film to metallic copper, exposing the original copper surface, and obtain the finished circuit board.

2. The method for fabricating a printed circuit board for high-function power control according to claim 1, characterized in that, In step 1, the electrolyte is a weakly alkaline solution containing boric acid and tartaric acid, the first voltage is 1.5V to 3.5V, and the thickness of the reversible protective film is controlled to be 0.5μm to 3μm by the electrolysis time and current density.

3. The method for fabricating a printed circuit board for high-function power control according to claim 2, characterized in that, In step 2, the aluminum sacrificial layer is applied by electrochemical deposition or mechanical lamination. Before application, the surface of the reversible protective film is subjected to plasma activation treatment to enhance interfacial adhesion.

4. The method for fabricating a printed circuit board for high-function power control according to claim 3, characterized in that, In step 5, the copper etching solution is an acidic copper chloride etching solution or an alkaline ammonia etching solution, wherein the etching selectivity ratio of aluminum to copper is ≥10:

1.

5. The method for fabricating a printed circuit board for high-function power control according to claim 4, characterized in that, In step 6, the exposure and development process utilizes the weak adhesion between the aluminum sacrificial layer and the solder resist ink to automatically remove residual ink from the solder resist bridge area after development, forming a clean solder resist bridge opening; the self-healing microcapsules have a particle size of 5μm to 50μm and account for 5% to 20% of the total volume of the solder resist layer.

6. The method for fabricating a printed circuit board for high-function power control according to claim 5, characterized in that, In step 7, the aluminum stripping solution is a weakly alkaline solution with a corrosion rate ≤0.1μm / min on the reversible protective film and thick copper circuit layer.

7. The method for fabricating a printed circuit board for high-function power control according to claim 6, characterized in that, In step 8, the reducing electrolyte is dilute sulfuric acid or dilute sodium hydroxide solution, the second voltage is 0.5V to 1.5V, and the roughness Ra of the reduced copper surface is ≤0.2μm.

8. The method for fabricating a printed circuit board for high-function power control according to claim 7, characterized in that, In step 6, the solder resist layer is heated and cured at a temperature of 80°C to 150°C to activate the curing mechanism of the self-healing microcapsules, thereby enabling the solder resist layer to acquire initial self-healing capabilities.

9. The method for manufacturing a printed circuit board for high-function power control according to claim 8, characterized in that, In step 6, the self-healing microcapsule comprises: The microcapsule shell is selected from one or more of urea-formaldehyde resin, melamine-formaldehyde resin, or polyurethane; The repair agent is encapsulated within the microcapsule shell, and the repair agent is selected from one or more of dicyclopentadiene, epoxy resin monomers, and acrylate monomers. A catalyst is dispersed in the solder resist layer, and the catalyst initiates a polymerization and curing reaction when it comes into contact with the repair agent.

10. The method for manufacturing a printed circuit board for high-function power control according to claim 9, characterized in that, A shape memory polymer layer is coated between the reversible protective film surface of the aluminum oxide film substrate and the aluminum sacrificial layer. The phase transition temperature of the shape memory polymer layer is 160°C to 200°C. The aluminum sacrificial layer covers the shape memory polymer layer. The shape memory polymer layer is a polyurethane-based or epoxy-based shape memory polymer, with a thickness of 5 μm to 20 μm.

11. The method for fabricating a printed circuit board for high-function power control according to claim 10, characterized in that, The contact angle between the surface of the aluminum sacrificial layer and the uncured solder resist ink is 92° to 97°, so that the residual ink in the solder bridge area can be automatically removed during the development process.

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