A three-layer protection dynamic risk assessment method based on system-level EMC data assets

Abstract

The application discloses a three-layer protection dynamic trade-off risk assessment method based on system-level EMC data assets, and belongs to the technical field of EMC risk assessment. After obtaining IC combination information, the application calls IC-level protection data from system-level EMC data assets, obtains PCB-level and system-level external protection data, quantifies three-layer protection effectiveness, constructs a dynamic trade-off model, calculates contribution weights and protection effectiveness equivalent conversion relationships of each layer, generates risk assessment results containing comprehensive risk values, assessment confidence and equivalent compensation schemes, stores the risk assessment results to a user local design knowledge base in the form of structured data assets, and continuously optimizes to generate risk guidance rule data assets. The application realizes quantitative linkage and dynamic trade-off of three-layer protection, can uniformly cover three scenes of design pre-evaluation, test diagnosis and on-site troubleshooting, and provides engineers with quantifiable risk assessment and iterative protection guidelines.

Description

Technical Field

[0001] This invention belongs to the field of electromagnetic compatibility (EMC) risk assessment technology, specifically involving a three-layer protection dynamic trade-off risk assessment method based on system-level EMC data assets. It is particularly suitable for integration into EMC intelligent design instruments or as a computer software product (including standalone applications, software plug-ins, etc.), providing hardware engineers with quantifiable risk assessments and dynamic trade-off protection solutions. It also supports multi-scenario input based on design documents, EMC test data, or field interference phenomena, outputting the confidence level of the assessment results and iterative risk guidance rules, realizing the digital accumulation of expert experience. Background Technology

[0002] Electromagnetic compatibility (EMC) design for electronic and electrical equipment typically involves three levels of protection: IC-level protection, PCB-level protection, and system-level external protection. IC-level protection includes measures such as built-in chip filtering, shielding, and pin decoupling; PCB-level protection includes port filtering, layout partitioning, layer stack-up design, and signal line crosstalk isolation; system-level external protection includes connector filtering, housing shielding, and cable overlap. These three levels of protection are interconnected and mutually influential, jointly determining the EMC performance of the equipment.

[0003] In practical engineering, EMC risk assessment faces three typical scenarios: first, pre-assessment during the design phase, predicting potential risks based on design documents; second, standards compliance assessment, diagnosing issues that fail EMC testing; and third, system integration assessment, addressing EMC problems encountered by equipment in real-world usage environments. All three scenarios require risk assessment based on different input information (design documents, test data, and field phenomena), but existing methods often only cover one scenario, lacking a unified assessment framework.

[0004] Traditional EMC risk assessment methods mainly rely on engineers' experience and general design rules, which have the following shortcomings:

[0005] First, existing methods lack the ability to quantitatively analyze complex electromagnetic coupling between ICs. Engineers typically lay out their systems based on principles such as "keeping high-speed ICs away from sensitive circuits" and "separate partitions for power ICs," but they cannot quantitatively assess the comprehensive impact of coupling strength between different ICs on the effectiveness of the three-layer protection system, nor can they determine which coupling paths are dominant in the three-layer protection system and require priority handling. Patent application CN121476793A discloses an electromagnetic compatibility testing method, device, and electronic equipment for rail transit signaling systems. It identifies interference risks by establishing a regional model based on the physical location of the equipment, but it focuses on interference localization between system-level devices and does not involve path decomposition and quantitative analysis of coupling between ICs, nor does it provide specific decoupling guidelines.

[0006] Second, existing technologies struggle to achieve coordinated assessment of three layers of protection. Engineers often examine enclosure shielding, PCB layout, and IC selection in isolation, unable to quantify the contribution weight of each protection layer, let alone answer dynamic trade-off questions such as "when IC-level shielding is not possible, how much filtering at the PCB level is needed for equivalent compensation?" Patent application CN120528812A discloses a system-level electromagnetic information security quantitative analysis method that identifies leakage paths by constructing an electromagnetic topology model; however, it targets information leakage protection in the field of information security and does not establish a quantitative correlation model between different protection layers.

[0007] Third, existing methods struggle to identify critical coupling paths between ICs. Inter-IC coupling can propagate through power paths, signal paths, or spatial radiation paths. Engineers often only know that "strong coupling exists between ICs," but struggle to distinguish the primary causes of coupling and their impact on the protection effectiveness of each layer, leading to blind selection of EMC measures. Patent application CN121349802A discloses a low-altitude aircraft chip safety monitoring system that monitors chip status through status acquisition and risk assessment modules. However, it focuses on anomaly detection during chip operation and does not provide a quantitative method for decomposing coupling paths, thus failing to identify the dominant coupling path type.

[0008] Fourth, existing design methods struggle to generate reusable experience assets, and even more so, they fail to quantitatively analyze the reliability of assessment conclusions. Design experiences from different projects and engineers are scattered across personal documents or individual records, unable to be systematically accumulated and reused, resulting in a lack of credible basis for design decisions. Patent application CN120658515A discloses a method and system for automatic SOAR handling driven by dynamic system risk assessment; however, it falls under the cybersecurity field, achieving automated handling through multi-dimensional risk scoring, but does not address the quantification of uncertainty and confidence analysis in EMC assessments.

[0009] Fifth, existing technologies lack a systematic mechanism for accumulating and reusing design experience. The experience of senior engineers is often presented in unstructured forms such as mentorship or paper documents, making it difficult to digitize and systematically integrate, and thus hindering its effective integration into design tools to support subsequent design decisions. While patent application CN121349802A involves chip security monitoring, it focuses on real-time monitoring rather than the transfer of experience during the design phase, and does not provide iterative risk guidance rules.

[0010] Sixth, existing methods fail to uniformly cover the three scenarios of design pre-assessment, test diagnosis, and on-site problem investigation. Pre-assessment requires design documents, diagnosis requires test data, and on-site investigation requires phenomenon descriptions, but existing methods usually only target a single input and cannot flexibly adapt to the needs of different scenarios.

[0011] In summary, existing technologies lack a risk assessment method that can quantify the effectiveness of the three external protection layers at the IC, PCB, and system levels based on multiple input information (design documents, test data, and field phenomena), identify the dominant coupling path, achieve dynamic trade-offs across layers, and be adaptive and continuously self-evolving across domains. It can also output assessment confidence levels and iterative risk guidance rules, thereby realizing the digital accumulation of expert experience. Summary of the Invention

[0012] The purpose of this invention is to provide a three-layer protection dynamic trade-off risk assessment method based on system-level EMC data assets, in order to solve the problems in the existing technology that EMC risk assessment is qualitative but not quantitative, the three-layer protection is isolated and difficult to link, the dominant coupling path is difficult to identify, the cross-domain dynamic trade-off lacks basis, the confidence of assessment conclusions cannot be quantified, the expert experience is difficult to systematically accumulate, and it cannot uniformly cover the three application scenarios of design pre-assessment, test diagnosis and on-site problem investigation.

[0013] To achieve the above objectives, the present invention provides the following technical solution:

[0014] A three-layer protection dynamic trade-off risk assessment method based on system-level EMC data assets includes the following steps:

[0015] S1. Obtain IC combination information of the target product, wherein the IC combination information includes the model identifier of at least one IC;

[0016] S2. Retrieve IC-level protection data that matches the IC combination information from the system-level EMC data assets. The IC-level protection data includes the intrinsic immunity threshold of the IC, interference emission intensity, equivalent source impedance of IC pins, parameters of the internal decoupling network of the IC, and parasitic parameter characteristics formed by the interconnection between ICs.

[0017] S3. When there is no IC-level protection data in the system-level EMC data asset that completely matches the IC combination information, a standardized requirement form is generated and sent to the data asset producer. The IC-level protection data generated by the producer based on the requirement is received and updated to the local data asset library.

[0018] S4. Obtain PCB-level protection data and system-level external protection data for the target product. The PCB-level protection data is obtained by parsing the design documents of the target product or retrieved from the user's local design knowledge base based on IC assembly information. The PCB-level protection data includes port filtering parameters, layout partitioning information, layer stack-up design parameters, crosstalk isolation measures between signal lines of different attributes, and the interconnection method between IC working ground and housing ground. The system-level external protection data is retrieved from the user's local design knowledge base or input by the user. The system-level external protection data includes connector filtering parameters, housing shielding effectiveness, cable shielding termination method, cable type, and trace loop area.

[0019] S5. Obtain the application scenario information of the target product, wherein the application scenario information corresponds to a preset EMC standard threshold and protection weight coefficient.

[0020] S6. Based on the IC-level protection data, PCB-level protection data and system-level external protection data, the IC-level protection effectiveness, PCB-level protection effectiveness and system-level external protection effectiveness are obtained quantitatively respectively. Combined with the protection weight coefficients corresponding to the application scenario information, a three-layer protection dynamic trade-off model is constructed.

[0021] S7. Using the three-layer protection dynamic trade-off model, calculate the contribution weight of each layer of protection under the current constraints and the equivalent conversion relationship of protection effectiveness between each layer.

[0022] S8. Based on the contribution weight and equivalent conversion relationship, generate a risk assessment result. The risk assessment result includes the comprehensive risk value, assessment confidence level, recommended three-layer protection combination under the current constraints and the application scenario information, and the equivalent compensation scheme of other layers when a certain layer of protection cannot be implemented or is insufficient in effectiveness due to cost, space, size or IC characteristics limitations.

[0023] S9. Store the risk assessment results in the form of structured data assets in the user's local design knowledge base. The structured data assets include comprehensive risk value, assessment confidence level, protection responsibility list, protection scheme set, equivalent compensation scheme and historical deviation record, and serve as callable data assets for subsequent product design.

[0024] S10. Based on the user's adoption of the recommended protection combination and the subsequent EMC test results, calculate the evaluation accuracy rate, update the local correction factor and evaluation confidence calibration parameters in the user's local design knowledge base, and use them to optimize the equivalent conversion accuracy and confidence level of subsequent risk assessments.

[0025] S11. Based on the historical evaluation results and test feedback accumulated in the user's local design knowledge base, continuously optimize the three-layer protection dynamic trade-off model, generate and update risk guidance rule data assets. The risk guidance rule data assets store typical risk scenarios, dominant path types, recommended protection combinations, equivalent conversion reference values ​​and expected success rates in a structured form, serving as an operational guide for engineers to conduct EMC risk assessments.

[0026] Furthermore, the system-level EMC data assets include a reference coupling coefficient matrix between ICs, power path coupling coefficients, signal path coupling coefficients, spatial radiation coupling coefficients, and common-mode loop impedance characteristics formed by IC interconnections; the IC-level protection data is retrieved from the system-level EMC data assets, including the intrinsic immunity threshold of the IC, interference emission strength, equivalent source impedance of IC pins, parameters of the IC internal decoupling network, and parasitic parameter characteristics formed by IC interconnections; the parasitic parameter characteristics include parasitic capacitance between IC pins, package lead inductance, and mutual inductance parameters between adjacent pins.

[0027] Furthermore, the application scenario information includes the domain identifier of the product's intended application, which corresponds to a preset EMC standard system. Different domain identifiers are associated with different EMC standard thresholds and protection weight coefficients. The protection weight coefficient is dynamically configured based on the electromagnetic environment severity, standard limit requirements, and historical failure data corresponding to the domain identifier.

[0028] Furthermore, the three-layer protection dynamic trade-off model includes:

[0029] The IC-level protection performance evaluation submodule is used to calculate the IC's immunity, emission suppression capability, and crosstalk sensitivity between IC pins based on IC-level protection data.

[0030] The PCB-level protection performance evaluation submodule is used to calculate the protection capabilities provided by port filtering, layout partitioning, layer stack-up design, signal line crosstalk isolation, and IC working ground and housing ground interconnection based on PCB-level protection data.

[0031] The system-level external protection effectiveness assessment submodule is used to calculate the protection capabilities provided by connector filtering, housing shielding, cable shield termination, cable type selection, and wiring loop area control based on system-level external protection data.

[0032] The dynamic trade-off engine is used to calculate the contribution weight of each layer of protection under given constraints, establish the equivalent conversion relationship of protection effectiveness between layers, and calculate the evaluation confidence level based on historical deviation data. When the EMC test data or interference phenomenon information of the target product is obtained, the dynamic trade-off engine is also used to call the interference source location database, identify the dominant interference source and its contribution ratio according to the test data or interference phenomenon information, and use the identification results to calibrate the calculation of the contribution weight of each layer of protection.

[0033] Furthermore, the equivalent conversion relationship of protection effectiveness is used to automatically calculate the amount of additional protection measures required for other layers when a certain layer of protection cannot be implemented or is insufficient due to cost, space, size, or IC characteristics limitations, so as to achieve equivalent overall protection effectiveness; the equivalent conversion relationship is recorded in the user's local design knowledge base to form a local correction factor; the equivalent conversion relationship includes the conversion between IC-level decoupling capability and the number of PCB-level decoupling capacitors, the conversion between IC-level shielding effectiveness and PCB-level layout spacing, and the conversion between PCB-level filtering capability and system-level cable shielding effectiveness.

[0034] Furthermore, the structured data assets include:

[0035] The comprehensive risk value is calculated based on the weighted summation of the external protection effectiveness at the IC, PCB, and system levels, as well as the coupling effect of risk points.

[0036] The confidence level is assessed based on a comprehensive evaluation of historical assessment deviation data, data asset matching degree, and scenario adaptation factors, and is divided into three levels: high, medium, and low.

[0037] The protection responsibility list clarifies which layer of protection should be primarily responsible for each risk point and the alternative solutions for each selected layer. The risk points include crosstalk between IC pins, common-mode loops between IC working ground and housing ground, and coupling paths between signal lines and power lines.

[0038] The protection solution suite includes a variety of quantifiable protection solution combinations, each with quantifiable labels for protection effectiveness, cost, space occupation, and expected success rate;

[0039] Equivalent compensation schemes: When the recommended scheme cannot be implemented due to constraints, equivalent compensation schemes at other levels are provided, along with the estimated risk level and confidence level changes after compensation.

[0040] Historical deviation records contain the comparison deviations between previous evaluation results and actual test data, which are used for subsequent confidence level calibration.

[0041] Furthermore, the risk guidance rule data asset includes risk scenario classification identifiers, dominant path type identifiers, recommended protection combination parameter sets, equivalent conversion reference values, historical success rate statistics and sample quantity, and is continuously iterated and updated as the user's local design knowledge base becomes richer.

[0042] Furthermore, the method is implemented as a risk warning module for an EMC intelligent design instrument. The instrument integrates system-level EMC data assets and supports user configuration of application scenario information. The risk warning module interacts with the IC combination information acquisition module, local knowledge base module, and data asset requirement generation module in the instrument through a standardized interface. When the risk warning module receives new IC combination information, it automatically triggers a risk assessment and pushes the assessment results to the user interface. The instrument also includes a risk guidance rule calling interface for reading the risk guidance rule data assets.

[0043] Furthermore, the method is implemented as a standalone computer software product. This software product can receive IC combination information input by the user, collaborate with system-level EMC data assets and the user's local design knowledge base, and generate storable structured data assets. The software product provides an application programming interface (API) for other software to call the risk assessment function. The software product supports batch importing of IC combination information for batch risk assessment and outputs batch assessment reports containing confidence levels. The software product also provides a risk guidance rule export function, outputting the risk guidance rule data assets in a readable format.

[0044] Furthermore, it also includes: feeding back the assessment results and test data accumulated from multiple rounds of projects to the design self-growth module, calculating the assessment accuracy rate, and dynamically adjusting the confidence level of the risk assessment results and the weighting coefficients of the equivalent conversion relationship of the protection effectiveness; automatically optimizing the local knowledge base and risk thresholds based on historical assessment results and test data, realizing the continuous self-growth of the user's local design knowledge base, so that subsequent risk assessment results gradually approach the actual EMC test results; the risk guidance rule data assets are automatically updated as the local knowledge base becomes richer, realizing the digital accumulation of expert experience.

[0045] Beneficial effects

[0046] First, by quantifying IC-level protection data, this invention transforms the EMC characteristics of the IC itself into quantifiable protection performance indicators, thus solving the problem that traditional EMC risk assessments can only qualitatively judge IC levels and cannot quantify them.

[0047] Secondly, by quantifying PCB-level protection data, this invention transforms PCB design rules into quantifiable protection performance indicators, thereby realizing a quantitative correlation between PCB design measures and IC-level and system-level protection.

[0048] Third, by quantifying system-level external protection data, this invention transforms system-level design measures into quantifiable protection performance indicators, thereby achieving a joint evaluation of system-level protection and IC-level and PCB-level protection.

[0049] Fourth, the three-layer protection dynamic trade-off model constructed in this invention, by introducing the equivalent conversion relationship of protection effectiveness, can quantitatively answer the quantitative value of compensation required by other layers when the protection of a certain layer is limited, providing engineers with a dynamic trade-off basis for cross-layer protection.

[0050] Fifth, this invention introduces the concept of assessment confidence level, which comprehensively considers historical assessment bias, data asset matching degree, and scenario adaptation factors to calculate the confidence level of the assessment results. This enables engineers to clearly understand the reliability of risk assessment conclusions and provides a confidence level reference for engineering decisions.

[0051] Sixth, this invention achieves cross-domain adaptive evaluation through scenario adaptation factors. When the same product is applied to different domains, the system automatically loads the corresponding EMC standard thresholds and protection weight coefficients to ensure that the evaluation results are accurately matched with the domain requirements.

[0052] Seventh, this invention stores the risk assessment results in the form of structured data assets in the user's local design knowledge base, and achieves system self-growth through continuous optimization of confidence calibration parameters, making the "the more you use it, the more accurate it becomes" characteristic quantifiable and verifiable.

[0053] Eighth, the risk guidance rule data asset constructed by this invention systematizes the design experience of senior engineers into quantifiable rules, realizes the storage and iterative updating of design knowledge in a structured form, and enables new engineers to complete risk assessments based on standardized rules, thereby realizing the transformation from "personal experience" to "organizational assets".

[0054] Ninth, this invention enables the system to continuously evolve through a closed-loop design of "evaluation → verification → calibration → rule-making → re-evaluation". The evolution effect is quantitatively characterized by the evaluation accuracy index, and the evolution results are solidified and deposited as risk guidance rules data assets.

[0055] Tenth, this invention uniformly covers three scenarios: design pre-assessment, test diagnosis, and on-site problem investigation. By being compatible with multi-source input information such as design documents, test data, and on-site phenomena, the dynamic trade-off model can adaptively adjust to achieve full-process coverage from risk prediction in the design phase, root cause diagnosis in the testing phase, to interference analysis in the on-site phase.

[0056] Eleventh, this invention supports multiple carrier forms such as EMC intelligent design instruments, standalone software, and PCB design software plug-ins, providing flexible application options for enterprises of different sizes and broadening the industrial application scenarios of the technical solution. Attached Figure Description

[0057] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0058] Figure 1 This is a flowchart of the method of the present invention.

[0059] Figure 2 This is a diagram showing the interaction relationships between modules in the EMC intelligent design instrument of this invention.

[0060] Figure 3 This is a schematic diagram illustrating the application of the present invention as a standalone software tool.

[0061] Figure 4 This is a schematic diagram illustrating the application of the present invention as a PCB design software plugin.

[0062] Figure 5 This is a schematic diagram of the data asset structure of the risk guidance rules of this invention. Detailed Implementation

[0063] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0064] The overall process of this invention includes: S1, acquiring IC combination information and EMC test data or interference phenomenon information of the target product; S2, retrieving IC-level protection data matching the IC combination information from the system-level EMC data asset; S3, when there is no IC-level protection data that completely matches the IC combination information in the system-level EMC data asset, generating a standardized requirement form and sending it to the data asset producer, receiving the IC-level protection data generated by the producer based on the requirement and updating it to the local data asset library; S4, acquiring PCB-level protection data and system-level external protection data; S5, acquiring application scenario information; S6, quantifying the three-layer protection effectiveness and constructing a three-layer protection dynamic trade-off model; S7, calculating the contribution weight of each layer of protection and the equivalent conversion relationship of protection effectiveness; S8, generating risk assessment results; S9, storing the risk assessment results in the form of structured data assets in the user's local design knowledge base; S10, calculating the assessment accuracy rate based on the adoption status and test results, and updating the local correction factor; S11, continuously optimizing based on historical data, generating and updating risk guidance rule data assets.

[0065] The following three embodiments illustrate the specific applications of the present invention in three carriers: EMC intelligent design instruments, standalone software tools, and PCB design software plug-ins, covering three scenarios: design pre-evaluation, test diagnosis, and on-site problem troubleshooting.

[0066]

Example 1

[0067] This embodiment uses the integration of the method of the present invention into an EMC intelligent design instrument as an example to illustrate the application of risk assessment pre-assessment based on design documents during the design phase.

[0068] An engineer is designing an electronic control unit for a new energy vehicle. The system includes the following ICs:

[0069] IC1-1 (Main control chip, model TC397, operating frequency 300MHz).

[0070] IC1-2 (Power Management IC, model TLF35584, operating frequency 2.2MHz);

[0071] IC1-3 (CAN transceiver, model TJA1044, operating frequency 5MHz);

[0072] IC1-4 (Gate driver, model 1ED020I12-F2, operating frequency 100kHz).

[0073] Step S1: The engineer inputs the above IC combination information into the EMC intelligent design instrument. At this time, there is no test data, so only the IC information is input.

[0074] Step S2: The instrument retrieves IC-level protection data matching the IC combination information from the system-level EMC data assets. Taking IC1-1 as an example, the retrieved data includes: intrinsic immunity threshold 3V / m (corresponding to 300MHz frequency); interference emission strength 45dBμV (corresponding to 300MHz frequency); pin equivalent source impedance: power pin 12Ω@100MHz, signal pin 50Ω@100MHz; internal decoupling network parameters approximately 100pF; parasitic capacitance between IC1-1 and IC1-2 approximately 0.5pF; package lead inductance approximately 2nH.

[0075] Step S3: The complete data of the above ICs already exists in the system-level EMC data assets, so there is no need to generate it.

[0076] Step S4: The instrument analyzes the current design file to obtain PCB-level protection data: The power input has a π-type filter (10μH + 100μF + 0.1μF); the digital and analog areas are not completely isolated; it's a 4-layer board with a 0.2mm gap between the signal layer and the ground plane; the clock line is not grounded; the IC ground and the housing ground are connected via a single point. System-level external protection data is retrieved from the user's local design knowledge base: no filter connector is used; the aluminum alloy housing has a shielding effectiveness of 60dB@100MHz; the cable shielding layer has a 360° loop; the power cable is an unshielded twisted pair with a loop area of ​​approximately 15cm².

[0077] Step S5: Configure the application scenario as "Automotive Electronics". The instrument will automatically load the corresponding EMC standard threshold (CISPR 25 Class 3) and protection weight coefficient (IC level 0.4, PCB level 0.3, system level 0.3).

[0078] Step S6: Based on the acquired data, the instrument quantifies the effectiveness of the three layers of protection. Simultaneously, based on the user's local design knowledge base, it statistically calculates the factors influencing the confidence level of this assessment: data asset matching degree 95%; historical assessment deviation rate ±8%; scenario adaptation factor confidence level 90%.

[0079] Step S7: The dynamic tradeoff engine calculates the contribution weight of each layer of protection under the current constraints: IC level contribution 0.4 × 0.85 = 0.34; PCB level contribution 0.3 × 0.65 = 0.195; System level contribution 0.3 × 0.5 = 0.15. The overall risk value is 0.315, corresponding to medium risk. Establish an equivalent conversion relationship: if the IC level shielding effectiveness decreases by 10dB, the PCB level needs to add 5dB of filtering or the system level needs to add 8dB of shielding to compensate.

[0080] Step S8: The instrument generates a risk assessment result, including: a comprehensive risk value of 0.315 (medium risk); a medium confidence level (based on historical deviation ±8%); a recommended three-layer protection combination: maintain the existing IC selection, add local decoupling between IC1-1 and IC1-2, ground the PCB clock line, add isolation slots between the digital and analog areas, replace the system power line with a shielded cable, and add filtering to the connector; and an equivalent compensation scheme: if the shielded cable cannot be replaced due to cost, a second-order LC filter needs to be added at the PCB level to improve the filtering efficiency from 20dB to 28dB. After compensation, the risk level is estimated to decrease to 0.28, and the confidence level decreases to medium-low.

[0081] Step S9: The risk assessment results described above are stored in the user's local design knowledge base in the form of structured data assets.

[0082] Step S10: Subsequent EMC testing showed that after implementing the core measures, the radiated emission at the 300MHz frequency point decreased by 12dB, which deviated from the expected effect of 15dB by 3dB. The instrument calculated the deviation of this evaluation to be 20%, which is higher than the historical average deviation of ±8% in the user's local design knowledge base, and the confidence calibration parameters were updated.

[0083] Step S11: The instrument adds the assessment data to the user's local design knowledge base, updates the relevant rule entries in the "Automotive Electronics" field of the risk guidance rule data asset, and adds a new record, which includes the risk scenario identifier "Automotive Electronic Control 300MHz Radiation", the dominant path type identifier "Power Path", the recommended protection combination parameters "IC-level Decoupling + PCB Grounding", the equivalent conversion reference value "IC Decoupling 10dB ≈ PCB Grounding 6dB", the historical success rate of 80%, and the sample size of 1.

[0084] This embodiment demonstrates a typical application of the method of the present invention in risk assessment pre-assessment based on design documents in EMC intelligent design instruments.

[0085]

Example 2

[0086] This embodiment uses the method of the present invention as an independent software tool as an example to illustrate the application of risk assessment based on measured data in the test and diagnosis mode.

[0087] An engineer encountered a problem with an in-vehicle infotainment system exhibiting excessive radiation at a frequency of 250MHz during EMC testing, and used a standalone software tool for diagnosis. The system includes the following ICs:

[0088] IC2-1 (Application processor, model i.MX8, operating frequency 1.2GHz, its 250MHz harmonics need to be monitored).

[0089] IC2-2 (DDR4 memory, model MT40A512M16, operating frequency 1600MHz, harmonics may fall at 250MHz).

[0090] IC2-3 (Power management IC, model MAX20014, operating frequency 2.2MHz, high-frequency harmonics negligible).

[0091] Step S1: The engineer inputs the measured spectrum (showing that the 250MHz frequency point exceeds the standard by 8dB) into the software, and also inputs the IC combination information mentioned above.

[0092] Step S2: The software retrieves IC-level protection data matching the IC combination information from the system-level EMC data assets, including the reference coupling coefficient and its corresponding coupling confidence level. For example, the reference coupling coefficient of IC2-1 to IC2-2 is 0.65, of which spatial radiation contributes 0.45 (69.2%), power path contributes 0.15 (23.1%), and signal path contributes 0.05 (7.7%); the coupling confidence level obtained from the data assets is 75% (due to differences between PCB stack-up and the reference test environment).

[0093] Step S3: The complete data of the above ICs already exists in the system-level EMC data assets, so there is no need to generate it.

[0094] Step S4: The software parses the PCB design file input by the user to obtain PCB-level protection data (such as the spacing between the processor and memory, the combination and capacitance of power supply decoupling capacitors, etc.), and retrieves system-level external protection data (such as the shielding effectiveness of the enclosure, cable type, etc.) from the user's local design knowledge base.

[0095] Step S5: Configure the application scenario as "Automotive Electronic Entertainment Device". The software will automatically load the corresponding EMC standard threshold (CISPR 25 Class 3) and protection weight coefficient (IC level 0.5, PCB level 0.3, system level 0.2).

[0096] Step S6: The software quantifies the IC-level protection performance, PCB-level protection performance, and system-level external protection performance based on the acquired data. Simultaneously, it calls the interference source localization database and, based on the measured spectrum, identifies the 250MHz harmonic of IC2-1 as the main contributing source (approximately 60%), the 250MHz harmonic of IC2-2 as contributing approximately 30%, and the remainder as power path coupling.

[0097] Step S7: The dynamic tradeoff engine calibrates the model using measured data and interference source localization results, identifying the critical coupling path as IC2-1 to IC2-2, with spatial radiation (69.2%) as the dominant path. Based on the average evaluation deviation of ±10% for in-vehicle entertainment system products in the user's local design knowledge base, the software sets the evaluation confidence level for this assessment to "medium".

[0098] Step S8: Software generates risk assessment results: Overall risk value 0.55; assessment confidence level is medium; recommended three-layer protection combination includes mandatory instruction (move IC2-2 out of the near-field area of ​​IC2-1, increasing the spacing from the current 5mm to more than 15mm), reserved instruction (reserve a grounding via isolation strip between IC2-1 and IC2-2, and reserve a shield pad above IC2-1), and auxiliary suggestion (add a ferrite bead, model BLM18PG121SN1, to the power pin of IC2-1); estimated effect: after implementing the mandatory instruction, the expected overall risk value will drop to below 0.42, with a fluctuation range of ±15%.

[0099] Steps S9-S10: After adjusting the layout as instructed, the engineer retested and the radiation level dropped to near the limit (exceeding the limit by 2dB). Subsequently, pre-emptive measures were implemented (adding grounding vias and isolation strips), and the test passed. The measured comprehensive risk value was 0.44, deviating from the expected value of 0.42 by 4.8%, which is lower than the historical average deviation of ±10% in the user's local design knowledge base. The software added this successful case to the user's local design knowledge base and updated the evaluation accuracy.

[0100] Step S11: The software adds the diagnostic data to the user's local design knowledge base, updates the relevant rule entries in the "In-vehicle Entertainment System" field of the risk guidance rule data asset, and adds a new record, which includes the risk scenario identifier "In-vehicle Entertainment 250MHz Radiation", the dominant path type identifier "Spatial Radiation", the recommended protection combination parameters "Spacing ≥ 15mm + Grounding Isolation", the equivalent conversion reference value "10mm Spacing ≈ 6dB Shielding Effectiveness", the historical success rate of 90%, and the sample quantity of 1.

[0101] This embodiment demonstrates the diagnostic capability of the method of the present invention as a standalone software tool for risk assessment in a test and diagnostic mode.

[0102]

Example 3

[0103] This embodiment uses the method of the present invention as a PCB design software plug-in as an example to illustrate its application in real-time risk assessment and on-site problem investigation during the design process.

[0104] An engineer is designing an RF front-end module for automotive millimeter-wave radar. The system includes the following ICs:

[0105] IC3-1 (RF transceiver, model AWR1843, operating frequency 77GHz).

[0106] IC3-2 (Power amplifier, model MMPA-76, operating frequency 77GHz);

[0107] IC3-3 (Phase-locked loop, model LMX2595, operating frequency 15GHz);

[0108] IC3-4 (Digital Signal Processor, model TMS320C6748, operating frequency 456MHz);

[0109] IC3-5 (Power Management IC, model TPS7A94, operating frequency 2.2MHz).

[0110] Applications during the design phase:

[0111] First round of evaluation: The component automatically extracts IC combination information from the schematic, retrieves IC-level protection data from system-level EMC data assets, and obtains PCB-level protection data in real time by parsing the current layout. The evaluation results show that the overall risk value of IC3-1 to IC3-2 is 0.85 (high risk), with an evaluation confidence level of "low" (due to the extreme sensitivity of millimeter-wave ICs to layout and large historical deviations). The component highlights IC3-2 in red and indicates "high risk, low confidence level, it is recommended to adopt a layout adjustment plan and retain sufficient shielding and filtering reserves." The engineer adopted the suggestion, adjusted the spacing between IC3-1 and IC3-2 to more than 3mm, and reserved shielding pads.

[0112] Second round of evaluation: The adjusted overall risk value decreased to 0.55 (medium risk), and the assessment confidence level was improved to "low-medium". The plugin indicated, "The risk has been reduced, but coupling in the 77GHz band still needs attention; it is recommended to add decoupling capacitors to the power path." The engineer added 0.1μF and 10pF parallel capacitors to the IC3-1 power pin. The initial test showed an actual coupling coefficient of 0.58, a deviation of 5.5% from the expected value of 0.55. The plugin recorded this deviation and updated the user's local design knowledge base for millimeter-wave products.

[0113] Applications for on-site problem diagnosis:

[0114] During real-vehicle testing, the radar module experienced intermittent false alarms. The field engineer input a description of the phenomenon ("radar falsely detecting obstacles under specific operating conditions") into the plugin. The plugin automatically converted the phenomenon into an interference spectrum hypothesis (potentially related to the 77GHz band), accessed the interference source location database, and retrieved the device's design documents and IC combination information to rerun the three-layer protection dynamic trade-off model. The engine used the field phenomenon to calibrate the model, identifying that the problem might be caused by power supply noise from the power amplifier IC3-2 coupling to the sensitivity adjustment pin of the transceiver IC3-1. The plugin suggested checking the adequacy of the IC3-2 power supply filter and measuring its power supply ripple. Field testing revealed that the IC3-2 power supply ripple was 5mV higher than the data asset baseline. Based on this, the plugin updated its local correction factor and prompted "Add LC filter (4.7μH + 10μF) to the IC3-2 power supply pin." After implementation, the false alarm problem was resolved.

[0115] Post-project accumulation evaluation: Through the accumulation of multiple millimeter-wave radar projects, the user's local design knowledge base now contains 25 samples. The average evaluation deviation has converged from ±25% to ±10%, significantly improving the evaluation accuracy. The plugin automatically updates the relevant rule entries in the "millimeter-wave radar" field of the risk guidance rules data asset, adding multiple new records.

[0116] This embodiment demonstrates the comprehensive application of the method of the present invention as a PCB design software plug-in for risk assessment during the design phase and on-site problem troubleshooting.

[0117] Application Examples

[0118] 1. Application of EMC intelligent design instruments: Server motherboard pre-evaluation

[0119] During the design phase of a high-performance server motherboard, engineers input IC combination information, including processors, memory controllers, and power management ICs, using an intelligent EMC design instrument. The instrument retrieves protection data for each IC from system-level EMC data assets and, combined with design file analysis, obtains PCB-level protection data (such as power layer distribution and signal layer stacking) and system-level external protection data (such as chassis shielding and heatsink grounding). The instrument automatically configures the application scenario as a "data center environment," loading the corresponding EMC standard thresholds (such as CISPR 32 Class A) and protection weight coefficients. A three-layer protection dynamic trade-off model quantifies the IC-level protection effectiveness, PCB-level protection effectiveness, and system-level external protection effectiveness, calculating the contribution weight of each layer of protection and the equivalent conversion relationship of protection effectiveness, generating a risk assessment result. This result includes a comprehensive risk value, assessment confidence level, recommended three-layer protection combination, and equivalent compensation scheme. For example, when processor IC-level shielding is limited, the model automatically provides the number and layout suggestions for adding power decoupling capacitors at the PCB level. After engineers adopt the suggestions and adjust the layout, the server passes EMC testing on the first attempt. The entire assessment process and results are stored in the user's local design knowledge base in the form of structured data assets, and the risk guidance rules data assets are updated simultaneously to provide a reference for the design of subsequent server products.

[0120] 2. Application in standalone software tools: Diagnostic applications for automotive millimeter-wave radar transceiver modules

[0121] An automotive millimeter-wave radar transceiver module exhibited abnormal radiation in the 76-81 GHz band during EMC testing. Engineers input the measured spectrum into a standalone software tool. The software retrieved protection data for relevant ICs (such as RF transceiver IC3-1 and power amplifier IC3-2) from system-level EMC data assets and identified the dominant interference source (power amplifier IC3-2 contributed approximately 70%) using an interference source location database. The software, combined with current PCB layout parameters (such as the distance between the transceiver and power amplifier, and antenna trace structure), ran a three-layer protection dynamic trade-off model to quantify IC-level protection effectiveness, PCB-level protection effectiveness, and system-level external protection effectiveness. It calculated the contribution weight of each layer of protection and the equivalent conversion relationship of protection effectiveness, generating a risk assessment report. The report indicated that the dominant coupling path was spatial radiation and provided a recommended protection combination with an assessment confidence level (medium): mandatory instructions (increasing the distance between the power amplifier and transceiver to more than 5 mm) and reserved instructions (reserving shielding pads above the power amplifier and adding grounding vias on both sides of the RF traces). After adjusting the settings as instructed, the engineers retested, and the radiation level was reduced to below the limit. The software stores the diagnostic data and results in the user's local design knowledge base and updates the local correction factors, gradually improving the accuracy of evaluations for subsequent similar millimeter-wave radar projects.

[0122] 3. Iterative Design of Complex Systems: Evolution of User-Local Design Knowledge Base and Risk Guidance Rules

[0123] In multiple projects for a telecommunications equipment manufacturer, the design team has consistently used the method of this invention for EMC risk assessment. Each assessment result, adopted protection scheme, and subsequent EMC test data are recorded and stored in the user's local design knowledge base. With project accumulation, the local correction factor is continuously optimized, the model's accuracy in equivalent conversion of protection effectiveness at each layer gradually improves, and the risk guidance rule data asset continuously evolves based on accumulated assessment results and test feedback, adding recommended protection combinations and equivalent conversion reference values ​​for multiple typical risk scenarios, along with historical success rate statistics. When a new project starts, engineers can quickly access risk guidance rules for similar scenarios, significantly improving design efficiency. This process achieves the digital accumulation from "personal experience" to "organizational assets," enabling the system's assessment accuracy and adaptability to continuously evolve.

[0124] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A three-layer protection dynamic trade-off risk assessment method based on system-level EMC data assets, characterized in that, Includes the following steps: S1. Obtain IC combination information of the target product, wherein the IC combination information includes the model identifier of at least one IC; S2. Retrieve IC-level protection data that matches the IC combination information from the system-level EMC data assets. The IC-level protection data includes the intrinsic immunity threshold of the IC, interference emission intensity, equivalent source impedance of IC pins, parameters of the internal decoupling network of the IC, and parasitic parameter characteristics formed by the interconnection between ICs. S3. When there is no IC-level protection data in the system-level EMC data asset that completely matches the IC combination information, a standardized requirement form is generated and sent to the data asset producer. The IC-level protection data generated by the producer based on the requirement is received and updated to the local data asset library. S4. Obtain PCB-level protection data and system-level external protection data for the target product. The PCB-level protection data is obtained by parsing the design documents of the target product or retrieved from the user's local design knowledge base based on IC assembly information. The PCB-level protection data includes port filtering parameters, layout partitioning information, layer stack-up design parameters, crosstalk isolation measures between signal lines of different attributes, and the interconnection method between IC working ground and housing ground. The system-level external protection data is retrieved from the user's local design knowledge base or input by the user. The system-level external protection data includes connector filtering parameters, housing shielding effectiveness, cable shielding termination method, cable type, and trace loop area. S5. Obtain the application scenario information of the target product, wherein the application scenario information corresponds to a preset EMC standard threshold and protection weight coefficient. S6. Based on the IC-level protection data, PCB-level protection data and system-level external protection data, the IC-level protection effectiveness, PCB-level protection effectiveness and system-level external protection effectiveness are obtained quantitatively respectively. Combined with the protection weight coefficients corresponding to the application scenario information, a three-layer protection dynamic trade-off model is constructed. S7. Using the three-layer protection dynamic trade-off model, calculate the contribution weight of each layer of protection under the current constraints and the equivalent conversion relationship of protection effectiveness between each layer. S8. Based on the contribution weight and equivalent conversion relationship, generate a risk assessment result. The risk assessment result includes the comprehensive risk value, assessment confidence level, recommended three-layer protection combination under the current constraints and the application scenario information, and the equivalent compensation scheme of other layers when a certain layer of protection cannot be implemented or is insufficient in effectiveness due to cost, space, size or IC characteristics limitations. S9. Store the risk assessment results in the form of structured data assets in the user's local design knowledge base. The structured data assets include comprehensive risk value, assessment confidence level, protection responsibility list, protection scheme set, equivalent compensation scheme and historical deviation record, and serve as callable data assets for subsequent product design. S10. Based on the user's adoption of the recommended protection combination and the subsequent EMC test results, calculate the evaluation accuracy rate, update the local correction factor and evaluation confidence calibration parameters in the user's local design knowledge base, and use them to optimize the equivalent conversion accuracy and confidence level of subsequent risk assessments. S11. Based on the historical evaluation results and test feedback accumulated in the user's local design knowledge base, continuously optimize the three-layer protection dynamic trade-off model, generate and update risk guidance rule data assets. The risk guidance rule data assets store typical risk scenarios, dominant path types, recommended protection combinations, equivalent conversion reference values ​​and expected success rates in a structured form, serving as an operational guide for engineers to conduct EMC risk assessments.

2. The method according to claim 1, characterized in that, The system-level EMC data assets include the reference coupling coefficient matrix between ICs, power path coupling coefficient, signal path coupling coefficient, spatial radiation coupling coefficient, and common-mode loop impedance characteristics formed by the interconnection between ICs. The IC-level protection data is retrieved from the system-level EMC data assets and includes the IC's intrinsic immunity threshold, interference emission strength, IC pin equivalent source impedance, IC internal decoupling network parameters, and parasitic parameter characteristics formed by IC interconnections. The parasitic parameter characteristics include parasitic capacitance between IC pins, package lead inductance, and mutual inductance parameters between adjacent pins.

3. The method according to claim 1, characterized in that, The application scenario information includes the domain identifier of the product's intended application. The domain identifier corresponds to a preset EMC standard system. Different domain identifiers are associated with different EMC standard thresholds and protection weight coefficients. The protection weight coefficient is dynamically configured based on the electromagnetic environment severity, standard limit requirements, and historical failure data corresponding to the domain identifier.

4. The method according to claim 1, characterized in that, The three-layer protection dynamic trade-off model includes: The IC-level protection performance evaluation submodule is used to calculate the IC's immunity, emission suppression capability, and crosstalk sensitivity between IC pins based on IC-level protection data. The PCB-level protection performance evaluation submodule is used to calculate the protection capabilities provided by port filtering, layout partitioning, layer stack-up design, signal line crosstalk isolation, and IC working ground and housing ground interconnection based on PCB-level protection data. The system-level external protection effectiveness assessment submodule is used to calculate the protection capabilities provided by connector filtering, housing shielding, cable shield termination, cable type selection, and wiring loop area control based on system-level external protection data. The dynamic trade-off engine is used to calculate the contribution weight of each layer of protection under given constraints, establish the equivalent conversion relationship of protection effectiveness between layers, and calculate the evaluation confidence level based on historical deviation data. When the EMC test data or interference phenomenon information of the target product is obtained, the dynamic trade-off engine is also used to call the interference source location database, identify the dominant interference source and its contribution ratio according to the test data or interference phenomenon information, and use the identification results to calibrate the calculation of the contribution weight of each layer of protection.

5. The method according to claim 4, characterized in that, The equivalent conversion relationship of protection effectiveness is used to automatically calculate the amount of additional protection measures required for other layers when a certain layer of protection cannot be implemented or is insufficient due to cost, space, size or IC characteristics limitations, so as to achieve equivalent overall protection effectiveness. The equivalent conversion relationship is recorded in the user's local design knowledge base to form a local correction factor. The equivalent conversion relationship includes the conversion between IC-level decoupling capability and the number of PCB-level decoupling capacitors, the conversion between IC-level shielding effectiveness and PCB-level layout spacing, and the conversion between PCB-level filtering capability and system-level cable shielding effectiveness.

6. The method according to claim 1, characterized in that, The structured data assets include: The comprehensive risk value is calculated based on the weighted summation of the external protection effectiveness at the IC, PCB, and system levels, as well as the coupling effect of risk points. The confidence level is assessed based on a comprehensive evaluation of historical assessment deviation data, data asset matching degree, and scenario adaptation factors, and is divided into three levels: high, medium, and low. The protection responsibility list clarifies which layer of protection should be primarily responsible for each risk point and the alternative solutions for each selected layer. The risk points include crosstalk between IC pins, common-mode loops between IC working ground and housing ground, and coupling paths between signal lines and power lines. The protection solution suite includes a variety of quantifiable protection solution combinations, each with quantifiable labels for protection effectiveness, cost, space occupation, and expected success rate; Equivalent compensation schemes: When the recommended scheme cannot be implemented due to constraints, equivalent compensation schemes at other levels are provided, along with the estimated risk level and confidence level changes after compensation. Historical deviation records contain the comparison deviations between previous evaluation results and actual test data, which are used for subsequent confidence level calibration.

7. The method according to claim 1, characterized in that, The risk guidance rules data asset includes risk scenario classification identifiers, dominant path type identifiers, recommended protection combination parameter sets, equivalent conversion reference values, historical success rate statistics and sample size, and is continuously iterated and updated as the user's local design knowledge base becomes richer.

8. The method according to claim 1, characterized in that, The method is implemented as a risk warning module for an EMC intelligent design instrument. The instrument integrates system-level EMC data assets and supports user configuration of application scenario information. The risk warning module interacts with the IC combination information acquisition module, local knowledge base module, and data asset requirement generation module in the instrument through a standardized interface. When the risk warning module receives new IC combination information, it automatically triggers a risk assessment and pushes the assessment results to the user interface. The instrument also includes a risk guidance rule calling interface for reading the risk guidance rule data assets.

9. The method according to claim 1, characterized in that, The method is implemented as an independent computer software product. The software product can receive IC combination information input by the user, work in conjunction with system-level EMC data assets and user local design knowledge base, and generate storable structured data assets. The software product provides an application programming interface (API) for other software to call the risk assessment function; the software product supports batch import of IC combination information for batch risk assessment and outputs batch assessment reports including confidence levels; the software product also provides a risk guidance rule export function, which outputs the risk guidance rule data assets in a readable format.

10. The method according to claim 1, characterized in that, Also includes: The evaluation results and test data accumulated from multiple rounds of projects are fed back to the self-growing design module to calculate the evaluation accuracy and dynamically adjust the confidence level of the risk assessment results and the weight coefficient of the equivalent conversion relationship of the protection effectiveness. Based on historical assessment results and test data, the local knowledge base and risk thresholds are automatically optimized to enable continuous self-growth of the user's local design knowledge base, so that subsequent risk assessment results gradually approach actual EMC test results. The risk guidance rules data assets are automatically updated as the local knowledge base becomes richer, enabling the digital accumulation of expert experience.

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