Massive data chip verification method, system and storage medium

Abstract

This application relates to the field of chip verification, providing a method, system, and storage medium for verifying large-scale data chips. The method includes: an excitation driving module sending initialization parameters to a file interaction module; a software calculation module generating test data based on the initialization parameters, sending the test data to the file interaction module, and sending simulation calculation results to the file interaction module, wherein the simulation calculation results are obtained by the software calculation module through testing; a result collection module acquiring and storing the simulation calculation results; the excitation driving module sending the test data to the large-scale data chip; and the result collection module acquiring the test results of the large-scale data chip, comparing the simulation calculation results and the test results, and obtaining and outputting the comparison results. This application embodiment can transform operations such as generating test data and performing tests based on the test data, which are implemented using hardware description languages, into non-hardware description language implementations, thereby improving the efficiency of chip testing and saving computing resources.

Description

Technical Field

[0001] This application relates to the field of chip verification, and more specifically to a method, system, and storage medium for large-scale data chip verification. Background Technology

[0002] During chip verification, multiple steps, including stimulus generation, signal detection, and result comparison, are performed within the simulator using a hardware description language. The chip's calculation results are compared with the correct calculation results from the reference model to verify whether the chip's calculations are correct. However, for large-scale data chips, the computational scale is large and the operations are complex, resulting in a large computational load for chip verification, making it difficult to implement chip verification using a hardware description language. Summary of the Invention

[0003] This application provides a method, system, and storage medium for verifying large-scale data chips, which can realize the verification of large-scale data chips.

[0004] In a first aspect, embodiments of this application provide a method for verifying large-scale data chips, applied to a large-scale data chip verification system. The large-scale data chip verification system includes an excitation-driven module, a software computing module, a file interaction module, and a result collection module. The method includes: the excitation-driven module sending initialization parameters to the file interaction module, the initialization parameters being used to generate test data for testing the large-scale data chip; the software computing module generating the test data according to the initialization parameters; the software computing module sending the test data to the file interaction module; the software computing module sending simulation calculation results to the file interaction module, the simulation calculation results being obtained by the software computing module through testing based on the test data; the result collection module acquiring and storing the simulation calculation results from the file interaction module; the excitation-driven module sending the test data read from the file interaction module to the large-scale data chip; the result collection module acquiring the test results of the large-scale data chip; the result collection module comparing the simulation calculation results and the test results to obtain a comparison result; and the result collection module outputting the comparison result.

[0005] In some implementations, the result collection module compares the simulation calculation results and the test results, including: comparing the simulation calculation results and the test results; if the test results and the simulation calculation results are the same, the large-scale data chip verification is successful; otherwise, the large-scale data chip verification fails.

[0006] In some implementations, the software calculation module includes a large-scale data generation model and a data calculator. The software calculation module generating test data based on the initialization parameters is implemented as the large-scale data generation model generating test data based on the initialization parameters. The software calculation module sending test data to the file interaction module is implemented as the large-scale data generation model sending test data to the file interaction module. The method further includes: the data calculator reading test data from the file interaction module; the data calculator performing tests based on the test data to obtain the simulation calculation results; and the software calculation module sending the simulation calculation results to the file interaction module is implemented as the data calculator sending the simulation calculation results to the file interaction module. The large-scale data generation model is implemented using a Python script. The data calculator includes a GMP library.

[0007] In some implementations, the initialization parameters include: the testing requirements of the large-scale data chip and the magnitude of computation during the testing of the large-scale data chip.

[0008] In some implementations, the stimulus-driven module runs in the Universal Verification Methodology (UVM) verification environment.

[0009] In some implementations, the stimulus-driven module is used to verify multiple large-scale data chips. Before the stimulus-driven module sends initialization parameters to the file interaction module, the method further includes: the stimulus-driven module receiving a verification request, the verification request indicating the identifier of the large-scale data chip to be verified. The stimulus-driven module determines the initialization parameters to be sent based on the verification request.

[0010] In some implementations, the verification request includes an identifier of the large-scale data chip to be verified.

[0011] Secondly, embodiments of this application provide a large-scale data chip verification system, the system comprising: an excitation-driven module, a software computing module, a file interaction module, and a result collection module. The excitation-driven module, software computing module, file interaction module, and result collection module can be implemented in hardware or by hardware executing corresponding software. The excitation-driven module is configured to send initialization parameters to the file interaction module, the initialization parameters being used to generate test data for testing the large-scale data chip.

[0012] The software calculation module is configured to generate test data based on the initialization parameters.

[0013] The software calculation module is configured to send test data to the file interaction module.

[0014] The software calculation module is also configured to send simulated calculation results to the file interaction module, the simulated calculation results being obtained by the software calculation module based on test data.

[0015] The result collection module is configured to obtain and store the simulation calculation results from the file interaction module.

[0016] The stimulus-driven module is configured to send test data read from the file interaction module to a large-scale data chip.

[0017] The result collection module is configured to acquire the test results of the large-scale data chip.

[0018] The result collection module is configured to compare the simulation calculation results and the test results to obtain comparison results.

[0019] The result collection module is configured to output the comparison results.

[0020] Thirdly, embodiments of this application provide a computer-readable storage medium including instructions that, when executed on a computer, cause the computer to perform the method described in the first aspect.

[0021] Fourthly, embodiments of this application provide a computing device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method described in the first aspect.

[0022] Fifthly, embodiments of this application provide a chip including a processor coupled to a transceiver for executing the technical solution provided in the first aspect of this application. In one possible design, the chip can also be a dedicated hardware structure for implementing the technical solution provided in the first aspect above; for example, processing involving neural network models can be implemented by a dedicated neural network processor or a graphics processor.

[0023] In a sixth aspect, embodiments of this application provide a chip system including a processor for implementing the functions involved in the first aspect above, such as generating or processing information involved in the method provided in the first aspect above.

[0024] In one possible design, the aforementioned chip system further includes a memory connected to the processor via a circuit structure. This memory stores program instructions and data necessary for the terminal. The chip system can be composed of a single chip or may include chips and other discrete devices. Further optionally, the chip also includes a communication interface to which the processor connects. The communication interface receives data and / or information that needs to be processed. The processor obtains the data and / or information from the communication interface, processes the data and / or information, and outputs the processing result through the communication interface. This communication interface can be an input / output interface.

[0025] In a seventh aspect, embodiments of this application provide a computer program product containing instructions that, when run on a computer, cause the computer to perform the method provided in the first aspect described above.

[0026] Compared to existing technologies, the embodiments of this application can transform operations such as generating test data and performing tests based on test data, which are implemented using hardware description languages, into non-hardware description language implementations, thereby improving the efficiency of chip testing and saving computing resources. Attached Figure Description

[0027] The objectives, features, and advantages of the embodiments of this application will become readily understood by referring to the accompanying drawings and the detailed description of the embodiments. Wherein: Figure 1 This is a schematic diagram of a large-scale data chip verification system in an embodiment of this application; Figure 2 This is a flowchart illustrating a large-scale data chip verification method according to an embodiment of this application; Figure 3 A schematic diagram showing the setup of an excitation-driven module in a UVM verification environment according to an embodiment of this application; Figure 4 This is another schematic diagram illustrating the setup of the excitation-driven module in the UVM verification environment according to an embodiment of this application.

[0028] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts. Detailed Implementation

[0029] The terms "comprising" and "having," and any variations thereof, in the specification, claims, and accompanying drawings of this application, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not explicitly listed or inherent to such process, method, product, or device.

[0030] In existing technologies, the verification process for large-scale data chips is as follows: A Universal Verification Methodology (UVM) component in the verification platform generates large-scale random data. This random data is then input into a reference model and a simulation chip. The outputs of the reference model and the simulation chip are compared. If the outputs are the same, the chip verification is successful; otherwise, it is unsuccessful. This is achieved by using SystemVerilog to build the verification platform, generating large-scale random data through UVM components (such as stimulus generators and monitors), and using the algorithm logic implemented in a hardware description language as the reference model. However, implementing a reference model for large-scale complex operations (such as high-precision floating-point multiplication and addition, and large number modular exponentiation) using a hardware description language is difficult, the code is verbose and error-prone, and the simulation speed decreases exponentially with increasing bit width. Large-scale data computation requires a large number of logic units, and simulation tools consume significant simulation resources when simulating the transmission and processing of large-scale data, which greatly extends the entire verification cycle. Furthermore, the existing verification process requires multiple steps such as stimulus generation, signal detection, and result comparison within the simulator, making the confirmation operation for large-scale data cumbersome and the verification process complex. Exhaustive test cases are also difficult to implement. Understandably, UVM is written in SystemVerilog and runs in a simulator.

[0031] Based on this, embodiments of this application provide a method, system, and storage medium for large-scale data chip verification. The large-scale data chip verification method can be applied to a large-scale data chip verification system, as described above. Figure 1 The large-scale data chip verification system includes an excitation-driven module, a software computing module, a file interaction module, and a result collection module.

[0032] The stimulus-driven module is used to generate initialization parameters. It also receives test data from the file interaction module and inputs it into the large-scale data chip. The stimulus-driven module can be implemented using a UVM verification environment (or framework) built with SystemVerilog. The UVM verification environment can execute `$system` tasks to call software computation modules, ensuring smooth data and instruction transmission and achieving hardware-software collaboration.

[0033] The file interaction module is used to read, write, and transfer data files, providing data support for chip verification. For example, it reads initialization parameters generated by the stimulus driver module and transfers these parameters to the software calculation module. Another example is reading test data generated by the software calculation module and storing the test data in the initial stimulus file.

[0034] The results collection module is used to collect and compare the computational results of the large-scale data chip and the simulation results of the simulation module (as described in the data calculator below). For example, it is used to read and store simulation results. Another example is to read and store test results. Yet another example is to compare simulation results and test results.

[0035] The results collection module includes a comparator, which is used to compare simulation results with test results to obtain the verification results of the large-scale data chip.

[0036] The software computing module is used to accelerate large-scale data computation tasks using general-purpose programming languages, or non-hardware description languages, thereby improving the computing efficiency of large-scale data chips. For example, it can generate test data based on initialization parameters, or perform tests based on the test data to obtain simulated computation results. For instance, this software computing module can be implemented using the Python language for computation tasks.

[0037] The software computing module includes a large-scale data generation model and a data calculator.

[0038] The large-scale data generation model is used to read the initialization parameters stored in the file interaction module and generate test data. This test data is large-scale data used to verify the large-scale data chip. The large-scale data generation model can be implemented using Python scripts.

[0039] The data calculator is used to call the gmpy2 library, the Python interface of the GNU multiple precision arithmetic library (GMP), to perform simulation calculations on the test data and obtain the simulation results.

[0040] The large-scale data chip calculates the test data to obtain the test results.

[0041] In the large-scale data chip verification system provided in this application embodiment, the UVM verification environment leverages its verification advantages, the software computing module improves computing efficiency, and the file interaction module provides data support, thereby achieving efficient verification of large-scale data chips. Each module has a clear division of labor and works closely together through interface and data interaction to comprehensively improve verification efficiency and accuracy.

[0042] The following describes the large-scale data chip verification method according to embodiments of this application. This method can be applied to the large-scale data chip verification system described above. (See also...) Figure 2 The large-scale data chip verification method of this application includes steps 201 to 207.

[0043] Step 201: The excitation driving module sends initialization parameters to the file interaction module.

[0044] Correspondingly, the file interaction module receives initialization parameters.

[0045] Before executing step 201, the stimulus-driven module can generate initialization parameters or pre-store them. Initialization parameters include: the testing requirements of the large-scale data chip and the magnitude of computation during testing. The testing requirements of the large-scale data chip include the algorithm type (e.g., number theoretic transform (NTT) in zero-knowledge proofs, modular multiplication, etc.), the execution order of the algorithm, and the number of iterations. For example, to test the correctness of the NTT algorithm, with a data size of 2^n and a bit width of 256, the algorithm type, execution mode, bit width, and parameter 'n' will be saved in a file and then transferred to the file interaction module.

[0046] After receiving the initialization parameters, the file interaction module can store them. These initialization parameters are used to generate test data for testing large-scale data chips. In other words, the stimulus-driven module no longer generates test data for testing large-scale data chips as in existing technologies. Since the amount of test data increases exponentially with increasing n, generating such massive test data using the stimulus-driven module implemented with the UVM component requires significant computational resources. By executing step 201, the stimulus-driven module no longer consumes a large number of computing units to generate test data. Instead, in subsequent steps, test data is generated by an external module (e.g., a module implemented using a general-purpose programming language or a non-hardware description language). This eliminates the need to use hardware programming languages ​​to generate test data, saving computational resources for the stimulus-driven module, conserving simulation resources, and improving the execution efficiency of the large-scale data chip verification method.

[0047] Step 202: The software calculation module reads the initialization parameters stored in the file interaction module.

[0048] For example, the incentive-driven module runs in the UVM verification environment. The runtime environment executes the $system task to call the software computing module and reads the initialization parameters stored in the file interaction module, and then passes the initialization parameters to the software computing module.

[0049] The software computing module is a module implemented using a general-purpose programming language, or a non-hardware description language. Compared with the stimulus-driven module, the software computing module is deployed on a computing device outside the simulator, does not consume the simulator's resources, and is easier to implement than hardware description languages ​​because general-purpose programming languages ​​are easier to use. The software computing module can more easily implement test data generation operations, consume less computing resources, and save development costs.

[0050] Step 203: The software calculation module generates test data based on the initialization parameters.

[0051] The software calculation module can generate test data that meets the testing requirements based on the initialization parameters. This test data is large-scale data used to verify large-scale data chips.

[0052] For example, to test the correctness of the NTT algorithm when n is 10, the initial data volume is 2 to the power of 10, with a bit width of 256, which is 1024 data entries with a bit width of 256.

[0053] The incentive-driven module can call the software computing module through the $system task, causing the software computing module to execute step 203 and efficiently process large-scale data.

[0054] Step 204: The software calculation module sends test data to the file interaction module.

[0055] Correspondingly, the file interaction module receives the test data.

[0056] After receiving the test data, the file interaction module can store the test data in the initial stimulus file. Subsequent modules can then read the test data from the file interaction module.

[0057] Step 205: The software calculation module reads test data from the file interaction module.

[0058] Step 206: The software calculation module performs tests based on the test data and obtains the simulation calculation results.

[0059] After the software computation module obtains the test data, the stimulus-driven module can invoke the software computation module through the $system task. This allows the software computation module to perform tests based on the test data using the GMP library, obtaining simulated computation results. These simulated computation results are used as reference values ​​for comparison with the test results of large-scale data chips, thereby verifying the large-scale data chip. Because the simulation results are calculated through the software computation module, instead of using hardware programming languages, significant computational resources are saved, and computational efficiency is improved.

[0060] Step 207: The file interaction module receives the simulation calculation results transmitted by the software calculation module.

[0061] After obtaining the simulation results, the software calculation module can send the simulation results to the file interaction module.

[0062] Step 208: The result collection module obtains and stores the simulation calculation results from the file interaction module.

[0063] Step 209: The excitation drive module sends the test data read from the file interaction module to the large-scale data chip.

[0064] The stimulus-driven module can access test data stored in the file interaction module and send the test data to the large-scale data chip before testing is required. For example, the stimulus-driven module might read the algorithm type, execution mode, and 1024 data entries with a 256-bit width from the file interaction module and send them to the large-scale data chip.

[0065] Test data can be stored in test data files. Multiple test data files can be used, each storing test data for different large-scale data chips. This allows the file interaction module to be applied simultaneously in the testing of multiple large-scale data chips, improving its efficiency.

[0066] For example, refer to Figure 3 In the UVM verification environment, multiple large-scale data chips (such as large-scale data chip 1 and large-scale data chip 2) can be verified. An excitation driving module is set up in the UVM verification environment. The excitation driving module is used to generate initialization parameters 1 of large-scale data chip 1 and to generate initialization parameters 2 of large-scale data chip 2. The excitation driving module is also used to receive test data 1 of large-scale data chip 1 and send test data 1 to large-scale data chip 1, and to receive test data 2 of large-scale data chip 2 and send test data 2 to large-scale data chip 2.

[0067] For another example, refer to Figure 4 In a UVM verification environment, multiple large-scale data chips (such as large-scale data chip 1 and large-scale data chip 2) can be verified. Multiple stimulus-driven modules (such as stimulus-driven module 1 and stimulus-driven module 2) are set up in this UVM verification environment. Each stimulus-driven module is used to generate initialization parameters for the corresponding large-scale data chip and to receive and send the test data to that large-scale data chip. For example, stimulus-driven module 1 corresponds to large-scale data chip 1, and stimulus-driven module 2 corresponds to large-scale data chip 2.

[0068] After receiving test data, large-scale data chips can perform tests based on the test data and obtain test results.

[0069] Step 210: The results collection module obtains the test results of the large-scale data chip.

[0070] Correspondingly, the large-scale data chip sends the test results to the result collection module.

[0071] In some embodiments, refer to Figure 3 The results collection module is used to collect test results from multiple large-scale data chips and simulation results corresponding to each large-scale data chip (such as simulation result 1 and simulation result 2). In other embodiments, refer to Figure 4 Each result collection module is used to collect the test results of a large-scale data chip. For example, result collection module 1 is used to collect test result 1 of large-scale data chip 1, and result collection module 2 is used to collect test result 2 of large-scale data chip 2.

[0072] Step 211: The results collection module stores the test results of the large-scale data chip.

[0073] Step 212: The result collection module compares the simulation calculation results and the test results to obtain the comparison results.

[0074] The results collection module includes a comparator that compares the simulation results with the test results. If the test results and simulation results are the same, the large-scale data chip verification is successful; otherwise, the large-scale data chip verification fails.

[0075] Step 213: The results collection module outputs the comparison results.

[0076] After obtaining the comparison results, the results collection module can output the comparison results, so that other modules can optimize the large-scale data chip based on the comparison results.

[0077] By employing the above method, operations such as generating test data and performing tests based on the test data, which previously required hardware description languages, are transformed into non-hardware description language implementations. This improves the efficiency of chip testing and saves computational resources. Furthermore, executing operations such as generating test data and performing tests based on the test data through a file interaction module enables modular operation of the verification method, further enhancing the stability of the verification system.

[0078] In some embodiments, the software computing module includes a large-scale data generation model and a data calculator. Steps 203 and 204 can be implemented by the large-scale data generation model in the software computing module, which can be implemented using a Python script. Steps 205 to 207 can be implemented by the data calculator in the software computing module, which may include a GMP library.

[0079] It is understood that steps 205 to 208 can be placed after steps 209 to 210. The embodiments of this application do not limit the order of data sent to the software computing module and the excitation driving module.

[0080] In a UVM verification environment, when an excitation-driven module needs to verify multiple large-scale data chips, steps 301 and 302 may be included before step 201.

[0081] Step 301: The stimulus-driven module receives the verification request.

[0082] The verification request is used to indicate the identifier of the large-scale data chip to be verified. For example, the verification request includes the identifier of the large-scale data chip to be verified. For example, the identifier of large-scale data chip 1 is 0001, and the identifier of large-scale data chip 2 is 0010.

[0083] Step 302: The stimulus-driven module determines the initialization parameters to be sent based on the verification request.

[0084] Reference Figure 3 For example, if the verification request includes the identifier of large-scale data chip 1, the stimulus-driven module can generate or read the pre-stored initialization parameter 1 corresponding to large-scale data chip 1. Then, during step 201, the initialization parameter 1 corresponding to large-scale data chip 1 is sent. After the large-scale data generation model reads the initialization parameter 1, it can generate test data 1. The file interaction module can store test data 1 and send it to the data calculator and large-scale data chip 1. The file interaction module can compare the received simulation calculation result 1 and test result 1 to obtain the comparison result of the large-scale data chip. Similarly, if the verification request includes the identifier of large-scale data chip 2, corresponding to initialization parameter 2, the large-scale data generation model generates test data 2, obtains the simulation calculation result 2 through the data calculator, obtains the test result 2 through the calculation of the large-scale data chip, and compares the two to obtain the comparison result 2.

[0085] This approach enables targeted testing of multiple large-scale data chips.

[0086] In some embodiments, after the software calculation module generates test data, it may skip step 205. That is, the software calculation module may not read the test data from the file interaction module, but may directly store it in the software interaction module.

[0087] In one possible implementation, this application also provides a computer-readable storage medium storing program code that, when executed on a computer, causes the computer to perform the above-described method embodiments.

[0088] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0089] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the system and modules described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0090] In the embodiments provided in this application, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative. For instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces or modules, and may be electrical, mechanical, or other forms.

[0091] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0092] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium.

[0093] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product.

[0094] The computer program product includes one or more computer instructions. When the computer program is loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., a solid-state disk (SSD)).

[0095] The technical solutions provided in the embodiments of this application have been described in detail above. Specific examples have been used in the embodiments of this application to illustrate the principles and implementation methods of the embodiments of this application. The description of the above embodiments is only for the purpose of helping to understand the methods and core ideas of the embodiments of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the embodiments of this application. Therefore, the content of this specification should not be construed as a limitation on the embodiments of this application.

Claims

1. A method for verifying large-scale data chips, characterized in that, The method, applied to a large-scale data chip verification system, which includes an excitation-driven module, a software computing module, a file interaction module, and a result collection module, comprises: The excitation driving module sends initialization parameters to the file interaction module, and the initialization parameters are used to generate test data for testing the large-scale data chip; The software calculation module generates test data based on the initialization parameters; The software calculation module sends test data to the file interaction module; The software calculation module sends the simulation calculation results to the file interaction module. The simulation calculation results are obtained by the software calculation module based on the test data. The result collection module obtains and stores the simulation calculation results from the file interaction module; The stimulus-driven module sends the test data read from the file interaction module to the large-scale data chip; The result collection module acquires the test results of the large-scale data chip; The result collection module compares the simulation calculation results and the test results to obtain a comparison result. The result collection module outputs the comparison results.

2. The method according to claim 1, characterized in that, The results collection module compares the simulation results and the test results, including: If the simulation results and the test results are the same, the large-scale data chip verification is successful; otherwise, the large-scale data chip verification fails.

3. The method according to claim 1, characterized in that, The software computing module includes a large-scale data generation model and a data calculator; The software calculation module generates test data based on the initialization parameters, which is implemented by the large-scale data generation model generating test data based on the initialization parameters. The software calculation module sends test data to the file interaction module, which enables the large-scale data generation model to send test data to the file interaction module. The method further includes: the data calculator reading test data from the file interaction module; The data calculator performs tests based on the test data to obtain the simulation calculation results; The software calculation module sending the simulation calculation result to the file interaction module is implemented as the data calculator sending the simulation calculation result to the file interaction module; The large-scale data generation model is implemented using Python scripts; the data calculator includes the GMP library.

4. The method according to claim 1, characterized in that, The initialization parameters include: the testing requirements of the large-scale data chip and the magnitude of computation during the testing of the large-scale data chip.

5. The method according to claim 1, characterized in that, The incentive-driven module runs in the Universal Verification Methodology (UVM) verification environment.

6. The method according to claim 1, characterized in that, The stimulus-driven module is used to verify multiple large-scale data chips. Before the stimulus-driven module sends initialization parameters to the file interaction module, the method further includes: The excitation driving module receives a verification request, which is used to indicate the identifier of the large-scale data chip to be verified. The incentive-driven module determines the initialization parameters to be sent based on the verification request.

7. The method according to claim 6, characterized in that, The verification request includes the identifier of the large-scale data chip to be verified.

8. A large-scale data chip verification system, characterized in that, The system includes: The module consists of an incentive-driven module, a software calculation module, a file interaction module, and a result collection module. The excitation driving module is configured to send initialization parameters to the file interaction module, the initialization parameters being used to generate test data for testing the large-scale data chip; The software calculation module is configured to generate test data based on the initialization parameters; The software calculation module is configured to send test data to the file interaction module; The software calculation module is also configured to send simulated calculation results to the file interaction module, the simulated calculation results being obtained by the software calculation module based on test data. The result collection module is configured to obtain and store the simulation calculation results from the file interaction module; The stimulus-driven module is configured to send test data read from the file interaction module to a large-scale data chip; The result collection module is configured to acquire the test results of the large-scale data chip; The result collection module is configured to compare the simulation calculation results and the test results to obtain comparison results; The result collection module is configured to output the comparison results.

9. A computer-readable storage medium, characterized in that, It includes instructions that, when run on a computer, cause the computer to perform the method as described in any one of claims 1-7.

10. A computer program product comprising computer instructions, characterized in that, When executed by a processor, the computer instructions implement the method of any one of claims 1-7.

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