A data-driven integrated circuit manufacturing yield signoff method, system, device, and medium

Abstract

The application relates to the technical field of semiconductor intelligent manufacturing, in particular to a data-driven integrated circuit manufacturing yield signature method, system, device and medium; the method is based on integrated circuit manufacturing full-process data, realizes accurate signature of the yield of the integrated circuit manufacturing through data preprocessing, feature engineering, yield prediction model construction and dynamic signature standard formulation, improves the accuracy and efficiency of the signature, and reduces the misjudgment rate and the missed judgment rate.

Description

Technical Field

[0001] This invention relates to the field of semiconductor intelligent manufacturing technology, and more specifically, to a data-driven integrated circuit manufacturing yield approval method, system, equipment, and medium. Background Technology

[0002] The integrated circuit (IC) manufacturing process is complex and lengthy, involving dozens or even hundreds of steps such as photolithography, etching, deposition, and doping. Fluctuations in process parameters, changes in equipment status, and differences in material properties at each step can all affect the yield of the final product. Yield approval, as a critical link in the integrated circuit manufacturing process, aims to determine whether the current batch of products meets the preset yield standards by analyzing manufacturing process data and product inspection data, thereby deciding whether the batch should be released, reworked, or scrapped.

[0003] Existing integrated circuit manufacturing yield approval methods suffer from the following main drawbacks: First, the approval criteria are singular, relying heavily on the final finished product yield and ignoring process data from intermediate steps. This leads to delayed approval results, making it difficult to promptly identify anomalies in intermediate processes, and even if problems are found, it is difficult to trace their root causes. Second, the approval standards are rigid, often using fixed yield thresholds for judgment, failing to consider differences between different product models, process nodes, and production batches, resulting in poor adaptability. Third, the analysis methods are traditional, often employing statistical sampling analysis or simple threshold comparisons, making it difficult to uncover complex relationships hidden in the data and prone to misjudgments or omissions. These problems are particularly pronounced in advanced process node (e.g., 7nm and below) integrated circuit manufacturing, severely impacting production efficiency and product quality.

[0004] With the development of intelligent manufacturing technology in the semiconductor industry, massive amounts of process data (such as equipment process parameters, equipment status data, and material information) and testing data (such as wafer testing data and chip testing data) have been accumulated during the integrated circuit manufacturing process. How to build a data-driven yield approval model based on this massive amount of data to achieve accurate, efficient, and real-time yield approval has become a pressing technical problem in the current semiconductor manufacturing field. Summary of the Invention

[0005] This invention addresses the problem that existing approval methods cannot achieve accurate, efficient, and real-time yield approval. It proposes a data-driven integrated circuit manufacturing yield approval method, system, equipment, and medium. Based on data from the entire integrated circuit manufacturing process, this method achieves accurate approval of integrated circuit manufacturing yield through data preprocessing, feature engineering, yield prediction model construction, and dynamic approval standard formulation. This improves the accuracy and efficiency of approval, and reduces the false positive and false negative rates.

[0006] The specific implementation details of this invention are as follows: A data-driven method for integrated circuit manufacturing yield approval specifically includes the following steps: Step S1: Preprocess the acquired integrated circuit manufacturing process data to obtain a preprocessed integrated circuit manufacturing process dataset; Step S2: Extract features from the preprocessed integrated circuit manufacturing process dataset and call the attention mechanism to obtain the fused feature vector; Step S3: Based on the fused feature vectors, construct a yield prediction model to obtain the predicted yield value of the integrated circuit; Step S4: Based on the acquired historical yield data, call the kernel density estimation method to calculate the dynamic approval threshold; Step S5: Based on the dynamic approval threshold and yield prediction value, determine whether the yield approval is qualified and output the approval result.

[0007] To better realize the present invention, step S2 further includes the following steps: Step S21: Based on the data type of the preprocessed integrated circuit manufacturing process dataset, if it is structured data, extract time domain features and frequency domain features; if it is unstructured data, call a convolutional neural network to extract deep features. Step S22: Calculate the mutual information value based on the marginal probability distribution of time domain features, the marginal probability distribution of frequency domain features, the marginal probability distribution of deep features, and the marginal probability distribution of yield, and retain features with mutual information values ​​greater than a set threshold. Step S23: Call the L1 regularized logistic regression model to filter and retain features to obtain the optimal input feature set; Step S24: Based on the set attention weights, call the attention mechanism to fuse the optimal input feature set and obtain the fused feature vector.

[0008] To better realize the present invention, step S3 further includes the following steps: Step S31: Invoke the bidirectional long short-term memory network and the fully connected neural network to construct a yield prediction model; the yield prediction model includes an input layer, a Bi-LSTM layer, an FCN layer and an output layer; Step S32: Input the fused feature vector into the input layer and convert it into tensor format; Step S33: Input the transformed feature tensor into the Bi-LSTM layer, and concatenate the hidden state outputs of the forward LSTM and the backward LSTM to obtain the output of the Bi-LSTM layer. Step S34: Input the output of the Bi-LSTM layer into the FCN layer for nonlinear transformation to obtain the activation output; Step S35: Input the activation output to the output layer and call the sigmoid activation function to map the activation output to a yield prediction value between 0 and 1.

[0009] To better realize the present invention, step S3 further includes: Step S36: Based on the predicted yield, the actual yield, and the training sample data, construct a loss function, minimize the loss function using the adaptive moment estimation optimization algorithm, and obtain the trained yield prediction model.

[0010] To better realize the present invention, step S4 further includes the following steps: Step S41: Obtain historical yield data and classify it to obtain historical yield datasets under different categories; Step S42: Calculate the probability density distribution of yield for the current category using the kernel density estimation method; Step S43: Calculate the dynamic approval threshold for the current category based on the probability density distribution and the set confidence level; Step S44: Based on the set fluctuation coefficient weight, the batch fluctuation coefficient is introduced to correct the dynamic approval threshold, and the corrected dynamic approval threshold is obtained.

[0011] To better implement the present invention, step S5 further involves comparing the corrected dynamic approval threshold and the yield prediction value. If the yield prediction value is greater than or equal to the corrected dynamic approval threshold, the batch yield is determined to be qualified, the approval result is output, and the batch is allowed to be released. If the yield prediction value is less than the corrected dynamic approval threshold, the batch yield is determined to be unqualified, the approval result is output, and the abnormal traceability process is initiated.

[0012] To better realize the present invention, the integrated circuit manufacturing process data further includes intermediate process data, equipment status data, material data, and finished product testing data.

[0013] Based on the data-driven integrated circuit manufacturing yield verification method proposed above, in order to better realize the present invention, a data-driven integrated circuit manufacturing yield verification system is further proposed to execute the above data-driven integrated circuit manufacturing yield verification method, including a preprocessing unit, a feature unit, a prediction unit, a dynamic verification unit, and an output unit. The preprocessing unit is used to preprocess the acquired integrated circuit manufacturing process data to obtain a preprocessed integrated circuit manufacturing process dataset. The feature unit is used to extract features from the preprocessed integrated circuit manufacturing process dataset and call the attention mechanism to obtain the fused feature vector. The prediction unit is used to construct a yield prediction model based on the fused feature vector to obtain the predicted yield value of the integrated circuit. The dynamic approval unit is used to calculate the dynamic approval threshold by calling the kernel density estimation method based on the acquired historical yield data. The output unit is used to determine whether the yield approval is qualified based on the dynamic approval threshold and the yield prediction value, and output the approval result.

[0014] Based on the data-driven integrated circuit manufacturing yield approval method proposed above, in order to better realize the present invention, an electronic device is further proposed, including a memory and a processor; the memory stores a computer program; when the computer program is executed on the processor, the above-mentioned data-driven integrated circuit manufacturing yield approval method is implemented.

[0015] Based on the data-driven integrated circuit manufacturing yield approval method proposed above, in order to better realize the present invention, a computer-readable storage medium is further proposed, wherein computer instructions are stored on the computer storage medium; when the computer instructions are executed on the above-mentioned electronic device, the above-mentioned data-driven integrated circuit manufacturing yield approval method is implemented.

[0016] The present invention has the following beneficial effects: (1) The present invention performs yield verification based on the whole process data of integrated circuit manufacturing, covering multi-dimensional data such as intermediate process data, equipment status data, and material data. It overcomes the shortcomings of existing technologies that rely on single finished product inspection data, realizes the forward-looking nature and root cause traceability of the verification, and can promptly detect abnormal problems in intermediate processes.

[0017] (2) The present invention uses a hybrid deep learning model combining Bi-LSTM and FCN to predict yield, which can effectively capture the time dependence and complex nonlinear correlation in the data. The prediction accuracy is higher than that of traditional statistical methods, providing a reliable basis for accurate approval.

[0018] (3) The present invention has formulated a dynamic approval standard based on product model, process node and batch fluctuation, which replaces the traditional fixed threshold standard, is more adaptable and can meet the yield approval requirements in different scenarios.

[0019] (4) When the approval fails, the present invention can automatically locate key abnormal factors and output traceability reports, providing accurate guidance for rework and process optimization, which helps to improve the overall production yield and production efficiency and reduce production costs. Attached Figure Description

[0020] Figure 1 A schematic flowchart of the data-driven integrated circuit manufacturing yield approval method provided by the present invention. Detailed Implementation

[0021] To more clearly illustrate the technical solutions of the embodiments of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments, and therefore should not be regarded as a limitation on the scope of protection. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "set up," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0023] Example 1: This embodiment specifically includes the following steps: Step S1: Preprocess the acquired integrated circuit manufacturing process data to obtain a preprocessed integrated circuit manufacturing process dataset; the integrated circuit manufacturing process data includes intermediate process data, equipment status data, material data, and finished product inspection data.

[0024] Step S2: Extract features from the preprocessed integrated circuit manufacturing process dataset and call the attention mechanism to obtain the fused feature vector; Step S2 specifically includes the following steps: Step S21: Based on the data type of the preprocessed integrated circuit manufacturing process dataset, if it is structured data, extract time domain features and frequency domain features; if it is unstructured data, call a convolutional neural network to extract deep features. Step S22: Calculate the mutual information value based on the marginal probability distribution of time domain features, the marginal probability distribution of frequency domain features, the marginal probability distribution of deep features, and the marginal probability distribution of yield, and retain features with mutual information values ​​greater than a set threshold. Step S23: Call the L1 regularized logistic regression model to filter and retain features to obtain the optimal input feature set; Step S24: Based on the set attention weights, call the attention mechanism to fuse the optimal input feature set and obtain the fused feature vector.

[0025] Step S3: Based on the fused feature vectors, construct a yield prediction model to obtain the predicted yield value of the integrated circuit; Step S3 specifically includes the following steps: Step S31: Invoke the bidirectional long short-term memory network and the fully connected neural network to construct a yield prediction model; the yield prediction model includes an input layer, a Bi-LSTM layer, an FCN layer and an output layer; Step S32: Input the fused feature vector into the input layer and convert it into tensor format; Step S33: Input the transformed feature tensor into the Bi-LSTM layer, and concatenate the hidden state outputs of the forward LSTM and the backward LSTM to obtain the output of the Bi-LSTM layer. Step S34: Input the output of the Bi-LSTM layer into the FCN layer for nonlinear transformation to obtain the activation output; Step S35: Input the activation output to the output layer and call the sigmoid activation function to map the activation output to a yield prediction value between 0 and 1.

[0026] Step S3 further includes: Step S36: Based on the predicted yield, the actual yield, and the training sample data, construct a loss function, minimize the loss function using the adaptive moment estimation optimization algorithm, and obtain the trained yield prediction model.

[0027] Step S4: Based on the acquired historical yield data, call the kernel density estimation method to calculate the dynamic approval threshold; Step S4 specifically includes the following steps: Step S41: Obtain historical yield data and classify it to obtain historical yield datasets under different categories; Step S42: Calculate the probability density distribution of yield for the current category using the kernel density estimation method; Step S43: Calculate the dynamic approval threshold for the current category based on the probability density distribution and the set confidence level; Step S44: Based on the set fluctuation coefficient weight, the batch fluctuation coefficient is introduced to correct the dynamic approval threshold, and the corrected dynamic approval threshold is obtained.

[0028] Step S5: Based on the dynamic approval threshold and yield prediction value, determine whether the yield approval is qualified and output the approval result.

[0029] The specific operation of step S5 is to compare the corrected dynamic approval threshold and the yield prediction value. If the yield prediction value is greater than or equal to the corrected dynamic approval threshold, the batch yield is determined to be qualified, the approval result is output, and the batch is allowed to be released. If the yield prediction value is less than the corrected dynamic approval threshold, the batch yield is determined to be unqualified, the approval result is output, and the abnormal traceability process is initiated.

[0030] Working Principle: This embodiment first collects data from the entire integrated circuit manufacturing process, including intermediate process data, equipment status data, material data, and finished product inspection data. The collected data is then cleaned and standardized to obtain a standardized dataset. Next, feature extraction, feature selection, and feature fusion are performed on the standardized dataset to obtain the input feature set for training the yield prediction model. The feature selection uses a combination of mutual information and L1 regularization; the feature fusion uses an attention mechanism. Based on the input feature set, a hybrid deep learning yield prediction model combining Bi-LSTM and FCN is constructed, using mean squared error as the loss function and trained using the Adam optimization algorithm. Then, based on historical yield data categorized by product model and process node, the kernel density estimation method is used to calculate the yield probability density distribution, and a dynamic approval threshold is determined by combining confidence level and batch fluctuation coefficient. Finally, the data of the batch to be approved is processed by feature engineering and input into the yield prediction model to obtain the predicted yield value. The predicted value is compared with the dynamic approval threshold, and the approval result is output. If the approval fails, key anomalies are located and a traceability report is output.

[0031] In this embodiment, data cleaning employs a K-nearest neighbor-based missing value filling algorithm and an outlier removal method based on the Grubbs criterion; data standardization uses the Z-score standardization method.

[0032] Feature extraction in this embodiment includes extracting time-domain and frequency-domain features from structured data, and using CNN to extract deep features from unstructured data.

[0033] In this embodiment, the Bi-LSTM layer includes a forward LSTM and a backward LSTM, and the output of the hidden state is obtained by concatenating the outputs of the Bi-LSTM layer; the FCN layer performs nonlinear transformation on the features through a fully connected layer and the ReLU activation function.

[0034] Example 2: This embodiment is based on Embodiment 1 above, and will be described in detail with a specific embodiment.

[0035] Step S1: Data acquisition and preprocessing.

[0036] Collect data from the entire integrated circuit manufacturing process, including but not limited to intermediate process data, equipment status data, material data, and finished product inspection data; preprocess the collected data to obtain a standardized dataset.

[0037] Specifically, the collected intermediate process data includes exposure dose, focal length, and photoresist thickness in the photolithography process; etching time, etching temperature, and gas flow rate in the etching process; and deposition rate, deposition temperature, and pressure in the deposition process. Equipment status data includes equipment runtime, key component temperature, vibration frequency, and fault warning information. Material data includes material batch, material purity, and material storage time. Finished product testing data includes the number of wafer defects, defect type, and chip functional test pass rate.

[0038] Data preprocessing includes the following operations: (1) Data cleaning: The original data is processed using methods such as missing value imputation and outlier removal. For numerical missing data, a missing value imputation algorithm based on K-nearest neighbors (KNN) is used, and its core formula is as follows: Let the sample to be filled be The K samples in its neighborhood are The Euclidean distance between samples is (in For feature dimension, Let j be the value of the j-th feature of the sample to be filled. (where j is the value of the j-th feature of the i-th neighborhood sample), then the imputation value for the missing value is... Outliers were removed using the Grubbs criterion (Grubbs' test for data-driven integrated circuit manufacturing yield verification system), and its test statistic is: (in (where s is the sample mean and s is the sample standard deviation) , This is the critical value for the Grubbs test. At the significance level, When the sample size is less than the data size, the data is identified as an outlier and removed.

[0039] (2) Data standardization: To eliminate the differences in the dimensions of data from different dimensions, the Z-score standardization method is used to process the cleaned data. The formula is as follows: in, Let j be the value of the j-th feature of the i-th sample after standardization. Let j be the value of the j-th feature of the i-th sample before standardization. Let be the mean of the j-th feature. Let be the standard deviation of the j-th feature.

[0040] Step S2: Feature engineering.

[0041] Feature engineering is performed on the preprocessed dataset, including feature extraction, feature selection, and feature fusion, to obtain the input feature set for training the yield prediction model.

[0042] (1) Feature extraction: For structured data, extract time domain features (such as mean, variance, peak, valley and range) and frequency domain features (such as amplitude and phase after Fourier transform); for unstructured data (such as wafer defect image data), use convolutional neural network (CNN) to extract deep features. Specifically, use the convolutional layer and pooling layer of CNN to extract features from the image data to obtain high-dimensional feature vectors.

[0043] (2) Feature selection: A feature selection method combining mutual information and L1 regularization is adopted to screen features that are strongly correlated with yield. First, the mutual information value between each feature and yield is calculated. (in For the j-th feature, (For yield), the formula for calculating mutual information value is: in, Features and yield The joint probability distribution, Features Marginal probability distribution, For yield The marginal probability distribution is determined. Features with mutual information values ​​greater than a preset threshold are retained to obtain an initial feature set. Then, an L1-regularized logistic regression model is used to further filter the initial feature set. The sparsity of L1 regularization compresses the coefficients of redundant features to 0, ultimately yielding the optimal input feature set. (where n is the number of features after filtering).

[0044] (3) Feature fusion: An attention mechanism is used to fuse features from different sources (such as process features, equipment features, and material features), assigning different weights to different features. The fusion formula is as follows: in, The fused feature vector The number of feature sources, For the feature vector originating from the k-th class, For the first Attention weights for class features, and satisfying , It was obtained through training an attention network.

[0045] Step S3: Construct a yield prediction model.

[0046] Based on the input feature set obtained in step S2, a deep learning-based yield prediction model is constructed to predict the final yield of integrated circuits.

[0047] The yield prediction model employs a hybrid model structure combining a bidirectional long short-term memory network (Bi-LSTM) and a fully connected neural network (FCN), specifically including an input layer, a Bi-LSTM layer, an FCN layer, and an output layer: (1) Input layer: Receives the feature vector fused in step S2 And convert it into a tensor format that the model can process.

[0048] (2) Bi-LSTM layer: used to capture the temporal dependencies in the feature sequence, including two parts: forward LSTM and backward LSTM. The core calculation formula of the LSTM unit is as follows: Forgot Gate Output: Input gate output: Cell state candidate values: Cell status update: Output gate output: Hidden output: in, It is the sigmoid activation function. The hyperbolic tangent activation function is used. For element-wise multiplication, These are the weight matrices for the forget gate, input gate, cell state, and output gate, respectively. These are the corresponding bias terms. This is the hidden state from the previous moment. The input features at the current time, This represents the cell state at the previous moment. This represents the current state of the cell. This represents the current hidden state.

[0049] The hidden state outputs of the forward LSTM and backward LSTM are concatenated to obtain the output of the Bi-LSTM layer. .

[0050] (3) FCN layer: Receives the output of the Bi-LSTM layer The features are transformed nonlinearly through a fully connected layer. The specific calculation formula is as follows: in, The number of layers in the FCN layer. For the first The linear output of the layer, For the first The weight matrix of the layer, For the first The activation output of the layer (the input of the first FCN layer is the output of the Bi-LSTM layer) ), For the first Layer bias terms, The activation function for the rectified linear unit is... For the first The layer's activation output.

[0051] (4) Output layer: The sigmoid activation function is used to map the final activation output of the FCN layer to a yield prediction value between 0 and 1. The calculation formula is: in, The weight matrix of the output layer. The activation output of the last layer of the FCN layer. This is the bias term for the output layer.

[0052] During model training, the mean squared error (MSE) is used as the loss function. The model parameters are updated by minimizing the loss function using the Adaptive Moments Estimation (Adam) optimization algorithm. The formula for calculating the loss function is: in, The number of training samples. For the first Predicted yield value for each sample This represents the actual yield value for the i-th sample.

[0053] Step S4: Develop dynamic approval standards.

[0054] Based on information such as product model, process node, and production batch, and combined with historical yield data, dynamic yield approval standards are formulated.

[0055] First, the historical data is sorted by product model. process nodes Classify the data to obtain historical yield datasets for different categories. (where m is the number of historical batches in this category); then, the kernel density estimation (KDE) method is used to calculate the probability density distribution of yield in this category. The formula for calculating the kernel density estimate is: in, For the kernel function (using the Gaussian kernel function) ), For bandwidth (determined by cross-validation).

[0056] Based on the probability density distribution of yield, and considering the company's quality requirements and cost-effectiveness, a confidence level is set. (e.g., 95%), calculate the dynamic approval threshold for this category. ,satisfy Meanwhile, considering the stability of production batches, a batch fluctuation coefficient is introduced. The ratio of standard deviation to mean is used to adjust the approval threshold. The adjustment formula is as follows: in, The revised dynamic approval threshold. The fluctuation coefficient weight (set according to the company's production experience, with a value range of 0 to 1). , The standard deviation of historical yield for this category. (This represents the historical average yield).

[0057] Step S5: Yield verification and result output.

[0058] After preprocessing the data of the batch to be approved, feature engineering is performed, and the data is then input into the trained yield prediction model to obtain the predicted yield value for that batch. ;Will With the dynamic approval threshold set in step S4 Compare and complete the yield approval: (1) If If the batch yield is deemed acceptable, an approval result will be output, and the batch will be allowed to be released. (2) If If the batch yield is deemed unqualified, an approval failure result will be output, and an anomaly tracing process will be initiated: based on the importance ranking of the input feature set (determined by the magnitude of the L1 regularization coefficient in step S2), the key processes, key equipment, or key materials that cause the low yield will be located, and an anomaly tracing report will be output to provide a basis for rework or process optimization.

[0059] The other parts of this embodiment are the same as those in Embodiment 1 above, so they will not be described again.

[0060] Example 3: This embodiment is based on any one of the above embodiments 1-2, and takes the manufacturing of a logic chip at a certain 14nm process node as an example for detailed explanation.

[0061] A. Data Acquisition and Preprocessing Data is collected synchronously throughout the entire process via the Manufacturing Execution System (MES), Equipment Automation System (EAP), and testing equipment interfaces in the integrated circuit manufacturing workshop. The collection frequency is consistent with the processing cycle time of each step to ensure data synchronization. The collection scope covers intermediate process data, equipment status data, material data, and finished product testing data. Process data is captured in real time from the process control systems of each step, equipment status data is collected through equipment sensors and controllers, material data is obtained from the Material Management System (MMS), and finished product testing data is exported from the wafer inspection equipment (ATE). All data is uniformly stored in a time-series database using a standardized JSON data structure, labeled with the corresponding process number, timestamp, batch information, and equipment number.

[0062] Data preprocessing was performed in steps, starting with cleaning and standardization. First, data cleaning was conducted. For missing numerical data, a K-nearest neighbor (KNN) imputation algorithm was used. The similarity between the sample to be imputed and other samples in the dataset was calculated using Euclidean distance. The K most similar samples were selected (K was set to 5 through cross-validation). A weighted mean was calculated using the inverse of the distance as the weight, and this mean was used as the imputed value. A minimum value (10⁻⁶) was also introduced. 6 To avoid calculation anomalies caused by a distance of 0, Grubbs' criterion is used for outliers. First, the sample mean and unbiased standard deviation are calculated, and a test statistic G is constructed. This statistic is then compared with the critical value corresponding to the confidence level α = 0.05. In contrast, if G exceeds a critical value, it is identified as an outlier and removed to ensure data reliability. After cleaning, Z-score normalization is used to eliminate dimensional differences, and the mean of each feature is calculated based on the training set data. with unbiased standard deviation Substitute into the formula All data is normalized, and the standardized parameters are then applied to all subsequent batches of data awaiting approval to ensure data consistency.

[0063] Taking the manufacturing of a logic chip at a certain 14nm process node as an example, data from 200 production batches during the chip manufacturing process were collected, including process parameters (36 features in total) for 12 key processes such as photolithography, etching, and deposition, status data of corresponding process equipment (12 features in total), material batch and characteristic data (8 features in total), and finished product yield data for each batch.

[0064] The collected data were preprocessed as follows: missing values ​​were filled using the KNN algorithm (K value is 5), and outliers were removed using the Grubbs criterion (significance level α=0.05); the cleaned data were standardized using the Z-score standardization method to obtain a standardized dataset.

[0065] B Feature Engineering Feature engineering was performed on the preprocessed standardized dataset. First, feature extraction was conducted. For structured data, time windows were divided according to process dimensions, and time-domain features within each window were extracted, including mean, variance, peak, trough, and range. Simultaneously, Fourier transform was performed on periodic features to extract amplitude and phase information from the frequency domain features, forming a multi-dimensional structured feature set. For unstructured data such as wafer defect images, a lightweight convolutional neural network (CNN) was used to extract deep features. The network contains three convolutional layers and two pooling layers. The convolutional layers use 3×3 convolutional kernels, and the pooling layers use max pooling. A 256-dimensional high-dimensional feature vector was calculated through forward propagation and then concatenated with the structured features after unifying their dimensions.

[0066] Feature selection employs a two-step method combining mutual information and L1 regularization. First, mutual information is used to calculate the correlation between each feature and yield. The joint probability distribution and marginal probability distribution of features and yield are estimated using a frequency-based method. These are then substituted into the mutual information formula to calculate the mutual information value for each feature. Features with mutual information values ​​greater than 0.2 are retained as the initial feature set. Next, an L1-regularized logistic regression model is constructed for the initial feature set. The optimal penalty coefficient is determined through grid search. The sparsity of L1 regularization is used to compress redundant feature coefficients to zero, thus selecting the optimal input feature set strongly correlated with yield. Finally, an attention mechanism is used for feature fusion. A single-hidden-layer attention network is constructed, using features from different sources (process, equipment, materials) as input. The attention weights for each type of feature are calculated using a Sigmoid activation function, with the weights satisfying normalization constraints. The features are weighted and summed with their corresponding weights to obtain a fused feature vector, achieving effective aggregation of features from different dimensions.

[0067] Furthermore, taking the manufacturing of a logic chip at a certain 14nm process node as an example: Feature extraction was performed on the standardized dataset. Time-domain features such as mean, variance, and peak value were extracted from process parameters and equipment status data (a total of 108 features); deep features were extracted from wafer defect image data using a CNN network with 3 convolutional layers and 2 pooling layers (resulting in a 256-dimensional feature vector).

[0068] A feature selection method combining mutual information and L1 regularization is adopted. The mutual information value between each feature and yield is calculated, and features with a mutual information value greater than 0.2 are retained (resulting in 62 features). These 62 features are then filtered using an L1 regularized logistic regression model to obtain 32 features with the strongest correlation to yield, forming the initial feature set. An attention mechanism is then used to fuse process features, equipment features, and material features to obtain the fused feature vector.

[0069] C Yield Prediction Model Construction and Training Based on the fused input feature set, a hybrid deep learning yield prediction model combining Bi-LSTM and FCN is constructed. The model employs an end-to-end training approach. The input layer converts the fused feature vector into a dimension-matched tensor format. The tensor dimension is determined based on the number of features and the sequence length, where the sequence length is set according to the number of integrated circuit manufacturing processes. The Bi-LSTM layer contains two hidden layers, each with 64 neurons determined through cross-validation. Forward and backward LSTMs are used to capture the forward and backward temporal dependencies of the feature sequences. The forward LSTM processes the feature sequences in the order of the manufacturing processes, while the backward LSTM processes them in reverse order. The outputs of the two are concatenated laterally to obtain the final output of the Bi-LSTM layer. The concatenated feature dimension is twice the number of neurons in the hidden layers.

[0070] A yield prediction model combining Bi-LSTM and FCN is constructed. The FCN layer receives the output of the Bi-LSTM layer. The Bi-LSTM layer contains two hidden layers, each with 64 neurons, using the tanh activation function. The FCN layer also contains two hidden layers, the first with 128 neurons and the second with 64 neurons, both using the ReLU activation function to achieve non-linear feature transformation. Each layer calculates its output value using a linear transformation formula, and then optimizes the feature representation using an activation function to avoid the gradient vanishing problem. The output layer uses the Sigmoid activation function to map the final output of the FCN layer to a yield prediction value in the range of 0 to 1. The output accuracy is adjusted by the weight matrix and bias term.

[0071] During the model training phase, the 200 preprocessed batches of data were divided into a training set (140 batches) and a test set (60 batches) in a 7:3 ratio. Mean squared error was used as the loss function, and the deviation between the predicted values ​​and the actual yield was calculated in real time. The model parameters were iteratively updated using the Adam optimization algorithm. The initial learning rate was set to 0.001, and an adaptive adjustment strategy was adopted. The number of iterations was set to 200. After training, training was stopped when the loss function value did not decrease significantly for 10 consecutive iterations, ensuring model convergence and good generalization ability. The model achieved a prediction accuracy of 92.5% on the test set, with a mean squared error of 0.003.

[0072] D. Dynamic Sign-off Standards Development Based on product model codes and process node parameter ranges, historical yield data is categorized and archived to construct a historical database divided by product-process dimension. Each data category contains yield information for at least 100 production batches to ensure statistical reliability. The kernel density estimation (KDE) method is used to fit the yield probability density distribution of each data category. A Gaussian kernel function is selected as the kernel function, and the bandwidth parameter h is determined using the Silverman rule. Substituting this into the kernel density estimation formula yields a continuous yield probability density curve that covers the entire range of possible yield values.

[0073] Based on the company's quality control standards, the quality requirements are converted into corresponding confidence levels β, typically set at 95%. By integrating the probability density curve, the satisfaction level is obtained. Initial approval threshold This threshold corresponds to the upper quantile of the yield distribution. A batch volatility coefficient (CV) is introduced to quantify production stability. CV is calculated as the ratio of the unbiased standard deviation to the mean of historical batch yields. ,in and These represent the unbiased standard deviation and mean of the historical yield for the corresponding category, respectively. The weighting of the fluctuation coefficient is calibrated based on historical batch yield deviation data. , The value is controlled within the range of 0 to 1, and the dynamic approval threshold is obtained by substituting it into the correction formula. For every 10 new production batches of the same category, the calculation is recalculated. and This enables dynamic updates to the signing standards.

[0074] For a specific 14nm logic chip, yield data from 200 historical batches were extracted. The probability density distribution of the yield was calculated using the Gaussian kernel density estimation method, with a confidence level β=95%. The initial approval threshold was then calculated using the kernel density distribution. =88%; the mean yield of these 200 batches was calculated to be μ=90%, and the standard deviation was... If the volatility coefficient is 2.5%, then the batch volatility coefficient CV = 2.5% / 90% ≈ 0.0278. Setting the volatility coefficient weight k = 0.5, the dynamic approval threshold is obtained through a modified formula. =88%×(1-0.5×0.0278)≈86.77%.

[0075] E. Yield verification and result output For the batch data to be approved, the data is cleaned and standardized according to the preprocessing procedures and parameters in step A. Then, features are extracted, selected, and fused through the feature engineering process in step B to generate an input feature vector consistent with the model training data format. The feature vector is input into the trained yield prediction model, and the predicted yield value Ŷbatch for that batch is calculated through the model's forward propagation. At the same time, the model prediction confidence is output. If the confidence is lower than 90%, features need to be extracted again and prediction needs to be performed again.

[0076] Yield prediction value The dynamic approval threshold Y' obtained in step D th If a comparison is made, If the batch yield is deemed acceptable, an approval instruction is generated and synchronized to the MES system, allowing the batch to proceed to the next production stage or be released. If an issue is detected, the anomaly tracing process is triggered. Based on the feature coefficients obtained from L1 regularization in step B, the input features are ranked by importance. After normalizing the absolute values ​​of the coefficients, the top three features with the highest scores are selected as key influencing factors. The corresponding processes, equipment, and parameter information are then linked to these features to pinpoint the core cause of the low yield. A standardized anomaly tracing report is generated based on the location results, clearly identifying the problematic process, associated equipment number, and parameter fluctuation range, providing precise technical support for process parameter calibration, equipment maintenance, or material replacement.

[0077] Furthermore, taking the yield approval of logic chip manufacturing at a certain 14nm process node as an example: Take a batch of 14nm logic chips to be approved, and input its preprocessed data into a trained yield prediction model after feature engineering. The predicted yield value of the batch is 87.5%. Compare the predicted value with the dynamic approval threshold of 86.77%. Since 87.5% ≥ 86.77%, the batch is deemed to have passed the approval and is allowed to be released.

[0078] Another batch awaiting approval was selected, with a predicted yield of 85.2%, which is lower than the dynamic approval threshold of 86.77%, and the approval was deemed unsuccessful. By ranking the importance of features, it was found that the exposure dose fluctuation in the photolithography process and the temperature stability of the etching equipment were the key factors leading to the low yield. An anomaly traceability report was output, recommending that the exposure parameters of the photolithography process be calibrated and the etching equipment be maintained.

[0079] The other parts of this embodiment are the same as any one of the above embodiments 1-2, so they will not be described again.

[0080] Example 4: Based on any one of Embodiments 1-3 above, this embodiment proposes a data-driven integrated circuit manufacturing yield approval system for executing the above-described data-driven integrated circuit manufacturing yield approval method, including a preprocessing unit, a feature unit, a prediction unit, a dynamic approval unit, and an output unit. The preprocessing unit is used to preprocess the acquired integrated circuit manufacturing process data to obtain a preprocessed integrated circuit manufacturing process dataset. The feature unit is used to extract features from the preprocessed integrated circuit manufacturing process dataset and call the attention mechanism to obtain the fused feature vector. The prediction unit is used to construct a yield prediction model based on the fused feature vector to obtain the predicted yield value of the integrated circuit. The dynamic approval unit is used to calculate the dynamic approval threshold by calling the kernel density estimation method based on the acquired historical yield data. The output unit is used to determine whether the yield approval is qualified based on the dynamic approval threshold and the yield prediction value, and output the approval result.

[0081] This embodiment also proposes an electronic device, including a memory and a processor; the memory stores a computer program; when the computer program is executed on the processor, it implements the above-described data-driven integrated circuit manufacturing yield approval method.

[0082] This embodiment also proposes a computer-readable storage medium storing computer instructions; when the computer instructions are executed on the aforementioned electronic device, the aforementioned data-driven integrated circuit manufacturing yield approval method is implemented.

[0083] The other parts of this embodiment are the same as any one of the embodiments 1-3 above, so they will not be described again.

[0084] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any simple modifications or equivalent changes made to the above embodiments based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A data-driven method for integrated circuit manufacturing yield approval, characterized in that, Specifically, the following steps are included: Step S1: Preprocess the acquired integrated circuit manufacturing process data to obtain a preprocessed integrated circuit manufacturing process dataset; Step S2: Extract features from the preprocessed integrated circuit manufacturing process dataset and call the attention mechanism to obtain the fused feature vector; Step S3: Based on the fused feature vectors, construct a yield prediction model to obtain the predicted yield value of the integrated circuit; Step S4: Based on the acquired historical yield data, call the kernel density estimation method to calculate the dynamic approval threshold; Step S5: Based on the dynamic approval threshold and yield prediction value, determine whether the yield approval is qualified and output the approval result.

2. The data-driven integrated circuit manufacturing yield approval method according to claim 1, characterized in that, Step S2 specifically includes the following steps: Step S21: Based on the data type of the preprocessed integrated circuit manufacturing process dataset, if it is structured data, extract time domain features and frequency domain features; if it is unstructured data, call a convolutional neural network to extract deep features. Step S22: Calculate the mutual information value based on the marginal probability distribution of time domain features, the marginal probability distribution of frequency domain features, the marginal probability distribution of deep features, and the marginal probability distribution of yield, and retain features with mutual information values ​​greater than a set threshold. Step S23: Call the L1 regularized logistic regression model to filter and retain features to obtain the optimal input feature set; Step S24: Based on the set attention weights, call the attention mechanism to fuse the optimal input feature set and obtain the fused feature vector.

3. The data-driven integrated circuit manufacturing yield approval method according to claim 2, characterized in that, Step S3 specifically includes the following steps: Step S31: Invoke the bidirectional long short-term memory network and the fully connected neural network to construct a yield prediction model; the yield prediction model includes an input layer, a Bi-LSTM layer, an FCN layer and an output layer; Step S32: Input the fused feature vector into the input layer and convert it into tensor format; Step S33: Input the transformed feature tensor into the Bi-LSTM layer, and concatenate the hidden state outputs of the forward LSTM and the backward LSTM to obtain the output of the Bi-LSTM layer. Step S34: Input the output of the Bi-LSTM layer into the FCN layer for nonlinear transformation to obtain the activation output; Step S35: Input the activation output to the output layer and call the sigmoid activation function to map the activation output to a yield prediction value between 0 and 1.

4. The data-driven integrated circuit manufacturing yield approval method according to claim 3, characterized in that, Step S3 further includes: Step S36: Based on the predicted yield, the actual yield, and the training sample data, construct a loss function, minimize the loss function using the adaptive moment estimation optimization algorithm, and obtain the trained yield prediction model.

5. The data-driven integrated circuit manufacturing yield approval method according to claim 3, characterized in that, Step S4 specifically includes the following steps: Step S41: Obtain historical yield data and classify it to obtain historical yield datasets under different categories; Step S42: Calculate the probability density distribution of yield for the current category using the kernel density estimation method; Step S43: Calculate the dynamic approval threshold for the current category based on the probability density distribution and the set confidence level; Step S44: Based on the set fluctuation coefficient weight, the batch fluctuation coefficient is introduced to correct the dynamic approval threshold, and the corrected dynamic approval threshold is obtained.

6. The data-driven integrated circuit manufacturing yield approval method according to claim 4, characterized in that, The specific operation of step S5 is to compare the corrected dynamic approval threshold and the yield prediction value. If the yield prediction value is greater than or equal to the corrected dynamic approval threshold, the batch yield is determined to be qualified, the approval result is output, and the batch is allowed to be released. If the predicted yield is less than the corrected dynamic approval threshold, the batch yield is deemed unqualified, the approval failure result is output, and the anomaly traceability process is initiated.

7. The data-driven integrated circuit manufacturing yield approval method according to claim 1, characterized in that, The integrated circuit manufacturing process data includes intermediate process data, equipment status data, material data, and finished product testing data.

8. A data-driven integrated circuit manufacturing yield approval system, used to execute the data-driven integrated circuit manufacturing yield approval method as described in claim 1, characterized in that, It includes a preprocessing unit, a feature unit, a prediction unit, a dynamic approval unit, and an output unit; The preprocessing unit is used to preprocess the acquired integrated circuit manufacturing process data to obtain a preprocessed integrated circuit manufacturing process dataset. The feature unit is used to extract features from the preprocessed integrated circuit manufacturing process dataset and call the attention mechanism to obtain the fused feature vector. The prediction unit is used to construct a yield prediction model based on the fused feature vector to obtain the predicted yield value of the integrated circuit. The dynamic approval unit is used to calculate the dynamic approval threshold by calling the kernel density estimation method based on the acquired historical yield data. The output unit is used to determine whether the yield approval is qualified based on the dynamic approval threshold and the yield prediction value, and output the approval result.

9. An electronic device, characterized in that, It includes a memory and a processor; the memory stores a computer program; when the computer program is executed on the processor, it implements the data-driven integrated circuit manufacturing yield approval method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer storage medium stores computer instructions; when the computer instructions are executed on the electronic device as described in claim 9, the data-driven integrated circuit manufacturing yield approval method as described in any one of claims 1-7 is implemented.

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