Display device and display control method

Abstract

The application discloses a display device and a display control method, and belongs to the technical field of display. The display device comprises a display panel, a display driving module and a backlight module. A pixel array in the display panel comprises a plurality of pixel groups, and each pixel group comprises a plurality of pixel rows in the pixel array. One display frame period comprises a plurality of display subframes corresponding to the pixel groups. One display subframe comprises a scanning and writing sub-time domain, a liquid crystal response sub-time domain and a backlight driving sub-time domain arranged in sequence. The display driving module is used for writing display data into the pixel group corresponding to the display subframe in the scanning and writing sub-time domain in the display subframe in a first display mode. The backlight module is used for providing backlight for the display panel in the backlight driving sub-time domain in the display subframe in the first display mode. The display device provided by the application eliminates the visual flicker problem of the liquid crystal display panel caused by the excessively low frequency of the backlight turning on at a low refresh rate.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display device and a display control method. Background Technology

[0002] Because liquid crystal materials inherently have a slow response time, liquid crystal display panels are prone to ghosting or motion blur when displaying fast-moving images, causing visual discomfort and even dizziness for users. To improve this problem, backlight modulation technology is typically used. This involves controlling the duty cycle of the backlight of the liquid crystal display panel, turning the backlight on and off in pulses within one display frame cycle. This shortens the effective light-emitting time and reduces visual ghosting caused by the lag in liquid crystal response.

[0003] However, when the LCD panel displays at a lower refresh rate, the frequency of backlight activation also decreases accordingly. If the backlight activation frequency is so low that the human eye can perceive changes in brightness, the user will experience backlight flickering on the display panel, causing noticeable visual discomfort.

[0004] Therefore, how to effectively suppress ghosting or motion blur in liquid crystal display panels while improving backlight flicker when displaying at low refresh rates is a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0005] A display device and a display control method are provided to solve the above-mentioned technical problems.

[0006] In a first aspect, a display device is provided, comprising: a display panel, a display driving module, and a backlight module, wherein the pixel array in the display panel includes a plurality of pixel groups, and each pixel group includes a plurality of pixel rows in the pixel array; in a first display mode, a display frame period of the display panel includes a plurality of display subframes, each display subframe corresponding to one of the pixel groups, and each display subframe includes a scan write sub-time domain, a liquid crystal response sub-time domain, and a backlight driving sub-time domain arranged sequentially; The display driver module is used to write display data into the pixel group corresponding to the display subframe in the scan-write sub-time domain of the display subframe in the first display mode. The backlight module is used to provide backlight for the display panel in the backlight driving sub-time domain of the display sub-frame in the first display mode.

[0007] Secondly, embodiments of this application also provide a display control method applied to a display device, the display device including a display panel, a display driving module, and a backlight module; the pixel array in the display panel includes multiple pixel groups, each pixel group including multiple pixel rows in the pixel array; in a first display mode, one display frame period of the display panel includes multiple display subframes, each display subframe having a one-to-one correspondence with each pixel group, and one display subframe including a scan write sub-time domain, a liquid crystal response sub-time domain, and a backlight driving sub-time domain arranged sequentially; The method includes: In the first display mode, the display driver module writes display data into the pixel group corresponding to the display subframe within the scan-write sub-time domain of the display subframe. In the first display mode, the backlight module provides backlight to the display panel within the backlight driving sub-time domain of the display sub-frame.

[0008] The display device of this application divides the pixel array in the display panel into multiple pixel groups and divides one display frame cycle into multiple display subframes corresponding to each pixel group. The display driving module scans and writes display data to the pixel groups corresponding to each display subframe in the scan-write sub-time domain within each display subframe. The backlight module provides backlight to the display panel in the backlight driving sub-time domain after the scan-write sub-time domain and liquid crystal response sub-time domain within each display subframe. By writing display data multiple times at intervals within one display frame cycle and correspondingly lighting the backlight multiple times, the backlight activation frequency of the display panel at low refresh rates can be increased without changing the inherent physical structure of the liquid crystal display panel or increasing power consumption, thus moving it away from the sensitive frequency band where the human eye can perceive changes in brightness. The display device provided in this embodiment not only retains the advantages of duty cycle backlight driving in suppressing ghosting and motion blur, but also eliminates the visual flicker problem caused by the excessively low backlight activation frequency of the liquid crystal display panel at low refresh rates, significantly improving the display stability of the liquid crystal display panel and the user's viewing comfort. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0011] Figure 1 This is one of the display driving timing diagrams for traditional display devices in related technologies.

[0012] Figure 2 This is the second schematic diagram of the display driving timing of a traditional display device in related technologies.

[0013] Figure 3 This is a schematic diagram of the structure of a display device provided in an exemplary embodiment of this disclosure.

[0014] Figure 4 This is one of the display driving timing diagrams of a display device provided in an exemplary embodiment of this disclosure.

[0015] Figure 5 This is one of the planar schematic diagrams of a display panel in a display device provided in an exemplary embodiment of this disclosure.

[0016] Figure 6 This is a second plan view of a display panel in a display device provided as an exemplary embodiment of this disclosure.

[0017] Figure 7 This is a second schematic diagram of the display driving timing of a display device provided in an exemplary embodiment of this disclosure.

[0018] Figure 8 This is a flowchart illustrating a display control method provided in an exemplary embodiment of the present disclosure.

[0019] Figure label: 300: Display device; 31: Display panel; 32: Display driver module; 33: Backlight module. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0021] In the embodiments of this application, "at least one" refers to one or more; "multiple" refers to two or more. In the description of this application, the terms "first," "second," "third," etc., are used only for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance, nor should they be construed as indicating or implying order.

[0022] References such as “one embodiment” or “some embodiments” as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the terms “comprising,” “including,” “having,” and variations thereof, as used in this specification, mean “including, but not limited to,” unless otherwise specifically emphasized.

[0023] It should be noted that in the embodiments of this application, "and / or" describes the relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects before and after it are in an "or" relationship.

[0024] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.

[0025] It should be noted that with the rapid development of Virtual Reality (VR) and Augmented Reality (AR) display technologies, users' demands for the immersive experience, clarity, and viewing comfort of display devices are constantly increasing. Liquid crystal displays (LCDs), due to their mature technology and lower cost, are widely used in AR / VR display products.

[0026] Typically, motion blur or ghosting when displaying fast-moving images can be avoided by controlling the duty cycle of the LCD panel's backlight. Specifically, within one display frame cycle, the pixel array in the LCD panel is first scanned and written line by line with the backlight off, writing all display data to the entire pixel array within a continuous scan time domain. After the display data writing to the pixel array is completed, a certain liquid crystal response time domain is allowed for the liquid crystal to respond, and finally the backlight is turned on and maintained for a certain duration before being turned off, so that the LCD panel presents a relatively stable image during the backlight-on period.

[0027] In the aforementioned duty cycle driving method for the backlight, the backlight activation frequency is the same as the refresh rate of the LCD panel. For example, if the refresh rate of the LCD panel is 60Hz, then the backlight activation frequency is also 60Hz. However, in some application scenarios, the LCD panel needs to operate at a lower refresh rate to adapt to requirements such as content output, system power consumption, or link bandwidth. When the LCD panel displays at a lower refresh rate, the backlight activation frequency is correspondingly reduced.

[0028] Figure 1 This is one of the display driving timing diagrams for traditional display devices in related technologies. Please refer to... Figure 1 When the refresh rate of the LCD panel is 90Hz, the duration of one display frame cycle is 11.1ms. At the beginning of one display frame cycle, the backlight control signal used to control the backlight to turn on is at a low level, and the backlight is in the off state.

[0029] Figure 1 The display data write signal is used to indicate the scanning time domain for writing display data line by line to the pixel array in the liquid crystal display panel within the display frame period. The moment the display data write signal transitions from low to high marks the start of the scanning time domain, initiating the line-by-line writing of display data to the pixel array in the liquid crystal display panel; the moment the display data write signal transitions from high to low marks the end of the scanning time domain, ending the writing of display data to the liquid crystal display panel. Please refer to... Figure 1 When writing to the pixel array in the LCD panel line by line, the backlight is off (the backlight control signal is low).

[0030] After writing all display data into the pixel array of the liquid crystal display panel in the scan time domain, the process enters the liquid crystal response time domain (RT). Please refer to... Figure 1 During the liquid crystal response time domain, the backlight is in the off state (the backlight control signal is low).

[0031] After the liquid crystal response time domain ends, the backlight control signal changes from low to high. After the backlight is turned on and maintained for a certain duration, the backlight control signal changes from high to low, and the backlight is turned off.

[0032] When the refresh rate of the LCD panel is high, the duration of one display frame cycle is short, and the duration between two backlight activations is ( T1 is also relatively short.

[0033] Figure 2 This is the second schematic diagram of the display driving timing of a traditional display device in related technologies. Please refer to... Figure 2 When the refresh rate of the LCD panel is 60Hz, the duration of one display frame cycle is 16.7ms.

[0034] Because the inherent physical structure of the liquid crystal display panel and the characteristics of the liquid crystal material remain unchanged, the duration of the scan time domain and the liquid crystal response time domain within one display frame cycle remains constant. However, the increased duration of one display frame cycle results in a longer interval between two backlight activations. T2), which is much longer than the time interval between two backlight activations at high refresh rates ( T1).

[0035] A longer interval between two backlight activations indicates a lower backlight activation frequency. If the backlight activation frequency is so low that the human eye can perceive changes in brightness, users will experience backlight flickering on the display panel, causing significant visual discomfort and failing to meet the requirements for a comfortable viewing experience in scenarios such as AR / VR.

[0036] Furthermore, because the backlight stays on for an excessively long time after being turned on, it exposes the intermediate state of the liquid crystal flip-out, resulting in severe ghosting and edge blurring. Therefore, when the LCD panel displays at a low refresh rate, it is difficult to improve the backlight flicker problem at low refresh rates by extending the backlight stay time after it is turned on.

[0037] Therefore, how to effectively suppress ghosting or motion blur in liquid crystal display panels while improving backlight flicker when displaying at low refresh rates is a technical problem that urgently needs to be solved in this field.

[0038] In this regard, this application provides a display device. Figure 3 This is a schematic diagram of the structure of a display device provided as an exemplary embodiment of this disclosure. Please refer to... Figure 3 The display device 300 includes: a display panel 31, a display driving module 32, and a backlight module 33. The pixel array in the display panel 31 includes multiple pixel groups, and each pixel group includes multiple pixel rows in the pixel array. Figure 4 This is one of the display driving timing diagrams for an exemplary embodiment of the display device provided in this disclosure. Please refer to... Figure 4 In the first display mode, a display frame cycle of the display panel 31 includes multiple display subframes, each display subframe corresponding to one of the pixel groups, and a display subframe includes a scan write sub-time domain, a liquid crystal response sub-time domain and a backlight drive sub-time domain arranged in sequence. The display driver module 32 is used to write display data into the pixel group corresponding to the display subframe in the scan-write sub-time domain of the display subframe in the first display mode. The backlight module 33 is used to provide backlight for the display panel 31 in the backlight driving sub-time domain of the display sub-frame in the first display mode.

[0039] Specifically, the display device 300 in this embodiment can be applied to electronic devices with display functions, such as mobile phones, tablets, smartwatches, virtual reality (VR) devices, or augmented reality (AR) devices.

[0040] In this embodiment, the display panel 31 is a panel component used for image display in the display device 300100.

[0041] In this embodiment, the display driver module 32 is connected to each pixel unit in the pixel array and can sequentially provide scanning signals to each pixel row in the pixel array, thereby sequentially turning on each pixel row. The display driver module 32 can also provide data signals to each pixel column in the pixel array so that after any pixel row in the pixel array is turned on, display data is written to the pixel unit in the aforementioned pixel row.

[0042] In this embodiment, the backlight module 33 can be disposed on the backlight side of the display panel 31 to provide backlight for the display panel 31. The backlight module 33 may include a backlight driving circuit and a light-emitting element. The backlight driving circuit is connected to the light-emitting element and is used to provide a driving signal to the light-emitting element. The light-emitting element may be a light-emitting diode (LED) or a micro-LED, etc.

[0043] It should be noted that the display panel 31 in this embodiment is a liquid crystal display (LCD) panel.

[0044] It is understandable that, since the display panel 31 has a backlight flicker problem at low refresh rates, this embodiment uses different methods to write display data and drive backlight in different display modes, so as to improve the backlight flicker problem of the liquid crystal display panel 31 at low refresh rates while effectively suppressing the ghosting or motion blur of the liquid crystal display panel 31.

[0045] In this embodiment, the first display mode is the display mode when the display panel 31 displays at a low refresh rate (e.g., 60Hz, 45Hz), and the second display mode is the display mode when the display panel 31 displays at a high refresh rate (e.g., 90Hz, 120Hz, etc.).

[0046] The display panel 31 includes a display area and a non-display area surrounding the display area. A pixel array is disposed in the display area. The pixel array may include multiple pixel units arranged in a matrix.

[0047] In this embodiment, the pixel rows in the pixel array are grouped to obtain at least two pixel groups. Each pixel group may include multiple sequentially arranged pixel rows in the pixel array, and may also include multiple spaced-apart pixel rows in the pixel array. The specific grouping method of the pixel groups is not limited in this embodiment.

[0048] In this embodiment, a display frame period can be evenly divided into multiple display subframes based on the number of pixel groups in the display panel 31. The one-to-one correspondence between each display subframe and each pixel group is determined according to the position of each pixel group in the display panel 31 and / or the scanning direction of the display panel 31. For example, if the pixel array is divided into a first pixel group and a second pixel group, then a display frame period can be divided into a first display subframe and a second display subframe. The first display subframe corresponds to the first pixel group, and the second display subframe corresponds to the second pixel group.

[0049] Each display subframe in each display frame cycle includes a scan write sub-time domain, a liquid crystal response sub-time domain, and a backlight drive sub-time domain arranged sequentially in time.

[0050] In this embodiment, the scanning and writing sub-time domain can refer to the display driving module 32 scanning the pixel rows in the pixel group corresponding to the display sub-frame line by line and writing the display data corresponding to the pixel group into the time period of the pixel group.

[0051] In this embodiment, the liquid crystal response sub-time domain can refer to the time period required for the liquid crystal molecules to deflect according to the written display data and reach a stable state after the scanning and writing sub-time domain is completed.

[0052] It should be noted that the duration of the liquid crystal response sub-time domain in this embodiment can be predefined based on prior knowledge and / or actual conditions.

[0053] In this embodiment, the backlight driving sub-time domain can refer to the time period during which the backlight module 33 is turned on and continuously lit after the liquid crystal response sub-time domain ends.

[0054] For ease of description, this embodiment can use The display frame period is indicated by... Identifier displays frame period The display subframe in; where, ; , This indicates the number of subframes displayed within a display frame period.

[0055] For display frame period Display subframes in When the display driver module 32 is executing the first display mode, it can display subframes. The scan is written into the sub-time domain and displayed in the sub-frame. Each pixel row in the corresponding pixel group is written with its corresponding display data sequentially, row by row. In the display subframe... During the scan-write sub-time domain and the subsequent liquid crystal response sub-time domain, the backlight module 33 remains off. When entering the display sub-frame... After the backlight driving sub-time domain is completed, the backlight module 33 provides backlight to the display panel 31 until the display sub-frame is displayed. The backlight driver sub-time domain ends.

[0056] This embodiment divides the pixel array into multiple pixel groups and correspondingly divides one display frame cycle into multiple display subframes, so that the original continuous full-screen data scan and writing is decomposed into multiple grouped scan and writing with time intervals; at the same time, the backlight is also turned on multiple times within one frame (i.e., it is turned on once in each display subframe), so that the backlight is turned on multiple times within one display frame cycle, and the time interval between two backlight activations is ( The T3 frequency is significantly shortened, and the backlight activation frequency can be increased to a range where the human eye cannot perceive changes in brightness, thereby avoiding the user's perception of backlight flicker on the display panel 31. For example, when the resolution of the display panel 31 is 60Hz and the pixel array includes two pixel groups, the backlight frequency changes from the original 60Hz to 120Hz, which is far higher than the lower limit of the flicker frequency that the human eye can perceive.

[0057] It should be noted that, in this embodiment, the display driver module 32 and the backlight module 33 can write display data and provide backlight to the display panel 31 based on the received signals. Specifically, during the display frame cycle... Display subframes in Within the display driver module 32, if the received display data write signal is at a low level, no display data is written; if the received display data write signal is at a high level, the display driver module 32 determines to enter the display subframe. The scan data is written to the sub-temporal domain, and then sent to the display subframe. Each pixel row in the corresponding pixel group is written with its corresponding display data sequentially, row by row. During the display frame cycle... Display subframes in If the backlight control signal received by the backlight module 33 is at a low level, no backlight is provided to the display panel 31; if the backlight control signal received by the backlight module 33 is at a high level, it is determined to enter the display subframe. The backlight driving sub-time domain in the middle provides backlight to the display panel 31.

[0058] The display device provided in this embodiment divides the pixel array in the display panel into multiple pixel groups and divides one display frame cycle into multiple display subframes corresponding to each pixel group. The display driving module scans and writes display data to the pixel groups corresponding to each display subframe in the scan-write sub-time domain within each display subframe. The backlight module provides backlight to the display panel in the backlight driving sub-time domain after the scan-write sub-time domain and the liquid crystal response sub-time domain within each display subframe. By writing display data multiple times at intervals within one display frame cycle and correspondingly lighting the backlight multiple times, the backlight activation frequency of the display panel at low refresh rates can be increased without changing the inherent physical structure of the liquid crystal display panel or increasing power consumption, thus moving it away from the sensitive frequency band where the human eye can perceive changes in brightness. The display device provided in this embodiment not only retains the advantages of duty cycle backlight driving in suppressing ghosting and motion blur but also eliminates the visual flicker problem caused by the excessively low backlight activation frequency at low refresh rates, significantly improving the display stability of the liquid crystal display panel and the user's viewing comfort.

[0059] Figure 5 This is one of the planar schematic diagrams of a display panel in a display device provided as an exemplary embodiment of this disclosure. Please refer to... Figure 5 In one embodiment, each pixel group includes a first pixel group and a second pixel group, the first pixel group includes odd-numbered pixel rows in the pixel array, and the second pixel group includes even-numbered pixel rows in the pixel array; the display frame period includes a first display subframe corresponding to the first pixel group and a second display subframe corresponding to the second pixel group; The display driver module 32 is used to write display data into the first pixel group in the scan-write sub-time domain of the first display sub-frame and to write display data into the second pixel group in the scan-write sub-time domain of the second display sub-frame in the first display mode.

[0060] Specifically, in this embodiment, the pixel array in the display panel 31 is grouped according to odd-numbered pixel rows, dividing the pixel array in the display panel 31 into two pixel groups. The first pixel group consists of all odd-numbered pixel rows (e.g., row 1, row 3, row 5, etc.) in the pixel array, and the second pixel group consists of all even-numbered pixel rows (e.g., row 2, row 4, row 6, etc.) in the pixel array. Correspondingly, the display frame period... Divided into the first display subframe arranged sequentially in time. Second display subframe .

[0061] During the display frame cycle The first display subframe in Within the scanning and writing sub-time domain, the display driver module 32 sequentially activates each odd-numbered pixel row in the first pixel group and writes the corresponding display data to that odd-numbered pixel row until all odd-numbered pixel rows in the first pixel group are activated and the display data writing is completed. Subsequently, after the first display sub-frame... After the liquid crystal response sub-time domain in the first display sub-frame, the backlight module 33... The backlight driver sub-time domain provides backlight for the display panel 31.

[0062] Similarly, during the display frame period The second display subframe in Within the scanning and writing sub-time domain, the display driver module 32 sequentially activates each even-numbered pixel row in the second pixel group and writes the corresponding display data to that even-numbered pixel row until all even-numbered pixel rows in the second pixel group are activated and the display data writing is completed. Subsequently, after the second display sub-frame... After the liquid crystal response sub-time domain in the second display sub-frame, the backlight module 33... The backlight driver sub-time domain provides backlight for the display panel 31.

[0063] In this embodiment, the pixel array in the display panel is divided into a first pixel group including odd-numbered pixel rows and a second pixel group including even-numbered pixel rows according to the odd-numbered pixel rows. Then, by splitting the scan data of one display frame cycle into odd-numbered pixel rows and even-numbered pixel rows for two interval writings, the pixel areas written in any display sub-frame are uniformly and interspersed in the physical space of the entire display panel. When the backlight is turned on in the backlight driving sub-time domain in each display sub-frame, the picture observed by the user's eyes has better spatial uniformity, avoiding the visual fragmentation or tearing effect that may be caused by asynchronous local screen refresh. It can improve the backlight activation frequency at low refresh rates while further ensuring the overall display quality of dynamic pictures.

[0064] Figure 6 This is a second plan view of the display panel in a display device provided as an exemplary embodiment of this disclosure. Please refer to... Figure 6 In another embodiment, each pixel group includes a plurality of adjacent pixel rows arranged sequentially in the pixel array, and the number of pixel rows included in each pixel group is the same.

[0065] Specifically, in this embodiment, the pixel array in the display panel 31 is grouped based on physical positional continuity, dividing the pixel array in the display panel 31 into multiple pixel groups. Each pixel group includes multiple physically continuous (i.e., sequentially arranged adjacent) pixel rows, and each pixel group includes the same number of pixel rows. For example, please refer to... Figure 6For a pixel array containing 1080 pixel rows, after dividing the pixel array into two pixel groups, each pixel group contains 540 pixel rows.

[0066] In this embodiment, the pixel array in the display panel is divided into multiple pixel groups based on the continuity of physical location. The display driving module can scan and open the pixel rows in the corresponding pixel group line by line in each display subframe without performing complex jump addressing, which reduces the complexity of the scanning driving logic. Furthermore, each pixel group contains the same number of pixel rows, ensuring that the time period of each display subframe is strictly divided equally, which is beneficial to the accurate and stable control of the display driving timing.

[0067] As an example, the number of pixel groups is determined based on the refresh rate of the display panel 31.

[0068] It should be noted that during actual display, the display device 300 may dynamically adjust the refresh rate of the display panel 31 based on the type of currently displayed content (such as static images, dynamic videos, or high frame rate games), system power consumption strategies, or link bandwidth status. Therefore, in this embodiment, based on the refresh rate of the display panel 31 and using a preset human eye flicker perception threshold frequency (e.g., 90Hz) as a benchmark, the number of pixel groups to be divided can be determined through methods such as table lookup, preset condition judgment, or numerical calculation to ensure that the backlight activation frequency of the display panel 31 is greater than or equal to the aforementioned threshold frequency. The backlight activation frequency of the display panel 31 is the product of the display refresh rate and the number of pixel groups.

[0069] In this embodiment, the number of pixel groups is determined based on the refresh rate of the display panel 31. This allows for the configuration of the number of times the backlight is turned on within a display frame cycle for different low refresh rate application scenarios. This ensures that the backlight activation frequency is higher than the flicker frequency that the human eye can perceive under various low refresh rate conditions, thus guaranteeing the user's visual comfort. It also avoids excessive compression of the scan write sub-time domain and liquid crystal response sub-time domain within the display sub-frame due to an excessive number of pixel groups at higher refresh rates. This achieves adaptive optimal matching of the display panel 31 driving timing at different refresh rates.

[0070] In some embodiments, the duration of the backlight driving sub-time domain in the display sub-frame is determined based on the refresh rate of the display panel 31.

[0071] Specifically, when the refresh rate of the display panel 31 changes, or when a display frame period is divided into multiple display subframes, the duration of a display subframe will also change. In this embodiment, in order to ensure the peak brightness of the display screen 31 and suppress ghosting, the ratio between the duration of the backlight driving sub-time domain in the display subframe and the duration of the display subframe is set to a preset refresh rate.

[0072] Optionally, the preset refresh rate can be in the range of 0.08-0.12, for example, the preset refresh rate can be 0.08, 0.1 or 0.12.

[0073] Preferably, the preset refresh rate can be 0.1.

[0074] In this embodiment, the backlight driving sub-time domain duration is determined based on the refresh rate, so that the backlight illumination time can be dynamically and adaptively matched with the changes in display mode and refresh rate. This avoids the exposure of the intermediate state of the liquid crystal flip due to excessive backlight on-time, and also avoids insufficient overall brightness of the screen due to excessively short on-time. Thus, while ensuring a low ghosting display effect, the power consumption of the display device 300 is reduced.

[0075] Figure 7 This is the second schematic diagram of the display driving timing of a display device provided in an exemplary embodiment of this disclosure. Please refer to... Figure 7 In some embodiments, in the second display mode, a display frame cycle of the display panel 31 includes a scan write time domain, a liquid crystal response time domain, and a backlight drive time domain arranged sequentially. The display driver module 32 is used to write display data sequentially into the pixel rows of the display panel 31 during the scan-write time domain of the display frame cycle in the second display mode. The backlight module 33 is used to provide backlight to the display panel 31 in the backlight driving time domain of the display frame period under the second display mode. The refresh rate of the display panel 31 in the second display mode is higher than that in the first display mode.

[0076] Specifically, the second display mode in this embodiment is the display mode when the display panel 31 displays at a high refresh rate (e.g., 90Hz, 120Hz, etc.). Since the refresh rate of the display panel 31 is already high in the second display mode, the duration of a frame is short, and the natural time interval between two backlight activations is short enough, the backlight flicker frequency is naturally higher than the lower limit of the frequency that the human eye can perceive.

[0077] Therefore, in the second display mode, pixel grouping of the pixel array and sub-frame division of the display frame cycle are no longer performed. Within one display frame cycle, the display driving module 32 continuously scans and writes display data line by line to all pixel rows of the display panel 31 in the scan-write time domain. During the scan-write time domain and the liquid crystal response time domain of the display frame cycle, the backlight module 33 remains in an off state. When the backlight driving time domain of the display frame cycle is entered, the backlight module 33 provides backlight to the display panel 31 until the backlight driving time domain of the display frame cycle ends.

[0078] The light frequency changed from 60Hz to 120Hz, which is far higher than the lower limit of the flicker frequency that the human eye can perceive.

[0079] It should be noted that, in this embodiment, the display driver module 32 and the backlight module 33 can write display data and provide backlight to the display panel 31 based on the received signals. Specifically, during the display frame cycle... Within the display driver module 32, if the received display data write signal is at a low level, no display data is written; if the received display data write signal is at a high level, the display driver module 32 determines to enter the display frame cycle. The scanning write time domain is used to sequentially write the corresponding display data to each pixel row in the pixel array. During the display frame cycle... When the level of the backlight control signal received by the backlight module 33 is low, no backlight is provided to the display panel 31; when the level of the backlight control signal received by the backlight module 33 is high, it is determined to enter the display frame cycle. The backlight driving time domain in the middle provides backlight to the display panel 31.

[0080] In this embodiment, the display device writes all display data to the pixel array and turns on the backlight once within one display frame cycle in a high refresh rate scenario. This avoids the hardware computing power overhead caused by unnecessary pixel grouping and multiple timing switches, enabling the display device to eliminate backlight flicker in low refresh rate scenarios and reduce the complexity of the driving logic in high refresh rate scenarios, thus balancing the display stability and power consumption optimization of the display device.

[0081] In some embodiments, the system further includes: a display controller, configured to: execute the first display mode when the refresh rate of the display panel 31 is less than a preset refresh rate, control the display driving module 32 to write display data into the pixel group corresponding to the display subframe in the scan-write sub-time domain of the display subframe, and control the backlight module 33 to provide backlight for the display panel 31 in the backlight driving sub-time domain of the display subframe; and execute the second display mode when the refresh rate of the display panel 31 is not less than the preset refresh rate, control the display driving module 32 to sequentially write display data into the pixel row of the display panel 31 in the scan-write sub-time domain of the display frame period, and control the backlight module 33 to provide backlight for the display panel 31 in the backlight driving sub-time domain of the display frame period.

[0082] Specifically, in this embodiment, the display controller is connected to the display panel 31 and can be used to provide display data and control signals to the display panel 31. The display controller can be a display driver IC (DDIC), a timing controller (TCON), or a system-on-a-chip (SoC) that integrates display driver functions, etc.

[0083] In this embodiment, the display controller can obtain the refresh rate of the display panel 31 in real time and determine whether the refresh rate of the display panel 31 is greater than the preset refresh rate.

[0084] When the display controller determines that the refresh rate of the display panel 31 is less than the preset refresh rate, it determines that there is a risk of backlight flicker in the display panel 31. Then, it executes the first display mode, controls the display driving module 32 to write display data into the pixel group corresponding to the display sub-frame in the scan-write sub-time domain of the display sub-frame, and controls the backlight module 33 to provide backlight for the display panel 31 in the backlight driving sub-time domain of the display sub-frame.

[0085] When the display controller determines that the refresh rate of the display panel 31 is not less than the preset refresh rate, it determines that there is no risk of backlight flicker in the display panel 31, and then executes the second display mode. It controls the display driving module 32 to sequentially write display data into the pixel rows of the display panel 31 within the scan writing time domain of the display frame cycle, and controls the backlight module 33 to provide backlight for the display panel 31 within the backlight driving time domain of the display frame cycle.

[0086] It should be noted that the preset refresh rate in this embodiment can be determined based on prior knowledge and / or actual conditions. This embodiment does not limit the specific value of the preset refresh rate.

[0087] Optionally, the preset refresh rate in this embodiment can be 90Hz.

[0088] In this embodiment, the display controller intelligently switches the display mode according to the preset refresh rate, which can achieve seamless and adaptive switching of the backlight driving timing, so that the display device can execute the best display strategy in various refresh rate scenarios.

[0089] In some embodiments, before executing the first display mode, the display controller is further configured to: determine the number of pixel groups in the pixel array based on the refresh rate of the display panel 31; Based on the number of pixel groups in the pixel array, the pixel rows included in each pixel group and the duration of the scan writing sub-time domain and the backlight driving sub-time domain are determined.

[0090] Specifically, in this embodiment, when the display controller determines that the refresh rate of the display panel 31 is less than the preset refresh rate, it can first determine the number of pixel groups to be divided based on the refresh rate of the display panel 31 by means of table lookup, preset condition judgment or numerical calculation.

[0091] For example, when the refresh rate of the display panel 31 is 60Hz, since 60Hz is lower than the preset refresh rate of 90Hz, the display controller can divide the pixel array into two pixel groups based on the refresh rate; correspondingly, one display frame cycle is divided into two display subframes. When the display device 300 reduces the refresh rate to 45Hz to further reduce power consumption, the display controller can divide the pixel array into two or three pixel groups based on the refresh rate; correspondingly, one display frame cycle is divided into two or three display subframes. When the refresh rate of the display panel 31 is reduced to 30Hz, the display controller can divide the pixel array into three or four pixel groups based on the refresh rate; correspondingly, one display frame cycle is divided into three or four display subframes.

[0092] After determining the number of pixel groups in the pixel array, the display controller can combine predefined grouping methods (such as grouping by odd-even pixel rows or by physical positional continuity) to determine the pixel rows included in each pixel group.

[0093] The display controller can also allocate the duration of the scan write sub-time domain and the backlight drive sub-time domain in the display sub-frame according to the number of pixel groups in the pixel array, so as to ensure that in each display sub-frame, the pixel capacitance of the pixel group corresponding to the above display sub-frame can still reach the required gray level voltage, and the liquid crystal still has enough time to complete the deflection.

[0094] After determining the number of pixel groups in the pixel array, the number of pixel rows included in each pixel group, and the duration of the scan write sub-time domain and the backlight drive sub-time domain, the display controller can execute a first display mode, control the display drive module 32 to write display data into the pixel group corresponding to the display sub-frame in the scan write sub-time domain of the display sub-frame, and control the backlight module 33 to provide backlight for the display panel 31 in the backlight drive sub-time domain of the display sub-frame.

[0095] In this embodiment, when the refresh rate of the display panel is determined to be less than the preset refresh rate, the display controller determines the number of pixel groups in the pixel array based on the resolution of the display panel. Furthermore, based on the number of pixel groups in the pixel array, it determines the pixel rows included in each pixel group, as well as the duration of the scan-write sub-time domain and the backlight drive sub-time domain. This ensures the rationality of the display subframes and the division of each time domain within the display subframe during the display frame cycle when the display device executes the first display mode in a low refresh rate scenario. It avoids insufficient pixel row charging rate or incomplete liquid crystal deflection caused by improper time domain division. While eliminating backlight flicker in low refresh rate scenarios, it also improves the stability and color accuracy of the displayed image.

[0096] In some embodiments, the display driving module 32 includes a gate driver and a source driver; The gate driver is configured to, in response to the control of the display controller, sequentially turn on each pixel row in the pixel group corresponding to the display subframe during the scan write sub-time domain of the display subframe, or, in response to the control of the display controller, sequentially turn on each pixel row in the display panel 31 during the scan write time domain of the display frame period. The source driver is configured to respond to the control of the display controller and, when the pixel row is turned on, output a corresponding grayscale voltage to the pixel row to write the corresponding display data to the pixel row.

[0097] Specifically, in this embodiment, the gate driver is connected to each pixel row in the pixel array via multiple gate lines. The source driver is connected to each pixel column in the speed-limiting array via multiple gate lines.

[0098] When the display controller executes the first display mode, for the display frame period Display subframes in The gate driver can respond to the addressing logic sent by the display controller in the display subframe. The scan is written into the sub-time domain, and the display subframes are turned on sequentially. Each pixel row in the corresponding pixel group. The gate driver enables the pixel row by outputting a valid high-level scan signal to the pixel row to activate the thin-film transistor (TFT) within that pixel row.

[0099] When the display controller executes the second display mode, for the display frame period The gate driver can be in the display frame cycle The scan is written in the time domain, and each pixel row in the pixel array is opened sequentially.

[0100] After a pixel row is turned on by the gate driver, the source driver can convert the display data corresponding to the pixel row sent by the display controller into an analog grayscale voltage, and charge the pixel capacitor of the pixel row through the data line to write the display data into the pixel row.

[0101] The display driver module in this embodiment includes a gate driver and a source driver, which can ensure that pixel row opening and display data writing maintain strict timing synchronization under different display modes and group addressing requirements, thus guaranteeing the accuracy and image quality of the screen display in different display modes.

[0102] Please refer to Figure 4 In some embodiments, in the first display mode, a display subframe further includes a first blank subtime domain and a second blank subtime domain, wherein the first blank subtime domain is located before the scan write subtime domain in the display subframe, and the second blank subtime domain is located after the backlight drive subtime domain in the display subframe; Please refer to Figure 7 In the second display mode, a display frame cycle further includes a first blank time domain and a second blank time domain. The first blank time domain is located before the scan write time domain of the display frame cycle, and the second blank time domain is located after the backlight drive time domain.

[0103] Specifically, in the first display mode, a first blank sub-time domain is set before the scan write sub-time domain in the display sub-frame, which can be used for signal transmission between the display controller and the gate driver and source driver, as well as for signal reset and level stabilization of the gate driver or source driver. A second blank sub-time domain is set after the backlight drive sub-time domain in the display sub-frame, which can provide time margin for the complete release and shutdown of the backlight drive current in the backlight module 33.

[0104] In the second display mode, a first blank time domain is set before the scan write time domain in the display frame cycle. This blank time domain can be used for signal transmission between the display controller and the gate driver and source driver, as well as for signal reset and level stabilization of the gate driver or source driver. A second blank time domain is set after the backlight drive time domain in the display frame cycle, which provides time margin for the complete release and shutdown of the backlight drive current in the backlight module 33.

[0105] In this embodiment, a first blank sub-time domain is set before the scan-write sub-time domain in the display sub-frame, and a second blank sub-time domain is set after the backlight driving sub-time domain. The first blank time domain is set before the scan-write time domain in the display frame cycle, and the second blank time domain is set after the backlight driving time domain. This can effectively isolate the electromagnetic coupling and signal crosstalk that may occur between the display driving module and the backlight module in different display modes, and avoid the voltage fluctuations caused by the high current switching of the backlight from interfering with the writing of display data. This can ensure the anti-interference capability and display stability of the display device when displaying in different refresh rate scenarios.

[0106] This application also provides a display control method applied to a display device 300, the display device 300 including a display panel 31, a display driving module 32 and a backlight module 33; the pixel array in the display panel 31 includes multiple pixel groups, and each pixel group includes multiple pixel rows in the pixel array; in a first display mode, one display frame period of the display panel 31 includes multiple display subframes, each display subframe has a one-to-one correspondence with each pixel group, and one display subframe includes a scan writing sub-time domain, a liquid crystal response sub-time domain and a backlight driving sub-time domain arranged in sequence; Figure 8 This is a flowchart illustrating a display control method provided in an exemplary embodiment of this disclosure. Please refer to... Figure 8 The method includes: step 801, in the first display mode, the display driving module 32 writes display data into the pixel group corresponding to the display subframe in the scan writing sub-time domain of the display subframe; Step 802: In the first display mode, the backlight module 33 provides backlight to the display panel 31 in the backlight driving sub-time domain of the display sub-frame.

[0107] It should be noted that the display control method in this embodiment is applied to the display device 300. The specific execution steps of the above display control method can be found in the contents of the above embodiments, and will not be repeated in this embodiment.

[0108] The display control method provided in this embodiment divides the pixel array in the display panel into multiple pixel groups and divides one display frame cycle into multiple display subframes corresponding to each pixel group. The display driving module scans and writes display data to the pixel groups corresponding to each display subframe in the scan-write sub-time domain within each display subframe. The backlight module provides backlight to the display panel in the backlight driving sub-time domain after the scan-write sub-time domain and the liquid crystal response sub-time domain within each display subframe. By writing display data multiple times at intervals within one display frame cycle and correspondingly lighting the backlight multiple times, the backlight activation frequency of the display panel at low refresh rates can be increased without changing the inherent physical structure of the liquid crystal display panel or increasing power consumption, thus moving it away from the sensitive frequency band where the human eye can perceive changes in brightness. The display device provided in this embodiment not only retains the advantages of duty cycle backlight driving in suppressing ghosting and motion blur, but also eliminates the visual flicker problem caused by the low backlight activation frequency of the liquid crystal display panel at low refresh rates, significantly improving the display stability of the liquid crystal display panel and the user's viewing comfort.

[0109] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0110] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Although this application has disclosed preferred embodiments as above, it is not intended to limit this application. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this application. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display device, comprising: The display panel, the display driver module, and the backlight module are characterized in that the pixel array in the display panel includes multiple pixel groups, and each pixel group includes multiple pixel rows in the pixel array; in a first display mode, a display frame cycle of the display panel includes multiple display subframes, each display subframe corresponds to one of the pixel groups, and each display subframe includes a scan write sub-time domain, a liquid crystal response sub-time domain, and a backlight drive sub-time domain arranged in sequence; The display driver module is used to write display data into the pixel group corresponding to the display subframe in the scan-write sub-time domain of the display subframe in the first display mode. The backlight module is used to provide backlight for the display panel in the backlight driving sub-time domain of the display sub-frame in the first display mode.

2. The display device according to claim 1, characterized in that, Each pixel group includes a first pixel group and a second pixel group, the first pixel group includes odd-numbered pixel rows in the pixel array, and the second pixel group includes even-numbered pixel rows in the pixel array; the display frame period includes a first display subframe corresponding to the first pixel group and a second display subframe corresponding to the second pixel group; The display driver module is configured to, in the first display mode, write display data into the first pixel group within the scan-write sub-time domain of the first display sub-frame, and write display data into the second pixel group within the scan-write sub-time domain of the second display sub-frame.

3. The display device according to claim 1, characterized in that, Each pixel group includes a plurality of sequentially arranged pixel rows in the pixel array, and the number of pixel rows included in each pixel group is the same.

4. The display device according to claim 3, characterized in that, The number of pixel groups is determined based on the refresh rate of the display panel.

5. The display device according to any one of claims 1 to 4, characterized in that, In the second display mode, one display frame cycle of the display panel includes a scan write time domain, a liquid crystal response time domain, and a backlight drive time domain arranged sequentially. The display driver module is used to write display data sequentially into the pixel rows of the display panel during the scan-write time domain of the display frame cycle in the second display mode. The backlight module is used to provide backlight to the display panel in the backlight driving time domain of the display frame period under the second display mode. The refresh rate of the display panel in the second display mode is higher than that in the first display mode.

6. The display device according to claim 5, characterized in that, Also includes: Display controller, used for: When the refresh rate of the display panel is greater than the preset refresh rate, the first display mode is executed, the display driving module is controlled to write display data into the pixel group corresponding to the display sub-frame in the scanning and writing sub-time domain of the display sub-frame, and the backlight module is controlled to provide backlight for the display panel in the backlight driving sub-time domain of the display sub-frame. as well as When the refresh rate of the display panel is not greater than the preset refresh rate, the second display mode is executed, controlling the display driving module to sequentially write display data into the pixel rows of the display panel within the scan writing time domain of the display frame cycle, and controlling the backlight module to provide backlight for the display panel within the backlight driving time domain of the display frame cycle.

7. The display device according to claim 6, characterized in that, Before executing the first display mode, the display controller is further configured to: The number of pixel groups in the pixel array is determined based on the refresh rate of the display panel. Based on the number of pixel groups in the pixel array, the pixel rows included in each pixel group and the duration of the scan writing sub-time domain and the backlight driving sub-time domain are determined.

8. The display device according to claim 6, characterized in that, The display driving module includes a gate driver and a source driver; The gate driver is configured to, in response to the control of the display controller, sequentially illuminate each pixel row in the pixel group corresponding to the display subframe during the scan write sub-time domain of the display subframe, or, in response to the control of the display controller, sequentially illuminate each pixel row in the display panel during the scan write time domain of the display frame period. The source driver is configured to respond to the control of the display controller and, when the pixel row is turned on, output a corresponding grayscale voltage to the pixel row to write the corresponding display data to the pixel row.

9. The display device according to claim 6, characterized in that, In the first display mode, a display sub-frame further includes a first blank sub-time domain and a second blank sub-time domain, wherein the first blank sub-time domain is located before the scan write sub-time domain of the display sub-frame, and the second blank sub-time domain is located after the backlight drive sub-time domain of the display sub-frame; In the second display mode, a display frame cycle further includes a first blank time domain and a second blank time domain, wherein the first blank time domain is located before the scan write time domain of the display frame cycle, and the second blank time domain is located after the backlight drive time domain.

10. A display control method, characterized in that, The invention is applied to a display device, which includes a display panel, a display driving module, and a backlight module; the pixel array in the display panel includes multiple pixel groups, and each pixel group includes multiple pixel rows in the pixel array; In the first display mode, one display frame cycle of the display panel includes multiple display subframes, each display subframe having a one-to-one correspondence with each pixel group, and each display subframe including a scan writing sub-time domain, a liquid crystal response sub-time domain, and a backlight driving sub-time domain arranged in sequence. The method includes: In the first display mode, the display driver module writes display data into the pixel group corresponding to the display subframe within the scan-write sub-time domain of the display subframe. In the first display mode, the backlight module provides backlight to the display panel within the backlight driving sub-time domain of the display sub-frame.

Images