A fault current amplification method and system based on network construction type MMC

Abstract

The application discloses a kind of based on network type MMC's fault current amplification method and system, comprising: obtaining the voltage at the point of common coupling of power grid and MMC output current, calculate the real-time amplitude of phase current, judge whether power grid is in asymmetric fault state;If yes, virtual impedance is put into control loop, bridge arm current is limited, time lag trigger mechanism is started;Collecting dc bus current after time lag trigger mechanism ends and MMC output current, estimate the peak value of bridge arm current at the current time, and the deviation of bridge arm current peak value and safety limit;Injection common-mode voltage generates circulating current which offsets dc bus current component;When bridge arm current peak value is less than safety limit, adjust virtual impedance, so that bridge arm current peak value converges to safety limit.The application maximizes the fault current supply capability of MMC to power grid by self-adaptive adjustment and common-mode voltage injection under the premise of ensuring that bridge arm current is strictly within the limit.

Description

Technical Field

[0001] This invention relates to the field of power electronic energy conversion and power system stability control technology, and more specifically to a grid-type MMC adaptive current limiting and common-mode voltage injection method and system. Background Technology

[0002] Currently, with the increasing penetration rate of power supplies supported by converters, grid-based control has become crucial for stabilizing power systems. During faults, grid-based converters act as controlled voltage sources, generating instantaneous current responses, but also posing a risk of device overload. For MMCs (Modular Multilevel Converters), current constraint design targets arm currents rather than output currents. However, under asymmetrical faults, the interaction of positive and negative sequence components generates DC circulating currents to maintain interphase energy balance, making the relationship between output current and arm currents complex and dynamically changing with fault conditions.

[0003] However, under asymmetrical grid faults, grid-connected MMCs face the challenge of maximizing fault current contribution due to the presence of internal DC circulating current. Traditional fixed threshold current limiting methods, in order to ensure that the arm current does not exceed the safety limit, usually select overly conservative output current commands, resulting in the inability to fully utilize the overload capacity of the MMC.

[0004] Therefore, maximizing the fault current supply capacity of the MMC to the power grid through adaptive adjustment and common-mode voltage injection, while ensuring that the arm current is strictly within the limit, is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of the above problems, the present invention proposes a fault current amplification method and system based on a network-type MMC to overcome or at least partially solve the above problems.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] In a first aspect, embodiments of the present invention provide a fault current amplification method based on a network-type MMC, comprising the following steps: S1. Obtain the voltage at the point of common coupling of the power grid and the output current of the MMC, calculate the real-time amplitude of the phase current, and determine whether the power grid is in an asymmetrical fault state based on the real-time amplitude of the phase current and the fault triggering threshold. S2. When the power grid is in an asymmetrical fault state, the virtual impedance is put into the control loop to limit the bridge arm current and at the same time, the time lag triggering mechanism is activated. S3. Collect the DC bus current and MMC output current after the time lag triggering mechanism ends, estimate the peak value of the bridge arm current at the current moment, and the deviation between the peak value of the bridge arm current and the safety limit; at the same time, inject common mode voltage based on the power balance state of each phase of MMC to generate circulating current that cancels out the DC bus current component. S4. When the peak value of the bridge arm current is less than the safety limit, adjust the virtual impedance to drive the peak value of the bridge arm current to converge to the safety limit.

[0008] Furthermore, the specific process of step S2 is as follows: S21. Obtain the maximum voltage drop amplitude and the allowable initial maximum output current, and calculate the initial virtual impedance; S22. The initial virtual impedance is applied to the control loop to limit the bridge arm current; S23. While limiting the current of the bridge arm, start the delay buffer timer.

[0009] Furthermore, the peak value of the bridge arm current at the current moment in step S3 is estimated based on the analytical relationship of the bridge arm current, which is:

[0010] In the formula, For MMC output current, This is the DC bus current. To inject common-mode voltage, a circulating current is generated that cancels out the DC bus current component.

[0011] Furthermore, in step S3, the calculation process for the injection phase of the common-mode voltage is as follows: Obtain the positive sequence component of the real-time MMC output current. ) and negative order components ( ); Calculate vectors :

[0012] In the formula i The phase index with the current maximum bridge arm current. For the first The corresponding average phase power, This is a power reference value. Common-mode voltage, For the positive sequence component of the output current Projection on the axis For the positive sequence component of the output current Projection on the axis For the negative sequence component of the output current in Projection on the axis For the negative sequence component of the output current in Projection on the axis; Calculate the optimal injection phase:

[0013] In the formula, , .

[0014] Furthermore, in step S4, the adjustment of the virtual impedance is achieved based on the update rate of the virtual impedance; The formula for calculating the update rate of the virtual impedance is as follows:

[0015] In the formula, λ To adjust the gain and λ > 0, This represents the peak value of the bridge arm current. For safety limits, k This represents the current sampling time.

[0016] Furthermore, the power balance relationship of each phase of the MMC is characterized by the average power equation of each phase of the MMC, the expression of which is:

[0017] In the formula, The initial average phase power after common-mode voltage injection. This represents the initial average phase power without injected common-mode voltage. Common-mode voltage, This represents the negative-sequence component phase of the output current. The positive-sequence component phase of the output current. This represents the magnitude of the negative sequence component of the output current. This represents the amplitude of the positive sequence component of the output current.

[0018] Furthermore, the time lag triggering mechanism is as follows: When a fault is detected and current limiting is triggered, a time-delay triggering mechanism is activated to maintain the initial virtual impedance operation. Once the sampled data stabilizes, a time lag trigger mechanism is activated, and the sampled data includes...

[0019] Secondly, embodiments of the present invention provide a fault current amplification system based on a network-type MMC, comprising: The acquisition module acquires the voltage at the point of common coupling of the power grid and the output current of the MMC, calculates the real-time amplitude of the phase current, and determines whether the power grid is in an asymmetrical fault state based on the real-time amplitude of the phase current and the fault triggering threshold. The current limiting module, when the power grid is in an asymmetrical fault state, will put virtual impedance into the control loop to limit the bridge arm current and at the same time activate the time lag triggering mechanism. The common-mode voltage injection module collects the DC bus current and MMC output current after the time-lag triggering mechanism ends, estimates the peak value of the bridge arm current at the current moment, and the deviation between the peak value of the bridge arm current and the safety limit; simultaneously, it injects common-mode voltage to generate circulating current that cancels out the DC bus current component. The virtual impedance adjustment module adjusts the virtual impedance to drive the peak value of the bridge arm current to converge to the safety limit when the peak value of the bridge arm current is less than the safety limit.

[0020] As can be seen from the above technical solution, compared with the prior art, the present invention discloses a fault current amplification method based on a network-type MMC, which has the following beneficial effects: This invention determines whether the power grid is in an asymmetrical fault state by calculating the real-time amplitude of the phase current, and limits the arm current by adding virtual impedance to the control loop. By adopting adaptive current limiting and common-mode voltage injection, the output current is significantly improved, so that the phase current amplitude can theoretically reach twice the arm limit. At the same time, it does not require prior knowledge of the fault phase difference or circulating current size. Through closed-loop feedback, automatic optimization is performed to ensure that the arm current operates precisely at the limit edge under any asymmetrical fault. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0022] Figure 1 This is a flowchart of the fault current amplification method provided in the embodiments of the present invention; Figure 2 This is a schematic diagram illustrating the dynamic evolution of the relationship between the peak bridge arm current and virtual impedance adjustment provided in an embodiment of the present invention. Figure 3 This is a schematic diagram illustrating the principle of maximizing the AC component in the bridge arm current as the DC component cancels out, as provided in an embodiment of the present invention. Figure 4 This is a structural diagram of the fault current amplification system provided in an embodiment of the present invention. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] This invention discloses a fault current amplification method based on a network-type MMC, such as... Figure 1 As shown, it includes the following steps: S1. Obtain the voltage at the point of common coupling of the power grid and the output current of the MMC, calculate the real-time amplitude of the phase current, and determine whether the power grid is in an asymmetrical fault state based on the real-time amplitude of the phase current and the fault triggering threshold. S2. When the power grid is in an asymmetrical fault state, the virtual impedance is put into the control loop to limit the bridge arm current and at the same time, the time lag triggering mechanism is activated. S3. Collect the DC bus current and MMC output current after the time lag triggering mechanism ends, estimate the peak value of the bridge arm current at the current moment, and the deviation between the peak value of the bridge arm current and the safety limit; at the same time, inject common mode voltage based on the power balance state of each phase of MMC to generate circulating current that cancels out the DC bus current component. S4. When the peak value of the bridge arm current is less than the safety limit, adjust the virtual impedance to drive the peak value of the bridge arm current to converge to the safety limit.

[0025] This invention proposes a method for maximizing fault current in a network-type MMC (Modular Multilevel Converter) under asymmetric fault conditions through adaptive current limiting and common-mode voltage injection. While improving the accuracy of current limiting control by dynamically adjusting the virtual impedance to ensure that the arm current is strictly limited within the rated limit, the DC component in the arm current is actively canceled, releasing the AC fault current output space to maximize the fault current output capability of the network-type MMC and make full use of the device's physical capacity.

[0026] The following is a detailed description of each of the above steps; Step S1: Fault detection; During grid operation, the controller collects the point of common coupling voltage (PCC) and the MMC output current in real time, and calculates the real-time amplitude of the phase current. A fault trigger threshold is set. When the controller detects that the phase current amplitude instantaneously exceeds the fault trigger threshold, it determines that a fault has occurred, i.e., an asymmetrical short-circuit fault has occurred on the grid side, and immediately activates the current limiting control strategy.

[0027] In this embodiment, the controller is preferably a digital controller, such as a DSP or FPGA.

[0028] Step S2: Fault current limiting; Once a fault is detected and the current limiting control strategy is activated, in order to quickly contain the transient overcurrent at the moment of the fault, the controller first determines the maximum voltage drop amplitude based on the detected voltage drop value. and the allowable initial maximum output current Using the formula Calculate the initial virtual impedance and apply it to the control loop to quickly limit the current to a safe range, while simultaneously activating the time-delay triggering mechanism.

[0029] In this embodiment, transient avoidance and delayed triggering logic are added, namely, time lag triggering mechanism. The main function of the time lag triggering mechanism is to prevent the virtual impedance update rate from overreacting due to measurement errors or drastic fluctuations in the control loop at the transient moment of a fault. Therefore, a time lag triggering mechanism is designed in this scheme. The logic for enabling the time lag triggering mechanism is as follows: When the system detects a fault and triggers the current limiting strategy, the time lag triggering mechanism is activated so that the update rate of the virtual impedance does not take effect immediately.

[0030] Delay setting: After the initial virtual impedance is applied to the control loop, the initial state is maintained and the loop continues to run for a specific observation period.

[0031] Steady-state convergence: After the sampled data tends to stabilize, the time lag triggering mechanism ends, the update rate of the virtual impedance is adjusted, and the bridge arm current is driven to converge smoothly to the safe limit.

[0032] In this embodiment, the specific implementation of the time lag triggering mechanism is to add a delay buffer timer in the control loop and set a buffer period for the delay buffer timer; the sampling data is specifically as follows.

[0033] Step S3: Common-mode voltage injection; Once the sampled data stabilizes, the time lag triggering mechanism ends, and the system enters adaptive dynamic adjustment of the virtual impedance. The controller collects DC bus current and MMC output current, and is based on the analytical relationship of bridge arm current. Real-time estimation of peak arm current at the current moment And estimate the deviation between the peak current of the bridge arm and the safety limit. Simultaneously, a common-mode voltage is injected, generating a circulating current that cancels out the DC bus current component.

[0034] In this embodiment, after the time lag triggering mechanism ends, the injection of common mode voltage and the "acquisition of DC bus current and MMC output current" are started in parallel. Under asymmetrical operating conditions, the current output capability of the network-type MMC is brought to its physical limit through adaptive virtual impedance current limiting and common-mode voltage injection active control. The current limiting strategy for adaptive virtual impedance is as follows: Equivalent circuit model of MMC network control: Under steady state, the network-type MMC can be equivalent to a controlled voltage source. E∠ θ With virtual impedance Z v A series structure. The equivalent inductance of the MMC internal bridge arm inductor on the AC side is... L / 2; The output current of the MMC can be changed by adjusting the magnitude of the virtual impedance. i abc The amplitude of the current can be adjusted to indirectly control the internal bridge arm current.

[0035] The monotonicity principle of bridge arm current and output current: The difficulty in current limiting of MMC lies in its bridge arm current. It consists of the output current, the DC-side current component, and the DC circulating current used to maintain energy balance. Numerical analysis reveals that near the current-limiting point (i.e., when the current is relatively large), the peak value of the bridge arm current... There is a strict monotonically increasing relationship between the peak output current and the peak output current.

[0036] Closed-loop adaptive adjustment process: such as Figure 2 As shown, the horizontal axis represents the virtual impedance. The vertical axis represents the control variable; the vertical axis represents the peak value of the bridge arm current. Then it becomes the controlled variable of the controller. Virtual impedance With bridge arm current peak The bridge arm current safety limit is inversely proportional (as shown by the blue line in the figure). This is a horizontal line intersecting the Zv curve (shown as the black dashed line in the figure). When monitored... This means that the peak value of the maximum bridge arm current at this point is less than the safe limit of the bridge arm current, implying that under the current hardware constraints, the MMC still has room to further increase the output current by continuously reducing... to increase the value This causes the working point to move upwards and to the left along the curve until... This allows for full utilization of the current margin; and when If the peak value of the maximum bridge arm current exceeds the safe limit of the bridge arm current, it indicates that the current output command has exceeded the physical capacity of the hardware and needs to be increased. To reduce the value This causes the work point to move to the lower right until... This ensures the security of the hardware.

[0037] The update rate of the virtual impedance is established based on the above relationship: (1) in, To adjust the gain and , This represents the peak value of the bridge arm current. For safety limits, k is the current sampling time.

[0038] when Sometimes, That is, the virtual impedance decreases; when Sometimes, That is, the virtual impedance increases; while when Sometimes, That is, the virtual impedance no longer changes. These three cases show that the update law (1) can flexibly and autonomously adjust the virtual impedance according to the relationship between the current maximum arm current peak value and the arm current safety limit, so that the MMC can make full use of the current space to output the maximum current while ensuring hardware safety.

[0039] Common-mode voltage injection: Based on the baseband common-mode voltage injection, the amplitude of the common-mode voltage is preset and is subject to modulation limits during implementation to avoid over-modulation of the converter, which would lead to output distortion.

[0040] Bridge arm current It consists of AC output component, DC bus current component and circulating current component: (2) In the formula, For MMC output current, This is the DC bus current. It is a DC circulating current; From formula (2), we can know the DC component (i.e., the DC bus current component). With circulation components The sum of these two components occupies the current margin of the bridge arm; therefore, if it can be actively made... These components can cancel each other out, thus improving the AC output capability.

[0041] Its physical mechanism is as follows Figure 3 As shown, "maximum" represents the maximum value, indicating the maximum oscillation space that the AC component can achieve after the DC component is eliminated. The blue sine line represents the maximum oscillation of the AC component at this point. The two black dashed lines in the figure (marked as Upper limit and Lower limit) represent the instantaneous safety limits of the MMC arm current. The AC output sine wave is typically determined by the performance of the hardware used in the system. The red AC output sine wave, due to its positive DC component, is upwardly biased, and its peak reaches the upper limit first, preventing it from using the remaining space on the side less than zero. Similarly, the yellow sine wave, due to its negative DC component, is downwardly biased, and its trough reaches the lower limit first, also preventing it from using the remaining space on the side greater than zero. The blue AC output sine wave represents the ideal state after the DC component is eliminated through control methods in this invention. When the DC component is completely canceled (i.e., the waveform is unbiased), the AC component can achieve maximum oscillation space between the physical limits of the bridge arm current (upper / lower limit). In this "zero-bias" state, the AC output capability can be increased from the theoretical limit level to twice the bridge arm limit. To generate the required canceling circulating current, this invention injects a fundamental frequency common-mode voltage. After injection, the average power equations for each phase of the MMC are... The following will change (taking phase a as an example): (3) in, This represents the initial average phase power without injected common-mode voltage. By adjusting... This can change the power balance state of each phase, thereby driving the DC circulating current. Magnitude and direction. Injection phase. The calculation process is as follows: 1) Parameter extraction: Real-time detection of the positive sequence component of the output current ( ) and negative order components ( ).

[0042] 2) Construct intermediate variables: Calculate the vector according to formula (4). : (4) in The phase index with the current maximum bridge arm current. For the first The corresponding average phase power, This is a power reference value. Common-mode voltage, For the positive sequence component of the output current Projection on the axis For the positive sequence component of the output current Projection on the axis For the negative sequence component of the output current in Projection on the axis For the negative sequence component of the output current in Projection onto the axis.

[0043] 3) Calculate the injection phase: Solve for the optimal injection phase using formula (5): (5) in , .

[0044] Step S4: Adaptive virtual impedance adjustment; When the peak current of the bridge arm is less than the safety limit, the virtual impedance is adjusted by using the update rate of the virtual impedance.

[0045] In this embodiment, the main focus is on the case where the bridge arm current is less than the limit in the initial stage. The negative deviation drive controller gradually reduces the virtual impedance, causing the output current command to increase, driving the peak value of the bridge arm current to approach the safety limit, thereby making full use of the current safety margin.

[0046] Example: Taking a specific network-based MMC system as an example; In this embodiment, the rated capacity of the grid-type MMC system is 6.2 MVA, and the DC bus voltage is... Rated bridge arm current For 500 The control system is implemented using a digital controller. In this embodiment, the digital controller is preferably a DSP or FPGA digital signal processor, and the sampling frequency is set to 10. To protect power devices, such as IGBTs, instantaneous safety limits are set for bridge arm currents. That is, 750 The control flow of this method consists of the following four steps: Step 1: The controller performs fault detection and initial current limiting response procedures. During system operation, the controller collects the voltage at the point of common coupling (PCC) and the output current of the MMC in real time, and calculates the real-time amplitude of the phase current. The fault trigger threshold is set to... That is, 600 ,when When an asymmetrical short-circuit fault occurs on the grid side, the controller detects that the phase current amplitude instantaneously exceeds the threshold, determines that a fault has occurred, and immediately activates the current limiting control strategy.

[0047] Step 2: In order to quickly contain transient overcurrent at the moment of fault, the controller first determines the maximum voltage drop amplitude detected. and the allowable initial maximum output current In this embodiment, it is set as follows: Using the formula Calculate the initial virtual impedance The control loop is activated to quickly limit the current to a safe range, while a 5ms delay buffer timer is started to avoid transient oscillations. In this initial phase, the measured maximum bridge arm current is limited to approximately 650kΩ. ( Although safety was ensured, the distance was 750. The safety limit is still about 100. The margin indicates that the current-carrying capacity of the MMC is not being fully utilized at this time.

[0048] Step 3: After the delay, the controller enters the virtual impedance adaptive dynamic adjustment step. The controller utilizes the acquired DC bus current and output current, based on the analytical relationship of the bridge arm current. Real-time estimation of the peak value of the maximum arm current at the current moment. The controller then calculates the estimated value and compares it to the 750A safety limit. The deviation is calculated, and the virtual impedance is iteratively updated using the update rate of the virtual impedance (1). For the initial stage current of 650A being less than the limit, the negative deviation drive controller gradually reduces the virtual impedance. This causes the output current command to increase, driving the bridge arm current peak to 750. Approximating the current allows for full utilization of the current safety margin.

[0049] Step 4: The controller performs a baseband common-mode voltage injection step to optimize the current waveform (this step is parallel to Step 3). The controller's goal is to generate a circulating current that cancels out the DC bus current component by injecting the common-mode voltage (i.e., satisfies...). To solve for the required common-mode voltage phase angle. The controller first bases its analysis on the currently sampled positive and negative sequence current components ( , , , ) and power reference value Calculate the intermediate coefficient vector according to formula (4) , and scalar And the optimal injection phase angle is calculated using formula (5). Reconstruct the common-mode voltage This voltage-induced circulating current successfully cancels approximately 50% of the bridge arm current in the modulated wave. The DC bias ensures that the three-phase bridge arm current waveforms are strictly symmetrical about the zero axis, thus allowing the adaptive algorithm to push the AC current amplitude to a higher level.

[0050] Step 5: Steady-state maintenance and effect verification (final state) step. After approximately 0.2 seconds of coordinated adjustment ( The system reaches a new steady state. Virtual impedance It converges stably to 0.55 In this embodiment, the measured maximum bridge arm current stabilizes at 748. Extremely close to 750 The safety limit was met and overcurrent protection was not triggered. Compared to traditional solutions, this embodiment, through precise calculation and closed-loop adjustment, increases the fault support current provided by the MMC to the power grid by approximately 15% while ensuring equipment safety, effectively verifying the current maximization capability of this invention under complex fault conditions.

[0051] Based on the same inventive concept, embodiments of the present invention also provide a fault current amplification system based on a network-type MMC, such as... Figure 4 As shown, it includes: The acquisition module acquires the voltage at the point of common coupling of the power grid and the output current of the MMC, calculates the real-time amplitude of the phase current, and determines whether the power grid is in an asymmetrical fault state based on the real-time amplitude of the phase current and the fault triggering threshold. The current limiting module, when the power grid is in an asymmetrical fault state, will put virtual impedance into the control loop to limit the bridge arm current and at the same time activate the time lag triggering mechanism. The common-mode voltage injection module collects the DC bus current and MMC output current after the time lag triggering mechanism ends, estimates the peak value of the bridge arm current at the current moment, and the deviation between the peak value of the bridge arm current and the safety limit; at the same time, the injected common-mode voltage generates a circulating current that cancels out the DC bus current component. The virtual impedance adjustment module adjusts the virtual impedance to drive the peak value of the bridge arm current to converge to the safety limit when the peak value of the bridge arm current is less than the safety limit.

[0052] This invention improves the accuracy of current limiting control by dynamically adjusting the virtual impedance to ensure that the arm current is strictly limited within the rated limit, while actively canceling the DC component in the arm current and releasing the AC fault current output space to maximize the fault current output capability of the network-type MMC and make full use of the device's physical capacity.

[0053] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0054] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A fault current amplification method based on a network-type MMC, characterized in that, Includes the following steps: S1. Obtain the voltage at the point of common coupling of the power grid and the output current of the MMC, calculate the real-time amplitude of the phase current, and determine whether the power grid is in an asymmetrical fault state based on the real-time amplitude of the phase current and the fault triggering threshold. S2. When the power grid is in an asymmetrical fault state, the virtual impedance is put into the control loop to limit the bridge arm current and at the same time, the time lag triggering mechanism is activated. S3. Collect the DC bus current and MMC output current after the time lag triggering mechanism ends, estimate the peak value of the bridge arm current at the current moment, and the deviation between the peak value of the bridge arm current and the safety limit; at the same time, inject common mode voltage based on the power balance state of each phase of MMC to generate circulating current that cancels out the DC bus current component. S4. When the peak value of the bridge arm current is less than the safety limit, adjust the virtual impedance to drive the peak value of the bridge arm current to converge to the safety limit.

2. The fault current amplification method based on a network-type MMC as described in claim 1, characterized in that, The specific process of step S2 is as follows: S21. Obtain the maximum voltage drop amplitude and the allowable initial maximum output current, and calculate the initial virtual impedance; S22. The initial virtual impedance is applied to the control loop to limit the bridge arm current; S23. While limiting the current of the bridge arm, start the delay buffer timer.

3. The fault current amplification method based on a network-type MMC as described in claim 1, characterized in that, The peak value of the bridge arm current at the current moment in step S3 is estimated based on the analytical relationship of the bridge arm current, which is: In the formula, For MMC output current, This is the DC bus current. To inject common-mode voltage, a circulating current is generated that cancels out the DC bus current component.

4. The fault current amplification method based on a network-type MMC as described in claim 1, characterized in that, In step S3, the calculation process for the injection phase of the common-mode voltage is as follows: Obtain the positive sequence component of the real-time MMC output current. ) and negative order components ( ); Calculate vectors : In the formula i The phase index with the current maximum bridge arm current. For the first The corresponding average phase power, This is a power reference value. Common-mode voltage, For the positive sequence component of the output current Projection on the axis For the positive sequence component of the output current Projection on the axis For the negative sequence component of the output current in Projection on the axis For the negative sequence component of the output current in Projection on the axis; Calculate the optimal injection phase: In the formula, , .

5. The fault current amplification method based on a network-type MMC as described in claim 1, characterized in that, In step S4, the adjustment of the virtual impedance is achieved based on the update rate of the virtual impedance; The formula for calculating the update rate of the virtual impedance is as follows: In the formula, λ To adjust the gain and λ > 0, This represents the peak value of the bridge arm current. For safety limits, k This represents the current sampling time.

6. The fault current amplification method based on a network-type MMC as described in claim 1, characterized in that, The power balance relationship of each phase of the MMC is characterized by the average power equation of each phase of the MMC, and its expression is: In the formula, The initial average phase power after common-mode voltage injection. This represents the initial average phase power without injected common-mode voltage. Common-mode voltage, This represents the negative-sequence component phase of the output current. The positive-sequence component phase of the output current. This represents the magnitude of the negative sequence component of the output current. This represents the amplitude of the positive sequence component of the output current.

7. The fault current amplification method based on a network-type MMC as described in claim 1, characterized in that, The time lag triggering mechanism is as follows: When a fault is detected and current limiting is triggered, a time-delay triggering mechanism is activated to maintain the initial virtual impedance operation. Once the sampled data stabilizes, the time lag trigger mechanism ends. The sampled data includes the bridge arm current, the real-time voltage of the common connection point, the output current, and the DC side voltage.

8. A fault current amplification system based on a network-type MMC, characterized in that, include: The acquisition module acquires the voltage at the point of common coupling of the power grid and the output current of the MMC, calculates the real-time amplitude of the phase current, and determines whether the power grid is in an asymmetrical fault state based on the real-time amplitude of the phase current and the fault triggering threshold. The current limiting module, when the power grid is in an asymmetrical fault state, will put virtual impedance into the control loop to limit the bridge arm current and at the same time activate the time lag triggering mechanism. The common-mode voltage injection module collects the DC bus current and MMC output current after the time lag triggering mechanism ends, estimates the peak value of the bridge arm current at the current moment, and the deviation between the peak value of the bridge arm current and the safety limit; at the same time, the injected common-mode voltage generates a circulating current that cancels out the DC bus current component. The virtual impedance adjustment module adjusts the virtual impedance to drive the peak value of the bridge arm current to converge to the safety limit when the peak value of the bridge arm current is less than the safety limit.

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