Test apparatus for performing tests on combinational logic circuits, method of operating a test apparatus and integrated circuit
By using triggers and processors in the testing device to identify short-circuit currents and generate corresponding unit circuits, the problem of the impact of combinational logic circuit testing on analog circuits is solved, thereby reducing circuit area and improving testing efficiency.
CN122238833APending Publication Date: 2026-06-19SAMSUNG ELECTRONICS CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SAMSUNG ELECTRONICS CO LTD
- Filing Date
- 2025-11-26
- Publication Date
- 2026-06-19
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Figure CN122238833A_ABST
Abstract
A test apparatus, a method for operating the test apparatus, and an integrated circuit are provided for testing combinational logic circuits configured to communicate electrically with analog circuits. The test apparatus includes: a plurality of flip-flops, each connected to the combinational logic circuit; and one or more processors connected to the flip-flops and configured to test the combinational logic circuit based on a scan signal. The one or more processors are configured to: input an input pattern to the combinational logic circuit via the plurality of flip-flops; obtain a first output value output from a first output node of the combinational logic circuit; determine whether a short-circuit current occurs in the analog circuit by inputting the first output value; and, based on the determination that no short-circuit current has occurred, connect a first unit circuit corresponding to the first output value between the first output node and the analog circuit.
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