Wireless charging circuit, wireless charging method, electronic device, medium, and product

Abstract

This disclosure provides a wireless charging circuit, a wireless charging method, an electronic device, a medium, and a product. The wireless charging circuit includes a first induction coil and a signal demodulation chip, which are connected. The signal demodulation chip includes a voltage demodulation input pin, which is left floating. The first induction coil receives a first data packet through electromagnetic coupling with a second induction coil of a device using power, and outputs an induced current signal to the signal demodulation chip. The induced current signal carries the first data packet, which indicates the power consumption parameters of the second induction coil. The signal demodulation chip demodulates the induced current signal to obtain the first data packet and adjusts the power supply parameters of the first induction coil according to the power consumption parameters. This wireless charging circuit simplifies the peripheral circuitry of the signal demodulation chip in the wireless charging circuit.

Description

Technical Field

[0001] This disclosure relates to the field of electronic technology, and in particular to a wireless charging circuit, a wireless charging method, an electronic device, a medium, and a product. Background Technology

[0002] In wireless charging technology, electromagnetic coupling between induction coils enables the transfer of electrical energy between two devices. The device providing power is the power supply device, and the device receiving power is the power consumption device. During the process of the power supply device providing power to the power consumption device via wireless charging, the power consumption device can send a Control Error Packet (CEP) to the power supply device to inform it of its required power consumption. Correspondingly, the power supply device can receive the signal from the power consumption device through its induction coil and demodulate the received signal using its built-in signal demodulation chip. Then, based on the power consumption parameters indicated in the demodulated CEP packet, the power supply device can adjust the power supply parameters of its induction coil.

[0003] However, power supply equipment often requires the design of external circuitry to work in conjunction with the built-in signal demodulation chip. The inclusion of external circuitry inevitably increases the complexity of the wireless charging circuitry. Summary of the Invention

[0004] To overcome the problems existing in related technologies, this disclosure provides a wireless charging circuit, wireless charging method, device, electronic device, medium, and product, which can simplify the peripheral circuit of the signal demodulation chip in the wireless charging circuit.

[0005] According to a first aspect of the present disclosure, a wireless charging circuit is provided, including a first induction coil and a signal demodulation chip. The first induction coil and the signal demodulation chip are connected. The signal demodulation chip includes a voltage demodulation input pin, which is left floating. The first induction coil is used to receive a first data packet by electromagnetic coupling with a second induction coil of a power-consuming device, and to output an induced current signal to the signal demodulation chip. The induced current signal carries the first data packet, which indicates the power consumption parameters of the second induction coil. The signal demodulation chip is used to demodulate the induced current signal to obtain the first data packet and to adjust the power supply parameters of the first induction coil according to the power consumption parameters.

[0006] In some embodiments, the signal demodulation chip includes: a first conversion module for converting an induced current signal into a first voltage signal; a second conversion module for converting the first voltage signal into a frequency signal and / or a second voltage signal; and a demodulation module for demodulating the frequency signal and / or the second voltage signal to obtain a first data packet.

[0007] In some embodiments, the second conversion module includes a conversion unit for converting the first voltage signal into a frequency signal.

[0008] In some embodiments, the second conversion module includes a comparison unit for comparing a first voltage signal with a parameter voltage and outputting a second voltage signal based on the comparison result.

[0009] In some embodiments, the signal demodulation chip further includes: a verification module for verifying the first data packet output by the demodulation module; and a parameter adjustment module for adjusting the power supply parameters of the first induction coil based on the power consumption parameters indicated by the successfully verified first data packet.

[0010] In some embodiments, the demodulation module includes: a first demodulation unit for demodulating a second voltage signal to obtain a first data packet; and a second demodulation unit for demodulating a frequency signal when the verification of the first data packet obtained by the first demodulation unit fails.

[0011] In some embodiments, the second demodulation unit includes: a plurality of demodulation channels; wherein different demodulation channels among the plurality of demodulation channels use different demodulation algorithms to demodulate the frequency signal.

[0012] A second aspect of this disclosure provides a wireless charging method applied to the wireless charging circuit of any of the above claims. The method includes: acquiring an induced current signal input to a first induction coil, wherein the induced current signal is generated by electromagnetic coupling with a second induction coil, and the induced current signal carries a first data packet, the first data packet including power consumption parameters indicating the second induction coil; demodulating the induced current signal to obtain the first data packet; and adjusting the power supply parameters of the first induction coil based on the power consumption parameters indicated by the first data packet.

[0013] In some embodiments, demodulating the induced current signal to obtain a first data packet includes: converting the induced current signal into a first voltage signal through a first conversion module; converting the first voltage signal into a frequency signal or a second voltage signal through a second conversion module; and demodulating the frequency signal or the second voltage signal through a demodulation module to obtain the first data packet.

[0014] In some embodiments, the second conversion module includes a conversion unit; wherein, converting the first voltage signal into a frequency signal or a second voltage signal by the second conversion module includes converting the first voltage signal into a frequency signal by the conversion unit.

[0015] In some embodiments, the second conversion module further includes a comparison unit; wherein, converting the first voltage signal into a frequency signal or a second voltage signal by the second conversion module includes: comparing the first voltage signal and the parameter voltage by the comparison unit to obtain a comparison result; and outputting the second voltage signal based on the comparison result.

[0016] In some embodiments, the method further includes: verifying the first data packet output by the demodulation module through a verification module; wherein, adjusting the power supply parameters of the first induction coil based on the power consumption parameters indicated by the first data packet includes: adjusting the power supply parameters of the first induction coil based on the power consumption parameters indicated by the successfully verified first data packet through a parameter adjustment module.

[0017] In some embodiments, the demodulation module includes a first demodulation unit and a second demodulation unit; wherein, demodulating a frequency signal or a second voltage signal through the demodulation module to obtain a first data packet includes: demodulating the second voltage signal through the first demodulation unit to obtain the first data packet; and when the verification of the first data packet output by the first demodulation unit by the verification module fails, demodulating the frequency signal through the second demodulation unit to obtain the first data packet again.

[0018] In some embodiments, the second demodulation unit includes multiple demodulation channels, and different demodulation channels in the multiple demodulation channels use different demodulation algorithms to demodulate the frequency signal; wherein, demodulating the frequency signal by the second demodulation unit to obtain the first data packet again includes: demodulating the frequency signal by at least one demodulation channel in the second demodulation unit to obtain the first data packet again.

[0019] In some embodiments, demodulating the frequency signal through at least one demodulation channel in the second demodulation unit to obtain the first data packet again includes: demodulating the frequency signal sequentially through multiple demodulation channels included in the second demodulation unit until the first data packet that has been successfully verified is obtained or all demodulation channels have been traversed.

[0020] A third aspect of this disclosure provides a power supply device, including a wireless charging circuit as described in any embodiment of the first aspect.

[0021] According to a fourth aspect of the present disclosure, a non-transitory computer-readable storage medium is provided, storing executable instructions or a computer program that, when executed by a processor, implements the steps of the method as described in any of the second aspects.

[0022] According to a fifth aspect of the present disclosure, a computer program product is provided, including a computer program or instructions that, when executed by a processor, implement the steps of the method as described in any of the second aspects.

[0023] The technical solutions provided in this disclosure may have the following beneficial effects:

[0024] In this disclosure, since the voltage demodulation input pin of the signal demodulation chip is left floating, no circuit is provided between the voltage demodulation input pin of the signal demodulation chip and the first induction coil. The induced current signal on the first induction coil is directly input to the signal demodulation chip for demodulation. This simplifies the peripheral circuitry of the signal demodulation chip in the wireless charging circuit, reduces the area occupied by the peripheral circuitry of the signal demodulation chip, and lowers the cost.

[0025] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0026] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0027] Figure 1 This is a schematic diagram of a first wireless charging circuit according to an exemplary embodiment.

[0028] Figure 2 This is a schematic diagram of the structure of a second wireless charging circuit according to an exemplary embodiment.

[0029] Figure 3 This is a schematic diagram of the structure of a third wireless charging circuit according to an exemplary embodiment.

[0030] Figure 4 This is a schematic diagram of the structure of a first type of signal demodulation chip according to an exemplary embodiment.

[0031] Figure 5 This is a schematic diagram of the structure of a second type of signal demodulation chip according to an exemplary embodiment.

[0032] Figure 6 This is a schematic diagram of the structure of a third signal demodulation chip according to an exemplary embodiment.

[0033] Figure 7 This is a schematic diagram of the structure of a fourth signal demodulation chip according to an exemplary embodiment.

[0034] Figure 8This is a schematic diagram of the structure of a fifth type of signal demodulation chip according to an exemplary embodiment.

[0035] Figure 9 This is a schematic diagram of the structure of a second demodulation unit according to an exemplary embodiment.

[0036] Figure 10 This is a schematic flowchart illustrating a wireless charging method according to an exemplary embodiment.

[0037] Figure 11 This is a flowchart illustrating a wireless charging method according to another exemplary embodiment.

[0038] Figure 12 This is a structural block diagram of an electronic device according to an exemplary embodiment.

[0039] Figure label:

[0040] 20. Signal demodulation chip; 201. First conversion module; 202. Second conversion module; 2021. Conversion unit; 2022. Comparison unit; 203. Demodulation module; 2031. First demodulation unit; 2032. Second demodulation unit; 204. Verification module; 205. Parameter adjustment module; L1. Third induction coil; L2. Fourth induction coil; L3. First induction coil; L4. Second induction coil;

[0041] C1, the first capacitor; C2, the second capacitor. Detailed Implementation

[0042] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this disclosure as detailed in the appended claims.

[0043] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. The singular forms “a” and “the” as used in this disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0044] It should be understood that although the terms first, second, third, etc., may be used to describe various information in embodiments of this disclosure, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first information may also be referred to as second information without departing from the scope of embodiments of this disclosure, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to a determination."

[0045] In wireless charging technology, electromagnetic coupling between induction coils enables the transfer of electrical energy between two devices. During the process of a power supply device providing power to a user device via wireless charging, the user device can send a Continuous Energy Preset (CEP) to the power supply device, indicating its required power consumption. This process typically involves modulating the CEP to obtain a corresponding modulated signal, which is then transmitted to the power supply device via its own induction coil. The power supply device receives the signal from the user device through its induction coil and demodulates it using its built-in demodulation chip. Subsequently, based on the power consumption parameters indicated in the demodulated CEP, the power supply device adjusts the power supply parameters of its first induction coil.

[0046] However, power supply equipment often requires the design of external circuitry to work in conjunction with the built-in signal demodulation chip. The inclusion of external circuitry inevitably increases the complexity of the wireless charging circuitry. For example, such as... Figure 1 As shown, Figure 1 This is a schematic diagram of a first wireless charging circuit according to an exemplary embodiment. Figure 1 The wireless charging circuit can be deployed in the power supply device 10. Figure 1 The wireless power supply circuit shown includes: a third induction coil L1, a DC resistor (Remote Differential Compression, RDC) detection circuit 101, a resistor (R) and capacitor (C) filter circuit 102, and a demodulation chip 103. The demodulation chip 103 is connected between the two ends of the third induction coil via AC pins AC3 and AC pins AC4. It can be seen that when using... Figure 1 When the wireless charging circuit shown demodulates the CEP packet sent by the charging device 11 based on the fourth induction coil L2, an RDC detector circuit 101 and an RC filter circuit need to be designed around the demodulation chip to convert the induced current generated on the first induction coil into a voltage signal, which increases the complexity of the wireless charging circuit.

[0047] To address the aforementioned problems, this disclosure provides a wireless charging circuit, as shown in the following embodiments. Figure 2, Figure 2 This is a schematic diagram of a second wireless charging circuit according to an exemplary embodiment. The wireless charging circuit includes: a first induction coil L3 and a signal demodulation chip 20, the first induction coil L3 and the signal demodulation chip 20 being connected. The signal demodulation chip 20 includes a voltage demodulation input pin, which is left floating. The first induction coil L3 is used to receive a first data packet through electromagnetic coupling with a second induction coil L4 of a power-consuming device, and output an induced current signal to the signal demodulation chip 20. The induced current signal carries the first data packet, which indicates the power consumption parameters of the second induction coil. The signal demodulation chip 20 is used to demodulate the induced current signal to obtain the first data packet and to adjust the power supply parameters of the first induction coil L3 according to the power consumption parameters.

[0048] Understandable, for reference Figure 1 The wireless charging circuit provided in this embodiment may include a first induction coil L3 and a signal demodulation chip 20, wherein the signal demodulation chip 20 is connected between the two ends of the first induction coil L3. The signal demodulation chip 20 includes a voltage demodulation input pin. Since the signal demodulation chip 20 can directly demodulate the induced current signal input from the first induction coil L3 to the signal demodulation chip 20, the voltage demodulation output pin of the signal demodulation chip 20 is left floating. Based on the above connection, the first induction coil L3 in the wireless charging circuit can be coupled to a second induction coil L4 on the device, and receive a first data packet sent by the device through the first induction coil L3, and output an induced current signal to the signal demodulation chip 20 based on the first data packet. The induced current signal carries the first data packet, which is used to indicate the power parameters of the second induction coil. The signal demodulation chip 20 can receive the induction circuit signal input from the first induction coil L3 and demodulate the induced current signal to obtain the first data packet. After receiving the first data packet, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated in the first data packet.

[0049] In some embodiments, the wireless charging circuit can be applied to a power supply device. Exemplarily, the power supply devices to which the wireless charging circuit provided in this disclosure can be applied include, but are not limited to, terminal devices. These terminal devices may include fixed terminals and mobile terminals. Mobile terminals may include smartphones, tablets, laptops, digital cameras, and wearable electronic devices, etc. Fixed terminals may include desktop computers, all-in-one computers, etc.

[0050] In some embodiments, the signal demodulation chip 20 may further include a first AC pin and a second AC pin. Based on this, the signal demodulation chip 20 can be connected to a first end of the first induction coil via the first AC pin and to a second end of the first induction coil L3 via the second AC pin.

[0051] For example, refer to Figure 3 , Figure 3 This is a schematic diagram illustrating the structure of a third wireless charging circuit according to an exemplary embodiment. For example... Figure 3 As shown, the first AC pin of the signal demodulation chip 20 can be Figure 3 In AC1, the second AC pin can be Figure 3 AC2 in the middle.

[0052] In some embodiments, the voltage demodulation input pin can be Figure 3 The VDM pin in the signal demodulation chip 20 shown.

[0053] In some embodiments, such as Figure 3 As shown, the signal demodulation chip 20 may also include: a general-purpose input / output (GPIO) pin, a signal output pin (Vout) pin, a communication pin (I2C), and a sleep (S1) pin. The main function of the sleep pin is to control the power consumption and operating state of the signal demodulation chip 20.

[0054] In some embodiments, the wireless charging circuit further includes a first capacitor C1 and a second capacitor C2 for filtering the induced current signal generated by the first induction coil L3. The first capacitor is connected in series between a first end of the first induction coil L3 and a first AC pin of the signal demodulation chip 20. The first end of the second capacitor is connected to the line between the first capacitor and the first AC pin of the signal demodulation chip 20, and the second end of the second capacitor is connected to the line between a second end of the first induction coil L3 and a second AC pin of the signal demodulation chip 20.

[0055] For example, refer to Figure 3 The first capacitor can be Figure 3 The capacitor C1 in the middle, the second capacitor can be Figure 3 Capacitor C2 in the middle.

[0056] It should be noted that the models of the first capacitor and the second capacitor can be selected as needed, and this embodiment does not limit this.

[0057] In some embodiments, the first data packet may be a CEP packet, or other first data packet that can be used to instruct the power supply equipment to adjust the power supply parameters. This disclosure does not limit this.

[0058] In some embodiments, the power supply parameters include, but are not limited to: power supply voltage, power supply power, frequency of the first induction coil L3, duty cycle, etc.

[0059] In this embodiment, since the voltage demodulation input pin of the signal demodulation chip is left floating, no circuit is provided between the voltage demodulation input pin of the signal demodulation chip and the first induction coil. The induced current signal on the first induction coil is directly input to the signal demodulation chip for demodulation. This simplifies the peripheral circuitry of the signal demodulation chip in the wireless charging circuit, reduces the area occupied by the peripheral circuitry of the signal demodulation chip, and lowers the cost.

[0060] In some embodiments, the signal demodulation chip 20 includes: a first conversion module 201 for converting an induced current signal into a first voltage signal; a second conversion module 202 for converting the first voltage signal into a frequency signal or a second voltage signal; and a demodulation module 203 for demodulating the frequency signal or the second voltage signal to obtain a first data packet.

[0061] Understandable, for reference Figure 4 , Figure 4 This is a schematic diagram illustrating the structure of a first signal demodulation chip according to an exemplary embodiment. The signal demodulation chip 20 may include a first conversion module 201, a second conversion module 202, and a demodulation module 203. The input terminal of the first conversion module 201 is connected to the first induction coil L3, the input terminal of the second conversion module 202 is connected to the output terminal of the first conversion module 201, and the output terminal of the second conversion module 202 is connected to the input terminal of the demodulation module 203. Based on this, the first conversion module 201 can receive the induced current signal transmitted from the first induction coil L3 to the signal demodulation chip 20, convert the induced current signal into a first voltage signal, and output it to the second conversion module 202. The second conversion module 202 can convert the first voltage signal into a frequency signal or a second voltage signal and output it to the demodulation module 203. The demodulation module 203 can demodulate the frequency signal or the second voltage signal to obtain a first data packet.

[0062] In some embodiments, the first conversion module 201 is connected to the first induction coil L3 through the first AC pin of the signal demodulation chip 20.

[0063] In some embodiments, the first conversion module 201 may include at least one resistor, one end of which is connected to the first induction coil L3 and the other end of which is connected to the second conversion module 202. Based on this, when the induced current signal generated on the first induction coil L3 passes through the at least one resistor, the at least one resistor can convert the induced current signal into a first voltage signal.

[0064] It should be noted that the parameters of the resistor can be selected as needed, and this disclosure does not limit this.

[0065] In some embodiments, the first conversion module 201 can also be an analog-to-digital converter (ADC). Based on the ADC, the induced current signal of the first induction coil L3 input signal demodulation chip 20 can be converted into a first voltage signal.

[0066] It should be noted that the ADC is only an example of the first conversion module 201. The first conversion module 201 in the wireless charging circuit can also be other electronic components that can convert current signals into voltage signals. This disclosure does not limit this.

[0067] In some embodiments, the second conversion module 202 includes a conversion unit 2021 for converting a first voltage signal into a frequency signal.

[0068] Understandable, for reference Figure 5 , Figure 5 This is a schematic diagram illustrating the structure of a second signal demodulation chip according to an exemplary embodiment. The second conversion module 202 may include a conversion unit 2021, wherein the input terminal of the conversion unit 2021 is connected to the first conversion module 201, and the output terminal of the conversion unit 2021 is connected to the demodulation module 203. Based on this, the conversion unit 2021 can receive a first voltage signal output by the first conversion module 201, and convert the first voltage signal into a frequency signal and output it to the demodulation module 203, so that the frequency signal can be demodulated by the demodulation module 203.

[0069] In some embodiments, the conversion unit 2021 may include, but is not limited to, a voltage-controlled oscillator (VCO), a frequency converter, etc.

[0070] In some embodiments, the conversion unit 2021 can convert the first voltage signal output by the first conversion module 201 into a frequency signal according to a preset clock cycle.

[0071] In some embodiments, the demodulation module 203 can be any demodulation device capable of demodulating frequency signals, and this disclosure does not limit this.

[0072] For example, the demodulation module 203 can convert different frequency signals into corresponding digital signals and output them.

[0073] In some embodiments, the second conversion module 202 includes a comparison unit 2022, which compares the first voltage signal with the parameter voltage and outputs a second voltage signal based on the comparison result.

[0074] Understandable, for reference Figure 6 , Figure 6 This is a schematic diagram illustrating the structure of a third type of signal demodulation chip according to an exemplary embodiment. The second conversion module 202 may include a comparison unit 2022, the input of which is connected to the first conversion module 201, and the output of which is connected to the demodulation module 203. Based on this, the comparison unit 2022 can receive a first voltage signal output by the first conversion module 201 and compare the first voltage signal with a parameter voltage. Then, based on the comparison result, the comparison unit 2022 can output a second voltage signal to the demodulation module 203, so that the demodulation module 203 can demodulate the second voltage signal.

[0075] In some embodiments, the second voltage signal output by the comparison unit 2022 may be a square wave signal.

[0076] In some embodiments, the comparison unit 2022 may be, but is not limited to, a comparator. Based on this, the signal demodulation chip 20 can compare the input first voltage signal and the reference voltage using the comparator, and output a second voltage signal with a high level when the first voltage signal is greater than the parameter voltage, and output a second voltage signal with a low level when the first voltage signal is less than or equal to the parameter voltage.

[0077] In some embodiments, the second conversion module 202 may include both conversion unit 2021 and comparison unit 2022, or it may include only one of conversion unit 2021 and comparison unit 2022.

[0078] In some embodiments, when the second conversion module 202 includes both a conversion unit 2021 and a comparison unit 2022, the first conversion module 201 can simultaneously output the first voltage signal to both the comparison unit 2022 and the conversion unit 2021. Based on this, the comparison unit 2022 can convert the first voltage signal into a second voltage signal and output it to the demodulation module 203, while the conversion unit 2021 can convert the first voltage signal into a frequency signal and output it to the demodulation module 203. At this time, the demodulation module 203 can obtain both the frequency signal and the second voltage signal. Therefore, the demodulation module 203 can demodulate both the frequency signal and the second voltage signal to obtain the first data packet corresponding to the frequency signal and the first data packet corresponding to the second voltage signal.

[0079] In this embodiment, the signal demodulation chip 20 includes both a comparison unit 2022 and a conversion unit 2021. The comparison unit 2022 can convert the first voltage signal into a second voltage signal, so that the demodulation module 203 can demodulate the second voltage signal. The conversion unit 2021 can convert the first voltage signal into a frequency signal, so that the demodulation module 203 can demodulate the frequency signal. Therefore, the wireless charging circuit provided in this embodiment can convert the induced current signal of the first induction coil L3 into different types of signals and demodulate all different types of signals, thereby improving the demodulation success rate of demodulating the first data packet sent by the device.

[0080] In some embodiments, the signal demodulation chip 20 further includes a verification module 204 and a parameter adjustment module 205. The verification module 204 is used to verify the first data packet output by the demodulation module 203; the parameter adjustment module 205 is used to adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the successfully verified first data packet.

[0081] Understandable, for reference Figure 7 , Figure 7 This is a schematic diagram illustrating the structure of a fourth type of signal demodulation chip according to an exemplary embodiment. Figure 7 As shown, the signal demodulation chip 20 may further include a verification module 204 and a parameter adjustment module 205. The input terminal of the verification module 204 is connected to the output terminal of the demodulation module 203, and the output terminal of the verification module 204 is connected to the input terminal of the parameter adjustment module 205. The input terminal of the parameter adjustment module 205 is also connected to the output terminal of the demodulation module 203. Based on this, after demodulating the frequency signal and / or the second voltage signal to obtain the first data packet, the demodulation module 203 can output the first data packet to the verification module 204 and the parameter adjustment module 205. At this time, the verification module 204 can verify the first data packet output by the demodulation module 203 and output the verification result. This verification result indicates whether the first data packet has been successfully verified. When the first data packet is successfully verified, the parameter adjustment module 205 can adjust the power supply parameters of the first induction coil L3 according to the power consumption parameters indicated by the first data packet.

[0082] In some embodiments, when the verification result indicates that the first data packet verification failed, the parameter adjustment module 205 can maintain the original power supply parameters of the first induction coil L3 or control the first induction coil L3 to stop supplying power.

[0083] In some embodiments, when the second conversion module 202 includes both a comparison unit 2022 and a conversion unit 2021, the demodulation module 203 can demodulate the second voltage signal input to the comparison unit 2022 to obtain a first data packet. Additionally, the demodulation module 203 can also output the first data packet obtained by demodulating the frequency signal input to the conversion unit 2021. Based on this, the input to the verification module 204 can include both the first data packet obtained by demodulating the second voltage signal and the first data packet obtained by demodulating the frequency signal. Hereinafter, for ease of explanation, the first data packet obtained by demodulating the second voltage signal will be referred to as the first data packet corresponding to the second voltage signal, and the first data packet obtained by demodulating the frequency signal will be referred to as the first data packet corresponding to the frequency signal. Therefore, the verification module 204 can verify the first data packet corresponding to the second voltage signal and output the verification result; and verify the first data packet corresponding to the frequency signal and output the verification result. Based on this, the parameter adjustment module 205 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet that was successfully verified in the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal.

[0084] In some embodiments, when both the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal are successfully verified, the parameter adjustment module 205 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the second voltage signal. When the verification of the first data packet corresponding to the second voltage signal fails, but the verification of the first data packet corresponding to the frequency signal is successful, the parameter adjustment module 205 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the frequency signal. When both the verification of the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal fails, the parameter adjustment module 205 can control the first induction coil L3 to stop supplying power or maintain the original power supply parameters.

[0085] In some embodiments, when the second conversion module 202 includes both a conversion unit 2021 and a comparison unit 2022, the first voltage signal can first be converted into a second voltage signal by the comparison unit 2022 and output to the demodulation module 203. The demodulation module 203 then demodulates the second voltage signal, obtaining the first data packet corresponding to the second voltage signal. Afterwards, the verification module 204 can verify the first data packet corresponding to the second voltage signal. When the verification of the first data packet corresponding to the second voltage signal is successful, the parameter adjustment module 205 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet. When the verification of the first data packet corresponding to the second voltage signal fails, the first voltage signal can be converted into a frequency signal by the conversion unit 2021 and output to the demodulation module 203. The demodulation module 203 then demodulates the frequency signal output by the conversion unit 2021, obtaining the first data packet corresponding to the frequency signal. Based on this, the verification module 204 can also verify the first data packet corresponding to the frequency signal. When the first data packet corresponding to the frequency signal is successfully verified, the parameter adjustment module 205 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the frequency signal. When the first data packet corresponding to the frequency signal fails to be verified, the parameter adjustment module 205 can control the first induction coil L3 to stop supplying power or maintain the original power supply parameters.

[0086] In some embodiments, the signal demodulation chip 20 may further include a control module. Based on this, the control module can first control the connection between the comparison unit 2022 and the demodulation module 203 to enable the demodulation module 203 to demodulate the second voltage signal output by the comparison unit 2022 to obtain the first data packet corresponding to the second voltage signal. Then, the verification module 204 can verify the first data packet corresponding to the second voltage signal. If the verification of the first data packet corresponding to the second voltage signal fails, the control module can control the connection between the conversion unit 2021 and the demodulation module 203 to enable the demodulation module 203 to demodulate the frequency signal output by the conversion unit 2021 to obtain the first data packet corresponding to the frequency signal. Then, the verification module 204 can verify the first data packet corresponding to the frequency signal. If the verification of the first data packet corresponding to the frequency signal is successful, the parameter adjustment module 205 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the frequency signal. If the verification of the first data packet corresponding to the frequency signal fails, the parameter adjustment module 205 can control the first induction coil L3 to stop supplying power or maintain the original power supply parameters.

[0087] In this embodiment, since demodulating the second voltage signal is less complex than demodulating the frequency signal, the demodulation efficiency of demodulating the second voltage signal is greater than that of demodulating the frequency signal. Therefore, the demodulation module 203 first demodulates the second voltage signal output by the comparison unit 2022 to obtain the first data packet corresponding to the second voltage signal. If the verification of the first data packet corresponding to the second voltage signal fails, the demodulation module 203 then demodulates the frequency signal output by the conversion unit 2021. This improves the signal demodulation efficiency while ensuring the demodulation success rate.

[0088] In some embodiments, the demodulation module 203 includes: a first demodulation unit 2031, configured to demodulate the second voltage signal to obtain a first data packet; and a second demodulation unit 2032, configured to demodulate the frequency signal when the verification of the first data packet obtained by the first demodulation unit 2031 fails.

[0089] Understandable, for reference Figure 8 , Figure 8 This is a schematic diagram of the structure of a fifth type of signal demodulation chip according to an exemplary embodiment, as shown below. Figure 8 As shown, the demodulation module 203 may include a first demodulation unit 2031 and a second demodulation unit 2032. The input of the first demodulation unit 2031 is connected to the output of the comparison unit 2022, and its output is connected to the input of the verification module 204. Based on this, the first demodulation unit 2031 can demodulate the second voltage signal output by the comparison unit 2022 and output the demodulated first data packet to the verification module 204. The input of the second demodulation unit 2032 is connected to the conversion unit 2021, and its output is connected to the verification module 204. Based on this, the second demodulation unit 2032 can demodulate the frequency signal output by the conversion unit 2021 and output the demodulated first data packet to the verification module 204.

[0090] In some embodiments, the first demodulation unit 2031 and the second demodulation unit 2032 employ different demodulation algorithms.

[0091] In some embodiments, the second demodulation unit 2032 includes a plurality of demodulation channels, wherein different demodulation channels among the plurality of demodulation channels use different demodulation algorithms to demodulate the frequency signal.

[0092] In some embodiments, the demodulation algorithms used in different demodulation channels include: different digital filtering algorithms used in different demodulation channels.

[0093] In some embodiments, the demodulation algorithms used in different demodulation channels include: some demodulation channels in a plurality of demodulation channels demodulate based on the peak value of the induced current signal, and another portion of demodulation channels demodulate based on the average value of the induced current signal.

[0094] In some embodiments, reference Figure 9 , Figure 9 This is a schematic diagram illustrating the structure of a second demodulation unit according to an exemplary embodiment. For example... Figure 9 As shown, the demodulation module 203 may include N demodulation channels for demodulating frequency signals. For example, N can be any value from 3 to 10; for instance, N can be 4.

[0095] It should be noted that the above is only an example of the number of demodulation channels included in the second demodulation unit 2032. The number of demodulation channels included in the second demodulation unit 2032 can also be set as needed, and this embodiment does not limit it.

[0096] In this embodiment of the disclosure, by setting multiple demodulation channels in the second demodulation unit 2032, and using different demodulation algorithms in different demodulation channels, the demodulation success rate of the first data packet can be further improved by demodulating the input frequency through different demodulation algorithms in multiple demodulation channels.

[0097] This disclosure also provides a wireless charging method. Figure 10 This is a schematic flowchart illustrating a wireless charging method according to an exemplary embodiment. This wireless charging method can be applied to the wireless charging circuit provided in the above embodiments. Hereinafter, the wireless charging method provided in this disclosure will be described using the signal demodulation chip provided in the above embodiments as the execution subject. The wireless charging method includes:

[0098] In step 1001, the induced current signal input to the first induction coil L3 is acquired.

[0099] Understandably, during the process of powering a user device using the wireless charging circuit provided in the above embodiments, the first induction coil L3 on the wireless charging circuit can be electromagnetically coupled to the second induction coil L4 on the device to provide power to the device. During this process, the device can send a first data packet indicating its own power consumption parameters to the power supply via the second induction coil. Based on this, the wireless charging circuit can receive the first data packet via the first induction coil L3 and generate an induced current signal on the first induction coil L3 to carry the first data packet, which is then output to the signal demodulation chip 20. Therefore, the signal demodulation chip 20 can obtain the induced current signal input to the first induction coil L3.

[0100] In some embodiments, the first data includes electrical parameters indicating the power consumption of the second induction coil.

[0101] In step 1002, the induced current signal is demodulated to obtain the first data packet.

[0102] Understandably, after receiving the induced current signal input from the first induction coil L3 to the signal demodulation chip 20, the signal demodulation chip 20 can demodulate the induced current signal to obtain the first data packet.

[0103] In step 1003, the power supply parameters of the first induction coil L3 are adjusted based on the power consumption parameters indicated by the first data packet.

[0104] Understandably, after obtaining the first data packet through the above step 1002, the signal demodulation chip 20 can determine the power consumption parameters indicated in the first data packet and adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated in the first data packet.

[0105] In some embodiments, step 1002 includes: converting the induced current signal into a first voltage signal through a first conversion module 201; converting the first voltage signal into a frequency signal or a second voltage signal through a second conversion module 202; and demodulating the frequency signal or the second voltage signal through a demodulation module 203 to obtain a first data packet.

[0106] Understandably, the signal demodulation chip 20 may include a first conversion module 201, a second conversion module 202, and a demodulation module 203. The input terminal of the first conversion module 201 is connected to the first induction coil L3, the input terminal of the second conversion module 202 is connected to the output terminal of the first conversion module 201, and the output terminal of the second conversion module 202 is connected to the input terminal of the demodulation module 203. Based on this, the induced current signal generated by the first induction coil L3 upon receiving the first data packet can be input to the first conversion module 201. Based on this, the signal demodulation chip 20 can convert the induced current signal into a first voltage signal through the first conversion module 201 and output it to the second conversion module 202. The signal demodulation chip 20 can then convert the first voltage signal into a frequency signal or a second voltage signal through the second conversion module 202 and output it to the demodulation module 203. Afterwards, the signal demodulation chip 20 can demodulate the frequency signal or the second voltage signal through the demodulation module 203 to obtain the first data packet.

[0107] In some embodiments, the first conversion module 201 is connected to the first induction coil L3 via the first AC pin of the signal demodulation chip 20. Based on this, the signal demodulation chip 20 can acquire the induced current signal input from the first AC pin.

[0108] In some embodiments, the first conversion module 201 may include a resistor assembly, one end of which is connected to the first induction coil L3 and the other end of which is connected to the second conversion module 202. Based on this, the signal demodulation chip 20 can convert the induced current signal into a first voltage signal using the resistor assembly.

[0109] In some embodiments, the first conversion module 201 can also be an analog-to-digital converter (ADC). Based on this, the signal demodulation chip 20 can convert the induced current signal of the input signal demodulation chip 20 of the first induction coil L3 into a first voltage signal through the ADC.

[0110] In some embodiments, the second conversion module 202 includes a conversion unit 2021; wherein, converting the first voltage signal into a frequency signal or a second voltage signal by the second conversion module 202 includes converting the first voltage signal into a frequency signal by the conversion unit 2021.

[0111] Understandably, when the second conversion module 202 may include a conversion unit 2021, the signal demodulation chip 20 can convert the first voltage signal output by the first conversion module 201 into a frequency signal and output it to the demodulation module 203 through the conversion unit 2021. Afterwards, the signal demodulation chip 20 can demodulate the frequency signal through the demodulation module 203.

[0112] In some embodiments, the chip demodulation chip can convert the first voltage signal output by the first conversion module 201 into a frequency signal by the conversion unit 2021 according to a preset clock cycle.

[0113] In some embodiments, the second conversion module 202 includes a comparison unit 2022, which compares the first voltage signal with the parameter voltage and outputs a second voltage signal based on the comparison result.

[0114] Understandably, the second conversion module 202 may include a comparison unit 2022. The input of the comparison unit 2022 is connected to the first conversion module 201, and the output of the comparison unit 2022 is connected to the demodulation module 203. Based on this, the signal demodulation chip 20 can compare the first voltage signal output by the first conversion module 201 with the parameter voltage through the comparison unit 2022, so that the comparison unit 2022 can output a second voltage signal to the demodulation module 203 based on the comparison result. Then, the signal demodulation chip 20 can demodulate the second voltage signal through the demodulation module 203.

[0115] In some embodiments, the second voltage signal output by the comparison unit 2022 may be a square wave signal.

[0116] In some embodiments, the comparison unit 2022 may include, but is not limited to, a comparator. Based on this, the signal demodulation chip 20 can compare the input first voltage signal and the reference voltage using the comparator, and output a second voltage signal with a high level when the first voltage signal is greater than the parameter voltage, and output a second voltage signal with a low level when the first voltage signal is less than or equal to the parameter voltage.

[0117] In some embodiments, when the second conversion module 202 includes both a conversion unit 2021 and a comparison unit 2022, the signal demodulation chip 20 can convert the first voltage signal into a second voltage signal through the comparison unit 2022 and output it to the demodulation module 203. The signal demodulation chip 20 can also convert the first voltage signal into a frequency signal through the conversion unit 2021 and output it to the demodulation module 203. In this case, the demodulation module 203 can obtain both the frequency signal and the second voltage signal. Based on this, the signal demodulation chip 20 can demodulate both the frequency signal and the second voltage signal through the demodulation module 203 to obtain a first data packet corresponding to the frequency signal and a first data packet corresponding to the second voltage signal.

[0118] In some embodiments, the method further includes: verifying the first data packet output by the demodulation module 203 through the verification module 204; wherein, step 1003 includes: adjusting the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the successfully verified first data packet through the parameter adjustment module 205.

[0119] Understandably, the signal demodulation chip 20 may also include a verification module 204 and a parameter adjustment module 205. The input of the verification module 204 is connected to the output of the demodulation module 203, and the output of the verification module 204 is connected to the input of the parameter adjustment module 205. The input of the parameter adjustment module 205 is also connected to the output of the demodulation module 203. Based on this, after the demodulation module 203 demodulates the frequency signal and / or the second voltage signal to obtain the first data packet, the signal demodulation chip 20 can verify the first data packet output by the demodulation module 203 through the verification module 204. When the first data packet verification is successful, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 according to the power parameters indicated by the first data packet through the parameter adjustment module 205.

[0120] In some embodiments, when the verification result indicates that the first data packet verification failed, the signal demodulation chip 20 can maintain the original power supply parameters of the first induction coil L3 through the parameter adjustment module 205, or control the first induction coil L3 to stop supplying power.

[0121] In some embodiments, when the second conversion module 202 includes both a comparison unit 2022 and a conversion unit 2021, the signal demodulation chip 20 can demodulate the second voltage signal input to the comparison unit 2022 using the demodulation module 203 to obtain the first data packet. Additionally, the signal demodulation chip 20 can also demodulate the frequency signal input to the conversion unit 2021 using the demodulation module 203 to obtain the first data packet. Based on this, the signal demodulation chip 20 can obtain the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal. Based on this, the signal demodulation chip 20 can also verify the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal using the verification module 204. After obtaining the verification results of the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 using the parameter adjustment module 205, according to the power consumption parameters indicated by the successfully verified first data packet.

[0122] In some embodiments, when both the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal are successfully verified, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the second voltage signal through the parameter adjustment module 205. When the verification of the first data packet corresponding to the second voltage signal fails, but the verification of the first data packet corresponding to the frequency signal is successful, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the frequency signal through the parameter adjustment module 205. When both the verification of the first data packet corresponding to the second voltage signal and the first data packet corresponding to the frequency signal fails, the signal demodulation chip 20 can control the first induction coil L3 to stop supplying power or maintain the original power supply parameters through the parameter adjustment module 205.

[0123] In some embodiments, when the first conversion module 201 includes both a conversion unit 2021 and a comparison unit 2022, the signal demodulation chip 20 can first convert the first voltage signal into a second voltage signal through the comparison unit 2022, and input the second voltage signal to the demodulation module 203 for demodulation to obtain the first data packet corresponding to the second voltage signal. Then, the signal demodulation chip 20 can verify the first data packet corresponding to the second voltage signal through the verification module 204. When the verification of the first data packet corresponding to the second voltage signal is successful, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the second voltage signal through the parameter adjustment module 205. When the verification of the first data packet corresponding to the second voltage signal fails, the signal demodulation chip 20 can convert the first voltage signal into a frequency signal through the conversion unit 2021, and input the frequency signal to the demodulation module 203 for demodulation to obtain the first data packet corresponding to the frequency signal. Then, the signal demodulation chip 20 can also verify the first data packet corresponding to the frequency signal through the verification module 204. When the first data packet corresponding to the frequency signal is successfully verified, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 based on the power consumption parameters indicated by the first data packet corresponding to the frequency signal through the parameter adjustment module 205. When the verification of the first data packet corresponding to the frequency signal fails, the signal demodulation chip 20 can control the first induction coil L3 to stop supplying power or maintain the original power supply parameters through the parameter adjustment module 205.

[0124] In some embodiments, the demodulation module 203 includes a first demodulation unit 2031 and a second demodulation unit 2032; wherein, the demodulation module 203 demodulates a frequency signal or a second voltage signal to obtain a first data packet, including: demodulating the second voltage signal through the first demodulation unit 2031 to obtain the first data packet; and when the verification module 204 fails to verify the first data packet output by the first demodulation unit 2031, the second demodulation unit 2032 demodulates the frequency signal to obtain the first data packet again.

[0125] Understandably, the demodulation module 203 may include a first demodulation unit 2031 and a second demodulation unit 2032. The input of the first demodulation unit 2031 is connected to the output of the comparison unit 2022, and its output is connected to the input of the verification module 204. The input of the second demodulation unit 2032 is connected to the conversion unit 2021, and its output is connected to the verification module 204. Based on this, the signal demodulation chip 20 can demodulate the second voltage signal output by the comparison unit 2022 using the first demodulation unit 2031, and output the demodulated first data packet to the verification module 204. The signal demodulation chip 20 can also demodulate the frequency signal output by the conversion unit 2021 using the second demodulation unit 2032, and output the demodulated first data packet to the verification module 204.

[0126] In some embodiments, the signal demodulation chip 20 can first demodulate the input second voltage signal through the first demodulation unit 2031 to obtain the first data packet corresponding to the second voltage signal. Then, the signal demodulation chip 20 can verify the first data packet corresponding to the second voltage signal through the verification module 204. When the verification of the first data packet corresponding to the second voltage signal is successful, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 according to the power consumption parameters indicated by the first data packet corresponding to the second voltage signal through the parameter adjustment module 205. When the verification of the first data packet corresponding to the second voltage signal fails, the signal demodulation chip 20 can demodulate the input frequency signal through the second demodulation unit 2032 to obtain the first data packet corresponding to the frequency signal. Then, the signal demodulation chip 20 can verify the first data packet corresponding to the frequency signal through the verification module 204. When the verification of the first data packet corresponding to the frequency signal is successful, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 according to the power consumption parameters indicated by the first data packet corresponding to the frequency signal through the parameter adjustment module 205. When the verification of the first data packet corresponding to the frequency signal fails, the signal demodulation chip 20 can control the first induction coil L3 to stop supplying power through the parameter adjustment module 205, or continue to supply power while maintaining the original power supply parameters.

[0127] In some embodiments, the first demodulation unit 2031 and the second demodulation unit 2032 employ different demodulation algorithms.

[0128] In some embodiments, the second demodulation unit 2032 includes multiple demodulation channels, and different demodulation channels in the multiple demodulation channels use different demodulation algorithms to demodulate the frequency signal; wherein, demodulating the frequency signal by the second demodulation unit 2032 to obtain the first data packet again includes: demodulating the frequency signal by at least one demodulation channel in the second demodulation unit 2032 to obtain the first data packet again.

[0129] Understandably, the second demodulation unit 2032 may include multiple demodulation channels, where different demodulation channels can employ different demodulation algorithms to demodulate the frequency signal output by the conversion unit 2021. Based on this, the signal demodulation chip 20 can demodulate the frequency signal through at least one of the multiple demodulation channels. At this time, the signal demodulation chip 20 can obtain a first data packet output by at least one demodulation channel. Subsequently, the signal demodulation chip 20 can verify the first data packet output by the at least one demodulation channel using the verification module 204 to determine whether a successfully verified first data packet exists. If a successfully verified first data packet exists among the first data packets output by at least one demodulation channel, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 using the parameter adjustment module 205 according to the power consumption parameters indicated by the successfully verified first data packet.

[0130] In some embodiments, the signal demodulation chip 20 can demodulate the frequency signal through a portion of the multiple demodulation channels. In this case, the signal demodulation chip 20 can obtain the first data packet output from the portion of the demodulation channels. Then, the signal demodulation chip 20 can use the verification module 204 to verify the first data packet output from the portion of the demodulation channels to determine if a successfully verified first data packet exists. If a successfully verified first data packet exists in the first data packet output from the portion of the demodulation channels, the signal demodulation chip 20 can use the parameter adjustment module 205 to adjust the power supply parameters of the first induction coil L3 according to the power consumption parameters indicated by the successfully verified first data packet.

[0131] When the first data packets output from some demodulation channels all fail verification, the signal demodulation chip 20 can demodulate the input frequency signal through the remaining demodulation channels. Then, the signal demodulation chip 20 can verify the first data packets output from the remaining demodulation channels. If a successfully verified first data packet is found among the first data packets output from the remaining demodulation channels, the parameter adjustment module 205 adjusts the power supply parameters of the first induction coil L3 according to the power consumption parameters indicated by the successfully verified first data packet. When the first data packets output from the remaining demodulation channels all fail verification, the parameter adjustment module 205 controls the first induction coil L3 to either stop power supply or maintain the original power supply parameters and continue power supply.

[0132] In some embodiments, reference Figure 9 The signal demodulation chip 20 can first demodulate the input frequency signal through the first n demodulation channels to obtain the first data packets output by the n demodulation channels. Then, the signal demodulation chip 20 can verify the n first data packets. If a first data packet is successfully verified among the n first data packets, the parameter adjustment module 205 adjusts the power supply parameters of the first induction coil L3 according to the power consumption parameters indicated by any successfully verified first data packet. If all n first data packets fail to be verified, the signal demodulation chip 20 can demodulate the input frequency signal through the remaining Nn demodulation channels. Then, the signal demodulation chip 20 can verify the first data packets output by the remaining Nn demodulation channels. If a first data packet is successfully verified among the remaining Nn demodulation channels, the parameter adjustment module 205 adjusts the power supply parameters of the first induction coil L3 according to the power consumption parameters indicated by any successfully verified first data packet. If the first data packet output from the remaining Nn demodulation channels fails verification, the parameter adjustment module 205 controls the first induction coil L3 to either stop supplying power or maintain the original power supply parameters and continue supplying power. Here, n is an integer greater than 0 and less than N.

[0133] In some embodiments, the signal demodulation chip 20 can also simultaneously demodulate the frequency signal through all demodulation channels of the second demodulation unit 2032 and verify the first data packets output by all demodulation channels. When a first data packet that has been successfully verified exists among the first data packets output by all demodulation channels, the power supply parameters of the first induction coil L3 are adjusted according to the power consumption parameters indicated by any successfully verified first data packet. When all first data packets output by all demodulation channels fail to be verified, the parameter adjustment module 205 controls the first induction coil L3 to stop supplying power or maintain the original power supply parameters and continue supplying power.

[0134] In some embodiments, demodulating the frequency signal through at least one demodulation channel in the second demodulation unit 2032 to obtain the first data packet again includes: demodulating the frequency signal sequentially through multiple demodulation channels included in the second demodulation unit 2032 until the first data packet that has been successfully verified is obtained or all demodulation channels have been traversed.

[0135] Understandably, the signal demodulation chip 20 can first demodulate the frequency signal output by the conversion unit 2021 through a demodulation channel, and then verify the first demodulated signal output by the demodulation channel based on the verification module 204. If the verification module 204 fails to verify the first data packet output by the demodulation channel, it indicates that the first data packet obtained by demodulation through that demodulation channel is incorrect. At this time, the signal demodulation chip 20 can switch demodulation channels, and demodulate the frequency signal output by the conversion unit 2021 based on the switched demodulation channel, and verify the first data packet output by the switched channel based on the verification module 204, until a successfully verified first data packet is obtained, or until all demodulation channels included in the second demodulation unit 2032 have been traversed.

[0136] For example, refer to Figure 9 The demodulation channel can include N demodulation channels. Based on this, the frequency signal output from the conversion unit 2021 can be first input to the first demodulation channel for demodulation, and the first data packet output by the verification module 204 can be verified. When the verification module 204 successfully verifies the first data packet output by the first demodulation channel, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 based on the first data packet output by the first demodulation channel. When the verification module 204 fails to verify the first data packet output by the first demodulation channel, the frequency signal can be demodulated based on the second demodulation channel, and the first data packet output by the verification module 204 can be verified. When the verification module 204 successfully verifies the first data packet output by the second demodulation channel, the signal demodulation chip 20 can adjust the power supply parameters of the first induction coil L3 based on the first data packet output by the second demodulation channel. If the verification module 204 fails to verify the first data packet output by the second demodulation channel, the switching of demodulation channels can continue until the first data packet that has been successfully verified is obtained or the N demodulation channels have been traversed.

[0137] parameter Figure 11 , Figure 11 This is a schematic flowchart illustrating a wireless charging method according to another exemplary embodiment. Hereinafter, parameters will be... Figure 11 The steps shown describe the process of charging a device based on a wireless charging circuit deployed within the power supply device 10, with the signal demodulation chip in the wireless charging circuit as the main execution unit.

[0138] In step 1101, in the power supply equipment ( Figure 11 When the wireless charging mode is activated (Tx in the image), the signal demodulation chip uses the first induction coil to charge according to the initial power supply parameters. Figure 11 The initial supply voltage V0, initial frequency f0, and initial duty cycle D0 are used to supply power.

[0139] In step 1102, the wireless charging circuit detects the power-consuming device through the first induction coil. Figure 11 The CEP packet and the second data packet sent by Rx in the middle.

[0140] The second data packet may include, but is not limited to, signal packets, identity document (ID) data packets, and power packets.

[0141] In step 1103, the wireless charging circuit receives the CEP packet through the first induction coil and inputs the induction circuit signal carrying the CEP packet to the signal demodulation chip through the first AC pin on the signal demodulation chip.

[0142] In step 1104, the signal demodulation chip demodulates the induced current signal based on the first conversion module, the comparison unit, and the first demodulation unit to obtain the CEP packet.

[0143] In step 1105, the signal demodulation chip verifies the CEP packet output in step 1104 through the verification module 204. If the CEP packet verification is successful, step 1106 is executed; if the CEP packet verification fails, step 1107 is executed.

[0144] In step 1106, the signal demodulation chip adjusts the power supply parameters of the first induction coil based on the power parameters indicated by the successfully verified CEP packet.

[0145] In step 1107, the signal demodulation chip demodulates the induced current signal through the demodulation channels in the first conversion module, the conversion unit, and the second demodulation unit to obtain the CEP packet again.

[0146] In step 1108, the signal demodulation chip verifies the CEP packet obtained in step 1107 through the verification module. If the CEP packet verification is successful, it returns to step 1106. If the CEP packet verification fails, it switches the demodulation channel and returns to step 1107.

[0147] refer to Figure 12 , Figure 12 This is a structural block diagram illustrating an electronic device 1200 according to an exemplary embodiment. For example, the electronic device 1200 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, or other electronic device with the aforementioned USB interface. Figure 12 The provided electronic equipment can be the power supply equipment and power consumption equipment in the above embodiments.

[0148] Reference Figure 12The electronic device 1200 may include one or more of the following components: processing component 1202, memory 1204, power supply component 1206, multimedia component 1208, audio component 1210, input / output (I / O) interface 1212, sensor component 1214, and communication component 1216.

[0149] Processing component 1202 typically controls the overall operation of electronic device 1200, such as operations associated with at least one of display, telephone call, data communication, camera operation, and recording operation. Processing component 1202 may include one or more processors 1220 to execute instructions. Furthermore, processing component 1202 may include one or more modules to facilitate interaction between processing component 1202 and other components. For example, processing component 1202 may include a multimedia module to facilitate interaction between multimedia component 1208 and processing component 1202.

[0150] Memory 1204 is configured to store various types of data to support operation on electronic device 1200. Examples of such data include at least one of the following: instructions for any application or method operating on electronic device 1200, contact data, phonebook data, messages, pictures, and videos. Memory 1204 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0151] Power supply component 1206 provides power to various components of electronic device 1200. Power supply component 1206 may include at least one of the following: a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 1200.

[0152] Multimedia component 1208 includes a screen that provides an output interface between electronic device 1200 and the user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a Touch Panel, the screen may be implemented as a touchscreen to receive input signals from the user. The Touch Panel includes one or more touch sensors to sense touches, swipes, and gestures on the Touch Panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 1208 includes a front-facing camera and / or a rear-facing camera. When electronic device 1200 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0153] Audio component 1210 is configured to output and / or input audio signals. For example, audio component 1210 includes a microphone (MIC) configured to receive external audio signals when electronic device 1200 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 1204 or transmitted via communication component 1216. In some embodiments, audio component 1210 also includes a speaker for outputting audio signals.

[0154] I / O interface 1212 provides an interface between processing component 1202 and peripheral interface modules, such as keyboards, click wheels, and buttons. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0155] Sensor assembly 1214 includes one or more sensors for providing state assessments of various aspects of electronic device 1200. For example, sensor assembly 1214 may detect the on / off state of electronic device 1200, the relative positioning of components such as the display and keypad of electronic device 1200, changes in position of electronic device 1200 or one of its components, the presence or absence of user contact with electronic device 1200, orientation or acceleration / deceleration of electronic device 1200, and temperature changes of electronic device 1200. Sensor assembly 1214 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 1214 may also include an optical sensor, such as a complementary metal-oxide-semiconductor (CMOS) or charge-coupled device (CCD) image sensor, for use in imaging applications. In some embodiments, sensor assembly 1214 may also include, but is not limited to, at least one of the following: an accelerometer, a gyroscope, a magnetometer, a pressure sensor, and a temperature sensor.

[0156] Communication component 1216 is configured to facilitate wired or wireless communication between electronic device 1200 and other devices. Electronic device 1200 can access wireless networks based on communication standards, such as Wi-Fi, 4G, 5G, or combinations thereof. In one exemplary embodiment, communication component 1216 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 1216 also includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID), Infrared Data Association (IrDA), Ultra Wide Band (UWB), Bluetooth (BT), and other technologies.

[0157] In an exemplary embodiment, the electronic device 1200 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.

[0158] A non-transitory computer-readable storage medium, when the instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to perform any of the wireless charging methods described in the embodiments of this disclosure. For example, the method includes:

[0159] The induced current signal input to the first induction coil is acquired, wherein the induced current signal is generated by electromagnetic coupling with the second induction coil, and the induced current signal carries a first data packet, the first data packet including power parameters indicating the second induction coil; the induced current signal is demodulated to obtain the first data packet; and the power supply parameters of the first induction coil are adjusted based on the power parameters indicated by the first data packet.

[0160] This disclosure provides a computer program product comprising a computer program or executable instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer program or executable instructions from the computer-readable storage medium and executes the computer program or executable instructions, causing the computer device to perform any of the wireless charging methods described in this disclosure.

[0161] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.

[0162] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A wireless charging circuit, characterized in that, It includes a first induction coil and a signal demodulation chip, the first induction coil and the signal demodulation chip are connected, the signal demodulation chip includes a voltage demodulation input pin, and the voltage demodulation input pin is left floating; The first induction coil is used to receive a first data packet and output an induced current signal to the signal demodulation chip by electromagnetically coupling with the second induction coil of the electrical device. The induced current signal carries the first data packet, which indicates the power consumption parameters of the second induction coil. The signal demodulation chip is used to demodulate the induced current signal to obtain the first data packet, and to adjust the power supply parameters of the first induction coil according to the power consumption parameters.

2. The wireless charging circuit according to claim 1, characterized in that, The signal demodulation chip includes: The first conversion module is used to convert the induced current signal into a first voltage signal; The second conversion module is used to convert the first voltage signal into a frequency signal and / or a second voltage signal; The demodulation module is used to demodulate the frequency signal and / or the second voltage signal to obtain the first data packet.

3. The wireless charging circuit according to claim 2, characterized in that, The second conversion module includes: A conversion unit is used to convert the first voltage signal into the frequency signal.

4. The wireless charging circuit according to claim 2 or 3, characterized in that, The second conversion module includes: The comparison unit is used to compare the first voltage signal with the parameter voltage and output the second voltage signal based on the comparison result.

5. The wireless charging circuit according to claim 2, characterized in that, The signal demodulation chip also includes: The verification module is used to verify the first data packet output by the demodulation module; The parameter adjustment module is used to adjust the power supply parameters of the first induction coil based on the power consumption parameters indicated by the first data packet that has been successfully verified.

6. The wireless charging circuit according to claim 5, characterized in that, The demodulation module includes: The first demodulation unit is used to demodulate the second voltage signal to obtain the first data packet; The second demodulation unit is used to demodulate the frequency signal when the verification of the first data packet obtained by the first demodulation unit fails.

7. The wireless charging circuit according to claim 6, characterized in that, The second demodulation unit includes: multiple demodulation channels; Among them, different demodulation channels in the plurality of demodulation channels use different demodulation algorithms to demodulate the frequency signal.

8. A wireless charging method, characterized in that, The method, applied to the wireless charging circuit according to any one of claims 1 to 7, comprises: The induced current signal input to the first induction coil is acquired, wherein the induced current signal is generated by electromagnetic coupling with the second induction coil, and the induced current signal carries a first data packet, the first data packet including power parameters indicating the second induction coil. The induced current signal is demodulated to obtain the first data packet; Based on the power consumption parameters indicated by the first data packet, adjust the power supply parameters of the first induction coil.

9. The method according to claim 8, characterized in that, The demodulation of the induced current signal to obtain the first data packet includes: The induced current signal is converted into a first voltage signal by the first conversion module; The first voltage signal is converted into a frequency signal or a second voltage signal by the second conversion module; The frequency signal or the second voltage signal is demodulated by the demodulation module to obtain the first data packet.

10. The method according to claim 9, characterized in that, The second conversion module includes a conversion unit; The step of converting the first voltage signal into a frequency signal or a second voltage signal through the second conversion module includes: The conversion unit converts the first voltage signal into a frequency signal.

11. The method according to claim 9, characterized in that, The second conversion module further includes a comparison unit; The step of converting the first voltage signal into a frequency signal or a second voltage signal through the second conversion module includes: The comparison unit compares the first voltage signal and the parameter voltage to obtain a comparison result. Based on the comparison result, the second voltage signal is output.

12. The method according to claim 9, characterized in that, The method further includes: The first data packet output by the demodulation module is verified by the verification module. The step of adjusting the power supply parameters of the first induction coil based on the power consumption parameters indicated by the first data packet includes: The power supply parameters of the first induction coil are adjusted by the parameter adjustment module based on the power consumption parameters indicated by the first data packet that has been successfully verified.

13. The method according to claim 12, characterized in that, The demodulation module includes a first demodulation unit and a second demodulation unit; The step of demodulating the frequency signal or the second voltage signal through the demodulation module to obtain the first data packet includes: The first demodulation unit demodulates the second voltage signal to obtain the first data packet; When the verification module fails to verify the first data packet output by the first demodulation unit, the second demodulation unit demodulates the frequency signal to obtain the first data packet again.

14. The method according to claim 13, characterized in that, The second demodulation unit includes multiple demodulation channels, and different demodulation channels in the multiple demodulation channels use different demodulation algorithms to demodulate the frequency signal; The step of demodulating the frequency signal through the second demodulation unit to obtain the first data packet again includes: The frequency signal is demodulated through at least one demodulation channel in the second demodulation unit to obtain the first data packet again.

15. The method according to claim 14, characterized in that, The step of demodulating the frequency signal through at least one demodulation channel in the second demodulation unit to obtain the first data packet again includes: The frequency signal is demodulated sequentially through multiple demodulation channels included in the second demodulation unit until a first data packet that has been successfully verified is obtained or all demodulation channels have been traversed.

16. A power supply device, characterized in that, include: The wireless charging circuit according to any one of claims 1 to 7.

17. A non-transitory computer-readable storage medium storing a computer program or instructions, characterized in that, When the computer program or instructions in the storage medium are executed by a processor, the steps of the method according to any one of claims 8 to 15 are implemented.

18. A computer program product comprising a computer program or instructions, characterized in that, When the computer program or instructions are executed by a processor, they implement the steps of the method according to any one of claims 8 to 15.

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