Energy storage converter and control method thereof

Abstract

An energy storage converter and its control method are disclosed, comprising n branches connected in parallel. Each branch includes an upper switching device group, a lower switching device group, and an inductor. The upper switching device group includes an upper power transistor and an upper freewheeling diode connected in parallel, and the lower switching device group includes a lower power transistor and a lower freewheeling diode connected in parallel. In each branch, one end of the upper switching device group is connected to one end of a high-voltage side buffer capacitor, and the other end of the upper switching device group is connected to one end of the lower switching device group and one end of the inductor. The other end of the inductor is connected to one end of a low-voltage side buffer capacitor, and the other end of the lower switching device group is connected to the other ends of the high-voltage side buffer capacitor and the other ends of the low-voltage side buffer capacitor. In discharge mode, dual closed-loop control of voltage and current is adopted. In charging mode, voltage outer loop control, current inner loop control, and current sharing loop control are adopted to solve the problems of unstable bus voltage, discontinuous current during long-term charging and discharging of the battery, and current imbalance between multi-phase interleaved parallel connections.

Description

Technical Field

[0001] This invention belongs to the field of energy storage converter technology, specifically relating to an energy storage converter and its control method. Background Technology

[0002] In DC systems or energy storage systems, bidirectional DC-DC converters are typically connected between the battery and the DC bus. Their function is to regulate the bidirectional transmission of electrical energy, enabling both charging of the battery from the DC bus and discharging of the battery to the DC bus. Existing technologies, interleaved parallel DC-DC converters for fuel cells, four-phase interleaved parallel Buck / Boost DC-DC converters, and four-phase interleaved parallel high-gain Boost converters all employ multi-phase interleaved parallel topologies. These topology-based solutions comprehensively address current discontinuity and bus oscillation issues, thereby improving the power density, efficiency, and stability of DC energy storage systems.

[0003] However, due to the significant voltage difference between the battery and the DC bus, when a DC-DC converter based on a bidirectional Buck-Boost topology simultaneously meets both the conditions of a large voltage difference between the battery and the bus and a light or medium-light load, current discontinuity can easily occur during charging and discharging. This leads to an intermittent conduction mode, resulting in large fluctuations in the DC bus current. The bus current is no longer a stable DC current but a pulsating current containing high-frequency spikes and ripples. In the intermittent current mode, its waveform appears as a periodic triangular wave pulse group, which adversely affects the stable operation of the system. Moreover, when the energy storage converter uses multi-phase interleaving or multi-module parallel connection to increase capacity and reduce ripple, a new problem of current imbalance between modules is introduced. Uneven current can cause some modules to overload and overheat, shorten their lifespan, and reduce the overall reliability of the system. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides an energy storage converter and its control method, which solves the problems of unstable bus voltage and discontinuous current during long-term charging and discharging of batteries, and also solves the problem of current imbalance between multi-phase interleaving or multi-module parallel connection.

[0005] The present invention adopts the following technical solution.

[0006] This invention proposes an energy storage converter, comprising: The n branches are connected in parallel. Each branch includes an upper switching device group, a lower switching device group, and an inductor. The upper switching device group includes an upper power transistor and an upper freewheeling diode connected in parallel. The lower switching device group includes a lower power transistor and a lower freewheeling diode connected in parallel. In each branch, one end of the upper switching device group is connected to one end of the high-voltage side buffer capacitor, the other end of the upper switching device group is connected to one end of the lower switching device group and one end of the inductor, the other end of the inductor is connected to one end of the low-voltage side buffer capacitor, and the other end of the lower switching device group is connected to the other end of the high-voltage side buffer capacitor and the other end of the low-voltage side buffer capacitor. When the energy storage converter enters the discharge mode, it adopts dual closed-loop control of voltage and current; when the energy storage converter enters the charging mode, it adopts outer loop control of voltage, inner loop control of current, and current sharing loop control.

[0007] When connecting four branches in parallel, a four-way interleaved parallel buck-boost bidirectional transformation topology is adopted.

[0008] In the first branch, the upper switching device group includes an upper power transistor Q1 and an upper freewheeling diode D1 connected in parallel, and the lower switching device group includes a lower power transistor Q2 and a lower freewheeling diode D2 connected in parallel; in the second branch, the upper switching device group includes an upper power transistor Q3 and an upper freewheeling diode D3 connected in parallel, and the lower switching device group includes a lower power transistor Q4 and a lower freewheeling diode D4 connected in parallel; in the third branch, the upper switching device group includes an upper power transistor Q5 and an upper freewheeling diode D5 connected in parallel, and the lower switching device group includes a lower power transistor Q6 and a lower freewheeling diode D6 connected in parallel; in the fourth branch, the upper switching device group includes an upper power transistor Q7 and an upper freewheeling diode D7 connected in parallel, and the lower switching device group includes a lower power transistor Q8 and a lower freewheeling diode D8 connected in parallel. One end of each of the upper power transistors Q1, Q3, Q5, and Q7 is connected to one end of the high-voltage side buffer capacitor C1. The other ends of each of the upper power transistors Q1, Q3, Q5, and Q7 are respectively connected to one end of each of the lower power transistors Q2, Q4, Q6, and Q8, and one end of each of the inductors L1, L2, L3, and L4. The other ends of each of the inductors L1, L2, L3, and L4 are connected to one end of the low-voltage side buffer capacitor C2. The other ends of each of the lower power transistors Q2, Q4, Q6, and Q8 are connected to the other ends of the high-voltage side buffer capacitor and the other ends of the low-voltage side buffer capacitor.

[0009] When the energy storage converter enters charging mode, only the buck circuit operates. The PWM signal controls the upper power transistors Q1, Q3, Q5, and Q7 to turn on or off, while the lower power transistors Q2, Q4, Q6, and Q8 are off. Freewheeling diodes D2, D4, D6, and D8 are on to provide a freewheeling path, while D1, D3, D5, and D7 are off. When the energy storage converter enters discharging mode, only the Boost circuit operates. The PWM signal controls the lower power transistors Q2, Q4, Q6, and Q8 to turn on or off, while the upper power transistors Q1, Q3, Q5, and Q7 are off. Freewheeling diodes D1, D3, D5, and D7 are on to provide a freewheeling path, while D2, D4, D6, and D8 are off.

[0010] This invention proposes a control method for an energy storage converter, comprising: Set the control mode of the energy storage converter, including: manual control mode or automatic control mode; When set to manual control mode, if the user inputs a forced boost command, the first enable decision of the PWM signal is executed; if the user inputs a forced buck command, the second enable decision of the PWM signal is executed. When set to automatic control mode, if the high-voltage side voltage is less than the voltage setting value, the first enable decision of the PWM signal is executed; if the high-voltage side voltage is greater than the voltage setting value, the second enable decision of the PWM signal is executed. Furthermore, when executing the first enable decision of the PWM signal in automatic control mode, if the low-voltage side voltage is less than the undervoltage protection threshold, the second enable decision of the PWM signal is executed. When executing the first enable decision of the PWM signal, the energy storage converter adopts dual closed-loop control of voltage and current; when executing the second enable decision of the PWM signal, the energy storage converter adopts voltage outer loop control, current inner loop control, and current sharing loop control.

[0011] In manual control mode, the user inputs a forced boost or forced buck command; in automatic control mode, the energy storage converter starts in charging mode by default and monitors the high-voltage side voltage and low-voltage side voltage in real time.

[0012] In manual control mode, when a forced boost command is input, the energy storage converter is triggered to enter the discharge mode and execute the first enable decision of the PWM signal; when a forced buck command is input, the energy storage converter enters the charging mode and executes the second enable decision of the PWM signal.

[0013] In automatic control mode, if the high-voltage side voltage is less than the voltage setpoint, the energy storage converter is triggered to enter the discharge mode and execute the first enable decision of the PWM signal; if the high-voltage side voltage is greater than the voltage setpoint, the energy storage converter is triggered to enter the charging mode and execute the second enable decision of the PWM signal; if the high-voltage side voltage is equal to the voltage setpoint, the PWM signal is disabled and the high-voltage side voltage is continuously monitored; when executing the first enable decision of the PWM signal in automatic control mode, if the low-voltage side voltage is less than the undervoltage threshold, the second enable decision of the PWM signal is executed, otherwise the PWM signal is disabled and the high-voltage side voltage is continuously monitored.

[0014] The first enable decision of the PWM signal includes: the PWM signal of the lower power transistor in each branch is turned on and the PWM signal of the upper power transistor is turned off; the lower freewheeling diode in each branch is turned on and the upper freewheeling diode is turned off. The second enable decision for the PWM signal includes: the PWM signal of the upper power transistor in each branch is turned on and the PWM signal of the lower power transistor is turned off; the upper freewheeling diode in each branch is turned on and the lower freewheeling diode is turned off.

[0015] The voltage closed-loop control includes a voltage regulator, a current chopper, and an output voltage detector. The difference between the given voltage and the output voltage of the energy storage converter detected by the output voltage detector is processed by the voltage regulator and the current chopper to generate a voltage command for the energy storage converter. The current closed-loop control includes a current regulator, a current chopper, and an output current detector. The difference between the given current and the output current of the energy storage converter detected by the output current detector is processed by the current regulator and the current chopper to generate a current command for the energy storage converter.

[0016] In a parallel topology of N energy storage converters, one energy storage converter is the master and the remaining N-1 energy storage converters are slaves. The master calculates the average current based on its own output current and the output current of each slave as the current reference value. The current reference value is used as the output current reference value of each energy storage converter; N is a positive integer. Inside each energy storage converter, the difference between the output current reference value and the real-time output current of each branch is used by a PI controller to obtain the output current command of each branch; the output voltage command of each branch is corrected according to the current command of each branch to obtain the output voltage reference value of each branch; the difference between the output voltage reference value of each branch and the real-time output voltage of each branch is used by a PI controller to obtain the PMW signal of the power transistor in each branch.

[0017] The present invention is also a terminal, including a processor and a storage medium; the storage medium is used to store instructions; the processor is used to perform operations according to the instructions to execute the steps of the method.

[0018] The present invention is also a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method.

[0019] The beneficial effects of this invention are as follows: compared with the prior art, at least the energy storage converter proposed in this invention supports bidirectional energy flow between the battery and the DC bus, and various operating modes can be flexibly switched, enhancing the system's adaptability. During charging, the charging current is linearly adjusted according to the high-voltage side bus voltage, thereby avoiding significant voltage fluctuations on the high-voltage side bus during battery charging. Simultaneously, voltage and current stabilization are achieved through a dual closed-loop control strategy of voltage and current, effectively improving the problems of discontinuous high-voltage side current and large pulsation in traditional bidirectional DC-DC converters for energy storage, and enhancing the overall operating performance of the system. Attached Figure Description

[0020] Figure 1 This is a topology diagram of an energy storage converter proposed in this invention; Figure 2 This is a flowchart of a control method for an energy storage converter proposed in this invention; Figure 3This invention proposes a voltage and current control loop for an energy storage converter; Figure 4 This invention proposes a hybrid current sharing controller for an energy storage converter. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of this invention. The embodiments described in this application are merely some embodiments of this invention, and not all embodiments. Based on the spirit of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this invention.

[0022] This invention proposes an energy storage converter. The circuit topology of the energy storage converter includes: n branches connected in parallel. Each branch includes an upper switching device group, a lower switching device group, and an inductor. The upper switching device group includes an upper power transistor and an upper freewheeling diode connected in parallel. The lower switching device group includes a lower power transistor and a lower freewheeling diode connected in parallel. In each branch, one end of the upper switching device group is connected to one end of the high-voltage side buffer capacitor, the other end of the upper switching device group is connected to one end of the lower switching device group and one end of the inductor, the other end of the inductor is connected to one end of the low-voltage side buffer capacitor, and the other end of the lower switching device group is connected to the other end of the high-voltage side buffer capacitor and the other end of the low-voltage side buffer capacitor.

[0023] In this embodiment, the preferred value of n is 4, and a four-way interleaved parallel buck-boost bidirectional converter topology is adopted, which has PWM phase modulation function.

[0024] like Figure 1 In the four-way interleaved parallel bidirectional buck-boost energy storage converter shown, in the first branch, the upper switching device group includes an upper power transistor Q1 and an upper freewheeling diode D1 connected in parallel, and the lower switching device group includes a lower power transistor Q2 and a lower freewheeling diode D2 connected in parallel; in the second branch, the upper switching device group includes an upper power transistor Q3 and an upper freewheeling diode D3 connected in parallel, and the lower switching device group includes a lower power transistor Q4 and a lower freewheeling diode D4 connected in parallel; in the third branch, the upper switching device group includes an upper power transistor Q5 and an upper freewheeling diode D5 connected in parallel, and the lower switching device group includes a lower power transistor Q6 and a lower freewheeling diode D6 connected in parallel; in the fourth branch, the upper switching device group includes an upper power transistor Q7 and an upper freewheeling diode D7 connected in parallel, and the lower switching device group includes a lower power transistor Q8 and a lower freewheeling diode D8 connected in parallel. One end of each of the upper power transistors Q1, Q3, Q5, and Q7 is connected to one end of the high-voltage side buffer capacitor C1. The other ends of each of the upper power transistors Q1, Q3, Q5, and Q7 are respectively connected to one end of each of the lower power transistors Q2, Q4, Q6, and Q8 and one end of each of the inductors L1, L2, L3, and L4. The other ends of each of the inductors L1, L2, L3, and L4 are connected to one end of the low-voltage side buffer capacitor C2. The other ends of each of the lower power transistors Q2, Q4, Q6, and Q8 are connected to the other ends of the high-voltage side buffer capacitor and the other ends of the low-voltage side buffer capacitor. When the energy storage converter enters charging mode, only the buck circuit operates. The PWM signal controls the upper power transistors Q1, Q3, Q5, and Q7 to turn on or off, while the lower power transistors Q2, Q4, Q6, and Q8 are off. Freewheeling diodes D2, D4, D6, and D8 are on to provide a freewheeling path, while D1, D3, D5, and D7 are off. When the energy storage converter enters discharging mode, only the boost circuit operates. The PWM signal controls the lower power transistors Q2, Q4, Q6, and Q8 to turn on or off, while the upper power transistors Q1, Q3, Q5, and Q7 are off. Freewheeling diodes D1, D3, D5, and D7 are on to provide a freewheeling path, while D2, D4, D6, and D8 are off, thus achieving bidirectional power flow.

[0025] Furthermore, the conduction signals of the four power transistors are phase-interleaved, with each transistor differing by 90°. This increases the frequency of the total harmonic current in the inductor by four times, significantly reducing the ripple rate. The phase-interleaved conduction signals of the four power transistors, with each transistor differing by 90°, mean that for power transistors on the same side (e.g., Q1, Q3, Q5, and Q7 controlled during discharge), they receive the same PWM signal waveform, i.e., the same duty cycle. However, the drive timing is staggered by 1 / 4 cycle in phase to achieve a 90° phase difference for each transistor, greatly reducing input / output current ripple. The interleaved parallel connection allows for partial cancellation of the superimposed ripple of the inductor current in each branch, significantly reducing the total current ripple on both the high-voltage and low-voltage sides. It also reduces the size and loss of filter components. With reduced current ripple, the requirements for the capacity and size of buffer capacitors C1 and C2 can be correspondingly reduced, increasing power density. Finally, it improves electromagnetic compatibility, as the current spectrum is dispersed to higher frequencies, which is beneficial for filtering and passing EMC tests.

[0026] To achieve stable bus-side voltage and long-term battery charge / discharge control, this invention also proposes a control method for a four-channel interleaved parallel energy storage converter, featuring both manual and automatic operating modes. In manual mode, it includes forced boost and forced buck functions. In automatic mode, the device's operating state is switched by detecting voltage and current and comparing them with the PI values ​​of the high and low voltage sides. like Figure 2 As shown, the method includes the following steps: Step 1: Set the control mode of the energy storage converter, including: manual control mode or automatic control mode.

[0027] Specifically, after the energy storage converter is powered on, it first performs a system self-test and parameter initialization. Users can set the control mode through the human-machine interface: manual control mode or automatic control mode. In manual control mode, users input forced boost or forced buck commands according to the on-site operating conditions; in automatic control mode, the energy storage converter defaults to charging state and monitors the voltage and current parameters of the high-voltage and low-voltage sides in real time.

[0028] Step 2: When set to manual control mode, if the user inputs a forced boost command, the first enable decision of the PWM signal is executed; if the user inputs a forced buck command, the second enable decision of the PWM signal is executed. When set to automatic control mode, if the high-voltage side voltage is less than the voltage setting value, the first enable decision of the PWM signal is executed; if the high-voltage side voltage is greater than the voltage setting value, the second enable decision of the PWM signal is executed. Furthermore, when executing the first enable decision of the PWM signal in automatic control mode, if the low-voltage side voltage is less than the undervoltage protection threshold, the second enable decision of the PWM signal is executed.

[0029] Specifically, in manual control mode, when a forced boost command is input, the energy storage converter is triggered to enter the discharge mode and execute the first enable decision of the PWM signal; when a forced buck command is input, the energy storage converter enters the charging mode and executes the second enable decision of the PWM signal.

[0030] Specifically, in automatic control mode, if the high-voltage side voltage is less than the voltage set value, the energy storage converter is triggered to enter the discharge mode and execute the first enable decision of the PWM signal; if the high-voltage side voltage is greater than the voltage set value, the energy storage converter is triggered to enter the charging mode and execute the second enable decision of the PWM signal; if the high-voltage side voltage is equal to the voltage set value, the PWM signal is disabled and the high-voltage side voltage is continuously monitored; when executing the first enable decision of the PWM signal in automatic control mode, if the low-voltage side voltage is less than the undervoltage threshold, the second enable decision of the PWM signal is executed, otherwise the PWM signal is disabled and the high-voltage side voltage is continuously monitored.

[0031] In automatic control mode, this invention comprehensively judges the deviation between the high-voltage side voltage and the voltage setpoint, as well as the battery voltage and the preset undervoltage protection threshold, to generate a PWM enable decision. In the embodiment, the high-voltage side of the energy storage converter is connected to the DC bus, the high-voltage side voltage is the DC bus voltage, and the voltage setpoint is the DC bus voltage control command.

[0032] The first enable decision of the PWM signal includes: the PWM signal of the lower power transistor in each branch is turned on and the PWM signal of the upper power transistor is turned off; the lower freewheeling diode in each branch is turned on and the upper freewheeling diode is turned off. The second enable decision for the PWM signal includes: the PWM signal of the upper power transistor in each branch is turned on and the PWM signal of the lower power transistor is turned off; the upper freewheeling diode in each branch is turned on and the lower freewheeling diode is turned off.

[0033] The activation / deactivation of the PWM signal in existing energy storage converters is typically based on a fixed mode or simple comparison. This invention proposes a deep integration of the PWM enable logic with the decision logic of manual or automatic control modes, the dynamic comparison result of the high-voltage side voltage and the voltage setpoint, and the low-voltage side undervoltage protection mechanism. This achieves intelligent linkage between the PWM control layer and the system operation state management layer. The system can automatically make decisions and switch the PWM signal transmission target based on the manual or automatic control mode, the real-time voltage deviation status that meets voltage regulation requirements, and the system safety status that meets undervoltage protection requirements. This allows the system to autonomously switch the charging and discharging modes of the energy storage converter, improving the system's adaptability and reliability.

[0034] Step 3: When executing the first enable decision of the PWM signal, the energy storage converter adopts dual closed-loop control of voltage and current; when executing the second enable decision of the PWM signal, the energy storage converter adopts voltage outer loop control, current inner loop control, and current sharing loop control.

[0035] Specifically, when the energy storage converter enters the discharge mode, the lower power transistors Q2, Q4, Q6, and Q8 are turned on or off by the PWM signal, while the upper power transistors Q1, Q3, Q5, and Q7 are not working. The freewheeling diodes D1, D3, D5, and D7 are turned on to provide a freewheeling path, while the freewheeling diodes D2, D4, D6, and D8 are turned off. This executes dual closed-loop control of voltage and current, achieving stable output voltage and current limiting protection for the output current.

[0036] Specifically, the voltage and current dual closed-loop control logic is as follows: Figure 3 As shown, the voltage closed-loop control includes a voltage regulator, a current chopper, and an output voltage detector. The difference between the given voltage and the output voltage of the energy storage converter detected by the output voltage detector is processed by the voltage regulator and the current chopper to generate a voltage command for the energy storage converter. The current closed-loop control includes a current regulator, a current chopper, and an output current detector. The difference between the given current and the output current of the energy storage converter detected by the output current detector is processed by the current regulator and the current chopper to generate a current command for the energy storage converter.

[0037] Specifically, when the energy storage converter enters the charging mode, the upper power transistors Q1, Q3, Q5, and Q7 are turned on or off via PWM signals, while the lower power transistors Q2, Q4, Q6, and Q8 are not working. The freewheeling diodes D2, D4, D6, and D8 are turned on to provide a freewheeling path, while the freewheeling diodes D1, D3, D5, and D7 are turned off. This executes outer loop voltage control and inner loop current sharing control, thereby achieving voltage regulation and precise current distribution in each branch during the charging process.

[0038] Specifically, in a parallel topology of N energy storage converters, one energy storage converter is designated as the master, and the remaining N-1 energy storage converters are designated as slaves. The master converter calculates the average current as the current reference value based on its own output current and the output currents of each slave. Current reference value N serves as the reference value for the output current of each energy storage converter, where N is a positive integer; for example... Figure 4 As shown, the output current reference value inside each energy storage converter is... Real-time output current of each branch The difference between The PI controller receives the output current adjustment commands for each branch. Each parallel module adjusts its current according to its own instructions. For their respective output voltage commands After correction, the output voltage reference value of each parallel module is obtained. The output voltage reference value of each parallel module Real-time output voltage of each parallel module The difference between The PWM signal of the power transistor in each branch is obtained through the voltage loop PI controller, which realizes automatic fine adjustment of the output voltage of each energy storage converter, ensuring that the output current of each energy storage converter is basically balanced. =2,4,……,n, where n is the number of branches and is a positive even number.

[0039] Under the first enabling decision, this invention eliminates the need for current sharing and utilizes a standard dual closed-loop system. Under the second enabling decision (corresponding to high-power discharge or multi-module parallel operation under specific modes), it automatically switches to a specific control architecture including a current sharing loop to address the issue of uneven current distribution in parallel operation, achieving an intelligent control strategy based on an on-demand switching control architecture. Specifically, the current reference value is first evenly distributed, then a command is generated through the inner current loop, and this command is used to correct the voltage loop output. This is a current sharing scheme based on current loop command correction. Placing the current sharing loop before the current loop ensures the accurate allocation of the total current reference from the outset. The inner current loop tracks quickly; each module's independent inner current loop can quickly and accurately track its respective equalization reference, achieving dynamic current sharing. The voltage reference is corrected using current commands, and the tracking error of the inner current loop (ultimately reflected in the current command value) is fed back to correct the output of the outer voltage loop. This ensures consistent current across modules while automatically fine-tuning the output voltage of each module to accommodate minor inconsistencies such as line impedance, thus coordinating the goals of current sharing and voltage regulation.

[0040] When executing the second enable decision of the PWM signal, the energy storage converter in charging mode will linearly adjust the charging current according to the high-voltage side bus voltage, thereby effectively suppressing voltage fluctuations on the high-voltage side bus and maintaining stable system operation when charging the battery. It adopts a dual-loop parallel structure, with the voltage loop ensuring stable output voltage, the current sharing loop realizing precise current distribution in each branch, the PI controller performing zero steady-state error adjustment for voltage error and current error respectively, and the PWM module converting the control signal into the duty cycle signal of the power switch.

[0041] Step 3 ensures that the PWM signal proposed in this invention is not merely a matter of "on" or "off" based on the first or second enable decision; its core control variable is the duty cycle. In this invention, the duty cycle is not fixed or given in an open loop, but is calculated in real-time by dual closed-loop control of voltage and current, or voltage outer loop control and current sharing inner loop control. This achieves precise control of voltage and current. Specifically, the voltage outer loop control ensures that the output voltage on both the high-voltage and low-voltage sides is accurately and stably maintained at the set value; the current inner loop control achieves rapid current limiting, protecting power devices and the battery, and serves as the basis for current sharing control; for the parallel current sharing loop, it ensures even current distribution among the four interleaved branches, preventing single-path overload, fully utilizing device capacity, and improving overall system reliability and power rating. Thus, by changing the PWM duty cycle, the final execution variables for the three major control objectives of "voltage stabilization," "current limiting," and "current sharing" are achieved, resulting in an advanced and precise control strategy.

[0042] The device defaults to manual boost mode and monitors the voltage and current values ​​on both the high and low voltage sides. When the high-side voltage is detected to be lower than the set PI value on the high-voltage side, the low-side PWM signal is turned on, the high-side PWM signal is turned off, and voltage and current dual closed-loop control is used for voltage regulation and current limiting, switching to buck mode. When the high-side voltage is detected to be higher than the set PI value on the high-voltage side, the low-side PWM signal is turned off, the high-side PWM signal is turned on, and voltage and current dual closed-loop control is used for voltage regulation and current limiting, switching to boost mode. In buck mode, when low-side undervoltage is detected, the low-side PWM signal is turned on, the high-side PWM signal is turned off, and voltage and current dual closed-loop control is used for voltage regulation and current limiting, switching to boost mode. The charging control aims to maintain the stability of the high-voltage bus voltage. Its strategy is to linearly adjust the charging current based on the actual value of the bus voltage. When the bus voltage is too high, the charging current is automatically reduced, thereby effectively suppressing bus voltage fluctuations.

[0043] The charging / discharging mode switching proposed in this invention employs a control strategy based on a voltage-set PI value, with the core objective of maintaining stable high-voltage bus voltage. Based on this, the system utilizes a dual closed-loop control consisting of a voltage outer loop and a current inner loop to achieve precise regulation of the output voltage and effective limitation of the output current, thereby ensuring the smoothness and safety of the dynamic process.

[0044] In the dual closed-loop control and current sharing control of this invention, the PI regulator parameters are based on a small-signal mathematical model of a four-way interleaved parallel converter topology. This ensures that the system has sufficient stability margin and good dynamic response performance across all operating modes (charging / discharging) and load ranges. The phase margin is greater than 45 degrees, and the settling time and overshoot meet design requirements. This ensures that the conduction signals of the four power transistors are phase-interleaved, with each phase differing by 90°. In practical engineering implementation, this theoretical design can be used for final fine-tuning through experimental debugging to achieve optimal dynamic and steady-state performance. The target voltage value is set according to the rated operating voltage level and safe operating range of the DC power system to which the energy storage converter is connected. These parameters are crucial for achieving the dynamic performance of "voltage and current dual closed-loop control" and "current sharing control," ensuring smooth, rapid, and error-free switching and adjustment processes.

[0045] This disclosure can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of this disclosure.

[0046] Computer-readable storage media can be tangible devices capable of holding and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example—but not limited to—electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination of the foregoing. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0047] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0048] Computer program instructions used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing the status information of the computer-readable program instructions to implement various aspects of this disclosure.

[0049] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.

Claims

1. An energy storage converter, characterized in that, include: The n branches are connected in parallel. Each branch includes an upper switching device group, a lower switching device group, and an inductor. The upper switching device group includes an upper power transistor and an upper freewheeling diode connected in parallel. The lower switching device group includes a lower power transistor and a lower freewheeling diode connected in parallel. In each branch, one end of the upper switching device group is connected to one end of the high-voltage side buffer capacitor, the other end of the upper switching device group is connected to one end of the lower switching device group and one end of the inductor, the other end of the inductor is connected to one end of the low-voltage side buffer capacitor, and the other end of the lower switching device group is connected to the other end of the high-voltage side buffer capacitor and the other end of the low-voltage side buffer capacitor. When the energy storage converter enters the discharge mode, it adopts dual closed-loop control of voltage and current; when the energy storage converter enters the charging mode, it adopts outer loop control of voltage, inner loop control of current, and current sharing loop control.

2. The energy storage converter according to claim 1, characterized in that, When connecting four branches in parallel, a four-way interleaved parallel buck-boost bidirectional transformation topology is adopted.

3. The energy storage converter according to claim 2, characterized in that, In the first branch, the upper switching device group includes an upper power transistor Q1 and an upper freewheeling diode D1 connected in parallel, and the lower switching device group includes a lower power transistor Q2 and a lower freewheeling diode D2 connected in parallel; in the second branch, the upper switching device group includes an upper power transistor Q3 and an upper freewheeling diode D3 connected in parallel, and the lower switching device group includes a lower power transistor Q4 and a lower freewheeling diode D4 connected in parallel; in the third branch, the upper switching device group includes an upper power transistor Q5 and an upper freewheeling diode D5 connected in parallel, and the lower switching device group includes a lower power transistor Q6 and a lower freewheeling diode D6 connected in parallel; in the fourth branch, the upper switching device group includes an upper power transistor Q7 and an upper freewheeling diode D7 connected in parallel, and the lower switching device group includes a lower power transistor Q8 and a lower freewheeling diode D8 connected in parallel. One end of each of the upper power transistors Q1, Q3, Q5, and Q7 is connected to one end of the high-voltage side buffer capacitor C1. The other ends of each of the upper power transistors Q1, Q3, Q5, and Q7 are respectively connected to one end of each of the lower power transistors Q2, Q4, Q6, and Q8, and one end of each of the inductors L1, L2, L3, and L4. The other ends of each of the inductors L1, L2, L3, and L4 are connected to one end of the low-voltage side buffer capacitor C2. The other ends of each of the lower power transistors Q2, Q4, Q6, and Q8 are connected to the other ends of the high-voltage side buffer capacitor and the other ends of the low-voltage side buffer capacitor.

4. The energy storage converter according to claim 3, characterized in that, When the energy storage converter enters charging mode, only the buck circuit operates. The PWM signal controls the upper power transistors Q1, Q3, Q5, and Q7 to turn on or off, while the lower power transistors Q2, Q4, Q6, and Q8 are off. Freewheeling diodes D2, D4, D6, and D8 are on to provide a freewheeling path, while D1, D3, D5, and D7 are off. When the energy storage converter enters discharging mode, only the Boost circuit operates. The PWM signal controls the lower power transistors Q2, Q4, Q6, and Q8 to turn on or off, while the upper power transistors Q1, Q3, Q5, and Q7 are off. Freewheeling diodes D1, D3, D5, and D7 are on to provide a freewheeling path, while D2, D4, D6, and D8 are off.

5. A control method for an energy storage converter, applicable to the energy storage converter according to any one of claims 1 to 4, characterized in that, include: Set the control mode of the energy storage converter, including: manual control mode or automatic control mode; When set to manual control mode, if the user inputs a forced boost command, the first enable decision of the PWM signal is executed; if the user inputs a forced buck command, the second enable decision of the PWM signal is executed. When set to automatic control mode, if the high-voltage side voltage is less than the voltage setting value, the first enable decision of the PWM signal is executed; if the high-voltage side voltage is greater than the voltage setting value, the second enable decision of the PWM signal is executed. Furthermore, when executing the first enable decision of the PWM signal in automatic control mode, if the low-voltage side voltage is less than the undervoltage protection threshold, the second enable decision of the PWM signal is executed. When executing the first enable decision of the PWM signal, the energy storage converter adopts dual closed-loop control of voltage and current; when executing the second enable decision of the PWM signal, the energy storage converter adopts voltage outer loop control, current inner loop control, and current sharing loop control.

6. The control method for the energy storage converter according to claim 5, characterized in that, In manual control mode, the user inputs a forced boost or forced buck command; in automatic control mode, the energy storage converter starts in charging mode by default and monitors the high-voltage side voltage and low-voltage side voltage in real time.

7. The control method for the energy storage converter according to claim 5, characterized in that, In manual control mode, when a forced boost command is input, the energy storage converter is triggered to enter the discharge mode and execute the first enable decision of the PWM signal; when a forced buck command is input, the energy storage converter enters the charging mode and executes the second enable decision of the PWM signal.

8. The control method for the energy storage converter according to claim 5, characterized in that, In automatic control mode, if the high-voltage side voltage is less than the voltage setpoint, the energy storage converter is triggered to enter the discharge mode and execute the first enable decision of the PWM signal; if the high-voltage side voltage is greater than the voltage setpoint, the energy storage converter is triggered to enter the charging mode and execute the second enable decision of the PWM signal; if the high-voltage side voltage is equal to the voltage setpoint, the PWM signal is disabled and the high-voltage side voltage is continuously monitored; when executing the first enable decision of the PWM signal in automatic control mode, if the low-voltage side voltage is less than the undervoltage threshold, the second enable decision of the PWM signal is executed, otherwise the PWM signal is disabled and the high-voltage side voltage is continuously monitored.

9. The control method for the energy storage converter according to claim 5, characterized in that, The first enable decision of the PWM signal includes: the PWM signal of the lower power transistor in each branch is turned on and the PWM signal of the upper power transistor is turned off; the lower freewheeling diode in each branch is turned on and the upper freewheeling diode is turned off. The second enable decision for the PWM signal includes: the PWM signal of the upper power transistor in each branch is turned on and the PWM signal of the lower power transistor is turned off; the upper freewheeling diode in each branch is turned on and the lower freewheeling diode is turned off.

10. The control method for the energy storage converter according to claim 5, characterized in that, The voltage closed-loop control includes a voltage regulator, a current chopper, and an output voltage detector. The difference between the given voltage and the output voltage of the energy storage converter detected by the output voltage detector is processed by the voltage regulator and the current chopper to generate the voltage command of the energy storage converter. The current closed-loop control includes a current regulator, a current chopper, and an output current detector. The difference between the given current and the output current of the energy storage converter detected by the output current detector is processed by the current regulator and the current chopper to generate the current command of the energy storage converter.

11. The control method for the energy storage converter according to claim 5, characterized in that, In a parallel topology of N energy storage converters, one energy storage converter is the master and the remaining N-1 energy storage converters are slaves. The master calculates the average current based on its own output current and the output current of each slave as the current reference value. The current reference value is used as the output current reference value of each energy storage converter; N is a positive integer. Inside each energy storage converter, the difference between the output current reference value and the real-time output current of each branch is used by a PI controller to obtain the output current command of each branch. The output voltage command of each branch is corrected according to the current command of each branch to obtain the output voltage reference value of each branch. The difference between the output voltage reference value of each branch and the real-time output voltage of each branch is used by the PI controller to obtain the PMW signal of the power transistor in each branch.

12. A terminal, comprising a processor and a storage medium; characterized in that: The storage medium is used to store instructions; The processor is configured to operate according to the instructions to perform the steps of the method according to any one of claims 5-11.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the program implements the steps of the method according to any one of claims 5-11.

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