Amplitude compensation method and device based on spectrum analyzer

Abstract

The application discloses a spectrum analyzer-based amplitude compensation method and device. The method comprises the following steps: before frequency sweeping starts, determining the starting frequency, stopping frequency and calibration frequency step of the current scanning frequency range, and determining the corresponding shift bit number according to the calibration frequency step, wherein the calibration frequency step is a power of 2; generating calibration data of a plurality of calibration points according to the starting frequency, stopping frequency and calibration frequency step, and storing the calibration data in a storage space accessible by an FPGA in the order of corresponding frequencies; obtaining the frequency value corresponding to the current data during frequency sweeping, and determining the calibration data index according to the frequency value corresponding to the current data and the calibration frequency step according to the upward rounding rule; reading the corresponding calibration data according to the calibration data index; and performing amplitude compensation on the current data by using the calibration data after digital down-conversion and before decimation filtering. The method can reduce the calibration data storage amount and FPGA operation resource consumption, and improve the real-time amplitude compensation accuracy during frequency sweeping of the spectrum analyzer.

Description

Technical Field

[0001] This application relates to the field of electronic measurement technology, and in particular to an amplitude compensation method and apparatus based on a spectrum analyzer. Background Technology

[0002] Frequency-based instruments such as spectrum analyzers and signal analyzers typically require amplitude compensation during operation. Ideally, the compensation frequency step should be small enough that each frequency point corresponds to a compensation value, thereby accurately reproducing the power of the measured signal. However, as the measurement frequency range increases, the amount of calibration data increases rapidly. For example, in a 40GHz bandwidth, if the compensation step is 1kHz, the amount of calibration data can reach 40 million, which will significantly increase storage resource consumption. At the same time, the frequency response of different hardware frequency bands is not consistent. For example, the low-frequency band may have steeper insertion loss variations, requiring denser calibration steps, while the high-frequency band is relatively flat and can use sparser calibration steps.

[0003] Existing spectrum analyzers typically use a superheterodyne method to convert RF signals to intermediate frequencies (IF), then an analog-to-digital converter (ADC) acquires the IF signal and sends it to a field-programmable gate array (FPGA) for digital down-conversion, decimation filtering, and other processing before finally sending it to a central processing unit (CPU) for display. If calibration values ​​are matched to the CPU based on frequency, the actual frequency correspondence may become blurred due to the decimation ratio, especially in frequency bands with large hardware frequency response fluctuations. This can easily reduce compensation accuracy. Therefore, amplitude compensation is more suitable to be completed before FPGA decimation.

[0004] Furthermore, while FPGAs are suitable for parallel and real-time processing, they consume significant resources in complex operations such as decimal multiplication and division. The frequency sweep step is typically user-defined, and can be either small or large, while the calibration data should be minimized while still meeting accuracy requirements. Therefore, how to reduce the amount of calibration data while ensuring compensation accuracy, and how to facilitate rapid acquisition of the corresponding calibration data by the FPGA, has become a pressing technical problem in this field.

[0005] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0006] This application provides an amplitude compensation method and apparatus based on a spectrum analyzer to solve the problems of large calibration data volume, difficulty in efficiently acquiring calibration data by FPGA, and frequency correspondence ambiguity caused by decimation compensation in the prior art. This reduces storage resource consumption and improves real-time amplitude compensation efficiency while ensuring compensation accuracy.

[0007] To achieve the above objectives, in a first aspect, this application provides an amplitude compensation method based on a spectrum analyzer, the method comprising: Before the frequency sweep begins, the start frequency, stop frequency, and calibration frequency step of the current scanning frequency band are determined, and the corresponding number of shift bits are determined according to the calibration frequency step. Based on the start frequency, stop frequency, and calibration frequency step, the number of calibration points in the current scanning frequency band is determined, and calibration data corresponding to multiple calibration points is generated. The number of calibration points satisfies the calculation: (stop frequency - start frequency) / calibration frequency step + 1, and the result is rounded up. The calibration data is stored in the FPGA-accessible storage space in the order of the corresponding frequencies. The spectrum analyzer is controlled to scan the current scanning frequency band. During the frequency scan, the frequency value corresponding to the current data is obtained. The frequency value corresponding to the current data is the frequency offset based on the starting frequency of the current scanning frequency band. Based on the frequency value corresponding to the current data and the calibration frequency step, the calibration data index is determined, wherein the calibration data index satisfies the following relationship: Calibration data index = (Current frequency / Calibration frequency step) - (Current frequency / Calibration frequency step); When the starting frequency of the current scanning frequency band is taken as the zero point, the calibration data index satisfies the following relationship: Calibration data index = (Current frequency / Calibration frequency step). The current frequency and the calibration frequency step are divided by shift operation, and the corresponding calibration data is read from the storage space according to the calibration data index after rounding up. The calibration data index corresponds to the calibration data position in the storage space. After digital downconversion and before decimation filtering, amplitude compensation is performed on the current data based on the read calibration data.

[0008] This method, by combining calibration frequency stepping with shift bit number, enables the FPGA to efficiently complete the frequency-to-index conversion, reducing resource consumption caused by complex multiplication and division operations and improving real-time processing capabilities. By setting amplitude compensation after digital downconversion and before decimation filtering, compensation errors caused by fuzzy frequency correspondence after decimation can be avoided, improving the accuracy of amplitude compensation. By rounding up the number of calibration points, usable calibration data can be ensured near the scan endpoint, improving the completeness of compensation coverage.

[0009] In some possible implementations, the calibration frequency step is equal to 2 raised to the power of swbit, where swbit is the number of shift bits.

[0010] In some possible implementations, the frequencies corresponding to the plurality of calibration points are: starting frequency + N × calibration frequency step, where N is an integer greater than or equal to 0 and N corresponds to the calibration data index.

[0011] In some possible implementations, the storage space is a DDR memory.

[0012] In some possible implementations, the calibration data is fixed-float data quantized from the compensated dB value.

[0013] In some possible implementations, the frequency value corresponding to the current data is updated after the frequency sweep is switched.

[0014] In some possible implementations, the step of performing amplitude compensation on the current data based on the read calibration data includes: The calibration data read is multiplied by the signal after digital down-conversion.

[0015] In some possible implementations, the spectrum analyzer employs segmented compensation for different frequency ranges, with different frequency bands corresponding to different calibration frequency steps and different shift bits.

[0016] In some possible implementations, the calibration frequency step and the number of shift bits are fixed within the same scanning frequency band; When switching scan bands, the calibration frequency step and shift number of the next scan band are redefined.

[0017] Secondly, this application provides an amplitude compensation device based on a spectrum analyzer, the device comprising: The parameter determination module is used to determine the start frequency, stop frequency, and calibration frequency step of the current scanning frequency band, and to determine the corresponding number of shift bits based on the calibration frequency step; The calibration data generation module is used to determine the number of calibration points in the current scanning frequency band and generate calibration data corresponding to multiple calibration points. The storage module is used to store data sequentially in the FPGA-accessible storage space according to the corresponding frequency. The frequency acquisition module is used to acquire the frequency value corresponding to the current data during the frequency sweep process; The index determination module is used to determine the calibration data index based on the frequency value corresponding to the current data and the calibration frequency step. The reading module is used to read the corresponding calibration data according to the calibration data index; The compensation module is used to perform amplitude compensation on the current data based on the calibration data after digital down-conversion and before decimation filtering.

[0018] The present application will be further described below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a flowchart of the amplitude compensation method based on a spectrum analyzer provided in the embodiments of this application; Detailed Implementation

[0021] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0022] Spectrum analyzers typically employ a superheterodyne architecture to convert RF signals to intermediate frequencies (IF), then an ADC acquires the IF signal and sends it to an FPGA for digital down-conversion, decimation filtering, and subsequent digital processing. Before leaving the factory, the instrument performs flatness calibration on each link. Different frequency bands have different hardware frequency responses, resulting in different calibration frequency steps; lower frequency bands generally require more intensive calibration, while higher frequency bands can have relatively sparser calibration. If an independent compensation value is set for each frequency, the amount of calibration data will increase significantly under large bandwidth conditions, consuming substantial storage resources.

[0023] If the compensation process is placed after the FPGA decimation, the actual frequency correspondence will become blurred due to the decimation ratio, especially in frequency bands with large hardware frequency response fluctuations, as the CPU receives the decimated and detected points. Therefore, this application places the amplitude compensation inside the FPGA, specifically after digital down-conversion and before decimation filtering.

[0024] like Figure 1 As shown, one embodiment provides an amplitude compensation method based on a spectrum analyzer, the method including steps S100 to S600.

[0025] S100. Before the frequency sweep begins, determine the start frequency, stop frequency, and calibration frequency step of the current scanning frequency band, and determine the corresponding number of shift bits according to the calibration frequency step.

[0026] For example, before the frequency sweep begins, the spectrum analyzer determines the start frequency, stop frequency, and calibration frequency step cstep of the current scanning frequency band based on the frequency range of the current scanning frequency band, the hardware frequency response characteristics, and the storage capacity limit, and determines the shift bit swbit corresponding to the calibration frequency step cstep.

[0027] In some embodiments, the calibration frequency step is equal to 2 raised to the power of swbit, where swbit is the number of shift bits, thus facilitating the FPGA to convert the frequency value into a calibration data index.

[0028] For example, if swbit equals 10, the frequency step is 2^10 = 0x400 (hexadecimal) = 1024 (decimal) = 1.024 kHz. If swbit equals 20, the frequency step is 2^20 = 0x100000 (hexadecimal) = 1048576 (decimal) = 1.048576 MHz.

[0029] S200. Based on the start frequency, stop frequency, and calibration frequency step, determine the number of calibration points in the current scanning frequency band, and generate calibration data corresponding to multiple calibration points. The number of calibration points satisfies the calculation: (stop frequency - start frequency) / calibration frequency step + 1, and round up. The calibration data is stored in the FPGA-accessible storage space in the order of the corresponding frequencies.

[0030] Understandably, when determining the number of calibration points in the current scanning frequency band, the purpose of rounding up is to ensure that the last point near the stop frequency also has usable calibration data, while ensuring that the starting point contains the corresponding calibration value.

[0031] In some embodiments, the spectrum analyzer calculates the frequency of each calibration point according to the following formula, wherein the frequencies corresponding to the plurality of calibration points satisfy: starting frequency + N × calibration frequency step, where N is an integer greater than or equal to 0 and N corresponds to the calibration data index.

[0032] For example, after determining the number of calibration points, the spectrum analyzer calculates the frequency of each calibration point. Then, it extracts the corresponding calibration value from a pre-set factory calibration database in the spectrum analyzer and quantizes the compensated dB value into fixed-point and floating-point data to form the calibration data used by the FPGA. The generated calibration data is sent to FPGA-accessible storage space, such as DDR memory, and stored discretely in order of corresponding frequencies.

[0033] S300: Control the spectrum analyzer to scan the current scanning frequency band, and obtain the frequency value corresponding to the current data during the frequency scanning process. The frequency value corresponding to the current data is the frequency offset based on the starting frequency of the current scanning frequency band. It is understandable that the current data refers to the data that needs to be scanned in the current frequency band.

[0034] In some embodiments, the frequency value corresponding to the current data is updated after the frequency sweep frequency is switched.

[0035] S400. Determine the calibration data index based on the frequency value corresponding to the current data and the calibration frequency step, wherein the calibration data index satisfies the following relationship: calibration data index = rounded up (current frequency / calibration frequency step) - rounded up (starting frequency / calibration frequency step); when the starting frequency of the current scanning frequency band is taken as the zero point, the calibration data index satisfies the following relationship: calibration data index = rounded up (current frequency / calibration frequency step).

[0036] S500: The current frequency and the calibration frequency step are divided by shift operation, and the corresponding calibration data is read from the storage space according to the calibration data index after rounding up. The calibration data index corresponds to the calibration data position in the storage space.

[0037] S600 performs amplitude compensation on the current data based on the read calibration data after digital down-conversion and before decimation filtering.

[0038] In some embodiments, the step of performing amplitude compensation on the current data based on the read calibration data includes: performing a multiplication operation on the read calibration data and the digitally down-converted signal.

[0039] In some embodiments, the spectrum analyzer employs segmented compensation for different frequency ranges, with different frequency bands corresponding to different calibration frequency steps and different shift numbers. Within the same scanning frequency band, the calibration frequency step and the shift number are fixed; when switching scanning frequency bands, the calibration frequency step and shift number for the next scanning frequency band are redefined.

[0040] For example, when the current scanning frequency band is finished, the current frequency band process is stopped, the calibration frequency step and shift number are re-determined for the next scanning frequency band, and the calibration data corresponding to the frequency band is regenerated or loaded. Then, steps S100 to S500 are executed again.

[0041] This amplitude compensation method based on a spectrum analyzer enables the FPGA to efficiently complete the frequency-to-index conversion by combining calibration frequency stepping with shift bit number, reducing resource consumption caused by complex multiplication and division operations and improving real-time processing capabilities. By setting the amplitude compensation after digital downconversion and before decimation filtering, compensation errors caused by fuzzy frequency correspondence after decimation can be avoided, thus improving the accuracy of amplitude compensation. By rounding up the number of calibration points, usable calibration data can be ensured near the end of the scan, improving the completeness of compensation coverage.

[0042] To make it easier to understand, a numerical example is given below.

[0043] Assuming the current frequency sweep consists of only one frequency segment, with a starting frequency of 0Hz and a stopping frequency of 1GHz, and a calibration frequency step of 2... 20 Hz, i.e. 1048576Hz. According to the aforementioned formula, the number of calibration points is: 1000000000 / 1048576+1=954.67431640625, which, after rounding up, yields 955 calibration points.

[0044] Assuming that at a certain moment during the frequency sweep process, the current frequency corresponds to the 10,000th sweep data point, and the sweep step is 1000Hz, then the current frequency is 10MHz. According to the formula: Calibration data index = rounded up (10MHz / 1048576Hz) ≈ rounded up (9.5367) = 10. Since the index starts from 0, the 11th calibration data point is read at this point, and this calibration data is used to perform multiplication compensation on the digitally down-converted signal, followed by decimation filtering.

[0045] Furthermore, the spectrum analyzer needs to compensate for different frequency ranges separately. In the low-frequency region, due to rapid changes in hardware insertion loss, a smaller calibration frequency step is used; in the high-frequency region, due to a relatively flat frequency response, a larger calibration frequency step is used. Therefore, the low-frequency and high-frequency regions can be divided into different scanning bands. A fixed calibration frequency step and shift number are set for each scanning band, and steps S100 to S500 are executed independently within each band. When entering a new frequency band, the corresponding amplitude compensation process restarts.

[0046] One embodiment provides an amplitude compensation device based on a spectrum analyzer, the device comprising: The parameter determination module is used to determine the start frequency, stop frequency, and calibration frequency step of the current scanning frequency band, and to determine the corresponding number of shift bits based on the calibration frequency step; The calibration data generation module is used to determine the number of calibration points in the current scanning frequency band and generate calibration data corresponding to multiple calibration points. The storage module is used to store data sequentially in the FPGA-accessible storage space according to the corresponding frequency. The frequency acquisition module is used to acquire the frequency value corresponding to the current data during the frequency sweep process; The index determination module is used to determine the calibration data index based on the frequency value corresponding to the current data and the calibration frequency step. The reading module is used to read the corresponding calibration data according to the calibration data index; The compensation module is used to perform amplitude compensation on the current data based on the calibration data after digital down-conversion and before decimation filtering.

[0047] It should be noted that the description of the above device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects. For technical details not disclosed in the device embodiments of this application, please refer to the description of the method embodiments of this invention for understanding.

[0048] In the description of the embodiments of this application, unless otherwise stated, " / " means "or", for example, A / B can mean A or B; "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. In addition, in the description of the embodiments of this application, "multiple" means two or more.

[0049] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0050] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0051] The terms "coupled," "connected," or "connected" in the instruction manual include both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as a connection made through an electrically conductive medium, which may have parasitic inductance or capacitance. An indirect connection may also include connections made through other active or passive devices to achieve the same or similar functional purpose, such as connections made through circuits or components such as switches or follower circuits.

[0052] In the detailed description of this specification, reference is made to the accompanying drawings, which form a part thereof, wherein like reference numerals always denote like parts, and wherein exemplary embodiments are shown by way of example that may be implemented. It should be understood that other embodiments may be utilized, and structural or logical changes may be made, without departing from the scope of this application. Therefore, the following detailed description should not be considered limiting.

[0053] The various operations in the specification may be described sequentially as multiple discrete actions or operations in a manner most conducive to understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. Various additional operations may be performed in additional embodiments and / or the described operations may be omitted.

[0054] Various components and devices may be referred to or shown in the singular (e.g., “MOS transistor”, “transistor”, “switch”, etc.) in this document, but only for the convenience of discussion, and any element referred to in the singular may include multiple such elements as taught herein.

[0055] The above description is merely a preferred embodiment of this application and does not constitute any limitation on this application. Any person skilled in the art can make many possible variations and modifications to the technical solution of this application, or modify it into equivalent embodiments, without departing from the scope of the technical solution of this application. Therefore, all equivalent changes made based on the shape, structure, and principle of this application without departing from the content of the technical solution of this application should be covered within the protection scope of this application.

Claims

1. An amplitude compensation method based on a spectrum analyzer, characterized in that, The method includes: Before the frequency sweep begins, the start frequency, stop frequency, and calibration frequency step of the current scanning frequency band are determined, and the corresponding number of shift bits are determined according to the calibration frequency step. Based on the start frequency, stop frequency, and calibration frequency step, the number of calibration points in the current scanning frequency band is determined, and calibration data corresponding to multiple calibration points is generated. The number of calibration points satisfies the calculation: (stop frequency - start frequency) / calibration frequency step + 1, and the result is rounded up. The calibration data is stored in the FPGA-accessible storage space in the order of the corresponding frequencies. The spectrum analyzer is controlled to scan the current scanning frequency band. During the frequency scan, the frequency value corresponding to the current data is obtained. The frequency value corresponding to the current data is the frequency offset based on the starting frequency of the current scanning frequency band. Based on the frequency value corresponding to the current data and the calibration frequency step, the calibration data index is determined, wherein the calibration data index satisfies the following relationship: Calibration data index = (Current frequency / Calibration frequency step) - (Current frequency / Calibration frequency step); When the starting frequency of the current scanning frequency band is taken as the zero point, the calibration data index satisfies the following relationship: Calibration data index = (Current frequency / Calibration frequency step). The current frequency and the calibration frequency step are divided by shift operation, and the corresponding calibration data is read from the storage space according to the calibration data index after rounding up. The calibration data index corresponds to the calibration data position in the storage space. After digital downconversion and before decimation filtering, amplitude compensation is performed on the current data based on the read calibration data.

2. The amplitude compensation method based on a spectrum analyzer according to claim 1, characterized in that, The calibration frequency step is equal to 2 raised to the power of swbit, where swbit is the number of shift bits.

3. The amplitude compensation method based on a spectrum analyzer according to claim 1, characterized in that, The frequencies corresponding to the multiple calibration points satisfy: starting frequency + N × calibration frequency step, where N is an integer greater than or equal to 0, and N corresponds to the calibration data index.

4. The amplitude compensation method based on a spectrum analyzer according to claim 1, characterized in that, The storage space is a DDR memory.

5. The amplitude compensation method based on a spectrum analyzer according to claim 1, characterized in that, The calibration data is fixed-point floating-point data obtained by quantization of the compensated dB value.

6. The amplitude compensation method based on a spectrum analyzer according to claim 1, characterized in that, The frequency value corresponding to the current data is updated after the frequency sweep frequency is switched.

7. The amplitude compensation method based on a spectrum analyzer according to claim 1, characterized in that, The step of performing amplitude compensation on the current data based on the read calibration data includes: The calibration data read is multiplied by the signal after digital down-conversion.

8. The amplitude compensation method based on a spectrum analyzer according to claim 1, characterized in that, The spectrum analyzer employs segmented compensation for different frequency ranges, with different frequency bands corresponding to different calibration frequency steps and different shift bits.

9. The amplitude compensation method based on a spectrum analyzer according to claim 8, characterized in that, Within the same scanning frequency band, the calibration frequency step and the number of shift bits are fixed; When switching scan bands, the calibration frequency step and shift number of the next scan band are redefined.

10. An amplitude compensation device based on a spectrum analyzer, characterized in that, The device includes: The parameter determination module is used to determine the start frequency, stop frequency, and calibration frequency step of the current scanning frequency band, and to determine the corresponding number of shift bits based on the calibration frequency step; The calibration data generation module is used to determine the number of calibration points in the current scanning frequency band and generate calibration data corresponding to multiple calibration points. The storage module is used to store data sequentially in the FPGA-accessible storage space according to the corresponding frequency. The frequency acquisition module is used to acquire the frequency value corresponding to the current data during the frequency sweep process; The index determination module is used to determine the calibration data index based on the frequency value corresponding to the current data and the calibration frequency step. The reading module is used to read the corresponding calibration data according to the calibration data index; The compensation module is used to perform amplitude compensation on the current data based on the calibration data after digital down-conversion and before decimation filtering.

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