Switched capacitor circuit and control method thereof

Abstract

The application provides a switched capacitor circuit and a control method thereof. The switched capacitor circuit comprises an input terminal, an output terminal, a first phase circuit, a second phase circuit, and a charge pump formed by an inter-phase coupling circuit. The first phase circuit and the second phase circuit each comprise two-stage flying capacitors and a plurality of switching tubes, which are respectively connected to the input terminal, the output terminal, and a reference ground through the switching tubes. The inter-phase coupling circuit comprises two cross switching tubes, which cross-connect the plate of the first-stage flying capacitor of one phase and the plate of the second-stage flying capacitor of another phase. By controlling the conduction state of each switching tube, at least two different voltage conversion ratios are output. The embodiment of the application realizes the voltage conversion output of multiple ratios by the cross-coupled two-phase two-stage charge pump structure with a small number of switching tubes, reduces the voltage stress of the flying capacitor, simplifies the control logic, and reduces the cost of the charging scheme.

Description

Technical Field

[0001] This application relates to the field of switched capacitors, and more particularly to a switched capacitor circuit and its control method. Background Technology

[0002] With the rapid development of battery charging and discharging technology and integrated circuits, the demand for high-efficiency voltage conversion in electronic devices is increasing. Charge pumps, as a type of switched-capacitor converter, are widely used in high-power charging and other scenarios due to their inductor-free operation and ease of integration.

[0003] In existing charge pump solutions, a large number of power switches are typically required to achieve various voltage conversion ratios (such as 4:1 and 2:1). On the one hand, the increase in the number of switches directly leads to an increase in chip area and cost; on the other hand, the flying capacitors in existing multi-ratio charge pump architectures often need to withstand higher voltage stress, thus requiring higher voltage ratings for the capacitors, further increasing the cost and size of the solution.

[0004] In addition, some existing solutions require complex control logic to coordinate the timing of each switch when switching between different conversion ratio modes, which increases the design difficulty of the control circuit. Summary of the Invention

[0005] This application aims to solve the problem of how to achieve charge pump outputs with multiple voltage conversion ratios with a smaller number of switching transistors.

[0006] In a first aspect, this application provides a switched capacitor circuit, comprising: a charge pump consisting of an input terminal, an output terminal, a first phase circuit, a second phase circuit, and an interphase coupling circuit connected between the first phase circuit and the second phase circuit; The first phase circuit includes a first-stage flying capacitor, a second-stage flying capacitor, and a plurality of first-phase switching transistors; among the plurality of first-phase switching transistors, at least one switching transistor is connected between the input terminal and the first plate of the first-stage flying capacitor, at least one switching transistor is connected between the second plate of the first-stage flying capacitor and the first plate of the second-stage flying capacitor, at least one switching transistor is connected between the second plate of the first-stage flying capacitor and a reference ground, at least one switching transistor is connected between the second-stage flying capacitor and the output terminal, and at least one switching transistor is connected between the second plate of the second-stage flying capacitor and a reference ground; The second phase circuit includes a third-stage flying capacitor, a fourth-stage flying capacitor, and a plurality of second-phase switching transistors; among the plurality of second-phase switching transistors, at least one switching transistor is connected between the input terminal and the first plate of the third-stage flying capacitor, at least one switching transistor is connected between the second plate of the third-stage flying capacitor and the first plate of the fourth-stage flying capacitor, at least one switching transistor is connected between the second plate of the third-stage flying capacitor and reference ground, at least one switching transistor is connected between the fourth-stage flying capacitor and the output terminal, and at least one switching transistor is connected between the second plate of the fourth-stage flying capacitor and reference ground; The phase-to-phase coupling circuit includes a first cross switch and a second cross switch; the first cross switch is connected between the first plate of the third-stage flying capacitor and the first plate of the second-stage flying capacitor; the second cross switch is connected between the first plate of the first-stage flying capacitor and the first plate of the fourth-stage flying capacitor. The switched capacitor circuit controls the conduction state of each switching transistor to achieve at least two different voltage conversion ratios from the input terminal to the output terminal.

[0007] Secondly, this application also provides a control method for a switched capacitor circuit, applied to the switched capacitor circuit as described in the first aspect, comprising: The target operating mode of the switched capacitor circuit is determined based on the target voltage conversion ratio. In the target operating mode, each switch in the switched capacitor circuit is set to the corresponding on state, which includes at least one of the following operating modes: In the first operating mode, the multiple switching transistors are divided into a first group and a second group, and the first group and the second group are controlled to conduct alternately, so that the voltage at the output terminal is one-quarter of the voltage at the input terminal; In the second operating mode, the cross switch is kept in a normally on state, and the remaining switches are alternately turned on in the first and second groups, so that the voltage at the output terminal is half of the voltage at the input terminal.

[0008] At least one advantage of the switched capacitor circuit and its control method provided in this application is that by setting a symmetrical two-phase circuit structure, configuring two stages of flying capacitors in each phase, and setting a cross-connected switching transistor between the two phases to couple the first stage flying capacitor plate of one phase to the second stage flying capacitor plate of the other phase, the circuit can achieve multiple voltage conversion ratio outputs with only a few switching transistors; at the same time, this architecture can ensure that the voltage that the flying capacitor withstands does not exceed half of the input voltage, which reduces the voltage withstand rating requirement of the capacitor and lowers the cost of the solution. Attached Figure Description

[0009] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0010] Figure 1 A circuit schematic diagram of a switched capacitor circuit provided for an embodiment of the present invention; Figure 2 A circuit schematic diagram of another switched capacitor circuit provided for an embodiment of the present invention; Figure 3 The switching transistor grouping configuration is shown when the switched capacitor circuit operates in the first operating mode; Figure 4 The equivalent circuit diagram of the switched capacitor circuit when it is operating in the first working mode, with the first group of switching transistors turned on and the second group of switching transistors turned off. Figure 5 for Figure 4 A simplified circuit diagram of the equivalent circuit shown; Figure 6 The equivalent circuit diagram of the switched capacitor circuit when it is operating in the first working mode, with the first group of switching transistors off and the second group of switching transistors on. Figure 7 for Figure 6 A simplified circuit diagram of the equivalent circuit shown; Figure 8 The switching transistor grouping configuration is shown when the switched capacitor circuit operates in the second operating mode; Figure 9 The equivalent circuit diagram for the switched capacitor circuit when it operates in the second working mode, with the first group of switching transistors turned on and the second group of switching transistors turned off. Figure 10 for Figure 9 A simplified circuit diagram of the equivalent circuit shown; Figure 11 The equivalent circuit diagram for the switched capacitor circuit when it operates in the second working mode, with the first group of switching transistors off and the second group of switching transistors on. Figure 12 for Figure 11 A simplified circuit diagram of the equivalent circuit shown; Figure 13 The switching transistor grouping configuration is shown when the switched capacitor circuit operates in the third operating mode; Figure 14 The equivalent circuit diagram for a switched capacitor circuit operating in the third operating mode; Figure 15 for Figure 14 A simplified circuit diagram of the equivalent circuit shown; Figure 16A schematic diagram of a switched capacitor circuit provided for an embodiment of the present invention; Figure 17 This is a flowchart illustrating a control method for a switched capacitor circuit provided in an embodiment of the present invention. Detailed Implementation

[0011] To facilitate understanding of this application, a more detailed description is provided below with reference to the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed to" another element, it can be directly on the other element, or one or more intermediate elements may exist between them. When an element is described as being "connected" to another element, it can be directly connected to the other element, or one or more intermediate elements may exist between them. The terms "upper," "lower," "inner," "outer," "bottom," etc., used in this specification indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0012] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0013] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0014] Figure 1 A circuit schematic diagram of a switched capacitor circuit provided for an embodiment of this application is shown below. Figure 1 As shown, the switched capacitor circuit includes a charge pump 100 consisting of an input terminal, an output terminal, a first phase circuit, a second phase circuit, and an interphase coupling circuit.

[0015] In this embodiment, the input terminal is a PMID node, and the output terminal is a VOUT node. In this embodiment, the PMID node is connected to an external power supply VBUS via an input switch Qb. The source of the input switch Qb is connected to the external power supply VBUS, and the drain of the input switch Qb is connected to the PMID node. Qb remains constantly on during charge pump operation, serving as a path control switch for the input terminal. In other embodiments, the input terminal can also be directly connected to an external power supply, i.e., the PMID node is directly connected to the external power supply VBUS without an input switch, such as... Figure 2 As shown.

[0016] The first phase circuit includes a first-stage flying capacitor CF1A, a second-stage flying capacitor CF2A, and multiple first-phase switching transistors. The second phase circuit includes a third-stage flying capacitor CF1B, a fourth-stage flying capacitor CF2B, and multiple second-phase switching transistors. The first and second phase circuits are symmetrically structured and respectively undertake the charging and discharging tasks of the charge pump in two phases during alternating operation.

[0017] The first-stage flying capacitor CF1A and the third-stage flying capacitor CF1B are located in the first voltage divider stage near the input end in their respective phase circuits, while the second-stage flying capacitor CF2A and the fourth-stage flying capacitor CF2B are located in the second voltage divider stage near the output end in their respective phase circuits. The two flying capacitors inside each phase form a switchable series voltage divider path through the switching transistor.

[0018] In the first phase circuit, multiple first phase switches connect the first-stage flying capacitor CF1A and the second-stage flying capacitor CF2A to the input terminal, the output terminal, and the reference ground, forming a charge transfer path from the input terminal to the output terminal.

[0019] Specifically, among the multiple first-phase switching transistors, at least one switching transistor is connected between the input terminal PMID and the first plate of the first-stage flying capacitor CF1A, which is switching transistor Q1A in this embodiment; at least one switching transistor is connected between the second plate of the first-stage flying capacitor CF1A and the first plate of the second-stage flying capacitor CF2A, which is switching transistor Q2A in this embodiment, forming an interstage series path between the two flying capacitors; and at least one switching transistor is connected between the second plate of the first-stage flying capacitor CF1A and the reference ground, which is switching transistor Q3A in this embodiment, and this switching transistor is the first-stage... The flying capacitor provides a ground discharge path; at least one switch is connected between the second-stage flying capacitor CF2A and the output terminal VOUT, which in this embodiment are switches Q5A and Q6A, wherein Q5A is connected between the first plate of the second-stage flying capacitor CF2A and the output terminal VOUT, and Q6A is connected between the output terminal VOUT and the second plate of the second-stage flying capacitor CF2A, together forming a bidirectional charge transfer path between the second-stage flying capacitor and the output terminal; at least one switch is connected between the second plate of the second-stage flying capacitor CF2A and the reference ground, which in this embodiment is switch Q7A.

[0020] In the second phase circuit, multiple second phase switches connect the third-stage flying capacitor CF1B and the fourth-stage flying capacitor CF2B to the input terminal, the output terminal, and the reference ground, respectively, in a connection manner symmetrical to that of the first phase circuit.

[0021] Specifically, switch Q1B is connected between the input terminal PMID and the first plate of the third-stage flying capacitor CF1B; switch Q2B is connected between the second plate of the third-stage flying capacitor CF1B and the first plate of the fourth-stage flying capacitor CF2B; switch Q3B is connected between the second plate of the third-stage flying capacitor CF1B and the reference ground; switch Q5B is connected between the first plate of the fourth-stage flying capacitor CF2B and the output terminal VOUT; switch Q6B is connected between the output terminal VOUT and the second plate of the fourth-stage flying capacitor CF2B; and switch Q7B is connected between the second plate of the fourth-stage flying capacitor CF2B and the reference ground.

[0022] The phase-to-phase coupling circuit includes a first cross-connector Q4A and a second cross-connector Q4B. The first cross-connector Q4A is connected between the first plate of the third-stage flying capacitor CF1B and the first plate of the second-stage flying capacitor CF2A, meaning Q4A bridges the first plate of the first-stage flying capacitor of the second phase to the first plate of the second-stage flying capacitor of the first phase. The second cross-connector Q4B is connected between the first plate of the first-stage flying capacitor CF1A and the first plate of the fourth-stage flying capacitor CF2B, meaning Q4B bridges the first plate of the first-stage flying capacitor of the first phase to the first plate of the second-stage flying capacitor of the second phase. This cross-connection of the first and second cross-connectors establishes a cross-stage coupling path between the two phases, allowing the same circuit topology to form different equivalent voltage divider structures under different control methods, thereby achieving outputs with various voltage conversion ratios.

[0023] In summary, the charge pump 100 in this embodiment includes 15 switching transistors (input switch Qb, first-phase switches Q1A, Q2A, Q3A, Q5A, Q6A, Q7A, second-phase switches Q1B, Q2B, Q3B, Q5B, Q6B, Q7B, and cross switches Q4A and Q4B) and 4 flying capacitors (CF1A, CF2A, CF1B, CF2B). Qb is the input path transistor, and the conduction state of the remaining 14 switching transistors is controlled by the control unit.

[0024] like Figure 16 As shown, Figure 16 This is a schematic diagram of a switched capacitor circuit provided in an embodiment of this application. The switched capacitor circuit also includes a selection unit 300 and a control unit 200. The selection unit 300 is used to determine the target operating mode of the charge pump 100 according to the target voltage conversion ratio.

[0025] The target voltage conversion ratio can be input by external commands, such as through a digital interface, hardware pin level configuration, or host computer communication protocol. In an optional implementation, the selection unit 300 can also automatically determine the target operating mode based on the ratio of the input voltage VBUS to the output voltage VOUT.

[0026] The control unit 200 generates a corresponding switch drive signal based on the mode selection signal output by the selection unit 300, and controls the conduction state of each switch in the charge pump 100.

[0027] In this embodiment, the switched capacitor circuit supports three operating modes: a first operating mode where the output voltage is one-quarter of the input voltage; a second operating mode where the output voltage is half of the input voltage; and a third operating mode where the output voltage equals the input voltage. In the first and second operating modes, the control unit 200 divides the switching transistors in the charge pump into a first group and a second group, controlling the two groups to alternately conduct in each operating cycle, with the two groups operating at 180° phase difference, thereby achieving continuous supply of output current. In the third operating mode, the control unit 200 sets the corresponding switching transistors to a normally on or normally off state, and the charge pump operates in a shoot-through mode.

[0028] In this application, the so-called working cycle refers to the complete time interval between the first group and the second group of switching transistors completing one turn-on and one turn-off cycle, that is, including a first half cycle (first group on, second group off) and a second half cycle (first group off, second group on).

[0029] In one alternative implementation, before the charge pump enters the target operating mode and is normally alternately turned on, the control unit 200 performs a soft-start pre-charge process. By using a specific switching transistor turn-on sequence, the voltage of each flying capacitor is pre-charged to a value close to the steady-state voltage of the operating mode, so as to reduce the transient current impact during the start-up phase and shorten the transition time to reach steady state.

[0030] As mentioned earlier, in the first phase circuit, two switching transistors Q5A and Q6A are placed between the second-stage flying capacitor CF2A and the output terminal VOUT. In the second phase circuit, two switching transistors Q5B and Q6B are symmetrically placed between the fourth-stage flying capacitor CF2B and the output terminal VOUT.

[0031] The following detailed explanation uses the first phase circuit as an example. In the first phase circuit, the connection between the second-stage flying capacitor CF2A and the output terminal VOUT includes two paths: The first path is formed by the first output switch Q5A, which is connected between the first plate of the second-stage flying capacitor CF2A and the output terminal VOUT. When Q5A is turned on, a low-resistance path is formed between the first plate of the second-stage flying capacitor CF2A and the output terminal VOUT. Charge can be transferred from the second-stage flying capacitor CF2A to the output terminal through this path, or a potential relationship can be established from the output terminal to the first plate of the second-stage flying capacitor CF2A under a specific operating phase.

[0032] The second path is formed by the second output switch Q6A, which is connected between the output terminal VOUT and the second plate of the second-stage flying capacitor CF2A. When Q6A is turned on, a low-impedance path is formed between the output terminal VOUT and the second plate of the second-stage flying capacitor CF2A. This path allows the second plate of the second-stage flying capacitor CF2A to participate in the charge transfer process through the output terminal.

[0033] The two paths mentioned above together form a dual-path connection structure between the second-stage flying capacitor CF2A and the output terminal VOUT. In this structure, the output terminal VOUT is located between the first and second plates of the second-stage flying capacitor CF2A in the circuit topology. The first plate is connected to VOUT via Q5A, and the second plate is connected to VOUT via Q6A.

[0034] In other words, the two plates of the second-stage flying capacitor CF2A establish switchable electrical connections with the output terminal through their respective independent switching transistors. This allows both plates of the second-stage flying capacitor to participate in charge transfer via the output terminal during the alternating operation of the charge pump. Compared to a structure that connects to the output terminal from only a single plate, the charge transfer path is more complete.

[0035] The connection method in the second phase circuit is symmetrical to that in the first phase circuit. The third output switch Q5B is connected between the first plate of the fourth-stage flying capacitor CF2B and the output terminal VOUT, and the fourth output switch Q6B is connected between the output terminal VOUT and the second plate of the fourth-stage flying capacitor CF2B. Q5B and Q6B also form a two-path connection between the fourth-stage flying capacitor CF2B and the output terminal.

[0036] As mentioned earlier, the multiple switching transistors in the first phase circuit include a first switching transistor Q1A, a second switching transistor Q2A, a third switching transistor Q3A, a fifth switching transistor Q5A, a sixth switching transistor Q6A, and a seventh switching transistor Q7A, for a total of six switching transistors. Among them, the fifth switching transistor Q5A is the aforementioned first output switching transistor, and the sixth switching transistor Q6A is the aforementioned second output switching transistor.

[0037] The second phase circuit contains six switching transistors: the eighth transistor Q1B, the ninth transistor Q2B, the tenth transistor Q3B, the eleventh transistor Q5B, the twelfth transistor Q6B, and the thirteenth transistor Q7B. Among them, the eleventh transistor Q5B is the aforementioned third output transistor, and the twelfth transistor Q6B is the aforementioned fourth output transistor.

[0038] It should be noted that "fourth" and "fourteenth" in the above numbering are not used because the first cross switch Q4A and the second cross switch Q4B in the phase-to-phase coupling circuit have been described as independent functional units and are not included in the switch numbering sequence of the first phase circuit or the second phase circuit.

[0039] Combination Figure 1 Following the signal flow from the input terminal to the reference ground, the connection relationships of each switch in the first phase circuit are described one by one. Specifically, the first switch Q1A is located between the input terminal and the first-stage flying capacitor CF1A, forming the input path of the first phase circuit. The first terminal (drain) of Q1A is connected to the input terminal PMID, and the second terminal (source) is connected to the first plate of the first-stage flying capacitor CF1A. When Q1A is turned on, the voltage at the input terminal is applied to the first plate of the first-stage flying capacitor CF1A through Q1A, providing an energy input path for the charging process of the first-stage flying capacitor.

[0040] The second switch Q2A is located between the first-stage flying capacitor CF1A and the second-stage flying capacitor CF2A, forming a series path between the two flying capacitors. The first terminal (source) of Q2A is connected to the second plate of the first-stage flying capacitor CF1A, and the second terminal (drain) is connected to the first plate of the second-stage flying capacitor CF2A. When Q2A is turned on, an electrical connection is formed between the second plate of the first-stage flying capacitor CF1A and the first plate of the second-stage flying capacitor CF2A, and the two flying capacitors form a series voltage divider structure through Q2A.

[0041] The third switch, Q3A, is located between the second plate of the first-stage flying capacitor CF1A and the reference ground, providing a ground path for the first-stage flying capacitor. The first terminal (drain) of Q3A is connected to the second plate of the first-stage flying capacitor CF1A, and the second terminal (source) is connected to the reference ground. Figure 1 As shown, the first terminal (drain) of the third switch Q3A and the first terminal (source) of the second switch Q2A are connected to the same node, namely the second plate of the first-stage flying capacitor CF1A. This means that the second plate of the first-stage flying capacitor CF1A is simultaneously connected to two switchable paths: one through Q2A to the first plate of the second-stage flying capacitor CF2A, and the other through Q3A to the reference ground. Under different operating phases, the conduction states of Q2A and Q3A are different, thus causing the second plate of the first-stage flying capacitor CF1A to be connected to different nodes at different times.

[0042] The fifth switch Q5A and the sixth switch Q6A form a two-path connection structure between the second-stage flying capacitor CF2A and the output terminal VOUT, as described in detail in the preceding embodiments. The first terminal (drain) of Q5A is connected to the first plate of the second-stage flying capacitor CF2A, and the second terminal (source) is connected to the output terminal VOUT. The first terminal (drain) of Q6A is connected to the output terminal VOUT, and the second terminal (source) is connected to the second plate of the second-stage flying capacitor CF2A.

[0043] The seventh switch, Q7A, is located between the second plate of the flying capacitor CF2A and the reference ground. The first terminal (drain) of Q7A is connected to the second plate of the flying capacitor CF2A, and the second terminal (source) is connected to the reference ground. (Example:) Figure 1 As shown, the first terminal (drain) of the seventh switch Q7A and the second terminal (source) of the sixth switch Q6A are connected to the same node, namely the second plate of the second-stage flying capacitor CF2A. Therefore, the second plate of the second-stage flying capacitor CF2A is also connected to two switchable paths: one through Q6A to the output terminal VOUT, and the other through Q7A to the reference ground.

[0044] Thus, the signal path from the input terminal PMID to the reference ground in the first phase circuit can be described as follows: PMID reaches the first plate of the first-stage flying capacitor CF1A via Q1A, the second plate of CF1A reaches the first plate of the second-stage flying capacitor CF2A via Q2A (at the same time, the second plate of CF1A can reach the reference ground via Q3A), the first plate of CF2A reaches the output terminal VOUT via Q5A, VOUT reaches the second plate of CF2A via Q6A, and the second plate of CF2A reaches the reference ground via Q7A.

[0045] The connection relationship of each switch in the second phase circuit is completely symmetrical with that in the first phase circuit. Specifically, the first terminal (drain) of the eighth switch Q1B is connected to the input terminal PMID, and the second terminal (source) is connected to the first plate of the third-stage flying capacitor CF1B.

[0046] The first terminal (source) of the ninth switch Q2B is connected to the second plate of the third-stage flying capacitor CF1B, and the second terminal (drain) is connected to the first plate of the fourth-stage flying capacitor CF2B.

[0047] The first terminal (drain) of the tenth switch Q3B is connected to the second plate of the third-stage flying capacitor CF1B, and the second terminal (source) is connected to reference ground. Similar to the first phase circuit, the first terminal (source) of Q2B and the first terminal (drain) of Q3B are both connected to the second plate of the third-stage flying capacitor CF1B.

[0048] The first terminal (drain) of the eleventh switching transistor Q5B is connected to the first plate of the fourth-stage flying capacitor CF2B, and the second terminal (source) is connected to the output terminal VOUT.

[0049] The first terminal (drain) of the twelfth switching transistor Q6B is connected to the output terminal VOUT, and the second terminal (source) is connected to the second plate of the fourth-stage flying capacitor CF2B.

[0050] The first terminal (drain) of the thirteenth switch Q7B is connected to the second plate of the fourth flying capacitor CF2B, and the second terminal (source) is connected to the reference ground.

[0051] In addition to the switching transistors inside each phase mentioned above, the first cross-switch transistor Q4A in the phase-to-phase coupling circuit is connected between the first plate of the third-stage flying capacitor CF1B and the first plate of the second-stage flying capacitor CF2A. Specifically, the first terminal (drain) of Q4A is connected to the first plate of the third-stage flying capacitor CF1B, and the second terminal (source) is connected to the first plate of the second-stage flying capacitor CF2A.

[0052] The second cross switch Q4B is connected between the first plate of the first-stage flying capacitor CF1A and the first plate of the fourth-stage flying capacitor CF2B. Specifically, the first terminal (drain) of Q4B is connected to the first plate of the first-stage flying capacitor CF1A, and the second terminal (source) is connected to the first plate of the fourth-stage flying capacitor CF2B.

[0053] like Figure 16 As shown, the switched capacitor circuit includes a charge pump 100, a control unit 200, and a selection unit 300. The input terminal of the selection unit 300 receives a selection signal for the target operating mode, and the output terminal is connected to the control unit 200. The output terminal of the control unit 200 is connected to the gate of each switching transistor in the charge pump 100, and is used to provide drive signals to control the on and off of each switching transistor.

[0054] Selection unit 300 is used to determine the target operating mode of charge pump 100 based on the target voltage conversion ratio. As mentioned earlier, the target voltage conversion ratio can be specified in various ways, such as external digital interface commands, hardware pin level configurations, or host computer communication protocols.

[0055] In this embodiment, the charge pump 100 supports three operating modes: a first operating mode where the output voltage is one-quarter of the input voltage, a second operating mode where the output voltage is half of the input voltage, and a third operating mode where the output voltage is equal to the input voltage. The selection unit 300 determines the target operating mode from these three modes based on the received target voltage conversion ratio and outputs a corresponding mode selection signal to the control unit 200.

[0056] The control unit 200 generates a switching transistor drive signal corresponding to the target operating mode based on the mode selection signal output by the selection unit 300. In the first and second operating modes, the control unit 200 divides the multiple switching transistors involved in the alternating switching in the charge pump 100 into a first group and a second group, controlling the first and second groups to alternately conduct in each operating cycle, with the first and second groups having a 180° phase difference. Specifically, in the first half of an operating cycle, the first group of switching transistors is on and the second group is off; in the second half of the cycle, the first group is off and the second group is on. The duty cycles of the two groups of switching transistors are approximately equal, each approximately 50%.

[0057] Duty cycle refers to the proportion of time a certain group of switches is in the conducting state within a working cycle. In this embodiment, the duty cycles of the first and second groups are approximately equal, each about 50%, to ensure that the two-phase circuits symmetrically undertake the charging and discharging tasks.

[0058] The two-phase alternating conduction control method ensures that a set of switches is always in the conducting state of the charge pump, thereby guaranteeing a continuous supply of output current and reducing output voltage ripple. Due to the symmetrical topology of the first-phase and second-phase circuits, when one phase is in the charging state, the other phase is in the discharging state, and the two phases alternately undertake the task of supplying charge to the output terminal.

[0059] During the transition between the first and second groups, the control unit 200 inserts a dead time between turning off the current conducting group and turning on the next conducting group. During the dead time, both groups of switches are in the off state to avoid shoot-through current caused by the simultaneous conduction of both groups of switches.

[0060] Dead time refers to the time interval during the transition between the first and second groups of switches, when both groups of switches are in the off state. Dead time is used to prevent both groups of switches from conducting simultaneously and generating shoot-through current. Its duration is usually much less than half a duty cycle and can be set according to the switching speed of the switches and the delay characteristics of the gate drive circuit.

[0061] In the third operating mode, the control unit 200 does not perform alternating switching control, but sets each switch in the charge pump 100 to a fixed normally on or normally off state, so that the charge pump operates in direct mode and the output voltage is directly equal to the input voltage.

[0062] The internal implementation of the control unit 200 can take several forms. In one embodiment, the control unit 200 includes an oscillator and a logic control circuit. The oscillator generates a clock signal at a fixed frequency, and the logic control circuit generates gate drive waveforms for each switching transistor based on a mode selection signal and the clock signal. In a first operating mode and a second operating mode, the logic control circuit divides the clock signal into two complementary drive signals to drive the first and second groups of switching transistors respectively, while inserting a dead time at the switching edges of the two signals. In a third operating mode, the logic control circuit shuts down the oscillator and directly outputs a fixed-level drive signal.

[0063] In another embodiment, the control unit 200 can also be implemented using a digital controller in conjunction with a lookup table to find the corresponding drive timing configuration according to different working modes. This application does not limit the specific internal implementation of the control unit 200.

[0064] It should be noted that the specific switching transistors in the first and second operating modes are not the same. That is, the same switching transistor may be assigned to different groups in different operating modes. This is because different conversion ratios require different equivalent voltage divider structures inside the charge pump, necessitating changes in the grouping of the switching transistors to achieve different charge transfer paths.

[0065] Figure 3 The diagram shows the switching transistor grouping configuration of the switched capacitor circuit operating in the first operating mode. In the first operating mode, the input switch Qb remains normally on, and the control unit 200 divides the remaining 14 switches in the charge pump 100 into a first group and a second group, with the two groups alternately conducting with a 180° phase difference.

[0066] The first group includes the following 7 switches: the first switch Q1A, the second switch Q2A, the tenth switch Q3B, the first cross switch Q4A, the sixth switch Q6A, the eleventh switch Q5B, and the thirteenth switch Q7B.

[0067] The second group includes the following 7 switches: the eighth switch Q1B, the ninth switch Q2B, the third switch Q3A, the second cross switch Q4B, the fifth switch Q5A, the twelfth switch Q6B, and the seventh switch Q7A.

[0068] As can be observed from the above grouping configuration, most switches are grouped according to their respective phase circuits; that is, switches of the first phase circuit are grouped into the first group, and switches of the second phase circuit are grouped into the second group. However, there are several exceptions, constituting the cross-grouping referred to in the embodiments of this application.

[0069] The first cross-grouping is reflected in the third switch Q3A and the tenth switch Q3B. Q3A is connected between the second plate of the first-stage flying capacitor CF1A in the first phase circuit and the reference ground. According to its phase circuit, it should be assigned to the first group, but it is actually assigned to the second group. Symmetrically, Q3B is connected between the second plate of the third-stage flying capacitor CF1B in the second phase circuit and the reference ground. It should be assigned to the second group, but it is actually assigned to the first group.

[0070] The significance of cross-grouping is that when the first group is on, the second plate of the first-stage flying capacitor CF1A in the first phase will not be pulled to the reference ground by Q3A (because Q3A belongs to the second group and is disconnected at this time). Instead, it is only connected to the first plate of the second-stage flying capacitor CF2A through Q2A, thus forming a series voltage divider structure between the two flying capacitors. At the same time, the second plate of the third-stage flying capacitor CF1B in the second phase is pulled to the reference ground through Q3B (belonging to the first group and is on at this time), providing a reference potential for the discharge path of the second phase.

[0071] The second cross-grouping is reflected in the cross-switch transistors Q4A and Q4B. The first cross-switch transistor Q4A is assigned to the first group, and the second cross-switch transistor Q4B is assigned to the second group. Since Q4A is connected between the first plate of the third-stage flying capacitor CF1B of the second phase and the first plate of the second-stage flying capacitor CF2A of the first phase, when Q4A is turned on with the first group, the two nodes are short-circuited, establishing a cross-phase, cross-stage charge transfer path.

[0072] Furthermore, the grouping of the fifth switch Q5A, sixth switch Q6A, seventh switch Q7A, eleventh switch Q5B, twelfth switch Q6B, and thirteenth switch Q7B does not entirely follow the "same group, same phase" rule. Q6A belongs to the first phase but is assigned to the first group; Q5A belongs to the first phase but is assigned to the second group; Q5B belongs to the second phase but is assigned to the first group; Q6B belongs to the second phase but is assigned to the second group. Q7A belongs to the first phase but is assigned to the second group; Q7B belongs to the second phase but is assigned to the first group. This grouping arrangement ensures that a complete charge transfer loop can be formed from the input to the output in each half-cycle.

[0073] Figure 4 This is the equivalent circuit diagram for a switched capacitor circuit operating in its first mode, with the first set of switches on and the second set of switches off. Figure 5 for Figure 4 The simplified circuit diagram of the equivalent circuit shown is shown.

[0074] exist Figure 4 In the diagram, R_Qb is the equivalent resistance of the input switch, R_Q1A is the equivalent resistance of the first switch Q1A, R_Q2A is the equivalent resistance of the second switch Q2A, R_Q4A is the equivalent resistance of the first crossover switch Q4A, R_Q6A is the equivalent resistance of the sixth switch Q6A, R_Q3B is the equivalent resistance of the tenth switch Q3B, R_Q5B is the equivalent resistance of the eleventh switch Q5B, and R_Q7B is the equivalent resistance of the thirteenth switch Q7B. Since the on-resistance of the switches is generally very small, in the simplified circuit diagram, each conducting switch is treated as a wire, such as... Figure 5 As shown.

[0075] When the first group is turned on, the switching transistors that are turned on are Q1A, Q2A, Q3B, Q4A, Q6A, Q5B, and Q7B. The nodes in the circuit form the following electrical connection relationship: the input terminal PMID is connected to the first plate of the first stage flying capacitor CF1A through Q1A, so the voltage of this plate is equal to VBUS.

[0076] The second plate of the first-stage flying capacitor CF1A is connected to the first plate of the second-stage flying capacitor CF2A via Q2A. Since Q3A belongs to the second group and is disconnected at this time, the second plate of CF1A is not connected to the reference ground, and the current can only flow through Q2A to the first plate of CF2A.

[0077] The first plate of the third-stage flying capacitor CF1B is connected to the first plate of the second-stage flying capacitor CF2A via Q4A. Since Q1B belongs to the second group and is disconnected at this time, the first plate of CF1B is not connected to the input terminal PMID. Therefore, the first plates of CF1B, CF1A, and CF2A are shorted to the same potential via Q2A and Q4A.

[0078] The second plate of the third-stage flying capacitor CF1B is connected to the reference ground via Q3B, so the voltage of this plate is zero.

[0079] The first plate of the fourth-stage flying capacitor CF2B is connected to the output terminal VOUT via Q5B.

[0080] The output terminal VOUT is connected to the second plate of the second-stage flying capacitor CF2A via Q6A.

[0081] The second plate of the fourth-stage flying capacitor CF2B is connected to the reference ground via Q7B, so the voltage of this plate is zero.

[0082] Based on the above connection relationship, assuming the output voltage VOUT=V, the voltage relationship of each flying capacitor can be listed: the voltage of the first plate of the fourth flying capacitor CF2B is V (connected to VOUT via Q5B), and the voltage of the second plate is zero (grounded via Q7B). Therefore, the voltage across CF2B is V.

[0083] The first plate of the second-stage flying capacitor CF2A is shorted to the first plate of CF1B and the second plate of CF1A at the same potential, let's say Vm. The voltage across the second plate of CF2A is V (connected to VOUT via Q6A), therefore the voltage across CF2A is Vm-V.

[0084] The voltage across the first plate of the third-stage flying capacitor CF1B is Vm, and the voltage across the second plate is zero (grounded via Q3B). Therefore, the voltage across CF1B is Vm.

[0085] The voltage across the first plate of the first-stage flying capacitor CF1A is VBUS (connected to the input terminal via Q1A), and the voltage across the second plate is Vm. Therefore, the voltage across CF1A is VBUS - Vm.

[0086] Figure 6 This is the equivalent circuit diagram for a switched capacitor circuit operating in its first mode, with the first set of switches off and the second set of switches on. Figure 7 for Figure 6 The simplified circuit diagram of the equivalent circuit shown is shown.

[0087] exist Figure 6 In the diagram, R_Q1B is the equivalent resistance of the eighth switch Q1B, R_Q2B is the equivalent resistance of the ninth switch Q2B, R_Q4B is the equivalent resistance of the second cross switch Q4B, R_Q6B is the equivalent resistance of the twelfth switch Q6B, R_Q3A is the equivalent resistance of the third switch Q3A, R_Q5A is the equivalent resistance of the fifth switch Q5A, and R_Q7A is the equivalent resistance of the seventh switch Q7A.

[0088] When the second group is turned on, the switching transistors are Q1B, Q2B, Q3A, Q4B, Q5A, Q6B, and Q7A. The circuit structure is completely symmetrical to that when the first group is turned on: the input terminal PMID is connected to the first plate of the third-stage flying capacitor CF1B through Q1B, and the voltage across this plate is VBUS. The second plate of CF1B is connected to the first plate of the fourth-stage flying capacitor CF2B through Q2B.

[0089] The first plate of the first-stage flying capacitor CF1A is connected to the first plate of the fourth-stage flying capacitor CF2B via Q4B, and all three are shorted to the same potential. The second plate of the first-stage flying capacitor CF1A is connected to the reference ground via Q3A.

[0090] The first plate of the second-stage flying capacitor CF2A is connected to the output terminal VOUT via Q5A. The output terminal VOUT is connected to the second plate of the fourth-stage flying capacitor CF2B via Q6B. The second plate of the second-stage flying capacitor CF2A is connected to the reference ground via Q7A.

[0091] Due to the symmetry of the circuit, the voltage relationship of each flying capacitor when the second group is conducting is consistent with that when the first group is conducting. Since the first phase circuit and the second phase circuit are symmetrical in structure, and the two groups of switching transistors are alternately conducting with the same duty cycle, the voltage of each flying capacitor should satisfy the symmetry condition in steady state: the voltage across CF1A is equal to the voltage across CF1B, and the voltage across CF2A is equal to the voltage across CF2B.

[0092] From the foregoing analysis, we know that the voltage across CF2B is V, and the voltage across CF2A is Vm-V. Due to the symmetry condition CF2A=CF2B, we get Vm-V=V, therefore Vm=2V.

[0093] The voltage across CF1B is Vm = 2V, and the voltage across CF1A is VBUS - Vm = VBUS - 2V. Due to the symmetry condition CF1A = CF1B, we get VBUS - 2V = 2V, therefore VBUS = 4V.

[0094] Therefore, the steady-state voltage relationship in the first operating mode is: output voltage VOUT = V = VBUS / 4, that is, the output voltage is one-quarter of the input voltage.

[0095] The voltage across both the first-stage flying capacitor CF1A and the third-stage flying capacitor CF1B is VBUS / 2, which is half of the input voltage.

[0096] The voltages across the second-stage flying capacitor CF2A and the fourth-stage flying capacitor CF2B are both VBUS / 4, which is one-quarter of the input voltage.

[0097] The above-described flying capacitor voltage relationship indicates that, in the first operating mode, the maximum voltage across each flying capacitor is half the input voltage, and will not exceed this value. Compared to some existing charge pump solutions where the flying capacitors need to withstand a higher proportion of the input voltage, the circuit architecture of this application effectively reduces the voltage stress on the flying capacitors, allowing the use of capacitors with lower voltage ratings, smaller size, and lower cost to achieve the same voltage conversion function.

[0098] To illustrate with a specific numerical example: when the input voltage VBUS = 20V, VOUT = 20 / 4 = 5V; the voltage across CF1A and CF1B is 20 / 2 = 10V; the voltage across CF2A and CF2B is 20 / 4 = 5V. The flying capacitor in the entire circuit withstands a maximum voltage of only 10V, which is half the input voltage.

[0099] Figure 8 The diagram shows the switching transistor grouping configuration of the switched capacitor circuit operating in the second operating mode. The key control difference between the second operating mode and the first operating mode is that the control unit 200 controls the first cross switch Q4A and the second cross switch Q4B to remain in a normally on state and no longer participate in the alternating switching.

[0100] The equivalent effect of Q4A being normally open is that the first plate of the third-stage flying capacitor CF1B and the first plate of the second-stage flying capacitor CF2A are permanently shorted to the same potential node. The equivalent effect of Q4B being normally open is that the first plate of the first-stage flying capacitor CF1A and the first plate of the fourth-stage flying capacitor CF2B are permanently shorted to the same potential node.

[0101] In the first operating mode, the two flying capacitors form a series voltage divider across phases and stages through the alternating conduction of the cross switch transistor; while in the second operating mode, the constant conduction of the cross switch transistor causes the flying capacitors to no longer form a two-stage series relationship, and instead all operate in a single-stage voltage divider state.

[0102] Due to the aforementioned changes in circuit topology, the grouping of the remaining 12 switching transistors also needs to be adjusted accordingly to ensure the formation of the correct charging and discharging path under the new equivalent topology. In the second operating mode, the input switching transistor Qb remains normally on, and the control unit 200 re-divides the remaining 12 switching transistors (excluding the normally on Q4A and Q4B) into a first group and a second group, with the two groups alternately conducting with a 180° phase difference.

[0103] The first group includes the following six switching transistors: the first switching transistor Q1A, the second switching transistor Q2A, the tenth switching transistor Q3B, the fifth switching transistor Q5A, the twelfth switching transistor Q6B, and the seventh switching transistor Q7A.

[0104] The second group includes the following six switching transistors: the eighth switching transistor Q1B, the ninth switching transistor Q2B, the third switching transistor Q3A, the eleventh switching transistor Q5B, the sixth switching transistor Q6A, and the thirteenth switching transistor Q7B.

[0105] Comparing the above groupings with the groupings in the first working mode, it can be found that the grouping assignments of Q1A / Q1B, Q2A / Q2B, and Q3A / Q3B remain unchanged in both working modes. Q1A is always in the first group, and Q1B is always in the second group; Q2A is always in the first group, and Q2B is always in the second group; Q3B is always in the first group (cross-grouping), and Q3A is always in the second group (cross-grouping).

[0106] The changes occur in three pairs of switching transistors: Q5A / Q5B, Q6A / Q6B, and Q7A / Q7B. Taking Q5A as an example, in the first operating mode, Q5A belongs to the second group, while in the second operating mode, Q5A is moved to the first group. Q6A belongs to the first group in the first operating mode and is moved to the second group in the second operating mode. Q7A belongs to the second group in the first operating mode and is moved to the first group in the second operating mode. The changes in Q5B, Q6B, and Q7B are symmetrical.

[0107] The reason for the grouping adjustment is that after Q4A and Q4B are normally connected, the first plate of the second-stage flying capacitor CF2A is permanently shorted to the first plate of the third-stage flying capacitor CF1B, and the first plate of the fourth-stage flying capacitor CF2B is permanently shorted to the first plate of the first-stage flying capacitor CF1A. Under the new topology, the potential change patterns of the flying capacitor plates connected to Q5, Q6, and Q7 differ from those in the first operating mode, and they need to be switched to the opposite grouping to maintain the correct charging and discharging sequence.

[0108] Figure 9 This is the equivalent circuit diagram for the switched capacitor circuit operating in the second working mode, with the first set of switches turned on and the second set of switches turned off. Figure 10 for Figure 9The simplified circuit diagram of the equivalent circuit shown is shown. The switching transistors that are conducting at this time include normally conducting transistors Q4A and Q4B, as well as Q1A, Q2A, Q3B, Q5A, Q6B, and Q7A of the first group.

[0109] During this half-cycle, the nodes form the following electrical connections: the input terminal PMID is connected to the first plate of the first-stage flying capacitor CF1A via Q1A. Since Q4B is always on, the first plate of CF1A is also connected to the first plate of the fourth-stage flying capacitor CF2B, and both have the same voltage, VBUS.

[0110] The second plate of the first-stage flying capacitor CF1A is connected to the first plate of the second-stage flying capacitor CF2A via Q2A. Since Q4A is normally on, the first plate of CF2A is also connected to the first plate of the third-stage flying capacitor CF1B. Furthermore, because Q5A is on, the above connections are further connected to the output terminal VOUT. Therefore, the second plate of CF1A, the first plate of CF2A, the first plate of CF1B, and the output terminal VOUT are all shorted to the same potential, VOUT.

[0111] The second plate of the third-stage flying capacitor CF1B is connected to the reference ground via Q3B, and the voltage is zero.

[0112] The output terminal VOUT is connected to the second plate of the fourth-stage flying capacitor CF2B through Q6B, so the voltage of the second plate of CF2B is VOUT.

[0113] The second plate of the second-stage flying capacitor CF2A is connected to the reference ground via Q7A, and the voltage is zero.

[0114] Based on the above connection relationship, let VOUT=V, the voltage of each flying capacitor is: First stage flying capacitor CF1A: the voltage of the first plate is VBUS, the voltage of the second plate is V, therefore the voltage across CF1A is VBUS-V.

[0115] The third-stage flying capacitor CF1B has the following voltages: the voltage across the first plate is V (short-circuited to the first plate of CF2A via Q4A, and then connected to VOUT via Q5A), and the voltage across the second plate is zero (grounded via Q3B). Therefore, the voltage across CF1B is V.

[0116] The second-stage flying capacitor CF2A has a voltage of V on the first plate and a voltage of zero on the second plate (grounded via Q7A). Therefore, the voltage across CF2A is V.

[0117] The fourth flying capacitor CF2B has the following voltages: the voltage across the first plate is VBUS (short-circuited to the first plate of CF1A via Q4B), and the voltage across the second plate is V (connected to VOUT via Q6B). Therefore, the voltage across CF2B is VBUS-V.

[0118] Figure 11 This is the equivalent circuit diagram for the switched capacitor circuit operating in the second working mode, with the first set of switches off and the second set of switches on. Figure 12 for Figure 11 The simplified circuit diagram of the equivalent circuit shown is shown. The switching transistors that are conducting at this time include normally conducting transistors Q4A and Q4B, as well as the second group of transistors Q1B, Q2B, Q3A, Q5B, Q6A, and Q7B.

[0119] The circuit structure for this half-cycle is completely symmetrical to that when the first group is on: the input terminal PMID is connected to the first plate of the third-stage flying capacitor CF1B via Q1B. Since Q4A is always on, the first plate of CF1B is also connected to the first plate of the second-stage flying capacitor CF2A, and both have the same voltage, VBUS.

[0120] The second plate of the third-stage flying capacitor CF1B is connected to the first plate of the fourth-stage flying capacitor CF2B via Q2B. Since Q4B is normally on, the first plate of CF2B is also connected to the first plate of the first-stage flying capacitor CF1A. Furthermore, because Q5B is on, the above nodes are further connected to the output terminal VOUT.

[0121] The second plate of the first-stage flying capacitor CF1A is connected to the reference ground via Q3A. The output terminal VOUT is connected to the second plate of the second-stage flying capacitor CF2A via Q6A. The second plate of the fourth-stage flying capacitor CF2B is connected to the reference ground via Q7B.

[0122] Due to the symmetry of the circuit, the voltage relationship of each flying capacitor when the second group is turned on is the same as that when the first group is turned on.

[0123] Due to the symmetry condition, the voltage across CF1A should be equal to the voltage across CF1B, and the voltage across CF2A should be equal to the voltage across CF2B.

[0124] Based on the previous analysis: the voltage across CF1A is VBUS-V, and the voltage across CF1B is V. Due to the symmetry condition CF1A=CF1B, we get VBUS-V=V, therefore VBUS=2V.

[0125] Therefore, the steady-state voltage relationship in the second operating mode is: output voltage VOUT = V = VBUS / 2, that is, the output voltage is half of the input voltage.

[0126] Further verification can be made: the voltage across CF2A is V=VBUS / 2, and the voltage across CF2B is VBUS-V=VBUS / 2. Therefore, in the second operating mode, the voltage across the four flying capacitors CF1A, CF1B, CF2A, and CF2B is all VBUS / 2, which is half of the input voltage.

[0127] Compared to the first operating mode, the voltage stress on each flying capacitor is more uniform in the second operating mode. All four flying capacitors bear the same voltage, and there is no difference between the first-stage flying capacitor (VBUS / 2) and the second-stage flying capacitor (VBUS / 4) in the first operating mode.

[0128] Figure 13 The diagram shows the switching transistor grouping configuration of the switched capacitor circuit operating in the third operating mode. Unlike the first and second operating modes, there is no switching process of the two groups of switching transistors being turned on alternately in the third operating mode. The control unit 200 sets all switching transistors to a fixed normally on or normally off state, and the charge pump is in a static operating state.

[0129] The following switches remain in the normally on state: input switch Qb, first switch Q1A, eighth switch Q1B, third switch Q3A, tenth switch Q3B, first cross switch Q4A, second cross switch Q4B, fifth switch Q5A, eleventh switch Q5B, seventh switch Q7A, and thirteenth switch Q7B.

[0130] The following switches remain in the normally off state: the second switch Q2A, the ninth switch Q2B, the sixth switch Q6A, and the twelfth switch Q6B.

[0131] Q2A and Q2B are series switches between two flying capacitors. If they are turned on, a series voltage divider path will form between the flying capacitors, causing the output voltage to be lower than the input voltage, thus failing to achieve a 1:1 direct pass. Q6A and Q6B are switches between the output terminal and the second plate of the second-stage flying capacitor. This plate is connected to the reference ground through either Q7A or Q7B. If Q6A or Q6B is turned on, the output terminal will form a ground discharge path through the flying capacitor and the grounding transistor, affecting the output voltage. Therefore, in the third operating mode, Q2A, Q2B, Q6A, and Q6B must be kept normally off to cut off the aforementioned unnecessary electrical paths.

[0132] Figure 14 This is the equivalent circuit diagram of a switched capacitor circuit operating in the third operating mode. Figure 15 for Figure 14 The simplified circuit diagram of the equivalent circuit shown is presented. In the equivalent circuit diagram, normally on switches are represented by their equivalent internal resistance, and normally off switches are considered open circuits.

[0133] In the third operating mode, since Q2A and Q2B are normally off, the second plate of the first-stage flying capacitor CF1A is disconnected from the first plate of the second-stage flying capacitor CF2A, and the second plate of the third-stage flying capacitor CF1B is disconnected from the first plate of the fourth-stage flying capacitor CF2B. Simultaneously, since Q6A and Q6B are normally off, the output terminal VOUT is disconnected from the second plate of the second-stage flying capacitor CF2A, and the output terminal VOUT is disconnected from the second plate of the fourth-stage flying capacitor CF2B. Therefore, all four flying capacitors are isolated from the main path and do not participate in voltage transformation.

[0134] There are two parallel direct paths from the input terminal PMID to the output terminal VOUT: The first path: PMID reaches the first plate of the first-stage flying capacitor CF1A via Q1A, and this plate reaches the first plate of the fourth-stage flying capacitor CF2B via Q4B (normally open), and this plate reaches the output terminal VOUT via Q5B.

[0135] The second path: PMID reaches the first plate of the third-stage flying capacitor CF1B via Q1B, and this plate reaches the first plate of the second-stage flying capacitor CF2A via Q4A (normally open), and this plate reaches the output terminal VOUT via Q5A.

[0136] The two paths operate in parallel, sharing the current transfer from the input to the output. Since three conducting transistors are connected in series in each path, the equivalent on-resistance of the two paths in parallel is approximately half that of a single path, which helps reduce path losses.

[0137] In both of the above paths, although the current passes through the first plate node of the flying capacitor, the flying capacitor itself does not form a charging and discharging circuit. The second plate of CF1A is grounded through Q3A and disconnected by Q2A. CF1A exists only as a node in the path, and its two ends do not carry an effective voltage transformation function. The situations of CF1B, CF2A, and CF2B are similar.

[0138] Therefore, in the third operating mode, the output voltage VOUT equals the input voltage VBUS, with only the equivalent internal resistance voltage drop of the conducting switch present. Since the on-resistance of the switch is generally very small, this voltage drop can usually be ignored, and VOUT≈VBUS.

[0139] It should be noted that in the third operating mode, since Q1A, Q1B, Q5A, and Q5B are normally on, pulling the first plate of each flying capacitor to VBUS or close to VBUS, while Q3A, Q3B, Q7A, and Q7B are normally on, pulling the second plate of each flying capacitor to reference ground, the voltage across all four flying capacitors will be established to close to VBUS in steady state. The third operating mode is typically used in scenarios where the difference between the input voltage (VBUS) and the output voltage (battery voltage) is small, such as when the battery is nearing full charge. At this time, VBUS is at a low level, and the voltage across the flying capacitors remains within the safe withstand voltage range of the capacitor components.

[0140] Another technical advantage of the above-mentioned constant-current configuration is that when switching from the third operating mode to the first or second operating mode, since the flying capacitor has been preset to a voltage close to VBUS, the transient current surge caused by the large difference between the flying capacitor voltage and the target mode steady-state voltage can be effectively suppressed, thereby improving the smoothness of mode switching.

[0141] Based on the switched capacitor circuit provided in any of the above embodiments, this invention also provides a control method for the switched capacitor circuit, the flowchart of which is shown below. Figure 17 As shown, the specific steps include the following: Step S100: Determine the target operating mode of the switched capacitor circuit based on the target voltage conversion ratio.

[0142] Based on the target voltage conversion ratio input from the external source, a target operating mode is determined from a variety of preset operating modes. The target voltage conversion ratio represents the desired ratio between the output voltage and the input voltage. This ratio is determined by external requirements; that is, there is a requirement for the charge pump to achieve a certain output-to-input voltage ratio, and the corresponding operating mode is selected based on this requirement.

[0143] In this embodiment, at least one of the following three target operating modes is supported: when the target voltage conversion ratio is one-quarter, the target operating mode is determined as the first operating mode, so that the output voltage is one-quarter of the input voltage.

[0144] When the target voltage conversion ratio is half, the target operating mode is determined to be the second operating mode, so that the output voltage is half of the input voltage.

[0145] When the target voltage conversion ratio is one, the target operating mode is determined to be the third operating mode, so that the output voltage is equal to the input voltage.

[0146] There are several ways to obtain the target voltage conversion ratio. In one implementation, the target voltage conversion ratio is input as a command via an external digital interface, for example, a mode selection command is sent from a host computer to a control unit.

[0147] In another implementation, the target voltage conversion ratio is specified by the level configuration of the hardware pins, for example, by encoding three modes by combining high and low levels of two pins.

[0148] In another implementation, the target voltage conversion ratio is transmitted to the control unit via a host computer communication protocol (such as I2C or SPI).

[0149] In another alternative implementation, the target voltage conversion ratio can also be automatically determined based on the actual ratio of the input voltage to the output voltage. For example, when the input voltage is detected to be approximately four times the output voltage (i.e., the battery voltage), a first operating mode is automatically selected; when it is detected to be approximately twice the output voltage, a second operating mode is automatically selected; and when it is detected to be approximately one time the output voltage, a third operating mode is automatically selected. This application does not limit the specific method for obtaining the target voltage conversion ratio.

[0150] Step S200: In the target operating mode, set each switching transistor in the switched capacitor circuit to the corresponding on state.

[0151] Based on the determined target operating mode, each switch in the switched capacitor circuit is set to the corresponding on state. Different operating modes correspond to different on state configurations, specifically including at least one of the following operating modes.

[0152] When the target operating mode is the first operating mode, step S200 performs the following control operation: Step S210: Divide the multiple switching transistors in the switched capacitor circuit into a first group and a second group.

[0153] As described in the aforementioned specific embodiments, the first group includes: a switch Q1A in the first phase circuit connecting the input terminal to the first plate of the first-stage flying capacitor CF1A; a switch Q2A in the first phase circuit connecting the second plate of the first-stage flying capacitor CF1A to the first plate of the second-stage flying capacitor CF2A; a switch Q3B in the second phase circuit connecting the second plate of the third-stage flying capacitor CF1B to the reference ground; a first cross switch Q4A; a switch Q6A in the first phase circuit connecting the output terminal VOUT to the second plate of the second-stage flying capacitor CF2A; a switch Q5B in the second phase circuit connecting the first plate of the fourth-stage flying capacitor CF2B to the output terminal VOUT; and a switch Q7B in the second phase circuit connecting the second plate of the fourth-stage flying capacitor CF2B to the reference ground.

[0154] The second group includes: a switch Q1B in the second phase circuit connecting the input terminal to the first plate of the third-stage flying capacitor CF1B; a switch Q2B in the second phase circuit connecting the second plate of the third-stage flying capacitor CF1B to the first plate of the fourth-stage flying capacitor CF2B; a switch Q3A in the first phase circuit connecting the second plate of the first-stage flying capacitor CF1A to the reference ground; a second cross switch Q4B; a switch Q5A in the first phase circuit connecting the first plate of the second-stage flying capacitor CF2A to the output terminal VOUT; a switch Q6B in the second phase circuit connecting the output terminal VOUT to the second plate of the fourth-stage flying capacitor CF2B; and a switch Q7A in the first phase circuit connecting the second plate of the second-stage flying capacitor CF2A to the reference ground.

[0155] Step S220: Control the first group and the second group to conduct alternately, so that the output voltage is one-quarter of the input voltage.

[0156] Within each working cycle, the first half of the cycle controls the first group to be on and the second group to be off, while the second half of the cycle controls the first group to be off and the second group to be on. The two groups are 180° out of phase. A dead time is inserted during the transition between the two groups to ensure that both groups do not conduct simultaneously.

[0157] Through the above-described alternating conduction control, the flying capacitor of the charge pump is charged and discharged according to the equivalent circuit analyzed in the aforementioned specific implementation method. Under steady state, the voltage across the first-stage flying capacitor and the third-stage flying capacitor is half of the input voltage, the voltage across the second-stage flying capacitor and the fourth-stage flying capacitor is one-quarter of the input voltage, and the output voltage is stabilized at one-quarter of the input voltage.

[0158] When the target operating mode is the second operating mode, step S200 performs the following control operation: Step S230: Control the cross switch transistors Q4A and Q4B to remain in the normally on state.

[0159] Q4A, when normally open, permanently shorts the first plate of the third-stage flying capacitor CF1B to the first plate of the second-stage flying capacitor CF2A. Q4B, when normally open, permanently shorts the first plate of the first-stage flying capacitor CF1A to the first plate of the fourth-stage flying capacitor CF2B, thereby changing the equivalent topology inside the charge pump.

[0160] In step S240, the remaining switching transistors are divided into a first group and a second group and turned on alternately, so that the output voltage is half of the input voltage.

[0161] As described in the aforementioned specific implementation, since the cross switch no longer participates in the alternating switching, the remaining 12 switches are re-divided into a first group (Q1A, Q2A, Q3B, Q5A, Q6B, Q7A) and a second group (Q1B, Q2B, Q3A, Q5B, Q6A, Q7B), with the two groups conducting alternately with a 180° phase difference. The control unit 200 inserts a dead time at the transition moment between the two groups to ensure that the two groups do not conduct simultaneously.

[0162] Through the above control, the voltage across the four flying capacitors of the charge pump is half of the input voltage in steady state, and the output voltage is stabilized at half of the input voltage.

[0163] When the target operating mode is the third operating mode, step S200 performs the following control operation: Step S250: Control the cross switch transistors Q4A and Q4B to remain in the normally on state.

[0164] Step S260: Control the following switches in the first phase circuit and the second phase circuit to remain in the normally on state: switch Q1A connecting the input terminal to the first plate of the first-stage flying capacitor CF1A, switch Q1B connecting the input terminal to the first plate of the third-stage flying capacitor CF1B, switch Q3A connecting the second plate of the first-stage flying capacitor CF1A to the reference ground, switch Q3B connecting the second plate of the third-stage flying capacitor CF1B to the reference ground, switch Q5A connecting the first plate of the second-stage flying capacitor CF2A to the output terminal, switch Q5B connecting the first plate of the fourth-stage flying capacitor CF2B to the output terminal, switch Q7A connecting the second plate of the second-stage flying capacitor CF2A to the reference ground, and switch Q7B connecting the second plate of the fourth-stage flying capacitor CF2B to the reference ground.

[0165] Step S270: Control the following switches in the first phase circuit and the second phase circuit to remain in the off state: switch Q2A connecting the second plate of the first-stage flying capacitor CF1A and the first plate of the second-stage flying capacitor CF2A; switch Q2B connecting the second plate of the third-stage flying capacitor CF1B and the first plate of the fourth-stage flying capacitor CF2B; switch Q6A connecting the output terminal and the second plate of the second-stage flying capacitor CF2A; and switch Q6B connecting the output terminal and the second plate of the fourth-stage flying capacitor CF2B.

[0166] Through the coordination of steps S250 to S270 above, the shutdown of Q2A and Q2B cuts off the interstage series path between the two flying capacitors, and the shutdown of Q6A and Q6B cuts off the discharge path from the output terminal to the reference ground through the flying capacitors. All four flying capacitors are isolated from the main path. As analyzed in the aforementioned specific implementation method, two parallel direct paths are formed between the input terminal PMID and the output terminal VOUT, and the output voltage is equal to the input voltage.

[0167] In the third operating mode, the control unit does not perform alternating switching operations, and each switch is in a static on or off state. Therefore, there are no switching losses, only conduction losses. The two parallel direct-through paths reduce the equivalent on-resistance to half that of a single path, which is beneficial for reducing the path voltage drop in high-current applications.

[0168] In practical applications, switched capacitor circuits may need to switch between different operating modes. When the target voltage conversion ratio changes, step S100 is re-executed to determine the new target operating mode, and then step S200 is executed to set each switch to the on state corresponding to the new mode.

[0169] During mode switching, all switches can be turned off first, and after a preset safety interval, the conduction state of each switch can be reset according to the new mode configuration. This safety interval ensures that the residual charge on the flying capacitor is released or rebalanced before mode switching, avoiding excessive transient current caused by a mismatch between the flying capacitor voltage and the steady-state voltage of the new mode. The length of the safety interval can be set according to the capacitance value of the flying capacitor and the time constant of the circuit.

[0170] In another implementation, a soft-start strategy can be used, gradually increasing the duty cycle of the alternating conduction after mode switching, so that the flying capacitor voltage smoothly transitions to the steady-state value of the new mode. This application does not limit the specific transition strategy for mode switching.

[0171] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above, which are not provided in detail for the sake of brevity; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A switched capacitor circuit, characterized in that, include: A charge pump consisting of an input terminal, an output terminal, a first phase circuit, a second phase circuit, and an interphase coupling circuit connected between the first phase circuit and the second phase circuit; The first phase circuit includes a first-stage flying capacitor, a second-stage flying capacitor, and a plurality of first-phase switching transistors; among the plurality of first-phase switching transistors, at least one switching transistor is connected between the input terminal and the first plate of the first-stage flying capacitor, at least one switching transistor is connected between the second plate of the first-stage flying capacitor and the first plate of the second-stage flying capacitor, at least one switching transistor is connected between the second plate of the first-stage flying capacitor and a reference ground, at least one switching transistor is connected between the second-stage flying capacitor and the output terminal, and at least one switching transistor is connected between the second plate of the second-stage flying capacitor and a reference ground; The second phase circuit includes a third-stage flying capacitor, a fourth-stage flying capacitor, and a plurality of second-phase switching transistors; among the plurality of second-phase switching transistors, at least one switching transistor is connected between the input terminal and the first plate of the third-stage flying capacitor, at least one switching transistor is connected between the second plate of the third-stage flying capacitor and the first plate of the fourth-stage flying capacitor, at least one switching transistor is connected between the second plate of the third-stage flying capacitor and reference ground, at least one switching transistor is connected between the fourth-stage flying capacitor and the output terminal, and at least one switching transistor is connected between the second plate of the fourth-stage flying capacitor and reference ground; The phase-to-phase coupling circuit includes a first cross switch and a second cross switch; the first cross switch is connected between the first plate of the third-stage flying capacitor and the first plate of the second-stage flying capacitor; the second cross switch is connected between the first plate of the first-stage flying capacitor and the first plate of the fourth-stage flying capacitor. The switched capacitor circuit controls the conduction state of each switching transistor to achieve at least two different voltage conversion ratios from the input terminal to the output terminal.

2. The switched capacitor circuit according to claim 1, characterized in that, In the first phase circuit, the switching transistors connected between the second-stage flying capacitor and the output terminal include a first output switching transistor and a second output switching transistor; the first output switching transistor is connected between the first plate of the second-stage flying capacitor and the output terminal, and the second output switching transistor is connected between the output terminal and the second plate of the second-stage flying capacitor. In the second phase circuit, the switching transistors connected between the fourth-stage flying capacitor and the output terminal include a third output switching transistor and a fourth output switching transistor; the third output switching transistor is connected between the first plate of the fourth-stage flying capacitor and the output terminal, and the fourth output switching transistor is connected between the output terminal and the second plate of the fourth-stage flying capacitor.

3. The switched capacitor circuit according to claim 2, characterized in that, The multiple switching transistors in the first phase circuit include a first switching transistor, a second switching transistor, a third switching transistor, a fifth switching transistor, a sixth switching transistor, and a seventh switching transistor, wherein the fifth switching transistor is the first output switching transistor, and the sixth switching transistor is the second output switching transistor; The first end of the first switching transistor is connected to the input terminal, and the second end is connected to the first plate of the first flying capacitor. The first end of the second switching transistor is connected to the second plate of the first-stage flying capacitor, and the second end is connected to the first plate of the second-stage flying capacitor. The first end of the third switch is connected to the second plate of the first-stage flying capacitor, and the second end is connected to the reference ground. The first end of the fifth switching transistor is connected to the first plate of the second-stage flying capacitor, and the second end is connected to the output terminal. The first end of the sixth switch is connected to the output end, and the second end is connected to the second plate of the second-stage flying capacitor. The first end of the seventh switch is connected to the second plate of the second-stage flying capacitor, and the second end is connected to the reference ground. The multiple switching transistors in the second phase circuit include an eighth switching transistor, a ninth switching transistor, a tenth switching transistor, an eleventh switching transistor, a twelfth switching transistor, and a thirteenth switching transistor, wherein the eleventh switching transistor is the third output switching transistor, and the twelfth switching transistor is the fourth output switching transistor; The first end of the eighth switching transistor is connected to the input terminal, and the second end is connected to the first plate of the third-stage flying capacitor. The first end of the ninth switch is connected to the second plate of the third-stage flying capacitor, and the second end is connected to the first plate of the fourth-stage flying capacitor. The first terminal of the tenth switch is connected to the second plate of the third-stage flying capacitor, and the second terminal is connected to the reference ground. The first end of the eleventh switching transistor is connected to the first plate of the fourth-stage flying capacitor, and the second end is connected to the output terminal. The first end of the twelfth switching transistor is connected to the output terminal, and the second end is connected to the second plate of the fourth-stage flying capacitor. The first terminal of the thirteenth switching transistor is connected to the second plate of the fourth-stage flying capacitor, and the second terminal is connected to the reference ground.

4. The switched capacitor circuit according to claim 1, characterized in that, It also includes a control unit, which divides the multiple switching transistors in the switched capacitor circuit into a first group and a second group, controls the first group and the second group to conduct alternately in each working cycle, and the working phase of the first group and the second group is 180° apart.

5. The switched capacitor circuit according to claim 4, characterized in that, The switched capacitor circuit has a first operating mode; in the first operating mode: The first group includes: a switching transistor in the first phase circuit connecting the input terminal to the first plate of the first-stage flying capacitor; a switching transistor in the first phase circuit connecting the second plate of the first-stage flying capacitor to the first plate of the second-stage flying capacitor; a switching transistor in the second phase circuit connecting the second plate of the third-stage flying capacitor to a reference ground; a first crossover switching transistor; a switching transistor in the second phase circuit connecting the output terminal to the first plate of the fourth-stage flying capacitor; a switching transistor in the first phase circuit connecting the output terminal to the second plate of the second-stage flying capacitor; and a switching transistor in the second phase circuit connecting the second plate of the fourth-stage flying capacitor to a reference ground. The second group includes: a switching transistor in the second phase circuit connecting the input terminal to the first plate of the third-stage flying capacitor; a switching transistor in the second phase circuit connecting the second plate of the third-stage flying capacitor to the first plate of the fourth-stage flying capacitor; a switching transistor in the first phase circuit connecting the second plate of the first-stage flying capacitor to the reference ground; a second crossover switching transistor; a switching transistor in the first phase circuit connecting the first plate of the second-stage flying capacitor to the output terminal; a switching transistor in the second phase circuit connecting the output terminal to the second plate of the fourth-stage flying capacitor; and a switching transistor in the first phase circuit connecting the second plate of the second-stage flying capacitor to the reference ground. The first group and the second group are alternately turned on, so that the voltage at the output terminal is one-quarter of the voltage at the input terminal.

6. The switched capacitor circuit according to claim 5, in the first operating mode: The voltage across the first-stage flying capacitor and the third-stage flying capacitor is half the voltage at the input terminal. The voltage across the second-stage flying capacitor and the fourth-stage flying capacitor is one-quarter of the input voltage.

7. The switched capacitor circuit according to claim 4, characterized in that, The switched capacitor circuit has a second operating mode; in the second operating mode, the voltage at the output terminal is half the voltage at the input terminal. The control unit controls the first cross switch and the second cross switch to remain in a normally on state, and divides the remaining switches into the first group and the second group to conduct alternately.

8. The switched capacitor circuit according to claim 1, characterized in that, It also includes an input switch transistor, the drain of which is connected to the input terminal, and the source of which is connected to an external power supply. The input switch transistor is kept in a normally on state.

9. The switched capacitor circuit according to claim 4, characterized in that, The switched capacitor circuit also has a third operating mode; in the third operating mode: The control unit controls the switching transistors in the first phase circuit that connect the second plate of the first-stage flying capacitor to the first plate of the second-stage flying capacitor, the switching transistors that connect the output terminal to the second plate of the second-stage flying capacitor, the switching transistors that connect the second plate of the third-stage flying capacitor to the first plate of the fourth-stage flying capacitor, and the switching transistors that connect the output terminal to the second plate of the fourth-stage flying capacitor to remain in the off state, and controls the remaining switching transistors to remain in the on state, so that the voltage at the output terminal is equal to the voltage at the input terminal.

10. A control method for a switched capacitor circuit, applied to the switched capacitor circuit as described in any one of claims 1-9, characterized in that, include: The target operating mode of the switched capacitor circuit is determined based on the target voltage conversion ratio. In the target operating mode, each switch in the switched capacitor circuit is set to the corresponding on state, which includes at least one of the following operating modes: In the first operating mode, the multiple switching transistors are divided into a first group and a second group, and the first group and the second group are controlled to conduct alternately, so that the voltage at the output terminal is one-quarter of the voltage at the input terminal; In the second operating mode, the cross switch is kept in a normally on state, and the remaining switches are alternately turned on in the first and second groups, so that the voltage at the output terminal is half of the voltage at the input terminal.

11. The control method according to claim 10, characterized in that, In the first working mode: The first group includes a switch in the first phase circuit that connects the input terminal to the first plate of the first-stage flying capacitor, a switch that connects the second plate of the first-stage flying capacitor to the first plate of the second-stage flying capacitor, a switch in the second phase circuit that connects the second plate of the third-stage flying capacitor to the reference ground, a first cross switch, a switch in the second phase circuit that connects the output terminal to the first plate of the fourth-stage flying capacitor, a switch in the first phase circuit that connects the output terminal to the second plate of the second-stage flying capacitor, and a switch in the second phase circuit that connects the second plate of the fourth-stage flying capacitor to the reference ground; The second group includes a switch in the second phase circuit that connects the input terminal to the first plate of the third-stage flying capacitor, a switch that connects the second plate of the third-stage flying capacitor to the first plate of the fourth-stage flying capacitor, a switch in the first phase circuit that connects the second plate of the first-stage flying capacitor to the reference ground, a second cross switch, a switch in the first phase circuit that connects the first plate of the second-stage flying capacitor to the output terminal, a switch in the second phase circuit that connects the output terminal to the second plate of the fourth-stage flying capacitor, and a switch in the first phase circuit that connects the second plate of the second-stage flying capacitor to the reference ground.

12. The control method according to claim 10, characterized in that, The operating mode also includes a third operating mode; in the third operating mode: In the first phase circuit, the switching transistors connecting the second plate of the first-stage flying capacitor and the first plate of the second-stage flying capacitor, the switching transistor connecting the output terminal and the second plate of the second-stage flying capacitor, the switching transistor connecting the second plate of the third-stage flying capacitor and the first plate of the fourth-stage flying capacitor, and the switching transistor connecting the output terminal and the second plate of the fourth-stage flying capacitor are kept off, while the remaining switching transistors are kept on, so that the voltage at the output terminal is equal to the voltage at the input terminal.

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