Constant on-time control method for a converter and readable medium

Abstract

This invention provides a constant on-time control method and a readable medium for a converter, relating to the field of circuit technology. The method enables stable regulation of the output DC voltage of a converter, which includes a transformer whose primary side is connected in series to a switch network containing at least two switches. A switching frequency is set for the switches to regulate the output DC voltage, the switching frequency corresponding to a switching period. The switches are modulated with a 180-degree phase difference to switch between an on and off state, and the on-time of the switches is a fixed duration, which does not exceed half of the switching period.

Description

[0001] Related applications This invention claims priority to two U.S. patent applications filed on January 14, 2025, with patent numbers 63 / 745,283 and 63 / 745,285, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of circuit technology, and more specifically to a constant on-time control method for converters and a readable medium. Background Technology

[0003] In battery charging and discharging circuits, the conversion of input DC voltage to AC voltage (i.e., grid voltage) or vice versa is very common. These circuits typically employ a two-stage topology. The first stage boosts the input DC voltage to improve the efficiency of the subsequent DC-AC conversion; this stage is usually implemented by a boost-type DC-DC converter. The second stage handles the AC-DC conversion, which is performed by an inverter. Boost-type DC-DC converters suitable for the first stage can include full-bridge or push-pull LLC resonant converters. These converters achieve voltage regulation through frequency conversion control with a fixed primary-side switch duty cycle. When using a full-bridge LLC resonant converter, the primary-side conduction losses double because there are two more primary-side switches than in a push-pull LLC resonant converter. However, if a push-pull LLC resonant converter uses frequency conversion control for effective voltage regulation, the primary-side switches need to operate at a higher switching frequency and / or a higher turn-off current, leading to increased switching losses and consequently affecting the efficiency of the DC-AC conversion. Therefore, improving the frequency conversion control scheme of DC-DC converters is of great significance. Summary of the Invention

[0004] In a first aspect, the present invention provides a constant on-time control method for a push-pull LLC converter, wherein the push-pull LLC converter includes a transformer, the primary side of which is connected to a switching network including two switching transistors Q1 and Q2, and the secondary side is connected to a rectifier via a resonant tank circuit; the primary side receives an input DC voltage, and the rectifier outputs a DC bus voltage; the constant on-time control method includes: A switching frequency is set for switching transistors Q1 and Q2 to adjust the DC bus voltage. The switching frequency corresponds to a switching period, and the switching period represents a complete operating cycle of switching transistors Q1 and Q2. Switches Q1 and Q2 are modulated to switch between an on state and an off state with a phase difference of 180 degrees, and the duration for which switches Q1 and Q2 remain in the on state is a fixed duration, which is at most half of the switching cycle.

[0005] Preferred options also include: A gate voltage is generated for each primary-side switch Q1 and Q2 by a gate driver to drive each primary-side switch to switch between an on state and an off state during the switching cycle; wherein, the primary-side switch is turned on when it receives a high gate voltage and turned off when it receives a low gate voltage.

[0006] Preferred options also include: At the beginning of the switching cycle, a high gate voltage is transmitted to the primary-side switch Q1 and maintained for a first fixed duration to drive the primary-side switch Q1 to turn on. After the first fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q1 to drive the primary-side switch Q1 to turn off; At halfway through the switching cycle, a high gate voltage is supplied to the primary-side switch Q2 and maintained for a second fixed duration, driving the primary-side switch Q2 to turn on. After the second fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q2 to drive the primary-side switch Q2 to turn off; The DC bus voltage is sampled by a voltage sensor, and the correction switching frequency of the primary-side switch is set based on the difference between the sampled DC bus voltage and the target DC bus voltage.

[0007] Preferably, the corrected switching frequency is lower than the resonant frequency of the resonant tank circuit.

[0008] Preferably, the rectifier is one of a voltage multiplier, a full-bridge rectifier, or a half-bridge rectifier.

[0009] Preferably, the push-pull LLC converter includes two transformers connected in parallel to the input DC voltage; wherein the primary side of the first transformer is connected to a switching network including primary-side switches Q1 and Q2, and the primary side of the second transformer is connected to a second switching network including primary-side switches Q3 and Q4. The gate driver generates the same gate voltage for primary-side switch Q3 as it generates for primary-side switch Q1; the gate driver generates the same gate voltage for primary-side switch Q4 as it generates for primary-side switch Q2.

[0010] Preferably, the secondary sides of the first transformer and the second transformer are coupled in series to the resonant tank circuit and the rectifier.

[0011] Preferably, the moment when the primary-side switches Q1 and Q2 switch from the on state to the off state is the moment when the peak value of the primary-side magnetizing current is equal to the switching current; wherein, the peak value of the primary-side magnetizing current is the product of the current of the transformer magnetizing inductance and the transformer turns ratio, and the switching current is the current when the primary-side switches Q1 and Q2 are on.

[0012] Preferably, during the time period from the end of the fixed duration to half the time before the end of the switching cycle, both primary-side switches Q1 and Q2 are in the off state.

[0013] Preferably, the resonant tank circuit has an inherent resonant period T, and the fixed duration is set to 0.9×T / 2 to 1.1×T / 2.

[0014] Secondly, the present invention provides a constant on-time control method for a full-bridge LLC converter, characterized in that the converter includes a transformer, the primary side of which is connected in series with a switching network including four switching transistors Q1~Q4, and the secondary side is connected to a rectifier via a resonant tank circuit; the primary side receives an input DC voltage, and the rectifier outputs a DC bus voltage; the method includes: A switching frequency is set for switching transistors Q1 and Q2 to adjust the DC bus voltage. The switching frequency corresponds to a switching period, and the switching period represents a complete operating cycle of switching transistors Q1 and Q2. Switches Q1 and Q2 are modulated to switch between an on state and an off state with a phase difference of 180 degrees, and the duration for which switches Q1 and Q2 remain in the on state is a fixed duration, which is at most half of the switching cycle. Modulate switches Q3 and Q4 to switch between on and off states; wherein the on-time of switch Q3 is longer than the fixed on-time of switch Q2, and their on-time periods overlap; the on-time of switch Q4 is longer than the fixed on-time of switch Q1, and their on-time periods overlap.

[0015] Preferred options also include: A gate driver generates a gate voltage for each primary-side switch Q1~Q4 to drive each primary-side switch to switch between an on state and an off state during the switching cycle; wherein, the primary-side switch is turned on when it receives a high gate voltage and turned off when it receives a low gate voltage.

[0016] Preferred options also include: At the beginning of the switching cycle, a high gate voltage is transmitted to the primary-side switching transistors Q2 and Q3 and maintained for a first fixed duration, driving the primary-side switching transistors Q2 and Q3 to turn on. After the first fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q2 to drive the primary-side switch Q2 to turn off, and a high gate voltage is transmitted to the primary-side switch Q3 until half of the switching cycle ends. After the first fixed duration ends, a high gate voltage is transmitted to the primary-side switch Q4 to drive the primary-side switch Q4 to turn on; At half of the switching cycle, a high gate voltage is supplied to the primary-side switch Q1 and maintained for a second fixed duration, driving the primary-side switch Q1 to turn on. After the second fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q1 to drive the primary-side switch Q1 to turn off, and a high gate voltage is transmitted to the primary-side switch Q4 until the end of the switching cycle. After the second fixed duration ends, a high gate voltage is transmitted to the primary-side switch Q3, driving the primary-side switch Q3 to turn on; The DC bus voltage is sampled by a voltage sensor, and the switching frequency of the primary-side switch is corrected based on the difference between the sampled DC bus voltage and the target DC bus voltage.

[0017] Preferably, the corrected switching frequency is lower than the resonant frequency of the resonant tank circuit.

[0018] Preferably, the rectifier is one of a voltage multiplier, a full-bridge rectifier, or a half-bridge rectifier.

[0019] Preferably, the transformer is short-circuited when both primary-side switching transistors Q3 and Q4 are in the on state.

[0020] Preferably, the converter includes two transformers connected in parallel to the input DC voltage; wherein the primary side of the first transformer is connected to a switching network including primary-side switching transistors Q1 to Q4, and the primary side of the second transformer is connected to a second switching network including primary-side switching transistors Q5 to Q8. The gate driver generates the same gate voltage for primary-side switch Q5 as it generates for primary-side switch Q1; the gate driver generates the same gate voltage for primary-side switch Q6 as it generates for primary-side switch Q2; the gate driver generates the same gate voltage for primary-side switch Q7 as it generates for primary-side switch Q3; and the gate driver generates the same gate voltage for primary-side switch Q8 as it generates for primary-side switch Q4.

[0021] Preferably, the secondary sides of the first transformer and the second transformer are connected in series to the resonant tank circuit and the rectifier.

[0022] Preferably, the moment when the primary-side switches Q1 and Q2 switch from the on state to the off state is the moment when the peak value of the primary-side excitation current is equal to the switching current; wherein, the peak value of the primary-side excitation current is the product of the current of the transformer excitation inductance and the transformer turns ratio, and the switching current is the current when the primary-side switches Q1 and Q2 are on.

[0023] Preferably, during the time period from the end of the fixed duration to half the time before the end of the switching cycle, both primary-side switches Q1 and Q2 are in the off state.

[0024] Preferably, the resonant tank has an inherent resonant period T, and the fixed duration is set to be 0.9×T / 2 to 1.1×T / 2.

[0025] In a third aspect, the present invention provides a non-transitory computer-readable medium storing machine-readable instructions, which when executed by a processor cause the processor to execute the constant on-time control method for a push-pull LLC converter as described in the first aspect, or, which when executed by the processor cause the processor to execute the constant on-time control method for a full-bridge LLC converter as described in the second aspect. Description of the Drawings

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0027] Figure 1 It is a circuit diagram of a two-stage power supply architecture for converting a battery DC voltage into an AC grid output voltage in an embodiment; Figure 2 It is a circuit diagram of a DC-AC converter with electrical isolation in a two-stage power supply architecture in an embodiment, and this converter is used to realize the conversion of a battery DC voltage to an AC grid output voltage; Figure 3 It is a current waveform diagram of a DC-DC converter with electrical isolation when the battery current is a half-sine wave in an embodiment; Figure 4A It is a circuit topology diagram of a push-pull LLC resonant converter; Figure 4B It is a circuit diagram of a push-pull LLC resonant converter with a parallel inductor; Figure 5 It is a circuit diagram of a push-pull LLC resonant converter with a voltage doubler rectifier; Figure 6A It is a gate drive signal diagram of a constant duty cycle control method in an embodiment, where the switching period Ts1 is the largest, the switching frequency Fs1 is the lowest, and the duty cycle D = 0.5; Figure 6B It is a gate drive signal diagram of a constant duty cycle control method in an embodiment, where the switching period Ts2 (Ts2 < Ts1), the switching frequency Fs2 > Fs1, and the duty cycle D = 0.5; Figure 6CIt is a gate drive signal diagram of the constant duty cycle control method in an embodiment, where the switching period Ts3 (Ts3 < Ts2), the switching frequency Fs3 > Fs2, and the duty cycle D = 0.5; Figure 7A It is a gate drive signal waveform diagram of the constant on-time control method proposed in an embodiment of the present invention, where the switching period Ts1 is the largest, the switching frequency Fs1 is the lowest, and the duty cycle D1 is the smallest; Figure 7B It is a gate drive signal waveform diagram of the constant on-time control method proposed in an embodiment of the present invention, where the switching period is Ts2 (Ts2 < Ts1), the switching frequency Fs2 > Fs1, and the duty cycle D2 > D1; Figure 7C It is a gate drive signal waveform diagram of the constant on-time control method proposed in an embodiment of the present invention, where the switching period is Ts3 (Ts3 < Ts2), the switching frequency Fs3 > Fs2, and the duty cycle D3 = 50% > D2 > D1; Figure 8A It is a simulation gate drive signal and current waveform diagram of the push - pull LLC resonant converter under the constant on-time control proposed in an embodiment of the present invention; Figure 8B It is a current path diagram of the push - pull LLC resonant converter from t0 to t1 under the constant on-time control proposed in an embodiment of the present invention; Figure 8C It is a current path diagram of the push - pull LLC resonant converter from t1 to t2 under the constant on-time control proposed in an embodiment of the present invention; Figure 8D It is a current path diagram of the push - pull LLC resonant converter from t2 to t3 under the constant on-time control proposed in an embodiment of the present invention; Figure 8E It is a current path diagram of the push - pull LLC resonant converter from t3 to t4 under the constant on-time control proposed in an embodiment of the present invention; Figure 9A It is a comparison diagram of computer simulation and simplified analysis results of the push - pull LLC resonant converter under the constant on-time control proposed in an embodiment of the present invention, where the turns ratio N = 64, the magnetizing inductance Lm = 400 μH, and the resonant inductance Lr and the resonant capacitor Cr take different values; Figure 9B It is a comparison diagram of computer simulation and simplified analysis results of the push - pull LLC resonant converter under the constant on-time control proposed in an embodiment of the present invention, where the turns ratio N = 64, the resonant inductance Lr = 40 μH, the resonant capacitor Cr = 24 nF, and the magnetizing inductance Lm takes different values; Figure 9CThe graph shows the relationship between the resonant tank gain and the ratio (Fs / Fr) of the switching frequency Fs and the resonant frequency Fr of the push-pull LLC resonant converter under the constant on-time control proposed in this embodiment of the invention. Figure 10A A comparison diagram of the peak current of the magnetizing inductor under the control of the constant duty cycle control method (D=50%) and the constant on-time control method of the present invention. Figure 10B A comparison diagram of the turn-off current of the power supply side (primary side) switching transistor of the push-pull LLC resonant converter under the control of the constant duty cycle control method (D=50%) and the constant on-time control method of the present invention. Figure 10C In sub-resonant mode, the relationship between the turn-off current ratio of constant on-time control and constant duty cycle control in this embodiment of the invention is shown in the figure. Figure 11 This is a circuit diagram of a push-pull LLC resonant converter with a split resonant capacitor and a voltage multiplier structure in one embodiment; Figure 12A The figure shows the simulation results of a push-pull LLC resonant converter under constant duty cycle control when Vb=2.6V in one embodiment. Figure 12B The figure shows the simulation results of a push-pull LLC resonant converter under constant duty cycle control when Vb=3.7V in one embodiment. Figure 12C The figure shows the simulation results of the push-pull LLC resonant converter under constant on-time control in one embodiment of the invention when Vb=2.6V. Figure 12D The figure shows the simulation results of the push-pull LLC resonant converter under constant on-time control in one embodiment of the invention when Vb=3.7V. Figure 13 This is a circuit diagram of a full-bridge LLC resonant converter with a voltage multiplier structure in one embodiment; Figure 14 This is a circuit diagram of a half-bridge LLC resonant converter with a voltage multiplier structure in one embodiment; Figure 15A This is a diagram of the gate drive signal for the constant on-time control method proposed in one embodiment of the present invention; Figure 15B This is a diagram of the gate drive signal for the constant on-time control method proposed in another embodiment of the present invention; Figure 16A This is a circuit diagram of a two-phase push-pull LLC resonant converter with the primary side in parallel and the secondary side in series, under constant on-time control as proposed in one embodiment of the present invention. Figure 16BThis is a circuit diagram of a multiphase push-pull LLC resonant converter with primary side parallel and secondary side series connection under constant on-time control, as proposed in one embodiment of the present invention. Figure 16C This is a circuit diagram of a two-phase full-bridge LLC resonant converter with parallel primary side and series secondary side under constant on-time control, as proposed in one embodiment of the present invention. Figure 17 This is a circuit diagram of a bidirectional two-phase push-pull LLC resonant converter in one embodiment; Figure 18 This is a schematic diagram of the control of a push-pull LLC converter under constant on-time control in one embodiment; Figure 19 This is a control schematic diagram of a push-pull LLC converter under constant on-time control in another embodiment. Detailed Implementation

[0028] Figure 1 A power supply circuit 100 is shown that converts a low-voltage DC battery to a high-voltage AC grid output. In power electronics, converting a low input voltage (e.g., about 3V) to a high output voltage (e.g., 300 to 400V) is common practice, and this is particularly important for battery charging and discharging devices that require converting the battery's DC voltage to AC voltage. This power supply circuit 100 achieves the conversion of the battery voltage (Vb) to the grid AC voltage (Vac) in two independent stages. The first stage boosts the battery voltage Vb to a high DC voltage (Vdc), for example, boosting it to 180V to 250V to generate 120V AC, or boosting it to 320V to 400V to generate 220V AC. The second stage inverts the DC voltage Vdc back to AC voltage; for example, the inverter output corresponds to 100V to 140V for a 120V AC grid in North America, and 200V to 240V for a 220V AC grid in Europe, Asia, and other regions. The first stage can employ a boost-type DC-DC converter, typically an LLC resonant converter or a push-pull converter. Regardless of the converter used, the first stage of the power supply circuit 100 must have a sufficient boost ratio and voltage isolation, and employ a single-stage DC-DC converter structure. For example, since the inverter in the second stage of the power supply circuit 100 requires a minimum DC input voltage Vdc to efficiently output a suitable AC voltage, its first-stage DC-DC converter must have a sufficient boost ratio to generate a higher DC output voltage Vdc (DC bus voltage) for input to the second stage. Furthermore, since the battery (Vb) of the power supply circuit 100 is connected to the AC grid or AC load through the power supply circuit 100, voltage isolation between the battery (Vb) and the AC load (Vac) voltages ensures safer and more reliable system operation. Figure 2As shown, the first-stage high-boost-ratio DC-DC converter in the power supply circuit 100 includes a transformer, which enables voltage isolation. Therefore, if the converter adopts a transformer structure, a single-stage DC-DC converter can meet the requirements.

[0029] Figure 3 A circuit 300 of an LLC resonant converter is shown, which can be used as a high boost ratio DC-DC converter in the first stage of a power supply circuit 100. This LLC resonant converter includes a full-bridge switching network consisting of four switching transistors Q1, Q2, Q3, and Q4, electrically connected to a resonant tank circuit consisting of a resonant inductor (Lr) and a resonant capacitor (Cr). A center-tapped transformer (Tr) divides the circuit 300 into two parts: the primary side includes the switching network and the resonant tank circuit, and the secondary side includes a rectifier stage with a pair of synchronous rectifier transistors (SR1 and SR2). In this embodiment, the transformer includes three windings, where the number of turns in the primary winding of the transformer Tr is denoted as Np, and the number of turns in the secondary winding is denoted as Ns1 and Ns2 (Ns1 = Ns2). The magnetizing inductance of the transformer is denoted as Lm.

[0030] Circuit 300 is an exemplary structure for an LLC converter, and other configurations of its switching network, resonant tank circuit, transformer windings, and rectifier are also feasible.

[0031] Regardless of the specific configuration of circuit 300, because an LLC converter is used to boost the battery voltage Vb, its primary side needs to withstand a large input current (ib). For example, when 300W of output power is required, when boosting the 3V battery voltage Vb to the 350V DC bus voltage Vdc, the average input current on the primary side of circuit 300 is 100A (i.e., ib_avg = 300W / 3V = 100A), and the average output current on the secondary side is 0.86A (i.e., idc = 300W / 350V = 0.86A).

[0032] Figure 3 The current waveform of the primary side of circuit 300 in resonant mode is also shown. As can be seen from the RMS current (ib_RMS) waveform, the resonant tank circuit on the primary side of this circuit must withstand a RMS current of at least 110A. The high input current ib_avg flowing through the resonant tank circuit can lead to significant and unnecessary conduction losses (conduction losses are proportional to the square of the input current), and may require bulky and expensive inductors and capacitors to meet the high input current ib_avg rating. Furthermore, because circuit 300 uses a full-bridge switching network, its conduction losses are twice that of a half-bridge switching network containing two switches. Figure 3As shown in the current waveform, due to the relationship between the root mean square (RMS) and average value of the sine wave, the ib_RMS in the resonant tank circuit will be at least 10% higher than the average current (ib_avg) on ​​the primary side of circuit 300 (ib_rms = 1.1ib_avg = 110A). Therefore, not only will the conduction losses increase significantly, but the current stress on the resonant tank circuit components will also increase. Therefore, placing the resonant tank circuit (Lr, Cr) on the secondary side of circuit 300 may be more ideal, as this would reduce the current stress on the resonant tank circuit and correspondingly reduce the current rating requirements of the resonant tank circuit components.

[0033] Figure 4A The diagram illustrates a push-pull LLC resonant converter circuit 400A in the first stage of power supply circuit 100, which can function as a high-boost DC-DC converter. Circuit 400A combines a push-pull converter grounded dual-switch topology on the primary side of transformer Tr with an LCC converter resonant tank circuit and a full-bridge switching network (as a rectifier) ​​topology on the secondary side of transformer Tr.

[0034] like Figure 4A As shown, circuit 400A includes a half-bridge switching network consisting of two switching transistors Q1 and Q2. This switching network is electrically connected to a center-tapped transformer (Tr), and the switching transistors Q1 and Q2 are connected in series with their respective primary windings of transformer Tr. In this embodiment, transformer Tr includes three windings (i.e., two primary windings and one secondary winding), wherein the number of turns of the primary windings of transformer Tr is denoted as Np1 and Np2, and the number of turns of the secondary winding is denoted as Ns. The magnetizing inductance of transformer Tr is denoted as Lm. On the secondary side of circuit 400A, a resonant tank circuit consisting of a resonant inductor (Lr) and a resonant capacitor (Cr) is connected in series with the secondary winding of transformer Tr. This resonant tank circuit is electrically connected to a full-bridge rectifier consisting of four switches (SR1, SR2, SR3, and SR4), but in other embodiments, the rectifier of circuit 400A may also use an alternative structure such as a voltage doubler rectifier. Therefore, the resonant tank circuit and rectifier on the secondary side of the 400A circuit are electrically isolated from the switching network through the transformer Tr.

[0035] Compared to circuit 300, the resonant tank circuit of circuit 400A is isolated from the high input current ib on the secondary side, thereby reducing the current stress on the resonant tank circuit components. In addition, since the primary-side switching network of circuit 400A only contains two switches (Q1, Q2), while circuit 300 requires four switches, its conduction losses are lower than those of circuit 300.

[0036] The design of the 400A circuit enables the switching transistors Q1 and Q2 to conduct at zero voltage. Thus, in the resonant mode (i.e., the resonant tank impedance is extremely small or zero), the switching transistors Q1 and Q2 can conduct when the voltage across them is zero, thereby eliminating conduction losses.

[0037] In circuit 400A, by controlling the switching frequencies of switching transistors Q1 and Q2, the output voltage Vdc can be regulated while keeping the duty cycle constant. Specifically, when the switching frequency Fs is equal to the resonance frequency Fr (i.e., in the resonance mode, Fs = Fr), the voltage gain M reaches its maximum value (denoted as "N"), and at this time M = Vdc / Vb = N. For circuit 400A, its resonance frequency is defined as: (1) However, when the switching frequency Fs is higher than the resonance frequency Fr (super-resonance mode, Fs > Fr), the voltage gain will be lower than the value of "N". This is because the resonance inductor Lr and capacitor Cr will generate inductive effects, which together with the magnetizing inductor Lm form a voltage-dividing circuit, thus causing the voltage gain to decrease.

[0038] In addition, when the switching frequency Fs is lower than the resonance frequency Fr (sub-resonance mode, Fs < Fr), due to the resonance characteristics and magnetic characteristics of the circuit, the voltage gain M remains basically constant. Therefore, in order to regulate the output voltage Vdc by controlling the voltage gain M of circuit 400A, circuit 400A must operate in the super-resonance mode because in the sub-resonance mode, the voltage gain is almost constant and effective regulation cannot be achieved. However, this operation in the super-resonance mode means that the current waveform does not drop to zero before the switching transistors Q1 and Q2 are turned off, and the switching transistors Q1 and Q2 are forced to turn off when the resonance current is still relatively large, resulting in an increase in the turn-off current and a significant increase in the switching losses of the switching transistors Q1 and Q2. Therefore, when circuit 400A regulates the output voltage Vdc outside the maximum voltage gain M, unnecessary losses will occur.

[0039] In another embodiment, to solve the problem of voltage regulation of circuit 400A in the sub-resonance mode, in Figure 4B circuit 400B as shown, an additional inductor Lp is integrated into the secondary side of the push-pull LLC resonant converter. The inductor Lp is connected in parallel with the resonant tank circuit of circuit 400B, and is connected between the rectifier and the resonance inductor Lr and resonance capacitor Cr. In some embodiments, the inductance value of the inductor Lp is approximately equal to the magnetizing inductor Lm of the transformer (Lm = Lp). Under this condition, circuit 400B can regulate the output voltage Vdc at a switching frequency lower than the resonance frequency under light load conditions, and can further reduce the switching losses, but the problem of high turn-off current still exists. In addition, compared with circuit 400A, the additional components required by circuit 400B may increase the circuit cost and cause an increase in power losses due to copper losses and core losses.

[0040] Therefore, compared to circuit 300, circuits 400A and 400B are more suitable as high-boost DC-DC converters in power supply circuit 100 due to their lower switching and conduction losses. However, as mentioned earlier, when using a "variable switching frequency - constant duty cycle" control strategy, both circuits still generate unnecessary losses, which may affect the performance and cost of power supply circuit 100. For example, circuit 400A must operate in super-resonant mode to regulate the output voltage Vdc, resulting in increased turn-off current and switching frequency of switching transistors Q1 and Q2, thereby increasing the associated switching losses; although circuit 400B reduces switching losses by increasing inductor Lp (compared to circuit 400A), the additional inductor Lp increases the cost and power consumption of power supply circuit 100.

[0041] Figure 5 The circuit diagram of circuit 500 is shown, which employs the control method proposed in this embodiment of the invention to control the constant on-time of switching transistors Q1 and Q2. As further explained below, the constant on-time control method proposed in this embodiment of the invention enables circuit 500 to achieve voltage regulation in subresonant mode, thereby reducing switching losses. Furthermore, when circuit 500 reduces switching losses under this control method, no additional components (such as the inductor Lp in circuit 400B) are required. Therefore, the reduction in switching losses described below will not result in a corresponding increase in cost and power loss due to the addition of components.

[0042] Figure 5 The topology of the circuit 500 shown is similar to Figure 4A The circuit is basically the same as that of circuit 400A, except that the full-bridge rectifier of circuit 400A is replaced by the voltage doubler rectifier in circuit 500.

[0043] exist Figure 5 In circuit 500, Q1 and Q2 each have a corresponding on-time (Ton). According to the constant on-time control method proposed for circuit 500, when the switching frequency Fs changes, the on-time (Ton) of switches Q1 and Q2 remains constant, while the switching periods (Ts) of switches Q1 and Q2 are modulated to obtain the desired voltage gain (M) in circuit 500, thereby regulating the output voltage Vdc. This constant on-time control method has the following technical advantages: it reduces the number of components required on the primary side of transformer Tr, achieves wide-range Vdc regulation in subresonant mode, minimizes the turn-off current of switches Q1 and Q2 and achieves soft switching, reduces the turns ratio of transformer Tr, and supports bidirectional operation.

[0044] For example, when constant on-time control is applied to circuit 500 to optimize output voltage Vdc regulation, the primary side of circuit 500 only requires two switching transistors Q1 and Q2 and two transformer windings Np1 and Np2, thereby minimizing primary-side conduction and switching losses. Furthermore, since constant on-time control allows circuit 500 to regulate output voltage Vdc in subresonant mode, additional components (such as the inductor Lp in circuit 400B) can be omitted.

[0045] In some implementations, constant on-time control can reduce the on- and off-currents of switches Q1 and Q2, thereby reducing on- and off-power losses within circuit 500. Specifically, the on-time of switches Q1 and Q2 is set to approximately half the resonant period of the resonant tank circuit formed by inductor Lr and capacitor Cr. Therefore, when the resonant current iLr drops to zero, switches Q1 and Q2 immediately turn off. Since the off-current of switches Q1 and Q2 is essentially the magnetizing current iLm through the magnetizing inductor Lm, its value is much smaller than the peak value of the resonant current, significantly reducing off-time losses. Similarly, when switches Q1 and Q2 are on, the resonant current iLr rises from zero, so the on-current is also essentially the magnetizing current iLm. This allows the switches to achieve zero-current switching (ZCS)—a soft-switching method—thereby minimizing switching losses and system stress.

[0046] In some embodiments, the rectifier on the secondary side of circuit 500 can operate as a voltage multiplier, such as a voltage multiplier rectifier. By employing a voltage multiplier rectifier stage, the task of voltage boosting is shared by the transformer Tr (through its turns ratio) and the rectifier stage. Therefore, the turns ratio of the transformer Tr is reduced, and correspondingly, the power loss, size, and cost of the transformer Tr are also reduced.

[0047] like Figure 5 In the circuit 500 shown, a voltage multiplier rectifier is used in the rectifier stage. The effect of the voltage multiplier on the gain is shown in equation (9), which doubles the resonant tank gain (Mr) and the transformer gain (N), thereby reducing the required turns ratio of the transformer Tr. Figure 11In another embodiment of the conversion circuit 500-1 shown, the resonant tank circuit can employ a split resonant capacitor topology and be used in conjunction with a voltage doubler rectifier. The split resonant capacitor topology in circuit 500-1 includes two split resonant capacitors, Cr1 and Cr2, replacing the single resonant capacitor Cr. The capacitance values ​​of these two split resonant capacitors Cr1 and Cr2 can be half the capacitance value of the single resonant capacitor Cr in circuit 500 (i.e., Cr1 = Cr2 = Cr / 2). Compared to a single-capacitor resonant tank circuit, the split capacitor type resonant tank circuit is more advantageous, as the two capacitors required by the voltage doubler rectifier are combined with Cr1 and Cr2 of the resonant tank circuit, thereby reducing the total number of capacitors used, which helps simplify the circuit, reduce cost, and decrease size.

[0048] Regardless of whether the converter adopts a resonant tank circuit topology with a single resonant capacitor (such as circuit 500) or a structure with a split resonant capacitor (such as circuit 500-1), the constant on-time control method proposed in this embodiment of the invention can be implemented and still bring technical advantages such as voltage regulation and reduced turn-off current loss.

[0049] Another major advantage of circuit 500 is that it achieves bidirectional voltage regulation by using active switches (such as MOSFETs and IGBTs) as synchronous rectifiers SR1 and SR2. Specifically, when circuit 500 transfers power from the low-voltage side (Vb) to the high-voltage side (Vdc), switches Q1 and Q2 act as main switches, while SR1 and SR2 function as synchronous rectifiers. Conversely, when power is transferred from the high-voltage side (Vdc) to the low-voltage side (Vb), SR1 and SR2 become the main switches, and Q1 and Q2 function as synchronous rectifiers. This bidirectional switching mechanism allows circuit 500 to operate like an LLC resonant converter when switching between the high-voltage and low-voltage sides, adjusting the low-voltage side voltage (Vb) through frequency conversion control methods such as constant on-time control proposed in this application embodiment.

[0050] exist Figure 6A , 6BFigures 600A, 600B, and 600C illustrate alternative frequency conversion control methods 600A, 600B, and 600C for voltage regulation of switching transistors Q1 and Q2 in circuits 400A, 400B, and 500. According to these alternative frequency conversion control methods, when the duty cycle of switching transistors Q1 and Q2 remains constant at 50%, a switching frequency Fs and its corresponding switching period Ts are applied. In each alternative frequency conversion control method, the durations of the switching periods Ts1 (600A), Ts2 (600B), and Ts3 (600C) decrease sequentially, i.e., Ts1 > Ts2 > Ts3. Therefore, when the duty cycle of switching transistors Q1 and Q2 remains constant at 50%, their on-time Ton (equal to the product of the duty cycle 50% and the switching period Ts) varies with the duration of the switching period. By comparing the conduction time Ton of switching transistors Q1 and Q2 in control methods 600A, 600B and 600C, it can be found that when the switching frequency is low, the Ton of Q1 and Q2 will be longer because Ton is maintained at half of the switching cycle (i.e. 0.5×Ts1>0.5×Ts2>0.5×Ts3).

[0051] Figure 7A , 7B Examples 700A, 700B, and 700C illustrate a constant on-time control method for switching transistors Q1 and Q2 in circuits 400A, 400B, and 500. Figure 7A , 7B Figures 7 and 7C show the gate drive signals for switching transistors Q1 and Q2 at three different switching frequencies (Fs1, Fs2, Fs3), respectively. In control method 700A (… Figure 7A ), 700B ( Figure 7B ) and 700C ( Figure 7C In control methods 700A, 700B, and 700C, the on-time of the two switching transistors Q1 and Q2 remains constant, while the output voltage is adjusted by changing the switching frequencies (Fs1, Fs2, Fs3) and their corresponding switching periods (Ts1, Ts2, Ts3). Therefore, the duty cycles (D1, D2, D3) of switching transistors Q1 and Q2 in control methods 700A, 700B, and 700C vary with the duration of the switching period (Ts).

[0052] contrast Figure 7A , 7B Based on the switching frequency Fs of 7C, we know that: the switching frequency Fs1 of 700A is the lowest, Fs3 of 700C is the highest, and the switching period Fs2 of 700B is in between. Therefore, the switching period Ts1 of 700A has the longest duration, Ts3 of 700C is the shortest, and Ts2 of 700B is between Ts1 and Ts3.

[0053] Since the conduction time (Ton) of switching transistors Q1 and Q2 remains constant within the ranges of 700A, 700B, and 700C, as the switching periods (Ts1, Ts2, Ts3) shorten, the duty cycles (D1, D2, D3) of Q1 and Q2 increase accordingly (i.e., Ts1 > Ts2 > Ts3; D1 < D2 < D3).

[0054] In addition, in control methods 700A, 700B, and 700C, since the conduction time Ton of switching transistors Q1 and Q2 remains constant, the voltage gain M increases as the switching frequency Fs increases (the switching period Ts shortens). Therefore, due to Fs1 < Fs2 < Fs3 (and Ts3 > Ts2 > Ts1), the voltage gain M reaches the highest in 700C and the lowest in 700A. For example, in control method 700A, the switching frequency Fs1 is lower than Fs2 and Fs3 in control methods 700B and 700C, and since the conduction time Ton of Q1 and Q2 remains constant in each control method from 700A to 700C, the duty cycles of switching transistors Q1 and Q2 in 700A are approximately 33%. As the switching frequency Fs increases (e.g., from Fs1 in 700A to Fs3 in 700C), but the conduction time Ton of Q1 and Q2 remains unchanged, the duty cycle increases from approximately 33% in 700A to approximately 50% in 700C. Therefore, according to the proposed constant conduction time control method, as the switching frequency Fs increases (the switching period Ts shortens), the duty cycles of switching transistors Q1 and Q2 increase. However, once the duty cycle reaches approximately 50% (such as in 700C), further increasing the switching frequency Fs (shortening the switching period Ts) will cause the conduction times of Q1 and Q2 to overlap, resulting in a short circuit at the input source Vb. Such operating conditions should be avoided.

[0055] See Figure 7A 、 7B In 7C, the gate drive signals of Q1 and Q2 are 180 degrees out of phase. In other words, they are phase - shifted by 180 degrees from each other. In addition, the conduction time of Q1 and Q2 does not exceed half of the switching period. This conduction time is always less than or equal to half of the switching period. As mentioned before, to reduce power loss, the conduction time is set to be very close to half of the resonant tank resonance period, within the range from 0.9 times half of the resonant tank resonance period to 1.1 times half of the resonant tank resonance period.

[0056] According to Figure 7A 、 7BIn the constant on-time control method shown in 7C, the turn-off currents of switches Q1 and Q2 are essentially equal to the magnetizing current iLm, which is much lower than the resonant current iLr. Since only a small amount of resonant energy (ideally zero) flows back to the input voltage (battery), conduction losses are minimal. This contrasts sharply with the alternative 50% duty cycle control method: in 50% duty cycle control, the turn-off currents of switches Q1 and Q2 are the resonant current iLr, which is much higher than the magnetizing current iLm, resulting in higher switching losses and unnecessary energy flowing back to the power supply.

[0057] Figure 8A The diagram shows the gate drive signals and corresponding current and voltage waveforms 800A of switching transistors Q1 and Q2 within one switching cycle Ts under constant on-time control. Figure 8A In this process, the switching period Ts is divided into eight time periods from t0 to t8.

[0058] Figure 8B The current path of circuit 500 during time period 1 is shown. Figure 8A Time period 1 (t0 to t1) begins at time t0, when switch Q1 is turned on. At time t0, the current iQ1 of switch Q1 rises from zero, meaning switch Q1 is turned on under zero-current switching (ZCS) conditions. When Q1 is on, the input current ib flows from the primary winding Np1 of transformer Tr to the secondary winding Ns and is applied to the magnetizing inductor Lm, thus increasing the magnetizing current iLm of magnetizing inductor Lm. Simultaneously, the resonant tank circuit of circuit 500 begins to resonate, and the resonant current iLr flows through synchronous rectifier SR1 and splits into two paths, flowing through the two output capacitors (Co1 and Co2) respectively. The resonant current iLr drops to zero at time t1, ending this time period. As the resonant current iLr gradually decreases to zero, synchronous rectifier SR1 is turned off under zero-current switching (ZCS) conditions, therefore synchronous rectifier SR1 has no reverse recovery loss.

[0059] Figure 8C The current path of circuit 500 during time period 2 is shown. Figure 8A Time period 2 (t1 to t2) begins at time t1, when the resonant current iLr is zero, and the switching current iQ1 on the primary side of transformer Tr is equal to the magnetizing current iLm multiplied by the turns ratio of transformer Tr (iQ1=N×iLm, N=Ns / Np1, Np1=Np2). This time period ends at time t2, when switching transistor Q1 is turned off. As mentioned earlier, the magnetizing current iLm is much smaller than the resonant current iLr, therefore, compared with the alternative frequency conversion control method, the turn-off currents of Q1 and Q2 are significantly reduced.

[0060] Figure 8D The current path of circuit 500 during time period 3 is shown. Figure 8DTime period 3 (t2 to t3) begins at time t2, when switch Q1 is switched off, and the resonant current iLr is still zero. The difference between the resonant current iLr and the magnetizing current iLm flows through the winding of transformer Tr. Since both switches Q1 and Q2 on the primary side of circuit 500 are off, the input current ib flows through the body diode of switch Q2. As the resonant current iLr rises in the negative direction, the synchronous rectifier SR2 of the rectifier stage begins to conduct. At time t3, the resonant current iLr equals the magnetizing current iLm, and the current in the primary winding of transformer Tr drops to zero.

[0061] Figure 8E The current path of circuit 500 during time period 4 is shown. Figure 8A Time period 4 (t3 to t4) begins at time t3, when the resonant current iLr is equal to the excitation current iLm, and the resonant current iLr flows through the synchronous rectifier tube SR2 in the rectifier stage. This time period ends at time t4, when Q2 turns on.

[0062] Time periods 5 (t4 to t5), 6 (t5 to t6), 7 (t6 to t7), and 8 (t7 to t8) are basically the same as the first four time periods mentioned above. The only difference is that Q1 is in the off state, Q2 is in the on state, and the resonant current iLr and the excitation current iLm are in opposite directions (i.e., the waveforms are symmetrical within half a switching cycle).

[0063] A time-domain analysis was performed on the voltage regulation characteristics of the constant on-time (Ton) control method proposed in this invention embodiment, and the results are consistent with... Figures 9A-9B The simulation results were compared with those in [the original text]. (Reference) Figure 8A The intervals 1 to 8 are shown in the figure. Eq refers to the calculation result of the formula, and Sim refers to the simulation result.

[0064] exist Figure 8A Within the interval 1 [t0 to t1] shown, the resonant current iLr can be expressed as: (2) Where Vcr(t0) represents the resonant capacitor voltage at time t0, and ωr is the resonant angular frequency, defined as 1 / Here, it is assumed that the resonant current is initially zero.

[0065] Resonant capacitor voltage V at time t0 Cr It can be calculated as: (3) in, Vcr is the peak-to-peak value of the voltage fluctuation of the resonant capacitor Cr. iLm is the peak-to-peak value of the fluctuating excitation current iLm. The formula for calculating Vcr is: It can be calculated as: (4) Furthermore, the integral part in equation (5) can be calculated using equation (4), thereby determining the numerical expression for the voltage ripple of the resonant capacitor: (5) Assume the flux Ton of switches Q1 and Q2 is equal to the duration of time period 1 (t0 to t1), which is equal to half of the resonant period Tr (ignoring time period 2): (6) like Figure 8A As shown, when switch Q1 or Q2 is in the on state (i.e., during the Ton period of Q1 or Q2), the input voltage Vb is applied to the magnetizing inductor Lm; while when both switches Q1 and Q2 are in the off state, the magnetizing current iLm remains essentially constant. Therefore, The formula for calculating iLm is: (7) Substituting formulas (4), (5), and (7) into formula (3), we get: (8) In formula (8), the equation The two sides cancel each other out, therefore the voltage gain M will be: (9) The voltage gain M depends on three factors: 1) Mr is the resonant tank gain, 2) N is the transformer gain, and 3) the voltage doubler rectifier stage in circuit 500 doubles the overall voltage gain.

[0066] By comparing formula (9) with Figures 9A-9B The simulation results verify the effectiveness of the voltage gain formula. Figure 9A The simulation results of circuit 500 using the constant on-time control method are shown in Figure 900A, where the transformer gain (N) is 64 and the magnetizing inductance (Lm) is 400μH. The values ​​of the resonant inductance Lr and resonant capacitor Cr were varied during the simulation; specific values ​​are shown in the figure for Figure 9A. The resonant frequency Fr remained constant at 150kHz under all operating conditions.

[0067] Figure 9B Simulation results 900B of circuit 500 under the constant on-time control method proposed in this embodiment of the invention are shown, where the transformer gain (N) is 64, and the values ​​of resonant inductance Lr and capacitor Cr are fixed at 40μH and 24nF, respectively. The value of magnetizing inductance Lm was changed during the simulation; specific values ​​are shown in the illustration in 9B.

[0068] Comparing the simulation results 900A and 900B with the expected results based on Equation (9), it can be seen that the difference between the two is less than 10%. This deviation may be due to the simplifications and assumptions made during the simulation of 900A and 900B. Therefore, the simulation results 900A and 900B verify the correctness of the above theoretical analysis.

[0069] According to Equations (6) and (9), considering the resonance frequency, Mr can be rewritten as: (10) where Ln is the ratio of the excitation inductance to the resonance inductance (Ln = Lm / Lr), and Fn is the ratio of the switching frequency to the resonance frequency (Fn = Fs / Fr).

[0070] Figure 9C The result 900C in shows the variation law of the resonance tank gain (Mr) with respect to Fn and Ln. In converters such as circuit 500, the ratio of the excitation inductance to the resonance inductance (Ln) and the transformer gain (N) are both determined by component selection. Therefore, the stable control of the output voltage Vdc can be achieved by adjusting the ratio of the switching frequency to the resonance frequency (Fn).

[0071] In addition, as Figure 9C shown, by adopting the constant on-time control method proposed in the embodiment of the present invention, voltage regulation can be achieved in the sub-resonance mode (Fs < Fr or Fn < 1). For example, when Ln = 6, the output voltage gain can be adjusted from 1 when Fn = 1 (i.e., Fs = Fr) to 0 when Fn approaches 0.3 (i.e., Fs = 0.3Fr). Therefore, circuit 500 can adopt a lower switching frequency (Fr), and compared with the alternative constant duty cycle control (which needs to operate in the resonance mode or the super-resonance mode), the switching losses of switching transistors Q1 and Q2 can be reduced.

[0072] Respectively corresponding to the excitation current iLm under the constant on-time control method (1000A) and the alternative 50% constant duty cycle control method (1000B). Comparing the peak values of the excitation current iLm of the two control methods at the same switching frequency Fs, it can be seen that: at the moment when switching transistor Q1 turns off and switching transistor Q2 turns on, the peak value of the excitation current iLm in 1000B is higher than the peak value of the excitation current iLm in 1000A.

[0073] The waveform diagram 1000A shows the excitation current waveform iLm_Ton of the constant on-time control method proposed in the embodiment of the present invention under variable frequency conditions, and ΔiLm_Ton is the peak-to-peak change of iLm_Ton.

[0074] As described above, in the constant on-time control method proposed in this embodiment of the invention, the excitation current iLm, as shown by waveform 1000A, only changes during the on-time (Ton) of switching transistors Q1 or Q2. When both switching transistors Q1 and Q2 are in the off state, the voltage across the transformer Tr winding is zero, therefore the excitation current iLm remains constant. Since the Ton time is fixed, the peak value of the excitation current iLm is also fixed and does not change with the switching frequency Fs. Therefore, even if the switching frequency Fs changes, the off-time of switching transistors Q1 and Q2 can still remain constant.

[0075] Therefore, the constant on-time control method proposed in this embodiment of the invention can effectively reduce the turn-off current of switches Q1 and Q2, thereby completing the switching operation at a lower excitation current iLm than that required by alternative control schemes, and significantly reducing switching losses during turn-off. For example, in the constant on-time control mode, when operating in subresonant mode, the turn-off current of primary-side switches Q1 and Q2 is equal to the peak value of the excitation current iLm multiplied by the turns ratio of the transformer Tr.

[0076] In waveform diagram 1000B, iLm_d is the excitation current waveform under variable frequency operation when the alternative 50% constant duty cycle control method is adopted, and ΔiLm_d is the peak-to-peak value variation of iLm_d.

[0077] Among the alternative frequency conversion control methods (such as...) Figure 10A The peak value of the excitation current iLm (as shown in the waveform diagram 1000B with 50% duty cycle control) will change with the switching frequency Fs. This is because when the switching frequency decreases, the Ton of Q1 and Q2 will increase.

[0078] Figure 10B Waveforms 1002A and 1002B are shown, comparing the turn-off current ioff of switching transistors Q1 and Q2 in the constant on-time control method (1002A) and the 50% duty cycle alternative (1002B) at the same switching frequency Fs.

[0079] When operating under the frequency conversion conditions shown in 1002B using the alternative frequency conversion control method (i.e., 50% duty cycle), the turn-off current ioff_d of switching transistors Q1 and Q2 is equal to: (11) Where ioff_d represents the turn-off current of switching transistors Q1 and Q2 under constant duty cycle control (such as 50% duty cycle).

[0080] When using the constant on-time control method proposed in the embodiment of the present invention shown in 1002A, the calculation formulas for the turn-off current ioff_Ton of switching transistors Q1 and Q2 are as follows: (12) Where ioff-Ton represents the turn-off current of switching transistors Q1 and Q2 under constant on-time control.

[0081] In subresonant mode, since the conduction time of switching transistors Q1 and Q2 in the alternative control method shown in 1002B is longer than that of the constant conduction time control method proposed in the embodiment of the present invention shown in 1002A, the turn-off current ioff of the alternative control method (50% duty cycle) is higher (i.e., ioff_d>ioff_Ton).

[0082] Figure 10C The graphical representation of 1000C shows the ratio of the turn-off current CR between the constant on-time control method and the alternative 50% constant duty cycle control method in subresonant mode.

[0083] The formula for calculating the turn-off current ratio (CR) is as follows: (15) As shown in Figure 1000C, as the switching frequency Fs decreases, the turn-off current ioff_Ton under constant on-time control is significantly smaller than the turn-off current ioff_d under another switching frequency control (i.e., 50% duty cycle). Therefore, under the constant on-time control proposed in this invention, the turn-off switching losses of switches Q1 and Q2 will be reduced, thereby improving the operating efficiency of converters such as circuit 500 in sub-resonant mode.

[0084] Therefore, the constant on-time control method can efficiently regulate voltage in sub-resonant mode, while the alternative control scheme using a 50% duty cycle may only operate in super-resonant mode when regulating the output voltage Vdc. In super-resonant mode, a higher switching frequency Fs reduces the peak value of the magnetizing current iLm. However, in super-resonant mode, due to the higher switching frequency Fs, the switches Q1 and Q2 are turned off before the current drops to the magnetizing current iLm. Therefore, the turn-off current ioff of switches Q1 and Q2 is much higher than the peak value of the magnetizing current iLm. Consequently, the turn-off current ioff performance of the alternative control method (i.e., 50% duty cycle) in super-resonant mode is worse than its performance in sub-resonant mode, because switches Q1 and Q2 turn off prematurely before the resonant current approaches zero.

[0085] Under the constant on-time control method proposed in this embodiment of the invention, the synchronous rectifier SR in the rectifier stage of circuit 500 can achieve soft-switching operation. Since the synchronous rectifier SR in the rectifier stage of circuit 500 is always turned off when the rate of change of the resonant current ir is small, the turn-off switching loss of the synchronous rectifier can be reduced by using zero-current turn-off (ZCS) technology.

[0086] Another advantage of the constant on-time control method proposed in this embodiment of the invention is that the switching transistors Q1 and Q2 in circuit 500 can be turned on by ZCS control. It should be noted that even in the ZCS state, the discharge of the output capacitors of switching transistors Q1 and Q2 still results in some power loss. However, since the voltage of switching transistors Q1 and Q2 is extremely low when they are turned on, this loss is minimized. For example, when using this constant on-time control scheme, the power loss when switching transistors Q1 and Q2 are turned on can be calculated as follows: (16) Where Pon represents the power loss when the switch is on, and Coss is the output capacitance between the drain and source of the switching transistors Q1 and Q2. Taking a typical 40V MOSFET as an example, when the input voltage Vb is 4V and the switching frequency is 200kHz, Coss is approximately 50nF, and the power loss is approximately 0.32W.

[0087] Under the same conditions, a comprehensive simulation was performed on the constant duty cycle control method (i.e., 50%) and the constant on-time control method proposed in this embodiment of the invention, and the simulation results were compared. The parameter specifications of the circuit 500 used to simulate the constant duty cycle control method and the proposed constant on-time control method are shown in Table 1.

[0088] Table 1: Converter Simulation Parameter Specifications During the simulation, the input voltage Vb was set to 2.6V and 3.7V respectively, and the output voltage Vdc was adjusted to 330V. The simulation results of the two control methods are as follows: Figures 12A-12D As shown in the figure, the gate drive signals of switching transistors Q1 and Q2, the resonant current iLr, the magnetizing current iLm, the switching currents iQ1 and iQ2, and the synchronous rectifier currents iSR1 and iSR2 are displayed. Figures 12A-12D The simulation results are summarized in Table 2.

[0089] Figure 12AThe simulation results (1200A) for the constant duty cycle control method at Vb=2.6V are shown. In this simulation, the switching frequency Fs is 158kHz, close to the resonant frequency Fr, and the turn-off current ioff of switches Q1 and Q2 is approximately 75A. The 1200A result also shows the primary side (battery side) magnetizing current N.iLm_d, with a peak value of 50A. The turn-off current ioff of switches Q1 and Q2 is higher than the peak value of the primary side magnetizing current, which is consistent with expectations—because the switches are turned off before the switching currents iQ1 and iQ2 reach the primary side magnetizing current N.iLm_d. The 1200A result indicates that when using the alternative control method with a constant duty cycle (50%), the turn-off currents of switches Q1 and Q2 (such as MOSFETs) exceed the actual requirements, resulting in unnecessary additional turn-off losses, which is not ideal.

[0090] Figure 12B Simulation results 1200B for the constant duty cycle control method at Vb=3.7V are shown. In this simulation, the switching frequency Fs is increased to 352kHz, which is 235% higher than the resonant frequency Fr, and the turn-off current of switches Q1 and Q2 reaches 230A. As mentioned earlier, when using constant duty cycle control, converters such as circuit 500 may need to operate in super-resonant mode to reduce voltage gain and regulate the output voltage. Simulation result 1200B shows that in order to achieve the voltage gain required to regulate the input voltage Vb to the target output voltage Vdc (i.e., 330V), the switching frequency Fs needs to be increased to 2.35 times the resonant frequency Fr. At this time, circuit 500 no longer resonates, and the waveform changes linearly. Since the turn-off time occurs exactly at the peak of the resonant current iLr (approximately 225A), the turn-off current ioff of switches Q1 and Q2 becomes extremely high. This combination of high turn-off current and high-frequency switching leads to huge switching losses. Simulation results 1200B also show the primary-side excitation current N.iLm_d, with a peak value of 32A. It is noteworthy that the turn-off current ioff is much higher than... Figure 12A The peak value of the excitation current N.iLm_d discussed in the article.

[0091] Figure 12C The simulation results (1200C) of the constant on-time control method proposed in this embodiment of the invention at Vb=2.6V are shown. In this simulation, the switching frequency Fs is 141kHz, close to the resonant frequency Fr, and the turn-off current ioff of switches Q1 and Q2 is 55A. Comparing the turn-off current ioff of constant duty cycle control (1200A) and constant on-time control (1200C) under the same conditions, the turn-off current of the 1200A scheme is 75A, which is 36% higher than that of the 1200C scheme. The simulation results (1200C) also show the primary side magnetizing current N.iLm_Ton, with a peak value of 55A, equal to the turn-off current of switches Q1 and Q2. Compared to alternative control strategies ( Figure 12A The result of 1200A is that the turn-off current of the 1200C scheme is reduced from 75A to 55A, thereby reducing the turn-off loss.

[0092] Figure 12D The simulation results of the constant on-time control method proposed in this embodiment of the invention (1200D) at Vb=3.7V are shown. In this simulation, the switching frequency Fs is 69kHz (close to the resonant frequency), and the turn-off current of switches Q1 and Q2 is 95A. Comparing the turn-off currents of constant duty cycle control (1200B) and constant on-time control (1200D) under the same operating conditions: the turn-off current of switches Q1 and Q2 in 1200B is 230A, which is 232% higher than the 95A in 1200D. Furthermore, the switching frequency Fs in 1200B is 352kHz, which is 526% of the 69kHz in 1200D. The simulation results of 1200D also show the primary-side magnetizing current N.iLm_Ton, with a peak value of 95A, equal to the turn-off current of switches Q1 and Q2. Compared to the results of alternative control strategies (… Figure 12B Here, the shutdown current is reduced from approximately 225A to 95A, thereby reducing shutdown losses.

[0093] Based on the simulation results of constant on-time control method 1200C and 1200D, according to formula (12), it can be expected that when the input voltage Vb rises from 2.6V to 3.7V, the peak value of the primary side excitation current N.iLm_Ton (i.e. the turn-off current of switching transistors Q1 and Q2) should rise from 55A to 78A (calculation formula: 55A×3.7V / 2.6V=78A).

[0094] However, the peak value of the primary-side magnetizing current N.iLm_Ton in the 1200D circuit is 95A. This difference stems from the assumption in formula (12) that the primary-side magnetizing current N.iLm_Ton will remain constant when both switches Q1 and Q2 are off. But if Figure 12D As shown, when switches Q1 and Q2 are in the off state, the primary magnetizing current N.iLm_Ton will decrease slightly due to the voltage drop of the body diode of the switches. This causes the actual output of simulation result 1200D to deviate from the theoretical prediction of formula (12). Nevertheless, the simulation results 1200C and 1200D of circuit 500 using the constant on-time control scheme proposed in this embodiment of the invention still verify the expected improvement effect of this scheme in terms of improving circuit efficiency and reducing power loss compared with traditional voltage regulation methods such as constant duty cycle control.

[0095] In some implementations, under constant on-time control, the current ripple of the magnetic components in circuit 500 can remain constant at lower switching frequencies, which helps to reduce core losses and AC losses.

[0096] Figure 12C and 12D The simulation results of 1200C and 1200D also show that, under constant on-time control, synchronous rectifiers SR1 and SR2 and main switch tubes Q1 and Q2 can all achieve zero-current turn-off (i.e., iSR1, iSR2, iQ1, and iQ2 are all 0A at the turn-off time).

[0097] Table 2: Comparison of Simulation Results In some embodiments, the constant on-time control method proposed in this invention can be applied to various variant topologies of the high boost DC-DC converter shown in circuit 500. For example, the primary side of circuit 500 can be configured as a full-bridge or half-bridge switching network.

[0098] Figure 13 A conversion circuit 1300 employing a full-bridge switching topology is shown. The primary side of this circuit is configured with four switches (Q1, Q2, Q3, and Q4) and a two-winding transformer Tr (containing primary and secondary windings). The secondary side includes a resonant tank circuit and a voltage doubler rectifier. It should be noted that other topologies can also be used on the secondary side, such as a full-bridge rectifier (containing four MOSFETs) and a split resonant capacitor rectifier (containing two MOSFETs and two resonant capacitors).

[0099] When circuit 1300 uses the constant on-time control method proposed in this embodiment of the invention for voltage regulation, the voltage and current waveforms on its secondary winding, resonant tank circuit, and rectifier are basically consistent with the waveforms of push-pull converters such as circuit 500. Furthermore, it will be explained below that the working principle, waveform characteristics, and performance of circuit 1300 under constant on-time control are completely identical to the relevant characteristics of push-pull converter topologies such as circuit 500.

[0100] Figure 14 The converter circuit 1400 shown employs a half-bridge switching topology on its primary side. Circuit 1400 includes a two-winding transformer Tr (one primary winding and one secondary winding), and the primary-side switching network consists of two primary-side switching transistors (Q1, Q2) and two capacitors (Cb1, Cb2).

[0101] When the circuit 1400 adjusts the voltage using the constant on-time control method proposed in the present invention, since the battery voltage Vb is divided by the capacitors Cb1 and Cb2, the voltages on its secondary winding, resonant tank circuit, and rectifier are reduced by half compared to the push-pull converter topology shown in the circuit 500. However, except for the reduction in voltage gain caused by the half-bridge switching network, the waveform characteristics, operating principle, and performance of the circuit 1400 under constant on-time control are basically similar to those of the push-pull converter topology such as the circuit 500.

[0102] Figure 15A Fig. 1500A (gate drive strategy) shows the gate pulse patterns of the switching transistors Q1 - Q4 in the full-bridge topology of the circuit 1300 under constant on-time control. According to the gate pulse pattern 1500A of the circuit 1300, the switching transistors Q2 and Q3 are initially kept on for a set duration Ton; after the duration Ton ends, the switching transistors Q2 and Q3 turn off, and at this time all the switching transistors Q1 - Q4 are in the off state; at the moment t = Ts / 2 (i.e., half of the switching period), the switching transistors Q1 and Q4 turn on and remain for the set duration (Ton); after the duration Ton ends, the switching transistors Q1 and Q4 turn off, and all the switching transistors Q1 - Q4 enter the off state again and remain until the end of the first switching period Ts. The gate pulse pattern 1500A of the circuit 1300 enables the full-bridge topology to achieve the same waveforms and performance as the push-pull topology of the circuit 500 under constant on-time control because the voltage waveforms generated on the secondary side of the transformer Tr are exactly the same for both control methods.

[0103] Figure 15B Fig. 1500B (gate drive strategy) shows the gate pulse patterns of the switching transistors Q1 - Q4 in the full-bridge topology of the circuit 1300 under constant on-time control. In the gate pulse pattern 1500B, the switching transistors Q2 and Q3 are initially kept on for a set duration Ton; at the moment t = Ton, the switching transistor Q2 turns off but the switching transistor Q3 remains on, and at the same time the switching transistor Q4 turns on. Therefore, in the time interval Ton < t < 0.5Ts, both the switching transistors Q3 and Q4 are in the on state. The second half of the switching period Ts follows the same rule: when the switching transistor Q1 turns off, the switching transistor Q4 remains on, and at the same time the switching transistor Q3 turns on; therefore, in the time interval 0.5×Ts + Ton < t < Ts, both the switching transistors Q3 and Q4 are in the on state.

[0104] In Figure 15A the shown gate pulse pattern 1500A, when all the switching transistors Q1 - Q4 are off (i.e., in the time interval from Ton to 0.5×Ts), the primary winding of the transformer Tr is in an open circuit state. In Figure 15BIn the gate pulse mode 1500B shown, the primary winding of transformer Tr is short-circuited when both switching transistors Q3 and Q4 are on. For gate pulse mode 1500B, by short-circuiting the primary winding of transformer Tr when switching transistors Q3 and Q4 are on, the risk of transformer saturation due to volt-second imbalance (the average flux of transformer Tr not returning to zero) can be minimized or eliminated. This can be seen from... Figure 15B The gate pulse mode was verified in the 1500B: the figure shows the voltage waveform (Vprim) of the primary winding of transformer Tr. During the period when switches Q3 and Q4 are simultaneously conducting, Vprim is equal to zero (i.e., volt-second balance is achieved). In most cases, Figure 15B The gate pulse mode shown is a preferred embodiment. For example, in home energy storage applications, the battery voltage is approximately 48V, and the AC output voltage is 120V or 220V; at this time, Figure 13 The full-bridge LLC converter shown can be controlled using the gate pulse mode 1500B to maintain volt-second balance. The switching overlap strategy in the 1500B minimizes flux imbalance in the transformer Tr core, reduces the risk of overheating, and improves efficiency, making it ideal for continuous, high-load applications in home power systems.

[0105] In another embodiment of a converter that employs constant on-time control for voltage regulation, a push-pull LLC converter (such as...) Figure 16A The circuit 1600A can have two transformers connected in parallel on the primary side, each connected to a different switching network; the secondary sides of the two transformers are connected in series to the resonant tank circuit and the rectifier. By connecting two transformers in parallel on the primary side, the output power of the circuit 1600A can be twice that of a single push-pull LLC converter such as the circuit 500. For example, Figure 16A The circuit 1600A contains two transformers Tr1 and Tr2, which are connected in parallel on the primary side and in series on the secondary side. In the primary side of the circuit 1600A, transformer Tr1 is connected to a first switching network containing switching transistors Q11 and Q12, and transformer Tr2 is connected to a second switching network containing switching transistors Q21 and Q22. The first and second switching networks are connected in parallel to the battery Vb.

[0106] Since the two-phase primary sides of circuit 1600A are essentially a mirror image of the primary sides of circuit 500, therefore Figures 7A-7C The constant on-time control method shown can be used to generate gate drive signals for switches Q11, Q12, Q21, and Q22. Specifically, refer to... Figures 7A-7C The gate drive signals of switching transistors Q11 and Q21 in circuit 1600A can be exactly the same as the gate drive signal of switching transistor Q1 in circuit 500; the gate drive signals of switching transistors Q12 and Q22 in circuit 1600A can be exactly the same as the gate drive signal of switching transistor Q2 in circuit 500.

[0107] In the secondary side of circuit 1600A, transformers Tr1 and Tr2 are connected in series with a resonant tank circuit containing resonant inductor Lr and resonant capacitor Cr; this resonant tank circuit is connected to a rectifier using a half-bridge voltage multiplier topology, or other rectifier topologies (such as a full-wave rectifier, a split resonant capacitor voltage multiplier circuit, etc.).

[0108] Since the secondary components of circuit 1600A are exactly the same as those of circuit 500 (i.e., single push-pull LLC converter), this topology can increase the output power simply by increasing the number of transformers (i.e., Tr2), without increasing the component cost and complexity of the converter's secondary side compared to circuit 500.

[0109] In some embodiments, the two-phase push-pull converter topology of circuit 1600A can achieve twice the output power of the single push-pull converter topology shown in circuit 500, thus making it more suitable for high-output-power charging scenarios. Furthermore, a technical advantage of circuit 1600A is that, compared to other high-output-power converter solutions, this topology only requires the addition of a transformer and switching network (i.e., Tr2 and Q21, Q22), rather than adding a complete converter circuit including a second resonant tank circuit and a second rectifier stage. Simultaneously, by employing a single resonant tank circuit (i.e., Lr and Cr) in series with transformers Tr1 and Tr2, circuit 1600A can effectively mitigate the matching deviation problem caused by component parameter tolerances in multiple resonant tank circuits.

[0110] Another technical advantage of Circuit 1600A is that the winding voltage and winding current of transformers Tr1 and Tr2 are exactly the same, resulting in a balanced load distribution and minimal circulating current. Therefore, Circuit 1600A effectively alleviates power distribution problems between Tr1 and Tr2, as well as the risks of overheating and overload caused by uneven load distribution. For example, because the secondary windings of transformers Tr1 and Tr2 are connected in series, their secondary currents are equal, which in turn ensures that the primary currents remain consistent (i1=i2); simultaneously, because the primary windings of transformers Tr1 and Tr2 are connected in parallel, their primary winding terminal voltages are always equal.

[0111] Figure 17A circuit 1700 employing a two-phase transformer topology is demonstrated, where transformers Tr1 and Tr2 are connected in parallel on the primary side and in series on the secondary side. This circuit is an improved version of circuit 1600A, enabling bidirectional operation and supporting bidirectional power transfer between the high-voltage and low-voltage sides. Therefore, the constant on-time control principle of circuit 1600A discussed earlier also applies to circuit 1700. The primary side of circuit 1700 is identical to that of circuit 1600A, but the secondary side is configured with a resonant inductor with split resonant capacitors (Cr1 and Cr2) and a voltage multiplier rectifier stage. For example, when transferring power from the high-voltage side (Vdc) to the low-voltage side (Vb) of circuit 1700, switches SR1 and SR2 on the high-voltage side operate as main switches, while switches Q11, Q12, Q21, and Q22 on the low-voltage side operate as synchronous rectifiers. The duty cycle of SR1 and SR2 can reach 50% at this time. The secondary windings (Ns1, Ns2) of transformers Tr1 and Tr2 are connected in series, while the primary windings (Np11, Np12 and Np21, Np22) are connected in parallel.

[0112] Figure 16B Another variation of the 1600A circuit topology is shown, in which three or more transformers Tr1, Tr2, Trn of the push-pull LLC converter can be connected in parallel on the primary side and in series on the secondary side. For Figure 16B The circuit shown is 1600B, which is the above-mentioned circuit. Figure 16A The methods and operating characteristics described can also be applied to three or more push-pull LLC converters with constant on-time control to achieve higher output power.

[0113] Circuit 1600B may include three or more transformers, each connected in parallel on its primary side to three or more corresponding switching networks, and on its secondary side connected in series to a single resonant tank circuit and a rectifier. By connecting three or more transformers in parallel on the primary side, the output power of circuit 1600B can reach three times or more of that of a single push-pull LLC converter such as circuit 500. For example, Figure 16B The circuit 1600B contains three transformers Tr1, Tr2, and Trn, which are connected in parallel on the primary side and in series on the secondary side. In the primary side of the circuit 1600B, transformer Tr1 is connected to a first switching network containing switching transistors Q11 and Q12, transformer Tr2 is connected to a second switching network containing switching transistors Q21 and Q22, and transformer Trn is connected to an nth switching network containing switching transistors Qn1 and Qn2. The three switching networks are connected in parallel to the battery Vb.

[0114] As discussed above when discussing circuit 1600A, Figures 7A-7CThe constant on-time control method shown can be used to generate the gate drive signals for switching transistors Q11, Q12, Q21, Q22, Qn1, and Qn2 in circuit 1600B. Specifically, refer to... Figures 7A-7C The gate drive signals of switching transistors Q11, Q21, and Qn1 in circuit 1600B can be exactly the same as the gate drive signal of switching transistor Q1 in circuit 500; the gate drive signals of switching transistors Q12, Q22, and Qn2 in circuit 1600B can be exactly the same as the gate drive signal of switching transistor Q2 in circuit 500.

[0115] In the secondary side of circuit 1600B, transformers Tr1, Tr2 and Trn are connected in series with a resonant tank circuit containing resonant inductor Lr and resonant capacitor Cr; this resonant tank circuit is connected to a rectifier using a half-bridge voltage multiplier topology, or other rectifier topologies (such as a full-wave rectifier, a split resonant capacitor voltage multiplier circuit, etc.).

[0116] In another embodiment of a converter that employs constant on-time control for voltage regulation, a full-bridge converter (such as...) Figure 16C Circuit 1600C can be configured with two transformers connected in parallel on the primary side, each connected to one of two switching networks; the secondary sides of the two transformers are connected in series to the resonant tank circuit and the rectifier. The output power of Circuit 1600C can reach twice that of a single full-bridge converter such as Circuit 1300. For example, Figure 16C The circuit 1600C contains two transformers, Tr1 and Tr2, which are connected in parallel on the primary side and in series on the secondary side. In the primary side of the circuit 1600C, transformer Tr1 is connected to a first full-bridge switching network containing switching transistors Q11, Q12, Q13, and Q14, and transformer Tr2 is connected to a second full-bridge switching network containing switching transistors Q21, Q22, Q23, and Q24. The first and second full-bridge switching networks are connected in parallel to the battery Vb.

[0117] Since the two-phase primary sides of circuit 1600C are essentially a mirror image of the primary sides of circuit 1300, therefore Figure 15A and 15B The constant on-time control method shown can be used to generate gate drive signals for switching transistors Q11, Q12, Q13, Q14, Q21, Q22, Q23, and Q24. Specifically, refer to... Figure 15A and 15BThe gate drive signals of switching transistors Q11 and Q21 in circuit 1600C can be exactly the same as the gate drive signal of switching transistor Q1 in circuit 1300; the gate drive signals of switching transistors Q12 and Q22 in circuit 1600C can be exactly the same as the gate drive signal of switching transistor Q2 in circuit 1300; the gate drive signals of switching transistors Q13 and Q23 in circuit 1600C can be exactly the same as the gate drive signal of switching transistor Q3 in circuit 1300; and the gate drive signals of switching transistors Q14 and Q24 in circuit 1600C can be exactly the same as the gate drive signal of switching transistor Q4 in circuit 1300.

[0118] In the secondary side of circuit 1600C, transformers Tr1 and Tr2 are connected in series with a resonant tank circuit containing resonant inductor Lr and resonant capacitor Cr; this resonant tank circuit is connected to a rectifier using a half-bridge voltage multiplier topology, or other rectifier topologies (such as a full-wave rectifier, a split resonant capacitor voltage multiplier circuit, etc.).

[0119] Consistent with the discussion above regarding circuit 1600A, transformers Tr1 and Tr2 in circuit 1600C have the same winding voltage and winding current, thus their load distribution is balanced and the circulating current is extremely small.

[0120] Figure 18 A control block diagram 1800 for controlling a push-pull LLC converter is shown, the converter including any one of circuits 400A, 400B, 500, 500-1, 1600A~1600B, and 1700. In practical applications, control block diagram 1800 can be used in portable power stations (PPS) where the energy source is a battery with a DC voltage (Vbat) of approximately 3V and an AC output voltage (Vac) of 220V (RMS). A push-pull LLC converter 1802, employing constant on-time control, converts the approximately 3V battery voltage Vbat to a DC bus voltage (Vbus) of approximately 350V, with a voltage gain of approximately 120 times. An inverter 1804 is connected to the push-pull LLC converter 1802 to convert the 350V DC bus voltage to an AC output voltage of 220V. A constant on-time controller 1806 is configured to generate gate drive signals (e.g., ...) for the primary-side switches of the push-pull LLC converter 1802. Figures 7A-7C As shown in the diagram, Vbus can also be adjusted to approximately 350V by modulating the switching frequency (Fs) of the primary-side switch. The sinusoidal pulse width modulation (SPWM) AC voltage controller 1808 is configured to adjust the AC output voltage to approximately 220V RMS. Control block diagram 1800 is also applicable to other types of converters, including those employing full-bridge and half-bridge switching networks.

[0121] Figure 19A control block diagram 1900 for constant on-time control according to an embodiment of the present invention is shown. A push-pull LLC converter (such as circuit 500) or a full-bridge LLC converter (such as circuit 1300) is used as converter 1902 to convert a battery voltage of approximately 3V Vbat to a DC bus voltage of approximately 350V Vbus. A voltage sampling and error amplification circuit 1904 is configured to sample the DC bus voltage Vbus and generate an error signal Verror; Verror is a voltage signal representing the difference between the actual Vbus output by converter 1902 and the target Vbus (i.e., 350V). An optocoupler 1906 is connected to the voltage sampling and error amplification circuit 1904 and is configured to transmit the error signal Verror from the output side (i.e., the secondary side) of converter 1902 to the battery side (i.e., the primary side). The optocoupler 1906 receives Verror as input and outputs the corresponding control voltage Vcon to controller 1908. After receiving Vcon, controller 1908 generates a switching frequency Fs based on the signal to control the primary-side switch of converter 1902 with a constant on-time. Gate driver 1910 is connected between controller 1908 and the primary-side switch of converter 1902. It is configured to receive the switching frequency Fs output by controller 1908 and generate a gate drive signal with a constant on-time to drive the primary-side switch of converter 1902, thereby adjusting the input voltage Vbat to the target bus voltage Vbus (i.e., 350V).

[0122] In some embodiments, the voltage sampling and error amplification circuit 1904, optocoupler 1906, controller 1908, and gate driver 1910 may be integrated into... Figure 18 The constant on-time controller 1806 shown is internal.

[0123] In this article, the terms “connection” or “coupled” include both direct coupling (i.e., two coupled elements in contact with each other) and indirect coupling (i.e., at least one other element exists between two elements).

[0124] Although embodiments of the present invention have been described in detail, it should be understood that various changes, substitutions, and modifications can be made to the content of this document without departing from the scope of protection of the present invention. Furthermore, the scope of protection of this application is not limited to the specific embodiments described in the specification, but includes processes, machines, manufacturing methods, material compositions, means, methods, and steps, etc.

[0125] Those skilled in the art will readily understand from the disclosure of this invention that any existing or future processes, machines, manufacturing methods, material compositions, means, methods, or steps, as long as their functions are substantially the same as those of the corresponding embodiments described herein, or their effects are substantially consistent with those of the corresponding embodiments described herein, should be included within the scope of protection of this invention. Therefore, the appended claims are intended to include such processes, machines, manufacturing methods, material compositions, means, methods, or steps within their scope of protection.

Claims

1. A constant on-time control method for a push-pull LLC converter, characterized in that, The push-pull LLC converter includes a transformer, the primary side of which is connected to a switching network including two switching transistors Q1 and Q2, and the secondary side is connected to a rectifier via a resonant tank circuit; the primary side receives the input DC voltage, and the rectifier outputs a DC bus voltage; the constant on-time control method includes: A switching frequency is set for switching transistors Q1 and Q2 to adjust the DC bus voltage. The switching frequency corresponds to a switching period, and the switching period represents a complete operating cycle of switching transistors Q1 and Q2. Switches Q1 and Q2 are modulated to switch between an on state and an off state with a phase difference of 180 degrees, and the duration for which switches Q1 and Q2 remain in the on state is a fixed duration, which is at most half of the switching cycle.

2. The constant on-time control method as described in claim 1, characterized in that, Also includes: A gate voltage is generated for each primary-side switch Q1 and Q2 by a gate driver to drive each primary-side switch to switch between an on state and an off state during the switching cycle; wherein, the primary-side switch is turned on when it receives a high gate voltage and turned off when it receives a low gate voltage.

3. The constant on-time control method as described in claim 2, characterized in that, Also includes: At the beginning of the switching cycle, a high gate voltage is transmitted to the primary-side switch Q1 and maintained for a first fixed duration to drive the primary-side switch Q1 to turn on. After the first fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q1 to drive the primary-side switch Q1 to turn off; At halfway through the switching cycle, a high gate voltage is supplied to the primary-side switch Q2 and maintained for a second fixed duration, driving the primary-side switch Q2 to turn on. After the second fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q2 to drive the primary-side switch Q2 to turn off; The DC bus voltage is sampled by a voltage sensor, and the correction switching frequency of the primary-side switch is set based on the difference between the sampled DC bus voltage and the target DC bus voltage.

4. The constant on-time control method as described in claim 3, characterized in that, The corrected switching frequency is lower than the resonant frequency of the resonant tank circuit.

5. The constant on-time control method as described in claim 3, characterized in that, The rectifier is one of a voltage multiplier, a full-bridge rectifier, or a half-bridge rectifier.

6. The constant on-time control method as described in claim 3, characterized in that: The push-pull LLC converter includes two transformers connected in parallel to the input DC voltage; wherein the primary side of the first transformer is connected to a switching network including primary side switches Q1 and Q2, and the primary side of the second transformer is connected to a second switching network including primary side switches Q3 and Q4. The gate driver generates the same gate voltage for primary-side switch Q3 as it generates for primary-side switch Q1; the gate driver generates the same gate voltage for primary-side switch Q4 as it generates for primary-side switch Q2.

7. The constant conduction time control method as described in claim 6, characterized in that, The secondary sides of the first and second transformers are coupled in series to the resonant tank circuit and the rectifier.

8. The constant conduction time control method as described in claim 3, characterized in that, The moment when primary-side switches Q1 and Q2 switch from the on state to the off state is the moment when the peak value of the primary-side magnetizing current is equal to the switching current; wherein, the peak value of the primary-side magnetizing current is the product of the current of the transformer magnetizing inductance and the transformer turns ratio, and the switching current is the current when the primary-side switches Q1 and Q2 are on.

9. The constant conduction time control method as described in claim 3, characterized in that, During the period from the end of the fixed duration to half the time before the end of the switching cycle, both primary-side switches Q1 and Q2 are in the off state.

10. The constant on-time control method as described in any one of claims 1, characterized in that, The resonant tank circuit has an inherent resonant period T, and the fixed duration is set to 0.9×T / 2 to 1.1×T / 2.

11. A constant on-time control method for a full-bridge LLC converter, characterized in that, The converter includes a transformer, the primary side of which is connected in series with a switching network comprising four switching transistors Q1~Q4, and the secondary side is connected to a rectifier via a resonant tank circuit; the primary side receives an input DC voltage, and the rectifier outputs a DC bus voltage; the method includes: A switching frequency is set for switching transistors Q1 and Q2 to adjust the DC bus voltage. The switching frequency corresponds to a switching period, and the switching period represents a complete operating cycle of switching transistors Q1 and Q2. Switches Q1 and Q2 are modulated to switch between an on state and an off state with a phase difference of 180 degrees, and the duration for which switches Q1 and Q2 remain in the on state is a fixed duration, which is at most half of the switching cycle. Modulate switches Q3 and Q4 to switch between on and off states; wherein the on-time of switch Q3 is longer than the fixed on-time of switch Q2, and their on-time periods overlap; the on-time of switch Q4 is longer than the fixed on-time of switch Q1, and their on-time periods overlap.

12. The constant on-time control method as described in claim 11, further comprising: A gate driver generates a gate voltage for each primary-side switch Q1~Q4 to drive each primary-side switch to switch between an on state and an off state during the switching cycle; wherein, the primary-side switch is turned on when it receives a high gate voltage and turned off when it receives a low gate voltage.

13. The constant on-time control method as described in claim 12, characterized in that, Also includes: At the beginning of the switching cycle, a high gate voltage is transmitted to the primary-side switching transistors Q2 and Q3 and maintained for a first fixed duration, driving the primary-side switching transistors Q2 and Q3 to turn on. After the first fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q2 to drive the primary-side switch Q2 to turn off, and a high gate voltage is transmitted to the primary-side switch Q3 until half of the switching cycle ends. After the first fixed duration ends, a high gate voltage is transmitted to the primary-side switch Q4 to drive the primary-side switch Q4 to turn on; At half of the switching cycle, a high gate voltage is supplied to the primary-side switch Q1 and maintained for a second fixed duration, driving the primary-side switch Q1 to turn on. After the second fixed duration ends, a low gate voltage is transmitted to the primary-side switch Q1 to drive the primary-side switch Q1 to turn off, and a high gate voltage is transmitted to the primary-side switch Q4 until the end of the switching cycle. After the second fixed duration ends, a high gate voltage is transmitted to the primary-side switch Q3, driving the primary-side switch Q3 to turn on; The DC bus voltage is sampled by a voltage sensor, and the switching frequency of the primary-side switch is corrected based on the difference between the sampled DC bus voltage and the target DC bus voltage.

14. The constant on-time control method as described in claim 13, characterized in that, The corrected switching frequency is lower than the resonant frequency of the resonant tank circuit.

15. The constant on-time control method as described in claim 13, characterized in that, The rectifier is one of a voltage multiplier, a full-bridge rectifier, or a half-bridge rectifier.

16. The constant on-time control method as described in claim 13, characterized in that, When both primary-side switching transistors Q3 and Q4 are in the on state, the transformer is short-circuited.

17. The constant on-time control method as described in claim 13, characterized in that: The converter includes two transformers connected in parallel to the input DC voltage; wherein the primary side of the first transformer is connected to a switching network containing primary-side switching transistors Q1 to Q4, and the primary side of the second transformer is connected to a second switching network containing primary-side switching transistors Q5 to Q8. The gate driver generates the same gate voltage for primary-side switch Q5 as it generates for primary-side switch Q1; the gate driver generates the same gate voltage for primary-side switch Q6 as it generates for primary-side switch Q2; the gate driver generates the same gate voltage for primary-side switch Q7 as it generates for primary-side switch Q3; and the gate driver generates the same gate voltage for primary-side switch Q8 as it generates for primary-side switch Q4.

18. The constant on-time control method as described in claim 17, characterized in that, The secondary sides of the first and second transformers are connected in series to the resonant tank circuit and the rectifier.

19. The constant on-time control method as described in claim 13, characterized in that, The moment when primary-side switches Q1 and Q2 switch from the on state to the off state is the moment when the peak value of the primary-side magnetizing current is equal to the switching current; wherein, the peak value of the primary-side magnetizing current is the product of the current of the transformer magnetizing inductance and the transformer turns ratio, and the switching current is the current when the primary-side switches Q1 and Q2 are on.

20. The constant on-time control method as described in claim 13, characterized in that, During the period from the end of the fixed duration to half the time before the end of the switching cycle, both primary-side switches Q1 and Q2 are in the off state.

21. The constant on-time control method as described in claim 11, characterized in that, The resonant tank circuit has an inherent resonant period T, and the fixed duration is set to 0.9×T / 2 to 1.1×T / 2.

22. A non-transitory computer-readable medium storing machine-readable instructions, characterized in that, When the instruction is executed by the processor, the processor performs the constant on-time control method for a push-pull LLC converter as described in any one of claims 1 to 10. or, When the instruction is executed by the processor, the processor performs the constant on-time control method for a full-bridge LLC converter as described in any one of claims 11 to 21.

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