Method of forming an image sensor
By pre-forming deep ion-doped regions in the substrate and performing low-temperature heat treatment, the problem of reduced pixel performance of CMOS image sensors caused by high-energy ion implantation was solved, and the full-well capacity of photodiodes and lattice defects were improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GEKKO SEMICON (SHANGHAI) CO LTD
- Filing Date
- 2024-12-19
- Publication Date
- 2026-06-23
AI Technical Summary
Existing technologies that enhance the full-well capacity of CMOS image sensors through high-depth/dose N-type ion implantation can lead to reduced pixel performance.
Before forming shallow trench isolation, a deep first ion doped region is pre-formed in the substrate, and lattice defects are repaired by low-temperature heat treatment to improve the full-well capacity of the photodiode.
This improved the full-well capacity of the photodiode and repaired lattice defects, thereby enhancing the performance of the image sensor.
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Figure CN122269841A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of image sensors, and more particularly to a method for forming an image sensor. Background Technology
[0002] A CMOS image sensor (CIS) uses the photoelectric conversion function of optoelectronic devices in a pixel array to convert the light image on the photosensitive surface into an electrical signal that is proportional to the light image. The signal is then processed and stored by peripheral circuits to record image information.
[0003] Full well capacity (FWC) is a major metric for CIS performance. A common approach is to improve FWC through high-depth / dose implantation of N-type regions; however, higher energy / dose ion implantation also leads to more defects, causing a decrease in CIS pixel performance. Summary of the Invention
[0004] To address the problems existing in the prior art, the present invention provides a method for forming an image sensor, comprising: providing a substrate; the substrate including a pixel region and a logic region; and, before forming a shallow trench isolation structure in the substrate, pre-forming a deep first ion-doped region in the substrate of the pixel region by ion implantation, for subsequent formation of a partial carrier collection region of the image sensor, thereby improving the full-well capacity of the photodiode of the image sensor.
[0005] In some embodiments, prior to ion implantation of the substrate, a first oxide layer is formed on the substrate surface.
[0006] In some embodiments, a first mask layer is formed in the area outside the pixel region or no mask is required, and ion implantation is performed on the substrate to form the first ion-doped region.
[0007] In some embodiments, the method further includes: after forming the first ion-doped region in the substrate, subjecting the substrate to a heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0008] In some embodiments, the method further includes: after removing the first oxide layer, forming a second oxide layer on the substrate surface, and forming a silicon nitride layer on the second oxide layer.
[0009] In some embodiments, the substrate is subjected to a heat treatment at 900 to 1300°C for 0 to 4 hours before forming a silicon nitride layer on the second oxide layer to repair lattice defects.
[0010] In some embodiments, after patterning the second oxide layer and the silicon nitride layer, the substrate is etched to form shallow trenches.
[0011] In some embodiments, after the shallow trenches are formed, the substrate is subjected to a heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0012] In some embodiments, the method further includes forming a third oxide layer on the surface of the shallow trench.
[0013] In some embodiments, after a third oxide layer is formed on the surface of the shallow trench, the substrate is subjected to a heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0014] In some embodiments, the method further includes: filling the shallow trench with a filling medium material to form the shallow trench isolation structure.
[0015] In some embodiments, forming the shallow trench isolation structure by filling the shallow trench with a filling dielectric material includes: depositing the dielectric material in the shallow trench using high-density plasma-enhanced chemical vapor deposition (HDP-CVD) at a first power until the shallow trench is partially filled; etching the shallow trench to enlarge the opening of the shallow trench; and continuing to deposit the dielectric material in the opening using the HDP-CVD at a second power until the shallow trench is completely filled; wherein the second power is at least 30% higher than the first power.
[0016] In some embodiments, the method further includes: chemically mechanically polishing the substrate to remove the silicon nitride layer; and subjecting the substrate to a heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0017] In some embodiments, the method further includes: forming multiple ion-doped regions of different depths within the substrate through multiple ion implantations, which together with the first ion-doped region form the carrier collection region of the image sensor.
[0018] In some embodiments, the method further includes: forming an ion-doped isolation region within the substrate by ion implantation for isolating a portion of the photodiode.
[0019] In some embodiments, the method further includes: etching the other side opposite to the device surface of the substrate to form a deep trench; filling the deep trench with an isolation material to form a deep trench isolation structure; the deep trench isolation structure and the ion-doped isolation structure are used together to isolate the photodiode.
[0020] Compared to existing technologies, this invention pre-forms a deep ion-implanted region in the substrate before forming shallow trench isolation, which serves as part of the carrier collection region for the photodiode, thereby improving the full-well capacity of the photodiode. Furthermore, this invention performs low-temperature thermal treatment on the substrate at a crucial process node in the image sensor fabrication process, which can repair lattice defects. Attached Figure Description
[0021] Figure 1 This is a functional block diagram of an image sensor as an exemplary embodiment of the present invention.
[0022] Figure 2 A circuit diagram of a pixel circuit for a four-transistor ("4T") pixel in a pixel array, which is an exemplary embodiment of the present invention.
[0023] Figures 3 to 15 This is a cross-sectional schematic diagram of the image sensor formation process, which is an exemplary embodiment of the present invention. Detailed Implementation
[0024] It should be noted that the accompanying drawings are in a very simplified form and use non-precise proportions. They are only used to facilitate and clarify the purpose of illustrating the embodiments of the present invention, and are not intended to limit the implementation conditions of the present invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportional relationship, or adjustments to the size should still fall within the scope of the technical content disclosed in the present invention, provided that they do not affect the effects and objectives that the present invention can produce.
[0025] The present invention provides a method for forming an image sensor, comprising: providing a substrate; the substrate including a pixel region and a logic region; prior to forming a shallow trench isolation structure in the substrate, pre-forming a deep first ion-doped region in the substrate of the pixel region by ion implantation, for subsequent formation of a partial carrier collection region of the image sensor, thereby improving the full-well capacity of the photodiode of the image sensor.
[0026] Figure 1 This is a functional block diagram of an image sensor 100 as an exemplary embodiment of the present invention.
[0027] The image sensor 100 includes a pixel array 105, a readout circuit 110, a functional logic 115, and a control circuit 120.
[0028] Pixel array 105 includes a two-dimensional (“2D”) array of multiple image sensor pixels (e.g., pixels P1, P2…Pn). As shown, each pixel is arranged in rows (e.g., rows R1 to Ry) and columns (e.g., columns C1 to Cx) to acquire image data of a person, place, or object, which can then be used to render a 2D image of the person, place, or object.
[0029] After each pixel has acquired its image data or image charge, the image data is read out by readout circuit 110 and transmitted to functional logic 115. Readout circuit 110 may include amplifier circuitry, analog-to-digital converter (“ADC”), etc. Functional logic 115 may simply store or process the image data. In one embodiment, readout circuit 110 may read out one row of image data at a time along readout column line 102, or may utilize other techniques (not shown) to read out the image data, such as column / row readout, serial readout, or simultaneous parallel readout of all pixels.
[0030] Control circuitry 120 is connected to pixel array 105 to control pixel array 105. For example, control circuitry 120 may generate a shutter signal for controlling image acquisition. In one embodiment, the shutter signal may be a global shutter signal, enabling all pixels within pixel array 105 to simultaneously capture their respective image data during a single acquisition window. In other embodiments, the shutter signal may be a rolling shutter signal, whereby each row, column, or group of pixels is sequentially enabled during successive acquisition windows.
[0031] Figure 2 A circuit diagram of a pixel circuit 101 for a four-transistor (“4T”) pixel in a pixel array, which is an exemplary embodiment of the present invention.
[0032] Pixel circuit 101 is used to implement Figure 1 This describes one possible pixel circuit architecture for each pixel within the pixel array 105. However, it should be understood that the embodiments described herein are not limited to a 4T pixel architecture; they can also be applied to 3T designs, 5T designs, and various other pixel architectures.
[0033] exist Figure 2 In each pixel Px of the pixel circuit 101, there are a photodiode PD, a transfer transistor T1, a reset transistor T2, a source follower transistor T3 ("SF"), and a selection transistor T4.
[0034] In some embodiments, the number of photodiodes PD can be one, two, four, or other numbers. For example, four photodiodes PD can share a floating diffusion region FD. During operation, a transfer transistor T1 receives a signal TX, which transfers the charge accumulated in the photodiodes PD to the floating diffusion region FD. In one embodiment, the floating diffusion node FD can be coupled to a storage capacitor for temporarily storing image charge.
[0035] Reset transistor T2 is coupled between voltage source VDD and floating diffusion region FD to reset the pixel under the control of reset signal RST (e.g., discharging or charging FD and PD to a preset voltage). SF transistor T3 is coupled between voltage source VDD and select transistor T4. Select transistor T4, under the control of select signal SEL, selectively couples the output of pixel circuit 101 to readout column line 102.
[0036] In one embodiment, the TX signal, RST signal, and SEL signal are generated by the control circuit 120. For example, in an embodiment where the pixel array 105 operates using a global shutter, the global shutter signal is coupled to the gate of each transfer transistor T1 in the entire pixel array 105 to simultaneously initiate charge transfer from the photodiode PD of each pixel.
[0037] The following description, in conjunction with the accompanying drawings, describes the method for forming an image sensor. For ease of description, only a portion of the image sensor's structure will be described below.
[0038] like Figure 3 As shown, the present invention provides a method for forming an image sensor, comprising the following steps.
[0039] refer to Figure 3 Substrate 21 is provided.
[0040] refer to Figure 3 The substrate 21 can be a doped or undoped semiconductor material, such as silicon, germanium, silicon-germanium, silicon-germanium-on-insulator (SGOI), or combinations thereof. The substrate 21 may include a substrate with multiple epitaxial layers. The substrate 21 may include the pixel region and logic region of the image sensor. The pixel region of the image sensor is used to receive external optical signals and convert them into electrical signals for imaging. The specific structures of the pixel region and logic region of the image sensor are not described in detail here.
[0041] refer to Figure 4 A first oxide layer 22 is formed on the substrate 21. The first oxide layer 22 may be silicon oxide.
[0042] In one embodiment, reference Figure 5 Without a mask, ion implantation is performed on substrate 21 to form a first ion-doped region 211, which is used to form a partial carrier collection region for the subsequent image sensor.
[0043] In another embodiment, reference Figure 6 A first mask layer 221 is formed in the area outside the pixel area, and ion implantation is performed on the substrate 21 to form a first ion-doped region 211, which is used to form a partial carrier collection region of the photodiode of the image sensor. The first mask layer 221 can be a photoresist.
[0044] After forming the first ion-doped region 211 in the substrate 21, the substrate 21 is subjected to heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0045] The following example illustrates ion implantation of substrate 21 without the need for a mask.
[0046] refer to Figure 7 Remove the first oxide layer 22.
[0047] refer to Figure 8 A second oxide layer 231 is formed on the substrate 21, and a silicon nitride layer 232 is formed on the second oxide layer 231. The second oxide layer 231 can be silicon oxide. Optionally, before forming the silicon nitride layer 232 on the second oxide layer 231, the substrate 21 is subjected to a heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0048] refer to Figure 9 After patterning the second oxide layer 231 and the silicon nitride layer 232, the substrate 21 is etched to form shallow trenches 24. After forming the shallow trenches 24, the substrate 21 is subjected to heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0049] refer to Figure 10 A third oxide layer 251 is formed on the surface of the shallow trench 24. The material of the third oxide layer 251 can be silicon oxide, wherein the reaction source is the substrate Si and the reaction gas O2 / H2, the reaction temperature is 800~1000℃, and the flow rate ratio of H2 in the mixed gas is 10~30%. After the third oxide layer 251 is formed on the surface of the shallow trench 24, the substrate 21 can be heat-treated at 900 to 1300℃ for 0 to 4 hours to repair lattice defects.
[0050] refer to Figure 11 A shallow trench isolation structure is formed by filling the shallow trench 24 with a dielectric material 252. The dielectric material 252 can be silicon oxide. Specifically, high-density plasma-enhanced chemical vapor deposition (HDP-CVD) at a first power can be used to deposit the dielectric material 252 in the shallow trench 24 until the shallow trench 24 is partially filled; the shallow trench 24 is then etched to enlarge the opening of the shallow trench 24; and high-density plasma-enhanced chemical vapor deposition at a second power can be used to continue deposition in the opening until the shallow trench 24 is completely filled; wherein the second power is at least 30% higher than the first power.
[0051] refer to Figure 12 The substrate 21 is then subjected to chemical mechanical polishing to remove the silicon nitride layer 232. Further, the substrate 21 can be subjected to heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
[0052] refer to Figure 13 Through multiple ion implantations, multiple ion-doped regions of different depths (e.g., ion-doped region 261, ion-doped region 262) are formed in the substrate 21, which together with the first ion-doped region 211 form the carrier collection region 26 of the photodiode of the image sensor (dashed box in the figure).
[0053] refer to Figure 13 An ion-doped isolation region 27 is formed within the substrate 21 by ion implantation to isolate a portion of the photodiode.
[0054] refer to Figure 14 After forming transistors, metal interconnects and other structures (not shown in the figure) on the first side (front side) of the substrate 21, the other side (back side) opposite the device side of the substrate 21 is etched to form a deep trench 28.
[0055] refer to Figure 15 The deep trench 28 is filled with insulating material 29 to form a deep trench isolation structure.
[0056] The deep trench isolation structure and the ion-doped isolation region 27 are used together to isolate the photodiode.
[0057] The basic concepts have been described above. It is clear that the detailed disclosure above is merely illustrative and does not constitute a limitation of the present invention. Although not explicitly stated herein, various modifications, improvements, and corrections may be made to the present invention by those skilled in the art. Such modifications, improvements, and corrections are suggested in this invention and therefore remain within the spirit and scope of the exemplary embodiments of the present invention.
[0058] It should be understood that the embodiments described in this invention are merely illustrative of the principles of the invention. Other modifications may also fall within the scope of this invention. Therefore, alternative configurations of the embodiments of this invention are considered as examples and not limitations, and are regarded as consistent with the teachings of this invention. Accordingly, the embodiments of this invention are not limited to those explicitly described and illustrated herein.
Claims
1. A method for forming an image sensor, characterized in that, include: A substrate is provided; the substrate includes pixel areas and logic areas; Before forming a shallow trench isolation structure in the substrate, a deep first ion-doped region is pre-formed in the substrate of the pixel area by ion implantation for the subsequent formation of a partial carrier collection region of the image sensor, thereby improving the full-well capacity of the photodiode of the image sensor.
2. The forming method as described in claim 1, characterized in that, Prior to ion implantation of the substrate, the method further includes forming a first oxide layer on the surface of the substrate.
3. The forming method as described in claim 2, characterized in that, A first mask layer is formed in the area outside the pixel region, or no mask is required, and ion implantation is performed on the substrate to form the first ion-doped region.
4. The method as described in claim 3, characterized in that, Also includes: After the first ion-doped region is formed in the substrate, the substrate is subjected to heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
5. The method as described in claim 3, characterized in that, Also includes: After removing the first oxide layer, a second oxide layer is formed on the surface of the substrate, and a silicon nitride layer is formed on the second oxide layer.
6. The method as described in claim 5, characterized in that, Before forming a silicon nitride layer on the second oxide layer, the substrate is subjected to a heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
7. The method as described in claim 5, characterized in that, After patterning the second oxide layer and the silicon nitride layer, the substrate is etched to form shallow trenches.
8. The method as described in claim 7, characterized in that, After the shallow trenches are formed, the substrate is subjected to heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
9. The method as described in claim 7, characterized in that, Also includes: A third oxide layer is formed on the surface of the shallow trench.
10. The method as described in claim 9, characterized in that, After forming a third oxide layer on the surface of the shallow trench, the substrate is subjected to heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
11. The method as described in claim 9, characterized in that, Also includes: The shallow trench is formed by filling the shallow trench with a filling medium material.
12. The forming method as described in claim 11, characterized in that, The shallow trench isolation structure is formed by filling the shallow trench with a filling medium material. The dielectric material is deposited in the shallow trench at a first power using high-density plasma-enhanced chemical vapor deposition (HDP-CVD) until the shallow trench is partially filled. The shallow trenches are etched to enlarge their openings; The high-density plasma-enhanced chemical vapor deposition method is used to continue deposition in the opening at a second power until the shallow trench is completely filled; wherein the second power is at least 30% higher than the first power.
13. The method as described in claim 11, characterized in that, Also includes: The substrate is subjected to chemical mechanical polishing to remove the silicon nitride layer; The substrate is subjected to heat treatment at 900 to 1300°C for 0 to 4 hours to repair lattice defects.
14. The forming method as described in claim 1, characterized in that, Also includes: Multiple ion-doped regions of different depths are formed in the substrate through multiple ion implantations, which together with the first ion-doped region form the carrier collection region of the image sensor.
15. The forming method as described in claim 1, characterized in that, Also includes: An ion-doped isolation region is formed within the substrate by ion implantation to isolate a portion of the photodiode.
16. The forming method as described in claim 15, characterized in that, Also includes: Etch the side of the substrate opposite the device surface to form a deep trench; The deep trench is filled with insulating material to form a deep trench isolation structure; The deep trench isolation structure and the ion-doped isolation structure work together to isolate the photodiode.