Electronic device
By setting a judgment unit in the integrated circuit chip, the connection status between the semiconductor device and the printed substrate is detected by constant potential wiring and pads. This solves the connection problem caused by narrow solder ball pitch, realizes rapid detection and processing, and improves the reliability of electronic equipment.
Patent Information
- Application Number
- CN202511956859.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-12-25
- Filing Date
- 2025-12-23
- Publication Date
- 2026-06-26
AI Technical Summary
During the mounting process of semiconductor devices onto a substrate, the narrow pitch of solder balls reduces the connection area, making the solder balls prone to peeling off during temperature cycling, which can lead to sudden malfunctions in electronic devices. Existing technologies have not been able to effectively address this type of failure.
A determination unit is set in the integrated circuit chip to detect the connection status between the semiconductor device and the printed substrate. By using constant potential wiring and the connection between the pad and the terminal, a connection failure is determined, including the connection between the pad and the terminal with constant potential, and the connection status is detected by using a resistor to pull up the potential.
It enables rapid detection of the connection between semiconductor devices and printing substrates, allowing for timely identification of poor connections and appropriate handling to prevent equipment failure and improve equipment reliability and stability.
Smart Images

Figure CN122283543A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to electronic devices. Background Technology
[0002] As disclosed in Patent Document 1, a continuity check technique for verifying the connection status of semiconductor components and substrates when electronic devices are manufactured has been known for a long time.
[0003] Patent Document 1: Japanese Patent Application Publication No. 2010-271182
[0004] In recent years, the increasing number of terminals accompanying the multifunctionality of electronic devices, and the miniaturization of semiconductor packages embedded in electronic devices, have been advancing, resulting in narrower pitch arrangements of solder balls in BGAs (Ball Grid Arrays). Consequently, the connection area of each terminal is reduced during the mounting of the semiconductor device onto the substrate. Under such conditions, with prolonged temperature cycling, solder balls may peel off from the substrate, leading to sudden failures in the market, but such failures have not been adequately addressed. Summary of the Invention
[0005] One aspect of the electronic device involved in this invention comprises: Printed substrate; and Semiconductor devices are mounted on the printed substrate. The semiconductor device has: Integrated circuit chip, including a decision unit; and An integrated circuit substrate, wherein the integrated circuit substrate is a substrate on which the integrated circuit chip is mounted. The integrated circuit substrate has multiple terminals. The printed circuit board has multiple pads and multiple wirings. The plurality of terminals are each connected to the plurality of solder pads. Among the plurality of wirings is constant-potential wiring with a constant potential. The first pad of the plurality of pads is connected to the constant potential wiring. The first terminal of the plurality of terminals is connected to the first pad. The determination unit determines whether there is a poor connection between the semiconductor device and the printed substrate based on the potential of the first terminal. Attached Figure Description
[0006] Figure 1 It is a 3D view of the electronic device.
[0007] Figure 2 This is a diagram illustrating an example of the functional configuration of an electronic device.
[0008] Figure 3 It is a cross-sectional view showing the structure of a semiconductor device.
[0009] Figure 4 This is a diagram of the terminal mounting surface of a transparent package.
[0010] Figure 5 This is a functional block diagram of an integrated circuit chip.
[0011] Figure 6 This is a top view of a portion of the printed circuit board.
[0012] Figure 7 This is a partial top view of the printed circuit board.
[0013] Figure 8 This is a partial top view of the printed circuit board.
[0014] Explanation of reference numerals in the attached figures
[0015] 1…Electronic device, 2…PC, 3…SD card, 10…Image reading device, 12…Device body, 13…Recording device, 16…Operating unit, 18…Opening, 20…Pull-out unit, 22…Front side tray, 24…Rear side tray, 26…Paper receiving unit, 27…ADF, 28…Original document transport unit, 40…Original document mounting surface, 42…Original document ejection surface, 44…Cover, 50…Main substrate, 51…Sub-substrate, 52…Sub-substrate, 61…Motor, 62…Print head, 63…Scanning module, 64…Wireless LAN module, 65…LCD, 71, 72, 73…Cables, 100…Semiconductor device, 110…Motor driver, 120…Head driver IC, 130…Serial flash memory, 140…DDR, 151, 152, 153, 154…Connector, 160…LCD control IC, 170…SD control IC, 181…Connector, 19 0…Power supply circuit, 192…Reset IC, 200…Integrated circuit chip, 210…Control unit, 221, 222, 223…USB interface circuit, 231, 232…Memory interface circuit, 241, 241-1~241-n…GPIO, 250…Detection unit, 260…Storage unit, 261…ROM, 262…RAM, 263…Register, 270a, 270b, 270c, 270d… Resistor, 300… Base substrate, 301… Terminal mounting surface, 302, 303, 304, 305… Edge of base substrate, 310, 310a, 310b, 310c, 310d, 310v… Solder ball, 320a, 320b, 320c, 320d, 320v… Wiring, 330… Package, 350… Housing, 370… Bonding component, 380… Bonding wire, 400… Printed substrate, 410… Pad. Detailed Implementation
[0016] Hereinafter, preferred embodiments of the present invention will be described using the accompanying drawings. The drawings are provided for ease of explanation. It should be noted that the embodiments described below do not unduly limit the scope of the invention as defined in the claims. Furthermore, not all of the configurations described below are essential elements of the present invention.
[0017] Hereinafter, as an example of the electronic device involved in this invention, a multifunction printer having printing and scanning functions will be used to describe the electronic device of this embodiment.
[0018] 1. Structure of electronic devices
[0019] Figure 1 This is a perspective view of the external appearance of electronic device 1. It should be noted that the following description uses the X, Y, and Z directions, which are orthogonal to each other. Additionally, sometimes the starting side of the arrow representing the X direction is called the -X side, and the tip side is called the +X side; the starting side of the arrow representing the Y direction is called the -Y side, and the tip side is called the +Y side; and the starting side of the arrow representing the Z direction is called the -Z side, and the tip side is called the +Z side.
[0020] Electronic device 1 includes a main body 12 that is generally rectangular in shape as a whole. The main body 12 includes a recording device 13 for recording on paper; and an image reading device 10 disposed on the recording device 13 for reading information such as pictures, characters, and photographs formed on the original document and generating an image. For example, the image generated by the image reading device 10 is printed on paper by the recording device 13.
[0021] The image reading device 10 includes an automatic document feeder (ADF) 27. The ADF 27 is configured to rotate with the -Y side, i.e. the back side of the device body 12, as the pivot point of the rotation axis J, and also functions as a top plate that can be opened and closed relative to the upper part of the device body 12.
[0022] The ADF27 includes: an original document transport section 28 with a drive mechanism for transporting original documents; an original document placement surface 40; and an original document discharge surface 42. The original document placed on the original document placement surface 40 is fed into the image reading device 10 through the original document transport section 28, read, and then discharged and placed on the original document discharge surface 42.
[0023] An operation unit 16 is provided on the upper part of the +Y side, i.e. the front side, of the main body 12 of the device. The operation unit 16 is configured to include a power button, a printed setting button, a display panel, etc., for operating the electronic device 1.
[0024] The device body 12 has a back side tray 24 for holding paper on the -Y side, i.e., the back side. The paper held on the back side tray 24 is fed to the recording device 13 for recording.
[0025] A paper receiving section 26 for holding multiple sheets of paper is provided on the -Z side, i.e., the bottom side, of the front side tray 22. The paper receiving section 26 is provided in such a way that it can slide along the Y direction in the lower part of the device body 12, and is configured to be detachable from the device body 12. The paper held in the paper receiving section 26 is fed to the recording device 13 for recording.
[0026] The device body 12 has a pull-out section 20 on the front side, which is mounted on the front side tray 22 and can slide in the Y direction. Paper that has been fed into the recording device 13 from the rear side tray 24 or the paper receiving section 26 and recorded is discharged from the opening 18 on the front side of the device body 12 and placed on the front side tray 22, in the state of being pulled out from the front side tray 22.
[0027] 2. The Functional Composition of Electronic Devices
[0028] Figure 2 This diagram illustrates an example of the functional configuration of electronic device 1. (For example...) Figure 2 As shown, the electronic device 1 has a main substrate 50, a sub-substrate 51, and a sub-substrate 52. The main substrate 50 and the sub-substrates 51 and 52 are, for example, multilayer printed substrates.
[0029] The main substrate 50 is equipped with a semiconductor device 100 having an integrated circuit chip 200, a motor driver 110, a head driver IC 120, a serial flash memory 130, a DDR 140, a power supply circuit 190, and a reset IC 192. DDR is short for Double-Data-Rate SDRAM. Additionally, connectors 151, 152, 153, and 154 are provided on the main substrate 50.
[0030] An LCD control IC 160 is mounted on the sub-board 51. The sub-board 51 is connected to the main board 50 via a cable 71.
[0031] An SD control IC 170 is mounted on the sub-board 52, and a connector 181 is also provided. The sub-board 52 is connected to the main board 50 via a cable 72.
[0032] In addition, electronic device 1 includes various motors 61, a printhead 62, a scanning module 63, a wireless LAN module 64, and an LCD 65. LAN is short for Local Area Network. LCD is short for Liquid Crystal Display.
[0033] The motor 61 is connected to the main board 50 via connector 151 and is driven by motor driver 110.
[0034] The printhead 62 is located in the recording device 13, connected to the main substrate 50 via connector 152, and driven by the printhead driver IC 120.
[0035] The scanning module 63 is included in the image reading device 10, connected to the main substrate 50 via connector 153, and controlled by the integrated circuit chip 200. Furthermore, the scanning module 63 sends the scanned data generated from scanning the original document to the integrated circuit chip 200.
[0036] The wireless LAN module 64 is a module for wireless data communication with external devices of the electronic device 1. The wireless LAN module 64 is connected to the main substrate 50 via cable 73 and is controlled by the integrated circuit chip 200. Additionally, the wireless LAN module 64 communicates with the integrated circuit chip 200 via USB.
[0037] LCD65 is included in the operation unit 16 and is a display panel for displaying various information. LCD65 is connected to the sub-substrate 51 via cable 74 and is controlled by LCD control IC 160.
[0038] LCD control IC 160 is connected to LCD 65 via cable 74 and is the circuit that controls the display of various information on LCD 65. LCD control IC 160 is controlled by integrated circuit chip 200.
[0039] The SD controller IC 170 is a circuit that controls the writing and reading of data from the SD card 3 inserted into connector 181. The SD controller IC 170 is controlled by integrated circuit chip 200. Additionally, the SD controller IC 170 communicates with integrated circuit chip 200 via USB.
[0040] The motor driver 110 is connected to the motor 61 via connector 151 and is a circuit that drives the motor 61. The motor driver 110 is controlled by the integrated circuit chip 200.
[0041] The head driver IC120 is connected to the print head 62 via connector 152 and is the circuit that drives the print head 62. The head driver IC120 is controlled by integrated circuit chip 200.
[0042] Serial flash memory 130 and DDR140 are storage devices for storing various types of data, and the writing and reading of data are controlled by integrated circuit chip 200.
[0043] Power supply circuit 190 supplies power to semiconductor device 100, motor driver 110, head driver IC 120, serial flash memory 130, and DDR 140. For example, power supply circuit 190 generates a power supply voltage of several volts and supplies it to semiconductor device 100, motor driver 110, head driver IC 120, serial flash memory 130, and DDR 140. Additionally, power supply circuit 190 generates a power supply voltage of tens of volts to drive motor 61 and printhead 62 and supplies it to motor driver 110 and head driver IC 120. Motor 61 and printhead 62 are operated by being powered from power supply circuit 190 via motor driver 110 and head driver IC 120, respectively. Power supply circuit 190 is controlled by integrated circuit chip 200.
[0044] If an abnormality is detected by monitoring the power supply voltage or other parameters of the semiconductor device 100, the reset IC 192 resets the semiconductor device 100. The reset IC 192 is controlled by the integrated circuit chip 200.
[0045] Thus, the integrated circuit chip 200 is a SoC that controls the motor driver 110, head driver IC 120, serial flash memory 130, DDR 140, scanning module 63, wireless LAN module 64, LCD control IC 160, SD control IC 170, power supply circuit 190, and reset IC 192. SoC is short for System On Chip.
[0046] Additionally, the integrated circuit chip 200 is connected to an external PC2 of the electronic device 1 via connector 154 and communicates data with the PC2. Connector 154 is, for example, a USB connector.
[0047] 3. Structure of semiconductor devices
[0048] Semiconductor device 100 has surface-mount packaging methods such as SiP (System-in-Package), BGA (Ball Grid Array Package), LGA (Large Grid Array Package), and WPP (Wafer-Level Package). The following description uses the BGA packaging method of semiconductor device 100 as an example to illustrate its structure.
[0049] Figure 3 This is a cross-sectional view showing the structure of the semiconductor device 100. It should be noted that, below, Figure 1 The X, Y, and Z directions shown are independent directions, and are described using mutually orthogonal x, y, and z directions. Additionally, sometimes the starting side of the arrow representing the x direction is called the -x side, and the leading side is called the +x side; the starting side of the arrow representing the y direction is called the -y side, and the leading side is called the +y side; and the starting side of the arrow representing the z direction is called the -z side, and the leading side is called the +z side.
[0050] like Figure 3 As shown, the semiconductor device 100 includes a base substrate 300, an integrated circuit chip 200, and a housing 350.
[0051] The housing 350 is located on the +z side of the integrated circuit chip 200 and is bonded to the base substrate 300 in a manner that covers the integrated circuit chip 200. The housing 350 includes epoxy resin or the like and protects the integrated circuit chip 200.
[0052] The base substrate 300 is located on the -z side of the integrated circuit chip 200. The integrated circuit chip 200 is mounted on the base substrate 300 by bonding members 370 such as adhesives. The base substrate 300 and the integrated circuit chip 200 are electrically connected via bonding wires 380.
[0053] A plurality of wiring patterns (not shown) and a plurality of electrodes are provided on the base substrate 300. Furthermore, bonding wires 380 are electrically connected to electrodes (not shown) formed on the +z side surface of the base substrate 300. Additionally, a plurality of electrodes (not shown) are provided on the -z side surface of the base substrate 300. Furthermore, solder balls 310 are mounted on each of the plurality of electrodes provided on the -z side surface of the base substrate 300. That is, a plurality of terminals, i.e., a plurality of solder balls 310, are provided on the base substrate 300. Figure 2 The main substrate 50, i.e., the printing substrate 400, is provided with a plurality of pads 410 and a plurality of wirings (not shown), and a plurality of solder balls 310 and a plurality of pads 410 are each connected. The base substrate 300 is electrically connected to the printing substrate 400 via a plurality of solder balls 310. The plurality of solder balls 310 constitute a so-called ball grid array that electrically and mechanically connects the base substrate 300 and the printing substrate 400. It should be noted that, in the following description, the -z side surface of the base substrate 300 on which the plurality of solder balls 310 are mounted is referred to as the terminal mounting surface 301.
[0054] Package 330 is constructed by a ball grid array consisting of a base substrate 300, a housing 350, and multiple solder balls 310. Integrated circuit chip 200 is mounted on the inner substrate of package 330, namely the base substrate 300.
[0055] In the semiconductor device 100 configured as described above, signals input to the semiconductor device 100 via a plurality of solder balls 310 disposed on the terminal mounting surface 301 are transmitted via electrodes, wiring patterns, and bonding wires 380 disposed on the substrate 300 and input to the integrated circuit chip 200. Furthermore, signals output from the integrated circuit chip 200 are input to a plurality of pads 410 of the printed circuit board 400 via the bonding wires 380, electrodes, wiring patterns, and solder balls 310 disposed on the substrate 300.
[0056] Figure 4This is a view of the terminal mounting surface 301 of the base substrate 300 of the package 330 from the +z side. (See diagram below.) Figure 4 As shown, the base substrate 300 of the package 330 has a side 302 extending in the x-direction, a side 303 extending in the x-direction and opposite to side 302, a side 304 extending in the y-direction, and a side 305 extending in the y-direction and opposite to side 304. Sides 304 and 305 intersect with sides 302 and 303, respectively. That is, the base substrate 300 is generally rectangular in shape with sides 302, 303, 304, and 305 as its outer perimeter.
[0057] like Figure 4 As shown, in the terminal mounting surface 301 of the base substrate 300, a plurality of solder balls 310 are arranged in a grid pattern in 23 rows along the y-direction, with a maximum of 23 solder balls 310 arranged in each row. Solder balls 310 that connect to the motor driver 110, head driver IC 120, serial flash memory 130, DDR 140, and connectors 151, 152, 153, and 154 are arranged at the outermost periphery and near the outermost periphery of the terminal mounting surface 301. The plurality of solder balls 310 arranged at the outermost periphery are spaced widely to ensure sufficient space for wiring connecting to the solder balls 310 inside them to pass through. Furthermore, in the terminal mounting surface 301, a power supply voltage is supplied to the plurality of solder balls 310 arranged in the area near the center surrounded by dashed lines.
[0058] 4. Functional Composition of Integrated Circuit Chips
[0059] Figure 5 This is a functional block diagram of integrated circuit chip 200. (Example) Figure 5 As shown, the integrated circuit chip 200 includes a control unit 210, USB interface circuits 221, 222, and 223, memory interface circuits 231 and 232, n GPIOs 241-1 to 241-n, a detection unit 250, a storage unit 260, and resistors 270a, 270b, 270c, and 270d. GPIO is short for General-Purpose Input / Output. It should be noted that the integrated circuit chip 200 can also be omitted or modified. Figure 5 A composition that is part of or has other constituent elements added to it.
[0060] USB interface circuit 221 is connected to terminal group T1G, which includes multiple terminals of integrated circuit chip 200. USB interface circuit 222 is connected to terminal group T2G, which includes multiple terminals of integrated circuit chip 200. USB interface circuit 223 is connected to terminal group T3G, which includes multiple terminals of integrated circuit chip 200. Memory interface circuit 231 is connected to terminal group T4G, which includes multiple terminals of integrated circuit chip 200. Memory interface circuit 232 is connected to terminal group T5G, which includes multiple terminals of integrated circuit chip 200. Control unit 210 is connected to terminal group T6G, which includes multiple terminals of integrated circuit chip 200.
[0061] Terminal groups T1G to T6G of integrated circuit chip 200 are respectively connected to terminal groups S1G to S6G of semiconductor device 100. Each terminal in terminal groups S1G to S6G of semiconductor device 100 is a solder ball 310 disposed on terminal mounting surface 301. Terminal group S1G of semiconductor device 100 is connected to PC2 via connector 154. Terminal group S2G of semiconductor device 100 is connected to SD control IC 170 via cable 72. Terminal group S3G of semiconductor device 100 is connected to wireless LAN module 64 via cable 73. Terminal group S4G of semiconductor device 100 is connected to serial flash memory 130. Terminal group S5G of semiconductor device 100 is connected to DDR 140. Terminal group S6G of semiconductor device 100 is connected to LCD control IC 160.
[0062] n GPIOs 241-1 to 241-n are respectively connected to n terminals S1 to Sn of semiconductor device 100. n terminals T1 to Tn of integrated circuit chip 200 are respectively connected to n terminals S1 to Sn of semiconductor device 100. Terminals S1 to Sn of semiconductor device 100 are solder balls 310 disposed on terminal mounting surface 301.
[0063] The storage unit 260 includes ROM 261, RAM 262, and register 263. ROM is short for Read Only Memory, and RAM is short for Random Access Memory. ROM 261 stores various programs and predetermined data. RAM 262 is used as the operating area of the control unit 210, storing programs and data read from ROM 261, as well as data temporarily generated by the control unit 210. Register 263 stores various setting data, etc.
[0064] The control unit 210 performs various controls, image processing, etc. In this embodiment, the control unit 210 is a processor such as a CPU, which performs various controls, image processing, etc. by executing a program (not shown) stored in the ROM 261. However, some of the processing by the control unit 210 can also be implemented in hardware.
[0065] Specifically, the control unit 210 performs various controls on the motor driver 110, the head driver IC 120, the scanning module 63, and the LCD control IC 160.
[0066] In addition, the control unit 210 communicates with the PC2 via USB through the control of the USB interface circuit 221. Furthermore, the control unit 210 communicates with the SD control IC 170 via USB through the control of the USB interface circuit 222. Additionally, the control unit 210 communicates with the wireless LAN module 64 via USB through the control of the USB interface circuit 223. Furthermore, the control unit 210 sends image data to the LCD control IC 160.
[0067] Furthermore, the control unit 210 performs data writing and reading from the serial flash memory 130 by controlling the memory interface circuit 231. Additionally, the control unit 210 performs data writing and reading from the DDR 140 by controlling the memory interface circuit 232.
[0068] For example, the control unit 210 receives image data for printing from the PC2 via the USB interface circuit 221 and writes it to the serial flash memory 130 or DDR140. Additionally, for example, the control unit 210 receives image data stored on the SD card 3 from the SD controller IC 170 via the USB interface circuit 222 and writes it to the serial flash memory 130 or DDR140. Furthermore, for example, the control unit 210 receives image data from the wireless LAN module 64 via the USB interface circuit 223 and writes it to the serial flash memory 130 or DDR140. Additionally, for example, the control unit 210 obtains scanning data from the scanning module 63, performs image processing on the scanning data to generate image data, and writes it to the serial flash memory 130 or DDR140.
[0069] Additionally, for example, the control unit 210 writes image data generated by image processing of the scan data to the serial flash memory 130 or DDR 140.
[0070] Additionally, for example, the control unit 210 reads image data for printing from the serial flash memory 130 or DDR140, performs image processing for printing to generate printing data, and outputs it to the head driver IC 120. Additionally, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and sends it to the PC2 via the USB interface circuit 221. Additionally, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and sends it to the SD control IC 170 via the USB interface circuit 222. Additionally, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and sends it to the wireless LAN module 64 via the USB interface circuit 223.
[0071] Furthermore, the control unit 210 controls the inputs and outputs of GPIOs 241-1 to 241-n. Specifically, the control unit 210 controls each of GPIOs 241-1 to 241-n as an input / output circuit, an input circuit, or an output circuit. For example, the control unit 210 may control GPIOs 241-k and T1 of GPIOs 241-3 to 241-n to become output circuits, respectively, and output control signals from terminals Tk and T1 to the power supply circuit 190 and the reset IC 192.
[0072] like Figure 5 As shown, terminal Tv of integrated circuit chip 200 is connected to terminal Sv of semiconductor device 100. Terminal Sv of semiconductor device 100 is connected to pad Pv disposed on printed circuit board 400. Pad Pv is Figure 3 Any of the plurality of pads 410 shown. In the printed circuit board 400, pad Pv is connected to wiring 320V. Wiring 320V is a power supply wiring that supplies power from terminal Sv to semiconductor device 100. Figure 2 The power supply circuit 190 shown generates a power supply voltage VDD of several volts. Various components of the integrated circuit chip 200 operate by being supplied with this power supply voltage VDD.
[0073] Furthermore, terminals Ta, Tb, Tc, and Td of the integrated circuit chip 200 are connected to terminals Sa, Sb, Sc, and Sd of the semiconductor device 100, respectively. Terminals Sa, Sb, Sc, and Sd of the semiconductor device 100 are solder balls 310 disposed on the terminal mounting surface 301 and are connected to pads Pa, Pb, Pc, and Pd disposed on the printed circuit board 400. Pads Pa, Pb, Pc, and Pd are respectively... Figure 3 Any one of the plurality of pads 410 shown. In the printed circuit board 400, pads Pa, Pb, Pc, and Pd are connected to wirings 320a, 320b, 320c, and 320d, respectively. Wirings 320a, 320b, 320c, and 320d are constant potential wirings with a constant potential, such as ground potential.
[0074] Furthermore, terminals Ta, Tb, Tc, and Td of integrated circuit chip 200 are connected to the power supply line VDD via resistors 270a, 270b, 270c, and 270d, respectively. That is, resistors 270a, 270b, 270c, and 270d function as pull-up resistors. Therefore, terminals Sa and Ta become ground potentials if the connection between terminal Sa and pad Pa is normal, but become power potentials due to poor connection, pulled up by resistor 270a. Similarly, terminals Sb and Tb become ground potentials if the connection between terminal Sb and pad Pb is normal, but become power potentials due to poor connection, pulled up by resistor 270b. Likewise, terminals Sc and Tc become ground potentials if the connection between terminal Sc and pad Pc is normal, but become power potentials due to poor connection, pulled up by resistor 270c. Similarly, if the connection between terminal Sd and pad Pd is normal, it becomes the ground potential. However, if the connection is poor, it is pulled up by resistor 270d and becomes the power supply potential.
[0075] In this embodiment, the control unit 210 functions as a determination unit. This determination unit determines whether there is a connection problem between the semiconductor device 100 and the printing substrate 400 based on the potentials of the terminals Sa, Sb, Sc, and Sd of the semiconductor device 100, i.e., the potentials of the terminals Ta, Tb, Tc, and Td of the integrated circuit chip 200. Specifically, if all the potentials of terminals Ta, Tb, Tc, and Td are low, the control unit 210 determines that the connection between the semiconductor device 100 and the printing substrate 400 is normal; if at least one of the potentials of terminals Ta, Tb, Tc, and Td is high, the control unit 210 determines that the connection between the semiconductor device 100 and the printing substrate 400 is faulty.
[0076] In this embodiment, when at least one of the potentials of terminals Sa, Sb, Sc, and Sd, i.e., the potentials of terminals Ta, Tb, Tc, and Td of the integrated circuit chip 200, changes from a low level to a high level, the detection unit 250 outputs an interrupt signal INT to the determination unit, i.e., the control unit 210. Upon receiving the interrupt signal INT, the control unit 210 determines that a connection failure has occurred between the semiconductor device 100 and the printed circuit board 400. Therefore, the control unit 210 does not need to determine whether a connection failure exists before receiving the interrupt signal INT, and thus can prioritize other processing.
[0077] The control unit 210 performs predetermined processing when a connection failure is detected. For example, if the control unit 210 determines that a connection failure has occurred, it may stop the power supply from the power supply circuit 190 to the motor driver 110 and the motor 61. For example, if the recording device 13 has a transport motor 61 for transporting the medium, i.e., paper, the control unit 210 may stop the power supply from the power supply circuit 190 to the transport motor when a connection failure is determined. Since the recording device 13 may be unable to perform normal printing if a connection failure occurs between the semiconductor device 100 and the printing substrate 400, stopping the power supply to the transport motor prevents the paper from being wasted.
[0078] Alternatively, for example, if the control unit 210 determines that a connection failure has occurred, it sends a control signal to the reset IC 192. The reset IC 192 receives the control signal and resets the semiconductor device 100. If the semiconductor device 100 is reset, the detection unit 250 outputs an interrupt signal INT to the control unit 210 again. The control unit 210 detects the connection failure and therefore sends the control signal to the reset IC 192 again. That is, once the control unit 210 detects a connection failure, it will repeatedly reset the semiconductor device 100, thus stopping various functions of the semiconductor device 100 and reducing the possibility of malfunction caused by a connection failure.
[0079] Alternatively, the control unit 210, upon supplying a power supply voltage VDD to the semiconductor device 100 via the power supply circuit 190 and precisely after the terminal Sv of the semiconductor device 100 reaches the power supply potential, determines whether there is a connection problem between the semiconductor device 100 and the printing substrate 400 based on the logic levels of the potentials of terminals Sa, Sb, Sc, and Sd. In other words, the control unit 210 can determine whether there is a connection problem each time it is started. In this way, the control unit 210 can quickly detect and address connection problems caused by years of degradation.
[0080] Terminals Sa, Sb, Sc, and Sd are preferably the four outermost solder balls 310 disposed on the base substrate 300 that are prone to poor connection due to years of degradation among the plurality of solder balls 310 disposed on the base substrate 300. Furthermore, terminals Sa, Sb, Sc, and Sd are preferably the four solder balls 310 disposed at the four corners of the base substrate 300 that are most prone to poor connection due to years of degradation.
[0081] For example, such as Figure 4As shown, terminal Sa is the solder ball 310a closest to the corner where edges 302 and 304 of the base substrate 300 intersect. Therefore, in the y-direction from edge 303 to edge 302, none of the multiple terminals of the semiconductor device 100, i.e., the multiple solder balls 310, are disposed between terminal Sa and edge 302. Furthermore, in the -x-direction from edge 305 to edge 304, none of the multiple terminals of the semiconductor device 100, i.e., the multiple solder balls 310, are disposed between terminal Sa and edge 304.
[0082] In addition, such as Figure 4 As shown, terminal Sb is the solder ball 310b closest to the corner where edges 302 and 305 of the base substrate 300 intersect. Therefore, in the x-direction from edge 304 to edge 305, none of the terminals of the semiconductor device 100 are positioned between terminal Sb and edge 305. Furthermore, in the y-direction from edge 303 to edge 302, none of the terminals of the semiconductor device 100 are positioned between terminal Sb and edge 302.
[0083] In addition, such as Figure 4 As shown, terminal Sc is the solder ball 310c closest to the corner where edges 303 and 304 of the base substrate 300 intersect. Therefore, in the -x direction from edge 305 to edge 304, none of the terminals of the semiconductor device 100 are positioned between terminal Sc and edge 304. Furthermore, in the -y direction from edge 302 to edge 303, none of the terminals of the semiconductor device 100 are positioned between terminal Sc and edge 303.
[0084] In addition, such as Figure 4 As shown, terminal Sd is the solder ball 310d closest to the corner where edges 303 and 305 of the base substrate 300 intersect. Therefore, in the -y direction from edge 302 to edge 303, none of the terminals of the semiconductor device 100 are positioned between terminal Sd and edge 303. Furthermore, in the x direction from edge 304 to edge 305, none of the terminals of the semiconductor device 100 are positioned between terminal Sd and edge 305.
[0085] However, if the power supply voltage VDD is not supplied to the semiconductor device 100, the control unit 210 cannot determine that the terminals Sa, Sb, Sc, Sd and the pads Pa, Pb, Pc, Pd are poorly connected. Therefore, the terminal Sv, which shares the power supply voltage VDD, is preferably located in a position among the plurality of solder balls 310 provided on the base substrate 300 that is less likely to become poorly connected due to years of deterioration before the terminals Sa, Sb, Sc, Sd. That is, in the base substrate 300, the terminal Sv is preferably located in a position closer to the center than the terminals Sa, Sb, Sc, Sd.
[0086] For example, in Figure 4Since terminal Sa is located near edge 302, the shortest distance Ds1 between terminal Sa and edge 302 is less than the shortest distance Ds2 between terminal Sa and edge 303. Therefore, in the relationship between the configuration of terminal Sa and terminal Sv, it is preferable that the shortest distance Dv1 between terminal Sv and edge 302 is greater than the shortest distance Ds1 between terminal Sa and edge 302, and the shortest distance Dv2 between terminal Sv and edge 303 is greater than the shortest distance Ds1 between terminal Sa and edge 302.
[0087] In addition, Figure 4 Since terminal Sa is located near edge 304, the shortest distance Ds3 between terminal Sa and edge 304 is less than the shortest distance Ds4 between terminal Sa and edge 305. Therefore, in the relationship between the configuration of terminal Sa and terminal Sv, it is preferable that the shortest distance Dv3 between terminal Sv and edge 304 is greater than the shortest distance Ds3 between terminal Sa and edge 304, and the shortest distance Dv4 between terminal Sv and edge 305 is greater than the shortest distance Ds3 between terminal Sa and edge 304.
[0088] The relationship between the individual configurations of terminals Sb, Sc, and Sd and the configuration of terminal Sv is the same as the relationship between the configurations of terminal Sa and terminal Sv. As a result, terminal Sv is preferably configured at one of the four corners furthest from the base substrate 300. Figure 4 The area near the center of the base substrate 300 is enclosed by a dashed line.
[0089] It should be pointed out that, in Figure 4 and Figure 5 In the semiconductor device 100, four terminals Sa, Sb, Sc, and Sd are provided for detecting poor connection with the printing substrate 400, but it is sufficient to provide at least one of the terminals Sa, Sb, Sc, and Sd.
[0090] 5. Layout of pads and wiring on the printed circuit board
[0091] By mounting the integrated circuit chip 200 into the small package 330, the semiconductor device 100 achieves smaller size and lower cost. However, in the small package 330, the spacing between the solder balls 310 becomes narrower, and the spacing between the pads 410 provided on the printed circuit board 400 also becomes narrower. Therefore, it becomes difficult to stretch the numerous wirings connected to each pad 410 through the spaces between the numerous pads 410 to the outside of the mounting area of the semiconductor device 100. Therefore, in this embodiment, the shape of a portion of the pads 410 is studied in the printed circuit board 400 to ensure sufficient space for each wiring to pass through.
[0092] Figure 6 This is a partial top view of the printed circuit board 400 viewed from the +z side. (See attached image.) Figure 3As shown, a plurality of pads 410 are provided on the printing substrate 400, such as Figure 6 As shown, the plurality of pads 410 include pads P1, P2, P3, P4, P5, P6, P7, and P8. Each of the plurality of pads 410 is disposed at a position corresponding to a plurality of terminals of the semiconductor device 100, i.e., a plurality of solder balls 310. The semiconductor device 100 is mounted on the printed circuit board 400 by connecting each solder ball 310 to each pad 410. Furthermore, by mounting the semiconductor device 100 on the printed circuit board 400, each of the plurality of pads 410 disposed on the printed circuit board 400 is electrically connected to any terminal of the semiconductor device 100 and any terminal of the integrated circuit chip 200.
[0093] like Figure 6 As shown, pads P1, P2, P3, P4, P5, P6, P7, and P8 are connected to terminals S1a, S2a, S3a, S4a, S5a, S6a, S7a, and S8a of the semiconductor device 100, respectively.
[0094] Pads P1, P2, and P7 are circular, while pads P3, P4, P5, P6, and P8 are oblong. The diameter Ry in the y-direction of each oblong is greater than the diameter R of the circle, and the diameter Rx in the x-direction is less than the diameter R of the circle. That is, pads P3, P4, P5, P6, and P8 are oblongs extending along the y-direction, and the area of each pad P3, P4, P5, P6, and P8 is equal to the area of each pad P1, P2, and P7. Therefore, the connection strength between terminals S3a, S4a, S5a, S6a, S7a, and S8a and each pad P3, P4, P5, P6, and P8 can be set to be equal to the connection strength between terminals S1a, S2a, and S7a and each pad P1, P2, and P7. It should be noted that, in this embodiment, although the shapes of pads P3, P4, P5, P6, and P8 are described as oblong, the shapes of pads P3, P4, P5, P6, and P8 can also be elliptical in area of the same degree.
[0095] It should be pointed out that, in Figure 6 In the diagram, edge 302 of terminal mounting surface 301 is shown by dashed lines. Specifically, pads P5 and P6 are arranged along edge 302. Furthermore, in the x-direction from edge 304 to edge 305, pads P5 and P6 are adjacent. Additionally, in the y-direction from edge 303 to edge 302, none of the pads 410 are positioned between pad P5 and edge 302. Similarly, in the y-direction, none of the pads 410 are positioned between pad P6 and edge 302. That is, each of pads P5 and P6 is connected to a solder ball 310 located at the outermost periphery of terminal mounting surface 301.
[0096] Furthermore, in the x-direction, pads P3 and P4 are adjacent, and pads P4 and P8 are adjacent. Moreover, in the x-direction, pads P1 and P2 are adjacent, and pads P2 and P7 are adjacent.
[0097] Furthermore, in the y-direction, at least a portion of pads P1, P3, and P5 overlap. Also, in the y-direction, at least a portion of pads P2 and P4 overlap. Furthermore, in the y-direction, at least a portion of pads P7, P8, and P6 overlap. That is, between pads P5 and P6, pad 410 is not positioned on the -y side of pad P4. Therefore, the shortest distance between pads P5 and P6 is longer than the shortest distance between pads P1 and P2. Additionally, the shortest distance between pads P5 and P6 is longer than the shortest distance between pads P3 and P4. Furthermore, as described above, since pads P5 and P6 are elongated ovals extending in the y-direction, a wide space is provided between pads P5 and P6.
[0098] like Figure 6 As shown, multiple wirings, including wirings W1, W2, W3, W4, W5, and W6, are provided on the printing substrate 400. Wirings W1, W2, W3, W4, W5, and W6 are connected to pads P1, P2, P3, P4, P5, and P6, respectively.
[0099] Router W5 extends from pad P5 along the y-direction. Router W1 extends from pad P1, passing between pads P3 and P4, along the y-direction. Router W3 extends from pad P3, passing between pad P5 and router W1, and then between routers W5 and W1, along the y-direction. Router W2 extends from pad P2, passing between pads P4 and P5, along the y-direction. Router W4 extends from pad P4, passing between router W1 and router W2, along the y-direction. Router W6 extends from pad P6 along the y-direction. In other words, router W1 passes between pads P3 and P4, router W2 passes between pads P4 and P8, routers W1 and W3 pass between pads P4 and P5, and routers W1, W2, W3, and W4 pass between pads P5 and P6.
[0100] There are constant constraints in the configuration of pads P1 to P8 and routing W1 to W2. It is necessary to satisfy the constraints while allowing four routing lines W1 to W4 to pass between pads P5 and P6. Figure 7This diagram shows only a portion of pads P5 and P6 and traces W1 to W6. The pitch of pads P1 to P8 is determined by the pitch of the solder balls 310, and the pitch pt of pads P5 and P6 is, for example, 1 mm. On the other hand, due to manufacturing limitations, the minimum values of trace width w, trace spacing s, pad-to-trace spacing d, and pad radius r are determined. For example, the minimum value of trace width w is 0.080 mm, the minimum value of trace spacing s is 0.090 mm, the minimum value of pad-to-trace spacing d is 0.100 mm, and the minimum value of pad radius r is 0.100 mm.
[0101] Here, since the minimum value of the routing width w is less than the minimum value of the routing interval s, the widths of routing W1, W2, W3, and W4 between pads P5 and P6 can be less than the intervals between routing W3 and W1, W1 and W4, and W4 and W2. Furthermore, since the minimum value of the routing interval s is less than the minimum value of the pad-routing interval d, the intervals between routing W3 and W1, W1 and W4, and W4 and W2 can be less than the intervals between pad P5 and W3, and pad P6 and W2.
[0102] For example, when the widths of traces W1, W2, W3, and W4 are set to the minimum value of trace width w (0.080mm), the intervals between traces W3 and W1, W1 and W4, and W4 and W2 are set to the minimum value of trace interval s (0.090mm), and the intervals between pad P5 and trace W3 and between pad P6 and trace W2 are set to the minimum value of pad-trace interval d (0.100mm), the distance DP56 between pad P5 and pad P6 becomes 0.080mm×4+0.090mm×3+0.100mm×2=0.790mm. Therefore, when the radii of pads P5 and P6 are set to the minimum value of the pad radius r, i.e., 0.100mm, the distance between the center of pad P5 and the center of pad P6 becomes 0.790mm + 0.100mm × 2 = 0.990mm, which converges to within the pitch pt, i.e., 1mm. This allows four traces W1 to W4 to pass between pads P5 and P6. In this case, since the difference between the pitch pt (1mm) and the distance between the centers of pads P5 and P6 (0.990mm) is 0.010mm, for example, if the interval between traces W3 and W1 is set to 0.093mm, the interval between traces W1 and W4 is set to 0.093mm, and the interval between traces W4 and W2 is set to 0.094mm, then the distance between the centers of pads P5 and P6 can be made consistent with the pitch pt, i.e., 1mm.
[0103] Furthermore, it is also necessary to satisfy the constraints while ensuring that the two wirings W1 and W3 pass between pad P5 and pad P4. Figure 8 This diagram only shows a portion of pads P3, P4, P5 and wiring W1, W3.
[0104] As mentioned earlier, since the minimum value of the routing width w is less than the minimum value of the routing spacing s, the width of routing W3 and the width of routing W1 can be less than the spacing between routing W3 and routing W1. Furthermore, since the minimum value of the routing spacing s is less than the minimum value of the pad-routing spacing d, the spacing between routing W3 and routing W1 can be less than the spacing between pad P5 and routing W3, and the spacing between pad P4 and routing W1.
[0105] For example, when the widths of traces W1 and W3 are set to the minimum value of trace width w (0.080mm), the spacing between traces W3 and W1 is set to the minimum value of trace spacing s (0.090mm), and the spacing between pad P5 and trace W3, and the spacing between pad P4 and trace W1 are set to the minimum value of pad-trace spacing d (0.100mm), the distance DP54 between pads P5 and P4 becomes 0.080mm×2+0.090mm×1+0.100mm×2=0.45mm. In practice, since pads P3, P4, and P5 are configured with a 1mm pitch pt, the distance DP54 between pads P5 and P4 is 0.4557mm, thus allowing two traces W1 and W3 to pass between pads P4 and P5.
[0106] In addition, Figure 6 In the arrangement of pads P1 to P8 and traces W1 to W2 shown, the shortest distances between pad P5 and trace W3, pad P3 and trace W1, pad P4 and trace W1, pad P4 and trace W2, pad P6 and trace W2, pad P7 and trace W2, and pad P8 and trace W2 are greater than the shortest distances between trace W3 and trace W1, trace W1 and trace W4, and trace W4 and trace W2. For example, the shortest distances between pad P5 and trace W3, pad P3 and trace W1, pad P4 and trace W1, pad P4 and trace W2, pad P6 and trace W2, pad P7 and trace W2, and pad P8 and trace W2 are the minimum value of the pad-trace spacing d, which is 0.100 mm. On the other hand, the shortest distance between wiring W3 and wiring W1, the shortest distance between wiring W1 and wiring W4, and the shortest distance between wiring W4 and wiring W2 is the minimum value of the wiring interval s, which is 0.090 mm. In this way, by increasing the shortest distance between each pad and each wiring, the configuration area of the solder balls 310 connected to each pad is sufficiently ensured.
[0107] It should be noted that terminal Sa is an example of a "first terminal," and terminal Sv is an example of a "second terminal." Pad Pa is an example of a "first pad," and pad Pv is an example of a "second pad." Base substrate 300 is an example of an "integrated circuit substrate." Edge 302 is an example of a "first edge," edge 303 is an example of a "second edge," edge 304 is an example of a "third edge," and edge 305 is an example of a "fourth edge." The y-direction is an example of a "first direction," and the x-direction is an example of a "second direction." Low level is an example of a "first logic level," and high level is an example of a "second logic level."
[0108] 6. Effects
[0109] As explained above, according to the electronic device 1 of this embodiment, when at least one of the terminals Sa, Sb, Sc, and Sd provided on the base substrate 300 of the semiconductor device 100 is peeled off from the printing substrate 400, the potential of at least one of the terminals Sa, Sb, Sc, and Sd changes. Therefore, the control unit 210 can detect poor connection between the semiconductor device 100 and the printing substrate 400 based on this potential. Furthermore, since the control unit 210 is built into the semiconductor device 100, the connection failure check can be performed at any time, thus enabling rapid detection of poor connection between the semiconductor device 100 and the printing substrate 400 caused by years of degradation. Moreover, since the control unit 210 is built into the semiconductor device 100, it is not necessary to install the circuit for detecting poor connection between the semiconductor device 100 and the printing substrate 400 on the printing substrate 400, thereby achieving cost reduction of the printing substrate 400.
[0110] Furthermore, according to the electronic device 1 of this embodiment, when the base substrate 300 of the semiconductor device 100 warps due to years of deterioration, terminals Sa, Sb, Sc, and Sd are provided at the four corners of the base substrate 300, which are the parts with the highest probability of connection failure, thereby improving the detection accuracy of connection failure.
[0111] Furthermore, according to the electronic device 1 of this embodiment, in the base substrate 300 of the semiconductor device 100, since the terminal Sv connected to the power supply wiring is located in the central region, the possibility of terminal Sv peeling off before terminals Sa, Sb, Sc, and Sd is low. Therefore, it is difficult for the control unit 210 to determine a connection failure when the power supply voltage VDD is not supplied to the integrated circuit chip 200. In addition, the power supply voltage VDD is supplied from a position close to the center of the integrated circuit chip 200 via terminal Sv, so the voltage drop of the power supply voltage VDD supplied to each part of the integrated circuit chip 200 is smaller, and the possibility of the integrated circuit chip 200 malfunctioning is reduced. Furthermore, in the printed circuit board 400, the pad Pv connected to terminal Sv is located inward of the other pads, so the pad Pv will not obstruct the wiring from being led out from the other pads.
[0112] Furthermore, in the electronic device 1 according to this embodiment, such as Figure 6 As shown, in the printed circuit board 400, pads P5 and P6 are positioned closest to the edge 302 of the base substrate 300, pads P3, P4, and P8 are positioned subsequently close to the edge 302, and pads P1, P2, and P7 are positioned subsequently close to the edge 302. Furthermore, in the printed circuit board 400, pads P1 to P8 are arranged in a grid pattern, with ample space between pads P5 and P6. Therefore, according to the electronic device 1 of this embodiment, in the printed circuit board 400, four wirings W1 to W4, respectively connected to pads P1 to P4, can be routed through the space between pads P5 and P6.
[0113] Furthermore, according to the electronic device 1 of this embodiment, since the spacing between pads P5 and P6 can be widened by making them oblong, it is easy to bring out traces W1 to W4 through the space between pads P5 and P6. Additionally, since the spacing between pads P3 and P4 can be widened by making them oblong, it is easy to bring out traces W1 through the space between pads P3 and P4. Moreover, since the spacing between pads P4 and P8 can be widened by making pad P8 oblong, it is possible to bring out traces W2 through the space between pads P4 and P8.
[0114] This invention is not limited to this embodiment, and various modifications can be made within the scope of the spirit of this invention.
[0115] For example, in this embodiment, the package 330 of the semiconductor device 100 is described as a BGA (Ball Grid Array), but the package 330 can also be a surface-mount package other than a BGA, such as a SiP (System-in-Package), LGA (Large Grid Array Package), or WPP (Wafer-Level Package). For example, when the package 330 is an LGA, the terminals of the semiconductor device 100 are solder pads provided on the package 330, and the terminals of the semiconductor device 100, i.e., the solder pads, are connected to the pads 410 provided on the printed circuit board 400 by solder balls 310.
[0116] The embodiments have been described above, but the present invention is not limited to these embodiments and can be implemented in various ways without departing from its spirit. For example, the above embodiments can also be appropriately combined.
[0117] This invention includes configurations that are substantially the same as those described in the embodiments, such as configurations with the same function, method, and result, or configurations with the same purpose and effect. Additionally, this invention includes configurations that replace non-essential parts of the configurations described in the embodiments. Furthermore, this invention includes configurations that can perform the same function or achieve the same purpose as those described in the embodiments. Additionally, this invention includes configurations that incorporate known techniques into the configurations described in the embodiments.
[0118] The following content can be derived based on the above implementation method.
[0119] One aspect of electronic devices includes: Printed substrate; and Semiconductor devices are mounted on the printed substrate. The semiconductor device has: Integrated circuit chip, including a decision unit; and An integrated circuit substrate, wherein the integrated circuit substrate is a substrate on which the integrated circuit chip is mounted. The integrated circuit substrate has multiple terminals. The printed circuit board has multiple pads and multiple wirings. The plurality of terminals are each connected to the plurality of solder pads. Among the plurality of wirings is constant-potential wiring with a constant potential. The first pad of the plurality of pads is connected to the constant potential wiring. The first terminal of the plurality of terminals is connected to the first pad. The determination unit determines whether there is a poor connection between the semiconductor device and the printed substrate based on the potential of the first terminal.
[0120] According to this electronic device, when the first terminal of the integrated circuit substrate disposed on the semiconductor device is peeled off from the printed circuit board, the potential of the first terminal changes due to the disconnection between the first terminal and the first pad. Therefore, the determination unit can detect poor connection between the semiconductor device and the printed circuit board based on the potential of the first terminal. Furthermore, since the determination unit is built into the semiconductor device, connection failure checks can be performed at arbitrary intervals, thus enabling rapid detection of connection failures between the semiconductor device and the printed circuit board caused by years of degradation. Moreover, since the determination unit is built into the semiconductor device, it is unnecessary to install circuitry for detecting poor connection between the semiconductor device and the printed circuit board on the printed circuit board, thereby achieving cost reduction of the printed circuit board.
[0121] In one embodiment of the electronic device, it may also be that... The integrated circuit substrate has a first side, a second side opposite to the first side, a third side, and a fourth side opposite to the third side. In the first direction from the second side toward the first side, none of the plurality of terminals are disposed between the first terminal and the first side. In the second direction from the fourth side toward the third side, none of the plurality of terminals are positioned between the first terminal and the third side.
[0122] According to this electronic device, when the integrated circuit substrate of the semiconductor device warps due to years of deterioration, the detection accuracy of connection failure can be improved because a first terminal is provided at the corner of the integrated circuit substrate, which is the part with the highest probability of connection failure.
[0123] In one embodiment of the electronic device, it may also be that... The integrated circuit substrate has a first side and a second side opposite to the first side. The plurality of wirings includes power wiring. The second pad of the plurality of pads is connected to the power supply wiring. The second terminal of the plurality of terminals is connected to the second pad. The shortest distance between the first terminal and the first side is less than the shortest distance between the first terminal and the second side. The shortest distance between the second terminal and the first side is greater than the shortest distance between the first terminal and the first side. The shortest distance between the second terminal and the second side is greater than the shortest distance between the first terminal and the first side.
[0124] According to this electronic device, in the integrated circuit substrate of the semiconductor device, since the second terminal connected to the power supply wiring is located closer to the center than the first terminal, the possibility of the second terminal peeling off before the first terminal is low. Therefore, it is difficult for the following situation to occur: no power supply voltage is supplied to the integrated circuit chip, and the determination unit cannot determine a connection failure. In addition, since the power supply voltage is supplied from a position closer to the center of the integrated circuit chip through the second terminal, the voltage drop of the power supply voltage supplied to each part of the integrated circuit chip is reduced, and the possibility of malfunction of the integrated circuit chip is reduced. Furthermore, in the printed circuit board, the second pad connected to the second terminal is arranged in a position further inward than the other pads, so the second pad will not obstruct the wiring from being led out from the other pads.
[0125] In one embodiment of the electronic device, it may also be that... The determination unit determines whether there is a connection malfunction based on the logic level of the potential of the first terminal at a time immediately after the second terminal becomes the power supply potential.
[0126] According to this electronic device, since the determination unit determines whether there is a connection problem each time the semiconductor device is started, it can quickly detect connection problems caused by years of deterioration.
[0127] In one embodiment of the electronic device, it may also be that... The integrated circuit chip includes a detection unit. When the potential of the first terminal changes from a first logic level to a second logic level, the detection unit outputs an interrupt signal to the determination unit. When the interrupt signal is input, the determination unit determines that the connection failure has occurred.
[0128] According to this electronic device, the determination unit does not need to determine whether there is a connection problem before the input interrupt signal, so it can prioritize other processing.
[0129] One possible embodiment of the electronic device is: A recording device for recording on a medium; Conveyor motor, for conveying the medium; and The power supply circuit supplies power to the conveyor motor. If the determination unit determines that a connection failure has occurred, it stops the power supply from the power supply circuit to the transmission motor.
[0130] According to this electronic device, in the event of a poor connection between the semiconductor device and the printing substrate, the recording device may be unable to record the medium normally. By stopping the power supply to the delivery motor, the medium will not be wasted.
[0131] Another possible approach for the electronic device is... A reset IC is mounted on the printed circuit board. If the determination unit determines that a connection failure has occurred, it sends a control signal to the reset IC. The reset IC receives the control signal and resets the semiconductor device.
[0132] According to this electronic device, if the determination unit detects a poor connection, the semiconductor device will be reset, thus reducing the possibility of malfunction caused by a poor connection.
Claims
1. An electronic device, characterized in that, have: Printed substrate; and Semiconductor devices are mounted on the printed substrate. The semiconductor device has: Integrated circuit chip, including a decision unit; and An integrated circuit substrate, wherein the integrated circuit substrate is a substrate on which the integrated circuit chip is mounted. The integrated circuit substrate has multiple terminals. The printed circuit board has multiple pads and multiple wirings. The plurality of terminals are each connected to the plurality of solder pads. Among the plurality of wirings is constant-potential wiring with a constant potential. The first pad of the plurality of pads is connected to the constant potential wiring. The first terminal of the plurality of terminals is connected to the first pad. The determination unit determines whether there is a poor connection between the semiconductor device and the printed substrate based on the potential of the first terminal.
2. The electronic device according to claim 1, characterized in that, The integrated circuit substrate has a first side, a second side opposite to the first side, a third side, and a fourth side opposite to the third side. In the first direction from the second side toward the first side, none of the plurality of terminals are disposed between the first terminal and the first side. In the second direction from the fourth side toward the third side, none of the plurality of terminals are positioned between the first terminal and the third side.
3. The electronic device according to claim 1, characterized in that, The integrated circuit substrate has a first side and a second side opposite to the first side. The plurality of wirings includes power wiring. The second pad of the plurality of pads is connected to the power supply wiring. The second terminal of the plurality of terminals is connected to the second pad. The shortest distance between the first terminal and the first side is less than the shortest distance between the first terminal and the second side. The shortest distance between the second terminal and the first side is greater than the shortest distance between the first terminal and the first side. The shortest distance between the second terminal and the second side is greater than the shortest distance between the first terminal and the first side.
4. The electronic device according to claim 3, characterized in that, The determination unit determines whether there is a connection malfunction based on the logic level of the potential of the first terminal at a time immediately after the second terminal becomes the power supply potential.
5. The electronic device according to claim 1, characterized in that, The integrated circuit chip includes a detection unit. When the potential of the first terminal changes from a first logic level to a second logic level, the detection unit outputs an interrupt signal to the determination unit. When the interrupt signal is input, the determination unit determines that the connection failure has occurred.
6. The electronic device according to claim 1, characterized in that, have: A recording device for recording on a medium; Conveyor motor, for conveying the medium; and The power supply circuit supplies power to the conveyor motor. If the determination unit determines that a connection failure has occurred, it stops the power supply from the power supply circuit to the transmission motor.
7. The electronic device according to claim 1, characterized in that, A reset IC is mounted on the printed circuit board. If the determination unit determines that a connection failure has occurred, it sends a control signal to the reset IC. The reset IC receives the control signal and resets the semiconductor device.
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