Multilevel signaling linear feedback and adjustment

Abstract

This disclosure relates to linear feedback and adjustment in multilevel signaling. Integrated circuit devices, methods, and circuits are provided for linear feedback to implement signal adjustment in multilevel signaling communication. A system may include a first integrated circuit device having transmitter circuitry for controllably adjusting the level of a multilevel signal and transmitting the multilevel signal via a communication link. The system may also include a second integrated circuit device having receiver circuitry for receiving the multilevel signal and instructing the transmitter circuitry to adjust the level of the multilevel signal.

Description

Technical Field

[0001] This disclosure relates to systems and methods for performing multilevel signaling communication between electronic devices with linear feedback to achieve signal conditioning. Background Technology

[0002] This section aims to introduce the reader to various aspects of the prior art that may be related to the aspects of this disclosure, which will be described and / or claimed below. It is believed that this discussion will help provide the reader with background information to facilitate a better understanding of the aspects of this disclosure. Therefore, it is to be understood that these statements will be interpreted in this context rather than as an admission of prior art.

[0003] Integrated circuits (ICs) are present in many electronic devices and provide various functions. Communication between different ICs has become increasingly complex to improve the rate of data transfer from one electronic device to another. In some communication schemes, such as Non-Return-to-Zero (NRZ), the transmitter circuit of a first electronic device sends a signal to the receiver circuit of a second electronic device, the signal having a symbol that can be one of two different voltage signal levels. One of these signal levels is interpreted as "1" by the receiver circuit, while the other is interpreted as "0". To transmit more data on each symbol, some communication schemes employ multilevel signaling. Multilevel signaling communication schemes use symbols that can be one of several different signal levels. For example, Pulse Amplitude Modulation (PAM)-4 includes symbols that can have one of four different signal levels. These four different voltage levels can be interpreted by the receiver circuit as "00", "01", "10", or "11".

[0004] Multilevel signaling is used in serial input / output (I / O) specifications such as PCIe Gen 6 and Gen 7, 100GBASE-CR1, OIF-CEI-112G-LR-PAM4, and future standards such as 200GBASE-KR1, using PAM-4 or higher signal constellations. Compared to NRZ signals, they use multiple signal levels per unit interval to transmit more information in each time interval. Receiver circuitry can detect each signal level to decode all transmitted information. The signal-to-noise ratio (SNR) of each signal level affects the receiver's ability to correctly identify each value. While many receiver circuits can adjust the entire signal level swing as a signal is received to optimize their level detection circuitry, receiver circuitry may not be able to adjust the level of intermediate signals to ensure maximum SNR. In fact, some receiver circuitry may be able to apply nonlinear distortion features at the receiver (e.g., examples of such features could be A-law or u-law distortion); however, these features may be difficult to implement using high-speed analog circuitry, or implementation in the digital section of the receiver circuitry may be costly. Summary of the Invention

[0005] According to one aspect of this disclosure, a system for transmitting a multilevel signal is provided, the system comprising: a first integrated circuit device including a transmitter circuit configured to: controllably adjust the level of the multilevel signal and transmit the multilevel signal via a communication link; and a second integrated circuit device including a receiver circuit configured to: receive the multilevel signal and instruct the transmitter circuit to adjust the level of the multilevel signal.

[0006] According to one aspect of this disclosure, a method for multilevel signal communication is provided, comprising: receiving a multilevel signal from a transmitter via a communication link; measuring the eye symmetry of the multilevel signal; and sending a request to the transmitter to adjust an intermediate voltage level of the multilevel signal at the transmitter.

[0007] According to one aspect of this disclosure, an integrated circuit device for transmitting multilevel signals is provided, the integrated circuit device comprising: a receiver circuit for receiving an analog multilevel signal from a transmitter via a communication link; an analog-to-digital converter for converting the received analog multilevel signal into a digital version of the received multilevel signal; and a system management circuit for instructing the transmitter to adjust an intermediate voltage level of the analog multilevel signal at the transmitter based on the eye symmetry of the digital version of the received multilevel signal. Attached Figure Description

[0008] A better understanding of the various aspects of this disclosure can be achieved by reading the following detailed description and referring to the accompanying drawings, in which: Figure 1 This is a block diagram of a system for implementing communication between two integrated circuit devices with multi-level signaling linear feedback; Figure 2 It is an eye diagram of a four-level signal with symmetry between signal levels; Figure 3 It is an eye diagram of a four-level signal with asymmetrical signal levels; Figure 4 This is a block diagram of a system that illustrates the measurement and adjustment of a multi-level signal constellation to correct nonlinearities in the transmitted signal; Figure 5 This is a flowchart of a method for measuring and adjusting multilevel signal constellations to correct nonlinearities in transmitted signals; and Figure 6 This is a block diagram of a data processing system that can be combined with the systems and methods disclosed herein. Detailed Implementation

[0009] One or more specific embodiments will now be described. To provide a concise description of these embodiments, not all features of an actual implementation are described in the specification. It should be understood that, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developer's specific goals, such as adhering to system-related and business-related constraints, which may vary from implementation to implementation. Furthermore, it should be understood that such development work can be complex and time-consuming, but remains a routine task of design, fabrication, and production for those skilled in the art who benefit from this disclosure.

[0010] When describing elements of various embodiments of this disclosure, the articles “a,” “an,” and “the” are intended to indicate the presence of one or more elements. The terms “comprising,” “including,” and “having” are intended to be inclusive, meaning that there may be other elements besides those listed. Furthermore, it should be understood that references to “an embodiment” or “an embodiment” in this disclosure are not intended to be construed as excluding the existence of other embodiments that also include the described features. Additionally, the phrase A “based on” B is intended to indicate that A is at least partially based on B. Furthermore, the term “or” is intended to be inclusive (e.g., logical OR) rather than exclusive (e.g., logical XOR). In other words, the phrase A “or” B is intended to indicate A, B, or A and B.

[0011] As data rates increase between different electronic devices, improving the signal-to-noise ratio (SNR) becomes increasingly valuable. To improve the SNR in multi-level signaling communication schemes, receiver circuitry can measure the symmetry of the multi-level signal it is receiving and provide feedback to the transmitter to improve the signal's linearity. The systems and methods disclosed herein utilize the receiver circuitry's ability to measure the linearity of the received signal level, its ability to communicate a request to the link partner transmitter, and the transmitter's ability to adjust its signaling level. Essentially, because the receiver circuitry can measure the linearity or distortion of the received signal, it can communicate with the transmitter circuitry in a feedback loop to adjust the signal level. This is a process highly complementary to transmitter equalization adaptation, which can be performed, for example, during link training used in Ethernet and PCIe, and can be performed concurrently.

[0012] Figure 1A communication system 10 is illustrated that enables communication between a first integrated circuit (IC) 12 and a second IC 14. The first IC 12 and the second IC 14 can be any suitable integrated circuit capable of communication. For example, the first IC 12 and the second IC 14 may include programmable logic devices (PLDs), such as field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), processors (e.g., central processing units (CPUs), graphics processing units (GPUs)), artificial intelligence (AI) computing circuits, memories or storage devices (e.g., random access memory (RAM), read-only memory (ROM), non-volatile memory, high-bandwidth memory (HBM)), and so on.

[0013] The first IC 12 can communicate using the first transceiver 16. Figure 1 In one example, the first IC 12 and the first transceiver 16 are separate dies in a first package 18 on a first printed circuit board 20. In other examples, the first IC 12 and the first transceiver 16 may be part of a single monolithic integrated circuit. The first transceiver 16 can send communications to or receive communications from a second transceiver 22 that communicates with the second IC 14. Figure 1 In the example, these are also shown as individual dies in the second package 24 on the second printed circuit board 26. In other examples, the second IC 14 and the second transceiver 22 may be part of a single monolithic integrated circuit. The communication link 28 may include a transmission line from the first transceiver 16 to the second transceiver 22 and / or a transmission line from the second transceiver 22 to the first transceiver 16.

[0014] The first transceiver 16 may include a transmitter circuit (TX) 30 and a receiver circuit (RX) 32. System management circuitry 34 can manage communications received by RX 32. The second transceiver 22 may include a transmitter circuit (TX) 36 and a receiver circuit (RX) 38. System management circuitry 40 can manage communications received by RX 38. System management circuitry 34 and / or system management circuitry 40 may include any suitable control circuitry. For example, system management circuitry 34 and system management circuitry 40 may be implemented using one or more finite state machines (FSMs) in hardware or using one or more microcontrollers executing firmware instructions.

[0015] Some protocols, such as Fast Peripheral Component Interconnect (PCIe) and Ethernet, specify the locations of system management circuits 34 and 40. Therefore, in Figure 1In this embodiment, system management circuitry 34 is shown as a component of RX 32, while system management circuitry 40 is shown as a component of RX 38. Other protocols, such as the Optical Internet Forum-GE I / O (OIF-CEI), do not specify the location of system management circuitry 34 and 40. Therefore, in other embodiments, system management circuitry 34 and system management circuitry 40 may be located elsewhere (e.g., on another integrated circuit in first IC 12, second IC 14, first package 18 or first board 20, second package 24 or second board 26, or on entirely different boards).

[0016] The first transceiver 16 can communicate with the second transceiver 22 using any suitable signaling protocol. Although this disclosure will use an example of a four-level pulse amplitude modulation (PAM-4) signal, other multilevel signaling schemes with any suitable number of signal levels (e.g., PAM-N, where N represents any suitable pulse amplitude modulation integer) can also be used. Figure 2 Eye diagram 60 shows the PAM-4 signal that can be transmitted from TX 30 of the first transceiver 16 to RX 38 of the second transceiver 22. Eye diagram 60 illustrates a composite display of all possible PAM-4 signal levels and transformations when the PAM-4 signal is perfectly symmetrical. RX 38 can measure the PAM-4 signal at sampling position 62 to determine the signal level representing a low level (V). -3 64. Low intermediate level (V) -1 66. High intermediate level (V) +1 68. Still high level (V) +3 70. The term "eye" in eye diagram 60 refers to the space between the four signal levels (-3, -1, +1, +3) at sampling position 62. To obtain optimal receiver signal margin and ensure optimal data integrity, ideally, the eye heights shown as "A", "B", and "C" can all be equal, and the "eyes" should be symmetrical.

[0017] At RX 38, each signal level (64, 66, 68, and 70) should be detected to decode all transmitted information. The signal-to-noise ratio (SNR) of each signal level affects the receiver's ability to correctly identify each value. The correct spacing of signal levels 64, 66, 68, and 70 within the signal swing range ensures optimal signal integrity at the receiver's level detection circuitry. RX 38 can adjust the entire signal level swing to optimize its use for level detection circuitry to detect signal levels 64, 66, 68, or 70. As will be discussed further below, RX 38 can also transmit control signals to TX 30 to adjust the level of intermediate signals transmitted by TX 30, thereby improving the SNR of the signal when RX 38 receives the signal.

[0018] This is especially valuable because, as Figure 3 As shown in eye diagram 80, the signal levels 64, 66, 68, and 70 at sampling position 62 on the signal received by RX 38 may not be symmetrical. Eye diagram 80 shows a nonlinear eye of height B> (A or C). The ability of RX 38 to distinguish, for example, levels 68 and 70 (level +1 and level +3) is reduced due to the nonlinearity of these signal levels and the reduced signal-to-noise ratio. Note that RX 38 may be able to select where to place the signal limiters for levels 66 and 68 (level +1 and level -1), but to adjust these signal levels, it may employ complex nonlinear transfer functions that are difficult to implement. Therefore, RX 38 can adjust the signal levels of levels 64 and 70 (level +3 and level -3). Instead of attempting to adjust levels 66 and 68 (level +1 and level -1) individually, RX 38 can provide feedback to TX 30 so that TX 30 can adjust the signal before it is transmitted, thus making the multi-level signal received at RX 38 symmetrical. In other words, the system and method of this disclosure enable the RX 38 to effectively adjust the levels of signal levels 66 and 68 (level +1 and level -1) in a practical manner.

[0019] Figure 4This is a block diagram of system 10, illustrating how the linearity and signal-to-noise ratio of multilevel signaling are improved by providing an indication from RX 38 to TX 30 to adjust the intermediate level position. TX 30 can transmit data 96, converted into an outgoing analog multilevel signal 98, to RX 38 via communication link 28. The outgoing multilevel signal 98 can be represented by a digital signal 100, which can be generated when data 96 is converted into digital values ​​representing levels using a code lookup table (LUT) 101. Therefore, digital signal 100 represents the digital form of the outgoing multilevel signal 98, which digitally defines the signal level. For example, digital signal 100 can be an 8-bit signal with an 8-bit code that defines the outgoing multilevel signal 98 based on 256 possible signal level positions. Depending on the specific implementation, digital signal 100 can be signed or unsigned. For a concrete example, level -3 can be defined by a code value of 0 with a maximum value of 255, level -1 can be defined by a code value of 63 with a maximum value of 255, level +1 can be defined by a code value of 191 with a maximum value of 255, and level +3 can be defined by a code value of 255 with a maximum value of 255. In other embodiments, digital signal 100 can have more or fewer bits capable of representing more or fewer discrete possible values ​​of multi-level signaling levels. Digital signal 100 is converted by digital-to-analog converter (DAC) 102 into an analog representation of the multi-level signal 98 to be transmitted. The analog representation of multi-level signal 98 can be amplified by TX output driver 104 and transmitted via communication link 28. In other embodiments, TX 30 can employ different signal transmission techniques other than digital-to-analog conversion to generate an analog version of the multi-level signal 98 transmitted via communication link 28.

[0020] At RX 38, the received analog multilevel signal 106 can reach receiver circuitry 108 via communication link 28. It is worth noting that after traversing communication link 28, the received analog multilevel signal 106 may appear asymmetrical to its receiver, potentially impairing RX 38's ability to correctly distinguish sample levels. Analog-to-digital converter (ADC) 110 can generate a digital signal 112 that provides a digital representation of the multilevel signal 106. Digital signal 112 can be processed by any suitable circuitry of RX 38 to determine the information provided by the multilevel signal 106 based on the level represented by each sample.

[0021] like Figure 4As shown, system management circuitry 40 can additionally provide feedback to TX 30 to improve the symmetry of the received multilevel signal 106 by adjusting the outgoing multilevel signal 98. This utilizes the ability of RX 38 to measure the linearity of the signal level of the received multilevel signal 106, its ability to transmit requests to the link partner TX 30, and TX 30's ability to adjust its signaling levels (e.g., by adjusting the code used by digital signal 100 to represent various levels). Essentially, since RX 38 can measure the linearity or distortion of the received multilevel signal 106, it can communicate with TX 30 in the feedback loop to adjust the signal level of the outgoing multilevel signal 98. Notably, this can be performed during TX 30 equalization adaptation, which is carried out during link training (e.g., in Ethernet and PCIe applications), or at other times.

[0022] The system management circuitry 40 of the RX 38 may include data limiting measurements (e.g., three data limiters) and can measure the levels of these three data limiters and compare them to target levels based on the target (e.g., optimal) swing levels entering the RX 38. First, the system management circuitry 40 of the RX 38 can use this information to determine eye linearity, or, for scrambled and balanced data streams, to determine the uniform distribution of the signal above and below the limiting target (e.g., constellation levels). The system management circuitry 40 can also perform a next-level measurement using error limiting levels (e.g., at four signal levels -3, -1, +1, +3) to compare them to their expected targets. Using three data limiting levels and four error limiting levels, the system management circuitry 40 now measures the linearity of the received multi-level signal 106.

[0023] The received multilevel signal 106 may be nonlinear due to defects in the TX output driver 104, distortion and nonlinearity of the communication link 28, and non-ideal behavior of the front-end filter of the receiver circuit 108. Regardless of how this occurs, the linearity of the received multilevel signal 106 can be corrected by the TX 30 under the guidance of the RX 38.

[0024] It is worth noting that although the return loss tolerance (R) in the IEEE 802.3 and OIF-CEI specifications... LM The standard definition calculates a metric for evaluating transmitter output nonlinearity according to specifications, but this is believed to be insufficient information for correcting nonlinearity. Furthermore, specific receiver implementations may use different methods to set the limiting level; however, the receiver can detect the position of the error limiter level relative to the target amplitude of the signal.

[0025] With this in mind, once the receiver circuitry 108 adjusts +3 and -3 to achieve improved (e.g., optimal) resolution for the ADC 110, the RX 38 can measure the +1 and -1 signals (V1 and -1) of the received multilevel signal 106. +1 and V -1 The voltage level of the +3 and -3 signal levels. If the positions of the +3 and -3 signal levels are given and one or both are not close enough to their target, the system management circuit 40 of RX 38 can request TX 30 to increment or decrement the various signal levels of the outgoing multilevel signal 98. For example, the system management circuit 40 can send a control signal to TX 30 (e.g., via a side channel, via a control frame, via TX 36) to instruct TX 30 to adjust the level of the outgoing multilevel signal 98. Since TX 30 can use certain codes of digital signal 100 to define the level, the system management circuit 40 can instruct TX 30 to increment or decrement the level, and TX 30 can increment or decrement the voltage levels for +1 and -1 signal levels (V). +1 and V -1 The code for the voltage level.

[0026] To provide an example, system management circuit 40 can determine that eye B of the received multilevel signal 106 is asymmetrical because it is too large relative to eyes A and C. System management circuit 40 can instruct TX 30 to increment the voltage level by -1 and decrement the voltage level by +1. If TX 30 already uses a code value of 63 (maximum 255) to represent level -1 of digital signal 100 and a code value of 191 (maximum 255) to represent level +1 of digital signal 100, then TX 30 can receive instructions from system management circuit 40 to increment the code for level -1 in digital signal 100 to a higher value (e.g., 64) and decrement the code for level +1 in digital signal 100 to a lower value (e.g., 190). It is worth noting that this is only a simplified example. In practice, TX 30 can adjust the levels according to any suitable control scheme. For example, an initial request to increment or decrement the level can be considered a coarse-grained correction involving a large change in the voltage level (e.g., incrementing level -1 from digital code 63 in 255 to digital code 71 in 255), and a subsequent request can be considered a fine-grained correction involving a small change in the voltage level (e.g., incrementing level -1 from digital code 71 in 255 to digital code 72 in 255).

[0027] Once TX 30 has adjusted the outgoing multilevel signal 98, RX 38 can readjust the +3 and -3 levels, readjust the equalization of TX 30 and RX 38 on communication link 28, and then re-evaluate the new +1 and -1 levels. If system management circuitry 40 determines that further adjustments are required, system management circuitry 40 of RX 38 can send additional control signals with the request to TX 30 (e.g., one increment / decrement request at a time until the received multilevel signal 106 falls within the defined specifications).

[0028] Therefore, TX 30 receives individual level increment and decrement messages from RX 38 and uses these requests to adjust its output level when a +1 or -1 signal is emitted. This can be achieved by adjusting the operation of the digital code LUT 101 or DAC 102 (e.g., a digital-to-analog converter lookup table, which can be used to encode signals at various levels for equalization). Alternatively, the digital logic of TX 30 for transmitter equalization can apply a fine-tuning offset to the level of each of the +1 and -1 levels and combine the applied equalization. In either case, the final outgoing multilevel signal 98 with TX 30 equalization can be adjusted to compensate for nonlinearity or disproportion in the received multilevel signal 106 sampled by RX 38.

[0029] RX 38 can use any suitable technique to provide instructions to TX 30. For example, RX 38 can issue control frames (e.g., via Ethernet), or it can use system management circuitry 40 and / or 34 to coordinate instructions (e.g., in OIF-CEI or PCIe). Messages sent to TX 38 can identify which transmitter level (+1 or -1) to adjust and whether it should be incremented or decremented. Message exchange and adjustment of the outgoing multilevel signal 98 can be performed during the link establishment training phase so that the bit error rate during normal operation is not affected by interference signals. This can be performed after the link establishment equalization adaptation phase to improve (e.g., maximize) the signal-to-noise ratio at RX 38, enabling it to lock onto the incoming, received multilevel signal 106 and achieve good (e.g., optimal) measurement of signal linearity.

[0030] In a specific example, the RX 38 can send messages to increment or decrement a level based on cells in the coefficient update field and / or status report field of the IEEE 802.3 Ethernet specification (e.g., IEEE Std 802.3-2022). For example, cells 11:6 in the coefficient update field and cells 14:6 in the status report field are marked as reserved. Some or all of these cells can be used to signal whether a specific level is incremented or decremented. For example, a control frame can use cells 7:6 in the coefficient update field to increment / decrement a level by -1 (e.g., 00 = hold, 10 = decrement, 01 = increment, 11 = reserve), and can use cells 7:6 in the coefficient update field to increment / decrement a level by +1 (e.g., 00 = hold, 10 = decrement, 01 = increment, 11 = reserve). Similarly, control frames can use cells 7:6 of the status report field to obtain the status of positions at level -1 (e.g., 00 = not updated, 01 = updated, 10 = minimum, 11 = maximum), and can use cells 7:6 of the status report field to obtain the status of positions at level +1 (e.g., 00 = not updated, 01 = updated, 10 = minimum, 11 = maximum). Examples are shown in the table below: Table 1. Coefficient Update Fields Table 2. Status Report Fields Figure 5Flowchart 120 is a method that RX 38 can execute to perform received eye measurements and adjustments related to TX 20 equalization adjustment. Flowchart 120 can be executed by RX 38 during link training (e.g., via system management circuitry 40 or other control systems) to avoid reducing the bit error rate (BER) of subsequent data transmissions, but it can also be executed at other times (e.g., after a period of communication). Flowchart 120 can begin when RX 38 receives multilevel signal 106 (process block 122). If the maximum and minimum levels (level -3 and level +3) of multilevel signal 106 are not within threshold levels (decision block 124), RX 38 can adjust the input gain of receiver circuitry 108 (process block 126). Once the maximum and minimum levels (level -3 and level +3) of multilevel signal 106 are within threshold levels (decision block 124), the process can flow to decision block 128, where RX 38 can determine whether the low-pass (LP) TX 30 equalization (EQ) is within a specified threshold. If not, RX 38 can issue a request to adjust the equalization of TX 30 (process block 130). If yes, the process can flow to decision block 132, where RX 38 can determine whether the eye symmetry and / or linearity are within a specified threshold. If not, RX 38 can instruct TX 30 in the manner described above to update the level of the outgoing multilevel signal 98 before it begins consuming the data sent in RX 38 (block 136) (process block 134). Note that after adjusting the eye linearity in process block 134, it may be valuable to repeat the input gain and TX 30 equalization adjustments in process block 130 and repeat the loop until the input gain, equalization, and linearity are satisfactory and fall within a specified range (e.g., a threshold). The three eye heights A, B, and C may not be exactly equal, or V +1 and V -1 The level may not be exactly at the target level, so some accuracy thresholds are determined based on the link error rate specification of communication system 10 (e.g., as used by system management circuit 40). The exact method by which RX 38 determines which level needs to be adjusted depends on the implementation of the eye measurement metric used by RX 38.

[0031] Also note that a TX 30 compliance test as defined by the serial I / O standard may be performed before this feature is enabled, as the compliance test results may be affected by adjustments (in a way that marks TX 30 as not meeting the compliance test).

[0032] Communication system 10 can be used in data processing systems, such as Figure 6The data processing system 500 shown is an example. This allows the high-speed transceiver of the data processing system 500 to improve multi-level signal communication. The data processing system 500 may include a transceiver 22, a host processor 502, memory and / or storage circuitry 504, and a network interface 506. The data processing system 500 may include more or fewer components (e.g., electronic displays, user interface structures, application-specific integrated circuits (ASICs)). Furthermore, Figure 6 Any circuit component depicted may include transceiver 22. Host processor 502 may include any of the aforementioned processors capable of managing data processing requests to data processing system 500 (e.g., performing encryption, decryption, machine learning, video processing, speech recognition, image recognition, data compression, database search ranking, bioinformatics, network security pattern recognition, space navigation, cryptocurrency operations, etc.). Memory and / or storage circuitry 504 may include random access memory (RAM), read-only memory (ROM), one or more hard disk drives, flash memory, etc. Memory and / or storage circuitry 504 may hold data to be processed by data processing system 500. In some cases, memory and / or storage circuitry 504 may also store configuration programs (e.g., bitstreams, mapping functions) for programming transceiver 22. Network interface 506 may allow data processing system 500 to communicate with other electronic devices. Data processing system 500 may include several different packages, or may be contained within a single package on a single package substrate. For example, components of data processing system 500 may reside in one location (e.g., a data center) or several different packages in multiple locations. For example, the components of the data processing system 500 may be located in separate geographic locations or regions, such as cities, states, or countries.

[0033] The data processing system 500 can be part of a data center that handles various requests. For example, the data processing system 500 can receive data processing requests via a network interface 506 to perform encryption, decryption, machine learning, video processing, speech recognition, image recognition, data compression, database search ranking, bioinformatics, network security pattern recognition, space navigation, digital signal processing, or other specialized tasks.

[0034] The techniques and methods described herein can be applied to other types of integrated circuit systems. For example, the multi-level signal system disclosed herein can be used with a central processing unit (CPU), graphics card, hard disk drive, or other components.

[0035] While the embodiments set forth in this disclosure may be readily modified and alternatively adapted, specific embodiments have been shown by way of example in the accompanying drawings and described in detail herein. However, this disclosure is not intended to limit it to the particular forms disclosed. This disclosure is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of this disclosure as defined by the appended claims.

[0036] The techniques proposed and claimed herein are referenced and applied to physical objects and concrete examples of a practical nature that clearly improve upon the art and are therefore not abstract, intangible, or purely theoretical. Furthermore, if any claim appended to this specification contains one or more elements designated as “means for [performing] [function]…” or “steps for [performing] [function]…”, those elements shall be interpreted pursuant to 35 U.S.C., 112(f). However, for any claim containing elements designated in any other manner, those elements shall not be interpreted pursuant to 35 U.S.C., 112(f).

[0037] Example Implementation Example 1. A system comprising: A first integrated circuit device includes a transmitter circuit configured to: controllably adjust the level of a multi-level signal and transmit the multi-level signal via a communication link; and A second integrated circuit device includes a receiver circuit configured to receive the multi-level signal and instruct the transmitter circuit to adjust the level of the multi-level signal.

[0038] Example 2. The system of Example 1, wherein the receiver circuit is configured to instruct the transmitter circuit to adjust the level of the multi-level signal based on the eye symmetry of the multi-level signal received by the receiver circuit.

[0039] Example 3. The system of Example 1, wherein the receiver circuit is configured to: instruct the transmitter circuit to adjust the level of the multi-level signal by using an incrementing or decrementing signal to instruct the transmitter circuit to increment or decrement the intermediate level of the multi-level signal.

[0040] Example 4. The system of Example 1, wherein the receiver circuit is configured to send a control frame to the transmitter circuit to instruct the transmitter circuit to adjust the level of the multi-level signal.

[0041] Example 5. The system of Example 4, wherein the control frame includes: a first group of units corresponding to adjusting a first intermediate level of the multi-level signal, and a second group of units corresponding to adjusting a second intermediate level of the multi-level signal.

[0042] Example 6. The system of Example 5, wherein the first group of units includes code specifying to maintain, decrease, or increase the first intermediate level, and the second group of units includes code specifying to maintain, decrease, or increase the second intermediate level.

[0043] Example 7. The system of Example 1, wherein the multilevel signal includes a four-level signal having two intermediate levels, wherein the transmitter circuit is configured to controllably adjust the two intermediate levels, and wherein the receiver circuit is configured to instruct the transmitter circuit to adjust the two intermediate levels.

[0044] Example 8. The system of Example 1, wherein the receiver circuit is configured to instruct the transmitter circuit to adjust the level of the multi-level signal during link training.

[0045] Example 9. The system of Example 1, wherein the receiver circuit is configured to adjust the level of the multilevel signal after adjusting the receiver input gain.

[0046] Example 10. The system according to Example 1, wherein: The transmitter circuit is configured to controllably adjust the equalization of the transmitter circuit; The receiver circuit is configured to instruct the transmitter circuit to adjust the equalization of the transmitter circuit; and The receiver circuit is configured to adjust the level of the multi-level signal after the equalization of the transmitter circuit is within the specified range.

[0047] Example 11. The system according to Example 1, wherein the transmitter circuit is configured to adjust the level of the multilevel signal based on an adjustment of a digital code used to define the level of the multilevel signal.

[0048] Example 12. The system of Example 1, wherein the transmitter circuit is configured to adjust the level of the multilevel signal based on adjusting a lookup table used to encode the multilevel signal.

[0049] Example 13. A method comprising: Receive multi-level signals from the transmitter via a communication link; Measure the eye symmetry of the multilevel signal; and A request is sent to the transmitter to adjust the intermediate voltage level of the multi-level signal at the transmitter.

[0050] Example 14. The method of Example 13, wherein the method is performed during link training.

[0051] Example 15. The method of Example 13 includes: before issuing a request to the transmitter to adjust the intermediate voltage level of the multi-level signal: Adjustment of the multi-level signal is performed at the receiver; and A request is sent to the transmitter to perform equalization at the transmitter.

[0052] Example 16. The method of Example 15 includes: after issuing a request to the transmitter to adjust the intermediate voltage level of the multi-level signal: Perform another adjustment to the multi-level signal at the receiver; and Send another request to the transmitter to perform equalization at the transmitter.

[0053] Example 17. The method according to Example 13, wherein the method is performed at least in part using the system management circuitry of the receiver.

[0054] Example 18. An integrated circuit device, comprising: Receiver circuitry for receiving analog multilevel signals from a transmitter via a communication link; An analog-to-digital converter (ADC) is used to convert a received analog multilevel signal into a digital version of the received multilevel signal; and A system management circuit is used to instruct the transmitter to adjust the intermediate voltage level of the analog multilevel signal at the transmitter based on the eye symmetry of the digital version of the received multilevel signal.

[0055] Example 19. An integrated circuit device of Example 18, wherein the system management circuit is configured to instruct the transmitter to adjust the intermediate voltage level during link training.

[0056] Example 20. An integrated circuit device of Example 18, wherein the system management circuit is configured to instruct the transmitter to adjust transmitter equalization before instructing the transmitter to adjust the intermediate voltage level.

Claims

1. A system for transmitting multi-level signals, the system comprising: A first integrated circuit device includes a transmitter circuit configured to controllably adjust the level of a multilevel signal and transmit the multilevel signal via a communication link; as well as A second integrated circuit device includes a receiver circuit configured to receive the multilevel signal and instruct the transmitter circuit to adjust the level of the multilevel signal.

2. The system of claim 1, wherein, The receiver circuit is configured to instruct the transmitter circuit to adjust the level of the multi-level signal based on the eye symmetry of the multi-level signal received by the receiver circuit.

3. The system of claim 1, wherein, The receiver circuit is configured to instruct the transmitter circuit to adjust the level of the multi-level signal by using an incrementing or decrementing signal to instruct the transmitter circuit to increment or decrement the intermediate level of the multi-level signal.

4. The system of claim 1, wherein, The receiver circuit is configured to send a control frame to the transmitter circuit to instruct the transmitter circuit to adjust the level of the multi-level signal.

5. The system of claim 4, wherein, The control frame includes: a first group of units corresponding to adjusting a first intermediate level of the multi-level signal, and a second group of units corresponding to adjusting a second intermediate level of the multi-level signal.

6. The system of claim 5, wherein, The first group of units includes code that specifies maintaining, decrementing, or incrementing the first intermediate level, and the second group of units includes code that specifies maintaining, decrementing, or incrementing the second intermediate level.

7. The system of any one of claims 1 to 6, wherein, The multilevel signal includes a four-level signal with two intermediate levels, wherein the transmitter circuit is configured to controllably adjust the two intermediate levels, and wherein the receiver circuit is configured to instruct the transmitter circuit to adjust the two intermediate levels.

8. The system of any one of claims 1 to 6, wherein, The receiver circuit is configured to instruct the transmitter circuit to adjust the level of the multi-level signal during link training.

9. The system of any one of claims 1 to 6, wherein, The receiver circuit is configured to adjust the level of the multilevel signal after adjusting the receiver input gain.

10. The system according to any one of claims 1 to 6, wherein: The transmitter circuit is configured to controllably adjust the equalization of the transmitter circuit; The receiver circuit is configured to instruct the transmitter circuit to adjust the equalization of the transmitter circuit; as well as The receiver circuit is configured to adjust the level of the multi-level signal after the equalization of the transmitter circuit is within the specified range.

11. The system of any one of claims 1 to 6, wherein, The transmitter circuit is configured to adjust the level of the multilevel signal based on an adjustment of the digital code used to define the level of the multilevel signal.

12. The system of any one of claims 1 to 6, wherein, The transmitter circuit is configured to adjust the level of the multi-level signal based on adjusting a lookup table used to encode the multi-level signal.

13. A method for multi-level signal communication, comprising: Receive multi-level signals from the transmitter via a communication link; Measure the eye symmetry of the multilevel signal; as well as A request is sent to the transmitter to adjust the intermediate voltage level of the multi-level signal at the transmitter.

14. The method of claim 13, wherein, The method is performed during link training.

15. The method of claim 13, comprising: Before sending a request to the transmitter to adjust the intermediate voltage level of the multi-level signal: The adjustment of the multi-level signal is performed at the receiver; as well as A request is sent to the transmitter to perform equalization at the transmitter.

16. The method of claim 15, comprising: After sending a request to the transmitter to adjust the intermediate voltage level of the multi-level signal: Perform another adjustment to the multi-level signal at the receiver; and Send another request to the transmitter to perform equalization at the transmitter.

17. The method according to any one of claims 13 to 16, wherein, The method is performed at least in part using the system management circuitry of the receiver.

18. An integrated circuit device for transmitting multi-level signals, the integrated circuit device comprising: Receiver circuitry for receiving analog multilevel signals from a transmitter via a communication link; An analog-to-digital converter is used to convert a received analog multilevel signal into a digital version of the received multilevel signal; as well as A system management circuit is used to instruct the transmitter to adjust the intermediate voltage level of the analog multilevel signal at the transmitter based on the eye symmetry of the digital version of the received multilevel signal.

19. The integrated circuit device according to claim 18, wherein, The system management circuitry is configured to instruct the transmitter to adjust the intermediate voltage level during link training.

20. The integrated circuit device according to claim 18 or 19, wherein, The system management circuit is configured to instruct the transmitter to adjust transmitter equalization before instructing the transmitter to adjust the intermediate voltage level.

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