Electromechanical transducer drive control system for precision instruments

Abstract

This invention relates to the field of electromechanical energy conversion control technology, and discloses an electromechanical converter drive control system for precision instruments, including: an acquisition module for acquiring stator winding current data; a calculation module for calculating the original phase duty cycle; a minimum width determination module for determining the reliability of the sampling signal; and a reconstruction module for calculating the common-mode voltage offset and reconstructing the duty cycle. This module superimposes the offset onto the original phase duty cycle and utilizes the three-phase system's degrees of freedom to shift the conduction time. While maintaining the volt-second integral equivalence of the line voltage between windings, it increases the effective pulse width of the current sampling. This invention expands the physical observation window through modulation logic reconstruction, eliminates the low modulation ratio current observation blind zone, resolves the underlying contradiction between electromagnetic thrust smoothness and feedback observability, and improves the closed-loop control accuracy of precision instruments under micro-step conditions.

Description

Technical Field

[0001] This invention belongs to the field of electromechanical energy conversion and control technology, and particularly relates to an electromechanical converter drive control system for precision instruments. Background Technology

[0002] Currently, electromechanical converters used in precision instruments, as core drive components of high-precision positioning systems, typically employ a vector control architecture based on pulse width modulation. By adjusting the energy input of the stator windings, they maintain stable system operation. However, apart from the intrinsic constraints of magnetic circuit distribution and the physical structure of the stator windings, the control method has shortcomings. The performance of the underlying drive control algorithm degrades under extremely low speed and micro-step conditions, which is a bottleneck restricting submicron resolution. For example, Chinese invention patent CN2400965Y discloses a dual-chip DC speed controller, which improves system integration by integrating a single-chip microcomputer with software PID algorithms and a dedicated converter chip, but the underlying logic still relies on conventional pulse width modulation output.

[0003] As motion resolution improves towards the sub-micron level, the system needs to output extremely narrow duty cycle pulses under extremely low-speed conditions. The analog-to-digital converter (ADC) needs to occupy the inherent sampling dead time to complete charge sampling and holding and to suppress switching ringing noise in the power circuit. When the voltage vector pulse width narrows to below the sampling dead time, the controller cannot obtain effective current feedback data, resulting in a physical blind zone in the closed-loop observation circuit. To address the above problems, improving resolution by increasing the carrier frequency will increase the heat loss of power devices. Furthermore, due to the inherent limitations of the physical sampling time of the ADC, the method of estimating current using mathematical models is affected by the drift of parameters such as winding resistance and flux linkage, resulting in phase lag and exciting mechanical resonance. The inherent update delay of the discrete control system weakens the system's ability to resist dynamic disturbances.

[0004] Therefore, how to eliminate the physical sampling blind zone under extremely narrow duty cycle conditions and establish an asynchronous intervention mechanism to suppress torque pulsation caused by control delay has become the technical problem to be solved by this invention. Summary of the Invention

[0005] To address the problems mentioned in the background art, the technical solution of the present invention is as follows: An electromechanical converter drive control system for precision instruments, the system comprising: The current acquisition module is used to acquire phase current sampling data of the stator winding of the electromechanical converter and convert the phase current sampling data into system feedback control variables; The duty cycle calculation module is used to calculate the original phase duty cycle for adjusting the magnetic field distribution of the electromechanical converter based on the target voltage vector command of the precision instrument and the underlying space vector modulation algorithm. The sampling width determination module is used to retrieve the preset dead time of the bridge arm power transistor and the hardware sampling period of the analog-to-digital converter, and calculate the minimum sampling width to ensure reliable acquisition of the current signal under the current hardware constraints by performing an addition operation logic on the dead time of the bridge arm power transistor and the hardware sampling period of the analog-to-digital converter. The modulation wave reconstruction module is used to monitor and compare the numerical values ​​of each phase in the original three-phase duty cycle with the quantization logic relationship of the minimum sampling width in real time. When the original duty cycle of any phase is detected to be less than the minimum sampling width, the modulation wave reconstruction module extracts the minimum duty cycle component from the original three-phase duty cycles and determines the algebraic difference between the minimum sampling width and the minimum duty cycle component as the common-mode voltage offset used to synchronously shift the center position of the voltage vector. Then, the common-mode voltage offset is superimposed on the original duty cycle of each phase to generate a physical sampling window and obtain an effectively expanded reconstructed phase duty cycle. The modulation wave reconstruction module outputs the reconstructed phase duty cycle to the power conversion circuit. By shifting the conduction time of each phase by an equal amount, while maintaining the equivalence of the line voltage volt-second integral between the stator windings with respect to the original modulation state, the physical sampling width of the power conversion circuit in each pulse width modulation cycle is not less than the minimum sampling width.

[0006] Preferably, when calculating the common-mode voltage offset, the modulation wave reconstruction module extracts the minimum value of the original phase duty cycle of the three phases and uses the difference between the minimum sampling width and the minimum value as the calculation benchmark for the common-mode voltage offset. This ensures that the reconstructed phase duty cycle after superimposing the common-mode voltage offset meets the logic jump edge requirements of the power conversion circuit, thereby establishing a level-stable observation period that meets the conversion accuracy of the analog-to-digital converter within a single modulation cycle.

[0007] Preferably, the system further includes a sampling timing optimization unit, which monitors the hardware conversion delay of the current acquisition module within a single pulse width modulation cycle and dynamically adjusts the minimum sampling width judgment threshold according to the hardware conversion delay, so that the current sampling time is triggered in the stable range after the switching logic transition edge of the voltage vector, thereby avoiding signal noise interference induced by the commutation action of the power device.

[0008] Preferably, the system also includes a boundary limit processing unit for verifying the mapping relationship between the reconstructed phase duty cycle and the DC bus voltage utilization rate; when the superimposed common-mode voltage offset causes the duty cycle of any reconstructed phase to exceed the safe conduction limit, the boundary limit processing unit reduces the reference value of the original duty cycle of the three phases proportionally, maintaining the central symmetry of the phase current waveform while maintaining the effective sampling pulse width.

[0009] Preferably, the system further includes an impedance drift compensation unit, which is used to count the number of times the modulation wave reconstruction module performs reconstruction actions within the fundamental electrical cycle, and calculate the estimated temperature rise of the stator winding based on the trigger frequency, so as to perform real-time linear correction of the feedback gain of the phase current sampling data and eliminate the current closed-loop control deviation caused by the change of coil resistance.

[0010] Preferably, the logic for calculating the reconstructed phase duty cycle in the modulation wave reconstruction module follows these rules: ,in, To reconstruct the output value of the i-th phase in the phase duty cycle, This is the reference value for the i-th phase in the original phase duty cycle. is the common-mode voltage offset, and i is the phase index representing phase A, phase B, or phase C.

[0011] Preferably, the sampling width determination module integrates dynamic mask logic to synchronously lock the hardware interrupt trigger time of the additional sampling with the switching edge of the effective voltage vector, and compare in real time whether the current pulse width is within the safe range of 1μs to 5μs, so as to block narrow pulse commands that violate the dead time constraint of the power conversion circuit.

[0012] Preferably, the modulation wave reconstruction module rewrites the underlying registers in real time to achieve sub-period correction of the width of the currently output physical pulse, thereby controlling the nonlinear disturbance suppression response delay of the system to within 50μs and ensuring the dynamic trajectory tracking accuracy of precision instruments under micro-step conditions.

[0013] Preferably, the impedance drift compensation unit dynamically updates the discrimination criterion of the sampling timing optimization unit based on the statistical distribution characteristics of the common-mode voltage offset, thereby achieving adaptive online tracking of the slow time-varying drift phenomenon of the stator winding impedance parameter inside the electromechanical converter without introducing an external physical temperature sensor.

[0014] Preferably, the system also includes a safety consistency verification module, which is used to compare the arithmetic sum of the three-phase reconstructed phase duty cycles in real time when performing common-mode voltage offset superposition calculation, so as to ensure that the arithmetic deviation of the reconstructed line voltage vector relative to the line voltage vector calculated by the original phase duty cycle is always 0.

[0015] Compared with existing technologies, the electromechanical converter drive control system of this invention for precision instruments has the following advantages: 1. In the electromechanical converter drive control system, by using a common-mode bias coordination unit to synchronously superimpose an equal amount of bias time constant in the multi-phase initial duty cycle command, and utilizing the common-mode voltage degree of freedom of the three-phase windings of the electromechanical converter, while maintaining the absolute constant of the line voltage difference between each phase and the effective differential mode volt-second integral, the physical conduction time of the power switch in each pulse width modulation cycle is extended, so that the continuous width of the effective voltage vector is always greater than the minimum physical time required for the analog-to-digital converter to complete charge holding and commutation ringing attenuation. Thus, even under extremely narrow duty cycle conditions such as micro-Newton level thrust output or submicron level micro-stepping, high signal-to-noise ratio stator current fundamental feedback can still be obtained, eliminating the physical observation blind zone caused by the sampling dead zone of the underlying hardware, and providing a real closed-loop feedback basis for the smooth operation of precision instruments near zero speed.

[0016] 2. The sub-cycle evaluation unit and asynchronous intervention generation unit extract additional sampling data during the effective voltage vector action of a single pulse width modulation cycle and calculate the transient trajectory deviation rate in real time. This breaks the inherent periodic time synchronization relationship between sampling, calculation and duty cycle update in the digital control system. When the trajectory deviation rate exceeds the limit, the physical pulse width currently being output is truncated or extended through the underlying hardware comparison matching event. This in-situ intervention mechanism reduces the response delay of the control system from more than one pulse width modulation cycle to the sub-cycle level, eliminates the electromagnetic torque micro-pulse caused by discrete control lag, and enables the drive system to have the instantaneous compensation capability against nonlinear disturbances and internal back EMF fluctuations within the microsecond level.

[0017] 3. The state transition statistics unit accumulates the trigger frequency of asynchronous intervention events within the macroscopic fundamental electrical cycle and calculates the difference density between truncated and extended events to construct an implicit feedback loop that reflects the evolution of underlying physical parameters. This transforms high-frequency discrete intervention actions into diagnostic probes characterizing the thermal accumulation or magnetoresistance changes of the stator winding. Based on this, the sub-cycle evaluation unit's discrimination baseline is dynamically shifted, achieving adaptive compensation for the slow time-varying drift of electromechanical converter parameters. This calibration method, based on the statistical laws of control behavior, avoids dependence on high-computational thermodynamic models or additional temperature sensors, ensuring the consistency of dynamic response and the stability of positioning accuracy of precision instruments during long-term reciprocating operation. Attached Figure Description

[0018] Figure 1 This is the principle architecture and signal processing flowchart of the electromechanical converter drive control system of the present invention; Figure 2 This is a data interaction and operation logic diagram of the drive control system for modulated wave reconstruction of the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0020] An electromechanical converter drive control system for precision instruments, the system comprising: The current acquisition module is used to acquire phase current sampling data of the stator winding of the electromechanical converter and convert the phase current sampling data into system feedback control variables; The duty cycle calculation module is used to calculate the original phase duty cycle for adjusting the magnetic field distribution of the electromechanical converter based on the target voltage vector command of the precision instrument and the underlying space vector modulation algorithm. The sampling width determination module is used to retrieve the preset dead time of the bridge arm power transistor and the hardware sampling period of the analog-to-digital converter, and calculate the minimum sampling width to ensure reliable acquisition of the current signal under the current hardware constraints by performing an addition operation logic on the dead time of the bridge arm power transistor and the hardware sampling period of the analog-to-digital converter. The modulation wave reconstruction module is used to monitor and compare the numerical values ​​of each phase in the original three-phase duty cycle with the quantization logic relationship of the minimum sampling width in real time. When the original duty cycle of any phase is detected to be less than the minimum sampling width, the modulation wave reconstruction module extracts the minimum duty cycle component from the original three-phase duty cycles and determines the algebraic difference between the minimum sampling width and the minimum duty cycle component as the common-mode voltage offset used to synchronously shift the center position of the voltage vector. Then, the common-mode voltage offset is superimposed on the original duty cycle of each phase to generate a physical sampling window and obtain an effectively expanded reconstructed phase duty cycle. The modulation wave reconstruction module outputs the reconstructed phase duty cycle to the power conversion circuit. By shifting the conduction time of each phase by an equal amount, while maintaining the equivalence of the line voltage volt-second integral between the stator windings with respect to the original modulation state, the physical sampling width of the power conversion circuit in each pulse width modulation cycle is not less than the minimum sampling width.

[0021] Preferably, when calculating the common-mode voltage offset, the modulation wave reconstruction module extracts the minimum value of the original phase duty cycle of the three phases and uses the difference between the minimum sampling width and the minimum value as the calculation benchmark for the common-mode voltage offset. This ensures that the reconstructed phase duty cycle after superimposing the common-mode voltage offset meets the logic jump edge requirements of the power conversion circuit, thereby establishing a level-stable observation period that meets the conversion accuracy of the analog-to-digital converter within a single modulation cycle.

[0022] Preferably, the system further includes a sampling timing optimization unit, which monitors the hardware conversion delay of the current acquisition module within a single pulse width modulation cycle and dynamically adjusts the minimum sampling width judgment threshold according to the hardware conversion delay, so that the current sampling time is triggered in the stable range after the switching logic transition edge of the voltage vector, thereby avoiding signal noise interference induced by the commutation action of the power device.

[0023] Preferably, the system also includes a boundary limit processing unit for verifying the mapping relationship between the reconstructed phase duty cycle and the DC bus voltage utilization rate; when the superimposed common-mode voltage offset causes the duty cycle of any reconstructed phase to exceed the safe conduction limit, the boundary limit processing unit reduces the reference value of the original duty cycle of the three phases proportionally, maintaining the central symmetry of the phase current waveform while maintaining the effective sampling pulse width.

[0024] Preferably, the system further includes an impedance drift compensation unit, which is used to count the number of times the modulation wave reconstruction module performs reconstruction actions within the fundamental electrical cycle, and calculate the estimated temperature rise of the stator winding based on the trigger frequency, so as to perform real-time linear correction of the feedback gain of the phase current sampling data and eliminate the current closed-loop control deviation caused by the change of coil resistance.

[0025] Preferably, the logic for calculating the reconstructed phase duty cycle in the modulation wave reconstruction module follows these rules: ,in, To reconstruct the output value of the i-th phase in the phase duty cycle, This is the reference value for the i-th phase in the original phase duty cycle. is the common-mode voltage offset, and i is the phase index representing phase A, phase B, or phase C.

[0026] Preferably, the sampling width determination module integrates dynamic mask logic to synchronously lock the hardware interrupt trigger time of the additional sampling with the switching edge of the effective voltage vector, and compare in real time whether the current pulse width is within the safe range of 1μs to 5μs, so as to block narrow pulse commands that violate the dead time constraint of the power conversion circuit.

[0027] Preferably, the modulation wave reconstruction module rewrites the underlying registers in real time to achieve sub-period correction of the width of the currently output physical pulse, thereby controlling the nonlinear disturbance suppression response delay of the system to within 50μs and ensuring the dynamic trajectory tracking accuracy of precision instruments under micro-step conditions.

[0028] Preferably, the impedance drift compensation unit dynamically updates the discrimination criterion of the sampling timing optimization unit based on the statistical distribution characteristics of the common-mode voltage offset, thereby achieving adaptive online tracking of the slow time-varying drift phenomenon of the stator winding impedance parameter inside the electromechanical converter without introducing an external physical temperature sensor.

[0029] Preferably, the system also includes a safety consistency verification module, which is used to compare the arithmetic sum of the three-phase reconstructed phase duty cycles in real time when performing common-mode voltage offset superposition calculation, so as to ensure that the arithmetic deviation of the reconstructed line voltage vector relative to the line voltage vector calculated by the original phase duty cycle is always 0.

[0030] Example 1: In the nanometer-scale micro-stepping positioning of the semiconductor wafer defect optical scanning platform, the electromechanical converter outputs a continuous electromagnetic thrust in the micro-Newton range to maintain the extremely slow and stable movement of the high-magnification objective lens. At this time, the target voltage vector command issued by the controller is extremely small, which causes the physical pulse width corresponding to the original phase duty cycle output by the duty cycle calculation module to narrow to less than 1μs. This width is less than the inherent hardware dead time limit formed by the sum of the dead time of the bridge arm power transistor and the hardware sampling period of the analog-to-digital converter. This makes it impossible for the constant analog-to-digital converter to complete charge sampling and holding after the commutation ringing decay, resulting in a physical sampling blind zone. Under this boundary condition, the existing control architecture falls into a technical contradiction between the smoothness of electromagnetic thrust and the observability of feedback. Maintaining the smooth output of the thrust with an extremely narrow pulse results in the loss of real current feedback and the generation of closed-loop trajectory divergence. Obtaining feedback forcibly widens the single-phase pulse width and excites mechanical resonance pulsation.

[0031] To address the physical observation blind zone caused by this extremely narrow duty cycle, the sampling width determination module continuously retrieves the preset dead time of the bridge arm power transistor and the sampling period of the analog-to-digital converter hardware, and calculates the minimum sampling width under the current hardware constraints. The modulation wave reconstruction module monitors and compares the numerical values ​​of each phase in the three-phase original phase duty cycle with the quantization logic relationship of the minimum sampling width. When any phase original phase duty cycle is detected to be less than the minimum sampling width, the system does not build a high-computing-power observer model to estimate the lost data. Instead, it uses the translation scheduling characteristics of the three-phase winding common-mode voltage degrees of freedom to handle the sampling dead zone. The modulation wave reconstruction module extracts the minimum value from the three-phase original phase duty cycle as the minimum duty cycle component, calculates the algebraic difference between the minimum sampling width and the minimum duty cycle component as the common-mode voltage offset, and follows... The logic rule superimposes the common-mode voltage offset onto the original phase duty cycle of each phase, where, To reconstruct the output value of the i-th phase in the phase duty cycle, This is the reference value for the i-th phase in the original phase duty cycle. is the common-mode voltage offset, and i is the phase index representing phase A, phase B, or phase C, thereby generating the reconstructed phase duty cycle for effective expansion of the physical sampling window.

[0032] In the signal link of common-mode bias superposition operation, the system forces the construction of an effective physical time of no less than the minimum sampling width within each pulse width modulation cycle by equal shifting of the conduction time of each phase. This provides the physical basis for the current acquisition module to obtain phase current sampling data. This effective observation window created by the underlying modulation logic reconstruction directly triggers the coordinated action of the impedance drift compensation unit. The impedance drift compensation unit counts the frequency of the modulation wave reconstruction module triggering reconstruction action within the fundamental electrical cycle, transforming the discrete duty cycle intervention action into a diagnostic index characterizing the thermal accumulation of the stator winding and calculating the temperature rise prediction of the stator winding. Based on this temperature rise prediction, the feedback gain of the phase current sampling data is linearly corrected in real time, so that the expansion of the physical sampling window solves the problem of transient feedback blind zone. It also provides an online tracking compensation benchmark for the slow time-varying coil resistance drift without external temperature sensors. At the same time, the boundary limit processing unit verifies the mapping relationship between the reconstructed phase duty cycle and the DC bus voltage utilization rate in real time. When the reconstructed phase duty cycle of any phase is detected, When the safe conduction limit is exceeded, the reference value of the original three-phase duty cycle is reduced proportionally. Within the constraint boundary of ensuring the safety of the underlying devices and the central symmetry of the phase current waveform, the cooperative feedback system continues to operate. The modulation wave reconstruction module outputs the calculated reconstructed phase duty cycle to the power conversion circuit. The safety consistency verification module compares the arithmetic algebraic sum of the three-phase reconstructed phase duty cycles in real time before the wave is generated. This ensures that the arithmetic deviation of the reconstructed line voltage vector relative to the line voltage vector calculated from the original phase duty cycle is constant at 0, so that the volt-second integral of the line voltage between the stator windings remains equivalent to the original modulation state. Based on the reconstruction command, the power conversion circuit eliminates the physical sampling dead zone under the extremely narrow duty cycle condition while maintaining a constant output of small step thrust. The system eliminates the torque pulsation caused by discrete control delay and impedance thermal drift by relying on in-situ current observation and adaptive gain correction. This drives the semiconductor wafer optical scanning platform to maintain continuous stiffness response and dynamic trajectory tracking accuracy in the working region near zero speed.

[0033] Example 2: Based on the physical experimental platform, a micro-stepping performance verification test bench for electromechanical converters was constructed to obtain verification data. The test bench includes a linear motor with a rated thrust of 50N, a high-frequency current probe with a current measurement resolution of 1mA, and an analog-to-digital converter with a conversion accuracy of 16 bits. The external environment is configured with a temperature-controlled chamber with a temperature control accuracy of 0.1℃ to provide a simulated environment for the thermal accumulation effect of the stator winding. The pulse width modulation period is set based on balancing the real-time performance of data acquisition and the nonlinear dead-time error of the power devices. When the switching frequency increases and the target voltage vector amplitude decreases, the nonlinear error caused by the dead time of the bridge arm power tube increases exponentially. Based on the electrical time constant of the stator winding and setting a threshold to avoid signal frequency aliasing, the pulse width modulation frequency is locked at 10kHz, corresponding to a pulse width modulation period of 100μs, thus establishing a reference time scale for the micro-stepping operation.

[0034] The linear motor is started and its running speed is controlled at 1 mm / s to enter a very low-speed, stable movement state. A programmable interference source actively superimposes Gaussian white noise with a signal-to-noise ratio of 20 dB and power frequency harmonic interference at a frequency of 50 Hz onto the stator winding. At this time, the target voltage vector command issued by the system corresponds to original phase duty cycles of 0.4%, 0.6%, and 0.8% for phases A, B, and C, respectively, with corresponding physical conduction times of 0.4 μs, 0.6 μs, and 0.8 μs. The system retrieves the analog-to-digital converter hardware sampling period of 1.0 μs and the dead time of the bridge arm power transistor of 0.5 μs. The sampling width determination module calculates the sampling width using addition logic. The minimum sampling width is 1.5μs. Since the duty cycles of the three original phases are all less than the minimum sampling width, the modulation wave reconstruction module extracts the minimum value of 0.4% from the duty cycles of the three original phases as the minimum duty cycle component. The algebraic difference between the minimum sampling width and the minimum duty cycle component is calculated to obtain the common-mode voltage offset of 1.1%. This common-mode voltage offset is superimposed on the duty cycles of each original phase, and the output reconstructed phase duty cycles are extended to 1.5%, 1.7%, and 1.9%, respectively. The corresponding physical conduction times are extended to 1.5μs, 1.7μs, and 1.9μs, which satisfies the physical constraints of the underlying hardware sampling dead zone and establishes an effective physical sampling window.

[0035] The experiment set up a control group using standard space vector modulation technology without superimposed common-mode voltage offset and an experimental group using the technical solution of this invention. Phase current sampling data of the two linear motors were collected under the same extremely narrow duty cycle condition. In the control group, with the original phase duty cycle below 1.5%, the total harmonic distortion (THD) rate of the phase current sampling data surged nonlinearly due to the physical observation blind zone, reaching a measured value of 24.7%. This caused the peak-to-peak thrust pulsation of the system to expand to 4.15 N, accompanied by closed-loop trajectory divergence. In the experimental group, after calculating and outputting the reconstructed phase duty cycle, the THD rate of the phase current sampling data decreased and remained at 3.2%, and the peak-to-peak thrust pulsation was suppressed to 0.18 N. The measured data demonstrated the system's in-situ anti-interference capability under superimposed Gaussian white noise and power frequency harmonic interference. The temperature control box was synchronously adjusted to gradually increase the stator winding ambient temperature from 25°C to 8°C. At 5℃, the impedance drift compensation unit in the test group counted the trigger frequency of the modulation wave reconstruction module within the fundamental electrical cycle and calculated the stator winding temperature rise prediction. Based on the temperature rise prediction, the feedback gain of the phase current sampling data was linearly corrected. Within a temperature range of 60℃, the thrust fluctuation deviation was kept stable within 0.05N. Furthermore, an out-of-range control group was set up to forcefully inject common-mode voltage offset so that the reconstructed phase duty cycle reached 98.5%. The test results showed that the DC bus voltage utilization rate deteriorated and the phase current waveform produced top clipping distortion. The harmonic distortion rate rebounded to 15.6%. This established the necessity for the boundary limit processing unit to maintain the equivalent control boundary of the line voltage volt-second integral by proportionally reducing the reference value. It verified that the system restored the full-dimensional observability of the current parameters through modulation logic reconstruction by shifting the conduction time, and eliminated the thrust fluctuation generated under micro-stepping conditions by coordinating thermal impedance compensation parameters.

[0036] Example 3: In the electromechanical converter drive control system operating under high-frequency pulse width modulation, the inherent parasitic capacitance of the switching devices inside the power conversion circuit and the signal transmission path inside the current acquisition module jointly generate a hardware conversion delay. This hardware conversion delay causes the actual physical waveform of the stator winding phase current to exhibit a high-frequency ringing attenuation transition state after the switching logic transition edge of the voltage vector. When the sampling trigger moment of the analog-to-digital converter falls within the time interval of this ringing attenuation transition state, the acquired phase current sampling data deviates from the actual stator current waveform characteristics. This transient signal distortion caused by the non-ideal characteristics of the underlying physical devices constitutes an observation obstacle in the process of micro-step thrust output, and destroys the input accuracy of the closed-loop feedback link of the space vector modulation algorithm.

[0037] Faced with the transient signal distortion caused by the aforementioned hardware conversion delay, the sampling timing optimization unit retrieves the switching time specifications of the power conversion circuit and the analog-to-digital conversion setup time parameters of the current acquisition module. It calculates the algebraic sum of the switching time specifications and the setup time parameters, and outputs a quantized hardware conversion delay reference value. Based on this hardware conversion delay reference value, the sampling timing optimization unit dynamically adjusts the minimum sampling width judgment threshold, setting the judgment threshold to a value greater than the sum of the hardware conversion delay reference value and a preset safety margin time of 0.2μs. Based on this calculation, the system shifts the sampling trigger time of the phase current to a stable level range after the switching logic transition edge of the voltage vector, with the time interval not lower than the judgment threshold. By reusing the original digital control loop of the system and cooperating with this timing shift strategy, the system avoids signal noise interference induced by the commutation action of the power devices and maintains the effectiveness of the data extracted by the current acquisition module.

[0038] In the process of generating the reconstructed phase duty cycle by superimposing the common-mode voltage offset in the modulation wave reconstruction module, the boundary limit processing unit verifies the mapping relationship between the reconstructed phase duty cycle and the DC bus voltage utilization rate in real time. This ensures that the equal shift of the conduction time remains within the physical constraint of the shortest turn-off time required for charging the bootstrap capacitor of the power conversion circuit. When the maximum value of the three-phase reconstructed phase duty cycle is detected to exceed the set 95% safe conduction limit, the boundary limit processing unit calculates the quotient of the safe conduction limit and the maximum value and uses it as a proportional reduction factor. The system multiplies the reference values ​​of the three-phase original phase duty cycles by this proportional reduction factor. Based on the attenuated three-phase duty cycle, the minimum duty cycle component is recalculated and a new common-mode voltage offset is superimposed. This boundary limit constraint procedure maintains that the effective sampling pulse width is not less than the minimum sampling width while ensuring that the phase angle of the stator winding line voltage vector is equivalent to the target voltage vector command. The system eliminates the observation blind zone under extremely narrow operating conditions with a duty cycle of less than 1%. The proportional contraction of the volt-second integral maintains the safety and stability of the electromechanical energy conversion process and the continuous output of thrust. The boundary limit processing unit maintains the equivalence of the reconstructed line voltage vector relative to the original target by executing proportional scaling logic, and monitors the superimposed common-mode voltage offset in real time. Duty cycle of any subsequent phase reconstruction phase Exceeding the preset 95% safety conduction limit At that time, the scaling factor K is calculated, and K takes the upper limit of safe conduction. The maximum value of the duty cycle in the three-phase reconstruction phase The ratio of the original phase duty cycle of each phase. Multiply by the scaling factor K to obtain the corrected reference duty cycle. Based on the corrected reference duty cycle, re-extract the minimum duty cycle component and calculate the new common-mode voltage offset. Ensure that the power conversion circuit meets the physical constraint of the shortest turn-off time of the underlying power devices, and that the phase angle of the line voltage vector between the stator windings in the spatial coordinate system is consistent with the target voltage vector command.

[0039] Example 4: In the initial deployment of the electromechanical converter assembled on the optical scanning platform, to establish the reference data for the impedance drift compensation unit, the system performs an offline calibration process for the equivalent thermal effect in a constant temperature environment. The controller issues a duty cycle command to continuously trigger the modulation wave reconstruction module within the pulse width modulation period. Simultaneously, the actual ohmic impedance of the stator winding is read through a four-wire micro-ohmmeter. The main control chip counts the cumulative total number of reconstruction actions within a preset time window and calculates the algebraic difference between the actual ohmic impedance and the initial cold impedance within the window interval. The system divides this algebraic difference by the cumulative total number of triggers to output the equivalent thermal resistance drift parameter for a single reconstruction action. The processing unit writes the equivalent thermal resistance drift parameter obtained by traversing the operating temperature range into a non-volatile memory to generate a frequency impedance lookup array, forming a data structure that maps the digital modulation intervention frequency to the coil's physical heat accumulation. The reference data for the impedance drift compensation unit is determined through the following offline calibration procedure. Under controlled ambient temperature experimental conditions, the electromechanical converter is driven to operate under different load conditions. The real-time resistance of the stator winding is obtained using a high-precision impedance measurement device. The main control chip counts the cumulative frequency of modulation wave reconstruction actions triggered by the reconstruction module within a preset time window. Calculate real-time resistance Relative to the initial cold resistance The offset, divided by the cumulative frequency. The equivalent thermal drift coefficient for a single reconstruction is obtained. A digital lookup table containing the frequency-to-impedance increment mapping relationship is constructed by traversing the system's operating temperature range. The sampling timing optimization unit executes the pulse injection procedure in the power-on static state, driving the pulse width modulation generator to output a test sequence with the physical pulse width increasing in fixed steps. The current acquisition module is used to capture the actual time taken for the response waveform to reach the stable level range. ,according to Logical extraction of hardware conversion delay baseline value, This is the current measured resistance value. This is the reference resistance value at 25℃. To reconstruct the action count value, This represents the total measured response time. This is to issue the test pulse width command value.

[0040] When the system is connected to the power conversion circuit, the system performs an in-situ calibration process for the hardware conversion delay reference value in the power-on static state. The specific process is as follows: The pulse width modulation generator outputs a test voltage vector sequence with a physical pulse width increasing from 0.5μs to 5.0μs in 0.1μs steps. The current acquisition module continuously captures 50 current samples at each step point and calculates the range. When the sample range is less than 1% of the full range for three consecutive step cycles, the pulse width corresponding to this step is recorded as the starting point for level stability observation. This starting point is then accumulated with 0.3μs of hardware response redundancy and confirmed as the threshold for determining the minimum sampling width. The pulse width modulation generator outputs a test voltage vector sequence with a physical pulse width increasing according to a set time step. The direct memory access channel of the current acquisition module synchronously records the terminal response waveform excited by this sequence. The sampling timing optimization unit measures the actual time taken for the response waveform to reach a stable level and calculates the result according to the specified time step. The operational logic extracts delay feature parameters, where, To calculate the obtained hardware conversion delay baseline value, This represents the actual time spent. As a preset reference conduction time, the boundary limit processing unit updates the judgment threshold of the minimum sampling width in the memory using the hardware conversion delay reference value, and the control system performs parameter alignment of the hardware dead zone boundary based on the physical parameters of the underlying power device.

[0041] The embodiments of this application have been described above with reference to the accompanying drawings. Unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other. This application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit of this application and the scope of protection of this invention, and all of these forms are within the protection scope of this application.

Claims

1. A drive control system for an electromechanical converter used in precision instruments, characterized in that, The system includes: The current acquisition module is used to acquire phase current sampling data of the stator winding of the electromechanical converter and convert the phase current sampling data into system feedback control variables; The duty cycle calculation module is used to calculate the original phase duty cycle for adjusting the magnetic field distribution of the electromechanical converter based on the target voltage vector command of the precision instrument and the underlying space vector modulation algorithm. The sampling width determination module is used to retrieve the preset dead time of the bridge arm power transistor and the hardware sampling period of the analog-to-digital converter, and calculate the minimum sampling width to ensure reliable acquisition of the current signal under the current hardware constraints by performing an addition operation logic on the dead time of the bridge arm power transistor and the hardware sampling period of the analog-to-digital converter. The modulation wave reconstruction module is used to monitor and compare the quantization logic relationship between the numerical value of each phase in the three-phase original phase duty cycle and the minimum sampling width in real time. When the duty cycle of any original phase is detected to be less than the minimum sampling width, the modulation wave reconstruction module extracts the minimum duty cycle component from the duty cycles of the three original phases and determines the common-mode voltage offset used to synchronously shift the center position of the voltage vector by the algebraic difference between the minimum sampling width and the minimum duty cycle component. Then, the common-mode voltage offset is superimposed on the duty cycle of each original phase to generate a physical sampling window and obtain an effectively expanded reconstructed phase duty cycle. The modulation wave reconstruction module outputs the reconstructed phase duty cycle to the power conversion circuit. By shifting the conduction time of each phase by an equal amount, while maintaining the equivalence of the line voltage volt-second integral between the stator windings with respect to the original modulation state, the physical sampling width of the power conversion circuit in each pulse width modulation cycle is not less than the minimum sampling width.

2. The electromechanical converter drive control system for precision instruments according to claim 1, characterized in that, When calculating the common-mode voltage offset, the modulation wave reconstruction module extracts the minimum value of the original phase duty cycle of the three phases and uses the difference between the minimum sampling width and the minimum value as the calculation benchmark for the common-mode voltage offset to ensure that the reconstructed phase duty cycle after superimposing the common-mode voltage offset meets the logic jump edge requirements of the power conversion circuit.

3. The electromechanical converter drive control system for precision instruments according to claim 2, characterized in that, The system also includes a sampling timing optimization unit, which monitors the hardware conversion delay of the current acquisition module within a single pulse width modulation cycle and dynamically adjusts the minimum sampling width judgment threshold based on the hardware conversion delay, so that the current sampling time is triggered in the stable range after the switching logic transition edge of the voltage vector, avoiding signal noise interference induced by the commutation action of power devices.

4. The electromechanical converter drive control system for precision instruments according to claim 3, characterized in that, The system also includes a boundary limit processing unit, which is used to verify the mapping relationship between the reconstructed phase duty cycle and the DC bus voltage utilization rate. When the superimposed common-mode voltage offset causes the duty cycle of any reconstructed phase to exceed the safe conduction limit, the boundary limit processing unit reduces the reference value of the original duty cycle of the three phases proportionally, so as to maintain the central symmetry of the phase current waveform while maintaining the effective sampling pulse width.

5. The electromechanical converter drive control system for precision instruments according to claim 1, characterized in that, The system also includes an impedance drift compensation unit, which is used to count the number of times the modulation wave reconstruction module performs reconstruction actions within the fundamental electrical cycle, and calculate the estimated temperature rise of the stator winding based on the trigger frequency, so as to perform real-time linear correction of the feedback gain of the phase current sampling data and eliminate the current closed-loop control deviation caused by the change of coil resistance.

6. The electromechanical converter drive control system for precision instruments according to claim 2, characterized in that, The logic for calculating the reconstructed phase duty cycle in the modulation wave reconstruction module follows these rules: ,in, To reconstruct the output value of the i-th phase in the phase duty cycle, This is the reference value for the i-th phase in the original phase duty cycle. is the common-mode voltage offset, and i is the phase index representing phase A, phase B, or phase C.

7. The electromechanical converter drive control system for precision instruments according to claim 1, characterized in that, The sampling width determination module integrates dynamic mask logic, which is used to synchronously lock the hardware interrupt trigger time of the additional sampling with the switching edge of the effective voltage vector, and compare in real time whether the current pulse width is within the safe range of 1μs to 5μs, so as to block narrow pulse commands that violate the dead time constraint of the power conversion circuit.

8. The electromechanical converter drive control system for precision instruments according to claim 1, characterized in that, The modulation wave reconstruction module rewrites the underlying registers in real time to achieve sub-period correction of the width of the currently output physical pulse, controlling the nonlinear disturbance suppression response delay of the system to within 50μs, and ensuring the dynamic trajectory tracking accuracy of precision instruments under micro-step conditions.

9. A drive control system for an electromechanical converter used in precision instruments according to claim 5, characterized in that, The impedance drift compensation unit dynamically updates the discrimination criteria of the sampling timing optimization unit based on the statistical distribution characteristics of the common-mode voltage offset, thereby achieving adaptive online tracking of the slow time-varying drift phenomenon of the stator winding impedance parameter inside the electromechanical converter without introducing an external physical temperature sensor.

10. A drive control system for an electromechanical converter used in precision instruments according to claim 1, characterized in that, The system also includes a safety consistency verification module, which compares the arithmetic sum of the three-phase reconstructed phase duty cycles in real time when performing common-mode voltage offset superposition calculation, to ensure that the arithmetic deviation of the reconstructed line voltage vector relative to the line voltage vector calculated from the original phase duty cycle is always 0.

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