Audio conditioning circuit and method

Abstract

This invention provides an audio adjustment circuit and method. The audio adjustment circuit includes: a signal generation circuit for processing a serial control signal to generate multiple frequency selection control signals; an operational amplifier with its non-inverting input connected to a reference potential, its inverting input forming a summing node, and its output serving as the output of the audio adjustment circuit; a feedback circuit disposed between the output of the operational amplifier and the summing node; a frequency selection network disposed between the input and the summing node; and an analog switching network controlled by the multiple frequency selection control signals for switching between multiple candidate connection states to selectively connect different nodes in the frequency selection network to the summing node and / or change the connection relationships between branches in the frequency selection network, thereby forming different pre-equalized frequency responses at the output. Using the above technical solution, the gain or attenuation of the high-frequency portion of the audio input signal can be dynamically adjusted to improve sound quality.

Description

Technical Field

[0001] This invention relates to the field of audio adjustment technology, and in particular to an audio adjustment circuit and method. Background Technology

[0002] In modern Hi-Fi audio systems, with the diversification of audio sources and the increasing demands for audio quality, how to accurately select and process audio signals from multiple sources, especially to boost or attenuate high-frequency frequencies, has become a key issue in audio processing technology.

[0003] Specifically, Hi-Fi audio systems typically require selecting and switching between multiple signal sources and adjusting the frequency response of the selected signal to ensure high-quality audio output.

[0004] Boosting or attenuating high frequencies has a crucial impact on sound quality. To ensure detail reproduction and a balanced sound quality, adjustments to the high-frequency range are often necessary in Hi-Fi audio systems.

[0005] However, currently, manual adjustments are required to change the frequency response characteristics of audio signals. Summary of the Invention

[0006] This invention provides an audio adjustment circuit and method that can dynamically adjust the gain or attenuation of the high-frequency part of the audio input signal to improve sound quality.

[0007] An audio adjustment circuit, comprising: A signal generation circuit is used to process a received serial control signal to generate a multi-channel frequency selection control signal. An operational amplifier, wherein the non-inverting input terminal of the operational amplifier is connected to a reference potential, the inverting input terminal forms a summing node, and the output terminal serves as the output terminal of the audio adjustment circuit; A feedback circuit is provided between the output of the operational amplifier and the summing node; A frequency selection network is disposed between the input terminal and the summing node. The frequency selection network includes at least one resistor branch and at least one frequency correction branch containing a capacitor. The analog switching network, controlled by the multi-channel frequency selection control signal, is used to switch between multiple candidate connection states to selectively connect different nodes in the frequency selection network to the summing node and / or change the connection relationship between the branches in the frequency selection network. This causes the equivalent impedance from the input terminal to the summing node to change with the frequency of the audio input signal and the state of the multi-channel frequency selection control signal, thereby forming different pre-equalized frequency responses at the output of the audio adjustment circuit.

[0008] Optionally, the signal generation circuit includes: A serial-to-parallel conversion latch unit is used to receive the serial control signal and output multiple parallel control bits according to the serial control signal; The first drive conversion unit is connected to the first part of the control bits in the multiple parallel control bits, and is used to convert the first part of the control bits into a first set of control output signals. The second drive conversion unit is connected to the second part of the control bits in the multi-channel parallel control bits, and is used to convert the second part of the control bits into a second set of control output signals. The pull-up unit is connected to the output terminals of the first drive conversion unit and the second drive conversion unit, respectively, and is connected to the control power supply; The first drive conversion unit and the second drive conversion unit are used to convert the logic control bits output by the serial-to-parallel conversion latch unit into control levels suitable for use by the analog switch control terminal, so as to generate multiple frequency selection control signals.

[0009] Optionally, the first drive conversion unit includes: a multi-channel open collector driver, the input terminals of the multi-channel open collector driver are respectively connected to the first part of the control bits, and the output terminals of the multi-channel open collector driver respectively output the first set of control output signals to form the first set of frequency selection control signals after level conversion under the action of the pull-up unit; The second drive conversion unit includes a transistor and a current-limiting resistor. The control terminal of the transistor is connected to the second part of the control bit through the current-limiting resistor. The first terminal of the transistor is connected to the reference ground. The second terminal of the transistor outputs the second set of control output signals to form the second set of frequency selection control signals after level conversion under the action of the pull-up unit.

[0010] Optionally, the pull-up unit includes multiple pull-up resistors, one end of each pull-up resistor is connected to the control power supply, and the other end is connected to the corresponding control output terminal, so that the corresponding control output terminal is kept at a high level when the drive conversion unit is not turned on, and is pulled low when the drive conversion unit is turned on.

[0011] Optionally, the analog switching network includes a first analog switching device, which includes three sets of independent analog switching units. Each analog switching unit has a common terminal and two selection terminals. The common terminal is connected to the corresponding node in the frequency selection network, and the two selection terminals are connected to different candidate branch nodes to realize the switching access of different frequency correction branches.

[0012] Optionally, the analog switching network further includes a second analog switching device, which is used to switch another set of frequency correction branches to cooperate with the first analog switching device to achieve multi-level pre-equalization response.

[0013] Optionally, the first branch in the frequency correction branch includes: The first resistor has its input terminal connected to the input terminal or an input node connected to the input terminal; A parallel network, the input of which is connected to the output of the first resistor, the parallel network being composed of a second resistor and a first capacitor connected in parallel; The switching connection is connected to the output of the parallel network and controlled by the analog switching network; The switching connection terminal is selectively connected to the summing node under the control of the analog switching network, so that the first capacitor bypasses at least a portion of the impedance of the second resistor at a higher frequency.

[0014] Optionally, the frequency selection network further includes a second branch containing a capacitor, the second branch and the first branch together forming multiple frequency inflection points.

[0015] Optionally, the multi-frequency selection control signal includes at least one set of high-frequency control signals, which are used to control the analog switching network to select the access state of different high-frequency correction branches; The control signal also includes at least one set of low-frequency control signals and one high-frequency control signal. The low-frequency control signal is used to control the second analog switching device to switch the access state of the low-frequency correction branch.

[0016] An audio adjustment method, applied to the audio adjustment circuit described in any of the foregoing embodiments, the audio adjustment method comprising: In response to receiving a serial control signal, the serial control signal is processed to generate a multi-channel frequency selection control signal; In response to the multi-channel frequency selection control signal, the analog switching network is controlled to connect the target node in the frequency selection network to the summing node and / or change the connection relationship between the branches inside the frequency selection network, so that different frequency components are injected into the summing node through branches with different equivalent impedances. The audio input signal is pre-equalized using an operational amplifier.

[0017] The signal generation circuit processes the serial control signal to generate a multi-channel frequency selection control signal corresponding to it. Each of these signals has its own corresponding level state to control different frequency responses. The generated multi-channel frequency selection control signals are output to an analog switching network. Controlled by different combinations of level states, the multi-channel frequency selection control signals can switch between multiple candidate connection states. Since each candidate connection state corresponds to an impedance selection, when selecting a candidate connection state, different nodes in the frequency selection network are selectively connected to the summing node and / or the connection relationships between branches in the frequency selection network are changed, thereby altering the equivalent resistance. Thus, with the audio input signal unchanged, the operational amplifier can generate different pre-equalized frequency responses at the output, dynamically adjusting the gain or attenuation of the high-frequency portion of the audio input signal to improve sound quality. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of an audio adjustment circuit according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a signal generation circuit in an embodiment of the present invention; Figure 3 This is a partial structural schematic diagram of an audio adjustment circuit according to an embodiment of the present invention; Figure 4 This is a schematic diagram of high-frequency attenuation changes in an embodiment of the present invention; Figure 5 This is a flowchart of an audio adjustment method according to an embodiment of the present invention. Detailed Implementation

[0020] The following detailed description of preferred embodiments is a preferred mode for carrying out the invention. This description is not intended to be limiting; it is provided to illustrate the general principles of the invention.

[0021] It should be understood that, for ease of understanding of the present invention, the terms "installation," "connection," "coupling," and "installation" in the following description refer to the connection relationships shown in the drawings. For example, "connection" can refer to a permanent connection or a detachable connection. Furthermore, "connection" can also refer to a direct connection or an indirect connection, or a connection via other auxiliary components. Therefore, the above terms should not be construed as limiting the actual connections of the various elements of the present invention.

[0022] It should be understood that the terms "first," "second," "an," "a," and "one" in the following description refer to "at least one" or "one or more" in the embodiments. In particular, the term "a" may refer to "one" in one embodiment and "more than one" in another embodiment. Therefore, the above terms should not be construed as limiting the actual number of elements of the present invention.

[0023] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0024] As described in the background section, in the field of Hi-Fi audio, it is often necessary to select one signal from multiple signal sources for switching and high-frequency boosting or attenuation. In this case, a negative feedback adjustment circuit consisting of an operational amplifier, electronic switches, and external resistors and capacitors can be used. The electronic switches switch different resistance values ​​to achieve the high-frequency adjustment circuit.

[0025] Negative feedback adjustment circuits feature low noise, low distortion, and high stability. Multiple signals are attenuated by switches and resistors before being output. They employ direct coupling, resulting in a simple signal path and reduced signal loss and interference. They are widely used in power amplifiers and audio systems.

[0026] Based on this, this application adds improvements to the audio signal boosting or attenuation on the basis of multi-channel analog and digital signal switching, in order to improve the performance of power amplifier products.

[0027] See Figure 1 , Figure 1 This is a schematic diagram of an audio adjustment circuit according to an embodiment of the present invention. The audio adjustment circuit may include: The signal generation circuit 110 is used to process the received serial control signal to generate a multi-channel frequency selection control signal. Operational amplifier 120, the non-inverting input terminal of the operational amplifier 120 is connected to a reference potential, the inverting input terminal forms a summing node, and the output terminal serves as the output terminal of the audio adjustment circuit; Feedback circuit 130 is disposed between the output terminal of operational amplifier 120 and the summing node; A frequency selection network 140 is disposed between the input terminal and the summing node. The frequency selection network 140 includes at least one resistor branch and at least one frequency correction branch containing a capacitor. The analog switching network 150, controlled by the multi-channel frequency selection control signal, is used to switch between multiple candidate connection states to selectively connect different nodes in the frequency selection network 140 to the summing node and / or change the connection relationship between the branches in the frequency selection network. This causes the equivalent impedance from the input terminal to the summing node to change with the frequency of the audio input signal INL / INR (where INL corresponds to the left channel audio input signal and INL corresponds to the right channel audio input signal) and the state of the multi-channel frequency selection control signal, so as to form different pre-equalized frequency responses at the output terminal of the audio adjustment circuit.

[0028] Specifically, the signal generation circuit 110 can process the serial control signal to generate a multi-channel frequency selection control signal corresponding to the serial control signal. That is, each frequency selection control signal in the multi-channel frequency selection control signal has its own corresponding level state to control different frequency responses. For example, all the multi-channel frequency selection control signals are high level, or all are low level; or, some are low level and some are high level.

[0029] The generated multiple frequency selection control signal is output to the analog switching network 150. Controlled by different combinations of level states, the multiple frequency selection control signal can switch between multiple candidate connection states. Since each candidate connection state corresponds to an impedance selection, when selecting one of the candidate connection states, different nodes in the frequency selection network 140 are selectively connected to the summing node and / or the connection relationship between the branches in the frequency selection network 140 is changed, thereby changing the equivalent resistance.

[0030] In this way, with the audio input signal IN L / IN R unchanged, the operational amplifier 120 can generate different pre-equalization frequency responses at the output terminal, thereby achieving the gain or attenuation of the high-frequency part of the audio input signal IN L / IN R, so that the sound emitted by the speaker device has the characteristics of high resolution, delicacy, naturalness, strong sense of presence and easy listening.

[0031] See Figure 2 , Figure 2 This is a schematic diagram of the structure of a signal generation circuit in an embodiment of the present invention.

[0032] like Figure 2As shown, the signal generation circuit includes: The serial-to-parallel conversion latch unit 210 is used to receive the serial control signal and output multiple parallel control bits according to the serial control signal; The first drive conversion unit 212 is connected to the first part of the control bits in the multi-channel parallel control bits, and is used to convert the first part of the control bits into a first group of control output signals. The second drive conversion unit 214 is connected to the second part of the control bits in the multi-channel parallel control bits, and is used to convert the second part of the control bits into a second set of control output signals. Pull-up unit 216 is connected to the output terminals of the first drive conversion unit 212 and the second drive conversion unit 214 respectively, and is connected to the control power supply V1; The first drive conversion unit 212 and the second drive conversion unit 214 are used to convert the logic control bits output by the serial-to-parallel conversion latch unit into control levels suitable for use by the analog switch control terminal, so as to generate multiple frequency selection control signals.

[0033] Specifically, the serial-to-parallel conversion latch unit 210 can reverse the serial control signal to output multiple parallel control bits. A portion of the multiple parallel control bits is output to the first drive conversion unit 212, and the remaining portion is output to the second drive conversion unit 214.

[0034] Since the output terminals of the first drive conversion unit 212 and the second drive conversion unit 214 are both connected to the pull-up unit 216, when the first drive conversion unit 212 and / or the second drive conversion unit 214 outputs the corresponding high level, the pull-up unit 216 can generate multiple frequency selection control signals.

[0035] The serial-to-parallel conversion latch unit 210 is used to provide multiple parallel control bits, and the first drive conversion unit 212 and the second drive conversion unit 214, together with the pull-up unit 216, generate multiple frequency selection control signals.

[0036] In some embodiments, see Figure 2 The serial-to-parallel conversion latch unit 210 has an interface including a chip select input, a data input, and a clock input. Based on the serial control signals input from the chip select input, data input, and clock input, the serial-to-parallel conversion latch unit 210 outputs at least eight parallel control bits.

[0037] Specifically, the chip select input is used to receive the chip select signal CE_EQ, the data input is used to receive the data signal DATA, and the clock input is used to receive the clock signal CLK. The serial-to-parallel conversion latch unit 210 is used to invert the data signal DATA to output 8 parallel control bits ( / LF0, / LF1, / LF2, / LF3, / HF0, / HF1, / HF2, and / HF3).

[0038] The serial-to-parallel conversion latch unit 210 has eight output ports Q0 to Q7.

[0039] In some embodiments, the serial-to-parallel conversion latch unit 210 further includes an enable terminal EN, which is connected to a power-on initialization circuit. The power-on initialization circuit includes a resistor Q1 connected to the logic power supply V2 and capacitors C1 and C2 connected to the reference ground GND, for delay control of the enable terminal EN during power-on.

[0040] In one example, the serial-to-parallel conversion latch unit 210 is an inverting buffer.

[0041] See next Figure 2 The first drive conversion unit 212 may include a multi-channel open collector driver, the input terminals of which are respectively connected to the first part of the control bits (e.g., connected to the output interfaces Q0 to Q6), and the output terminals of which respectively output the first group of control output signals to form the first group of frequency selection control signals after level conversion under the action of the pull-up unit 216.

[0042] For example, through the output interface to The first set of frequency selection control signals LF0, LF1, LF2, LF3, HF0, HF1 and HF2 are output.

[0043] In one example, the first drive conversion unit 212 is a high-current drive chip, such as the ULN2003AD chip.

[0044] In some embodiments, the second drive conversion unit 214 may include a transistor Q1 and a current-limiting resistor R1. The control terminal of the transistor Q1 is connected to the second part of the control bit (e.g., Q7) via the current-limiting resistor R1. The first terminal of the transistor Q1 is connected to the reference ground GND. The second terminal of the transistor Q1 outputs the second set of control output signals to form a second set of frequency selection control signals after level conversion under the action of the pull-up unit.

[0045] Specifically, the control terminal of transistor Q1 receives the control signal from the serial-to-parallel conversion latch unit 210 through the current-limiting resistor R1, and is connected to the pull-up unit 126 through the second terminal, thereby amplifying the control signal and driving the subsequent load.

[0046] In some embodiments, transistor Q1 outputs a second set of frequency selection control signals HF3.

[0047] In some embodiments, the pull-up unit 216 may include a plurality of pull-up resistors, one end of each pull-up resistor being connected to the control power supply V1, and the other end being connected to the corresponding control output terminal, so that the corresponding control output terminal is kept at a high level when the drive conversion unit is not turned on, and is pulled low when the drive conversion unit is turned on.

[0048] Specifically, the number of pull-up resistors is consistent with the number of output ports / output signals of the drive conversion unit. That is, one frequency selection control signal corresponds to one resistor.

[0049] In this embodiment, the pull-up unit 216 may include a first pull-up resistor R2, corresponding to LF0; a second pull-up resistor R3, corresponding to LF1; a third pull-up resistor R3, corresponding to LF2; a fourth pull-up resistor R4, corresponding to LF3; a fifth pull-up resistor R5, corresponding to HF0; a sixth pull-up resistor R6, corresponding to HF1; a seventh pull-up resistor R2, corresponding to HF2; and an eighth pull-up resistor R8, corresponding to HF3.

[0050] In some embodiments, see Figure 3 , Figure 3 This is a partial structural schematic diagram of an audio adjustment circuit in an embodiment of the present invention.

[0051] The analog switching network includes a first analog switching device 312, which includes three sets of independent analog switching units (e.g., analog switching units corresponding to ports 9, 10, and 11). Each analog switching unit has a common terminal and two selection terminals. The common terminal is connected to the corresponding node in the frequency selection network, and the two selection terminals are connected to different candidate branch nodes to realize the switching access of different frequency correction branches.

[0052] Specifically, in Figure 3 In the schematic first analog switching device 312, port A is used to control the state of (X, X0, and X1). For example, in the initial state, X is connected to X0, and when the level state of port A changes, X is connected to X1.

[0053] Port B is used to control the state of (Y, Y0, and Y1). For example, initially, Y is connected to Y0, and when the level state of port B changes, Y is connected to Y1.

[0054] Similarly, port C is used to control the states of (Z, Z0, and Z1). For example, initially, Z is connected to Z0, and when the level of port C changes, Z is connected to Z1.

[0055] Port A is used for inputting HF0, port B for inputting HF1, and port C for inputting HF2. By configuring different voltage levels for HF0, HF1, and HF2, different nodes in the frequency selection network can be connected.

[0056] In some embodiments, the first analog switching device 312 further has a reverse enable terminal. Connect to the reference ground GND.

[0057] In addition, the first analog switching device 312 also has a power supply terminal VDD for input voltage V3, and a ground terminal and a negative power supply pin for input voltage V4, wherein the sum of V3 and V4 is 0.

[0058] In some embodiments, the analog switching network further includes a second analog switching device 314, which is used to switch another set of frequency correction branches to cooperate with the first analog switching device 312 to achieve multi-level pre-equalization response.

[0059] The second analog switch device 314 and the first analog switch device 312 have the same device structure. For example, the second analog switch device 314 also includes three independent analog switch units. Each analog switch unit has a common terminal and two selection terminals. The common terminal is connected to the corresponding node in the frequency selection network, and the two selection terminals are connected to different candidate branch nodes to realize the switching access of different frequency correction branches.

[0060] Specifically, in Figure 3 In the illustrated second analog switching device 314, port C is used to control the states of (Z, Z0, and Z1). For example, in the initial state, Z is connected to Z0, and when the level state of port C changes, Z is connected to Z1.

[0061] Port C is used as the input for HF3. By configuring the level state of HF3, and combining it with the level states of HF0, HF1, and HF2, different nodes in the frequency selection network can be connected.

[0062] It should be pointed out that, although Figure 3 The diagram also illustrates LF3, but LF3 is not used in actual applications. This application's embodiments focus on high-frequency attenuation and boosting of audio input signals.

[0063] In this embodiment, the multi-frequency selection control signal includes at least one set of high-frequency control signals, which are used to control the analog switching network to select different high-frequency correction branch access states; the control signal also includes at least one set of low-frequency control signals and one high-frequency control signal, which are used to control the second analog switching device to switch the access state of the low-frequency correction branch.

[0064] In one example, the second analog switch device 314 and the first analog switch device 312 are three-way analog switch chips.

[0065] In some embodiments, the feedback circuit includes a feedback capacitor C33.

[0066] In some embodiments, the first branch in the frequency correction branch includes: A first resistor (e.g., first resistor R33) has its input terminal connected to the input terminal (e.g., the port where the input audio signal INL / IN R is located) or an input node connected to the input terminal; a parallel network has its input terminal connected to the output terminal of the first resistor R33, the parallel network being composed of a second resistor R34 and a first capacitor C31 connected in parallel; a switching connection terminal is connected to the output terminal of the parallel network and controlled by the analog switching network; wherein, under the control of the analog switching network, the switching connection terminal selectively conducts with the summing node, so that the first capacitor bypasses at least a portion of the impedance of the second resistor R34 at a higher frequency.

[0067] In some embodiments, the first branch further includes a third resistor R31, a fourth resistor R32, a fifth resistor R35, and a sixth resistor R36.

[0068] In other words, the first resistor R33, the second resistor R34, the first capacitor C31, the third resistor R31, the fourth resistor R32, the fifth resistor R35, and the sixth resistor R36 form a high-frequency correction path.

[0069] In some embodiments, the frequency selection network further includes a second branch containing a capacitor, which together with the first branch forms multiple frequency inflection points to obtain different high-frequency boost, attenuation, or slope.

[0070] For example, the second branch includes: a seventh resistor R37, an eighth resistor R38, a second capacitor C32, a ninth resistor R39, a tenth resistor R40, an eleventh resistor R41, and a twelfth resistor R42. These capacitors and resistors form another set of high-frequency correction paths.

[0071] In some embodiments, the second capacitor C32 and the first capacitor C31 are located on different paths.

[0072] To better understand and illustrate this, an example will be provided.

[0073] In this branch, after the audio input signal IN_L / IN_R is input, it reaches the intermediate node through the first resistor R33. A parallel network formed by the second resistor R34 and the first capacitor C31 is set between the intermediate node and the subsequent node. The subsequent node is selectively connected to the inverting input summing node node via an analog switching device.

[0074] When the audio input signal IN_L / IN_R is in a low frequency range, the first capacitor C31 has a high impedance. The equivalent impedance of this branch is mainly determined by the first resistor R33 and the second resistor R34. Therefore, the current flowing into the inverting input summing node is small.

[0075] When the audio input signal IN_L / IN_R is in a higher frequency range, the impedance of the first capacitor C31 decreases, which bypasses the second resistor R34, thereby reducing the equivalent impedance of this branch input to the inverting input summing node, making it easier for high-frequency components to be injected into the inverting input summing node.

[0076] After processing the frequency-dependent current, the operational amplifier 120 generates a corresponding high-frequency correction effect at the output.

[0077] When the high-frequency control signals HF0, HF1, HF2 and HF3 are in different combinations, the internal switching units of the first analog switch device 312 and the second analog switch device 314 switch to different conduction states, thereby enabling different resistor-capacitor nodes to be selected.

[0078] Since the equivalent impedance of the selected branch changes with frequency, the frequency-dependent current injected into the inverting input summing node of different branches is different, which ultimately causes the frequency response of the operational amplifier 120 to change, thus forming different pre-equalization levels at the output.

[0079] It should be noted that the above-mentioned resistance values, capacitance values, device models, and control signal names are only preferred embodiments. For those skilled in the art, without departing from the concept of this invention, the analog switching devices can be replaced with other analog switching devices having the same switching function, the operational amplifiers can be replaced with other operational amplifiers suitable for audio processing, and the resistance and capacitance parameters can be equivalently adjusted to obtain different pre-equalization curves. All such modifications should fall within the protection scope of this invention.

[0080] In one embodiment, by using an operational amplifier and an electronic switch, along with negative feedback adjustment consisting of external resistors and capacitors, the on / off state of the switch is controlled by the high / low level ("1" and "0") of the control pins (HF0 / HF1 / HF2 / HF3), and different resistance values ​​are switched using the electronic switch to achieve high frequency boosting or attenuation.

[0081] See Figure 4 , Figure 4 This is a schematic diagram of high-frequency attenuation changes in an embodiment of the present invention. The horizontal axis represents frequency, and the vertical axis represents the degree of attenuation.

[0082] like Figure 4 As shown, by configuring the high / low levels of HF0 / HF1 / HF2 / HF3, different degrees of high-frequency boosting and attenuation of audio signals can be achieved, wherein: HF0=0 / HF1=1 / HF2=0 / HF3=0, at this time the treble is boosted by +6dB.

[0083] HF0=0 / HF1=1 / HF2=1 / HF3=0, at this time the treble is boosted by +4dB.

[0084] HF0=0 / HF1=1 / HF2=1 / HF3=1, at this time the treble is boosted by +2dB.

[0085] HF0=0 / HF1=0 / HF2=0 / HF3=1, at this time there is no boost or attenuation of the high frequencies, that is, 0dB.

[0086] HF0=1 / HF1=0 / HF2=1 / HF3=0, at this time the treble attenuation is -2dB.

[0087] HF0=1 / HF1=0 / HF2=0 / HF3=0, at this time the treble attenuation is -4dB.

[0088] HF0=1 / HF1=0 / HF2=0 / HF3=0, at this time the treble attenuation is -6dB.

[0089] In some embodiments, the operational amplifier is powered by a dual power supply, with a positive power supply of V5 (e.g., +8VA) and a negative power supply of -8VA, to accommodate the bipolar processing requirements of audio analog signals.

[0090] The present invention also provides an audio adjustment method, which can be applied to the audio adjustment circuit described in any of the foregoing embodiments.

[0091] See Figure 5 , Figure 5 This is a flowchart of an audio adjustment method according to an embodiment of the present invention. The audio adjustment method includes: S501, in response to receiving a serial control signal, processes the serial control signal to generate a multi-channel frequency selection control signal.

[0092] S502, in response to the multi-channel frequency selection control signal, control the analog switching network to connect the target node in the frequency selection network to the summing node and / or change the connection relationship between the branches inside the frequency selection network, so that different frequency components are injected into the summing node through branches with different equivalent impedances. The S503 pre-equalizes the frequency of the audio input signal using an operational amplifier.

[0093] For more details on audio adjustment methods, please refer to the examples above.

[0094] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0095] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. An audio adjustment circuit, characterized in that, include: A signal generation circuit is used to process a received serial control signal to generate a multi-channel frequency selection control signal. An operational amplifier, wherein the non-inverting input terminal of the operational amplifier is connected to a reference potential, the inverting input terminal forms a summing node, and the output terminal serves as the output terminal of the audio adjustment circuit; A feedback circuit is provided between the output of the operational amplifier and the summing node; A frequency selection network is disposed between the input terminal and the summing node. The frequency selection network includes at least one resistor branch and at least one frequency correction branch containing a capacitor. The analog switching network, controlled by the multi-channel frequency selection control signal, is used to switch between multiple candidate connection states to selectively connect different nodes in the frequency selection network to the summing node and / or change the connection relationship between the branches in the frequency selection network. This causes the equivalent impedance from the input terminal to the summing node to change with the frequency of the audio input signal and the state of the multi-channel frequency selection control signal, thereby forming different pre-equalized frequency responses at the output of the audio adjustment circuit.

2. The audio adjustment circuit according to claim 1, characterized in that, The signal generation circuit includes: A serial-to-parallel conversion latch unit is used to receive the serial control signal and output multiple parallel control bits according to the serial control signal; The first drive conversion unit is connected to the first part of the control bits in the multiple parallel control bits, and is used to convert the first part of the control bits into a first set of control output signals. The second drive conversion unit is connected to the second part of the control bits in the multi-channel parallel control bits, and is used to convert the second part of the control bits into a second set of control output signals. The pull-up unit is connected to the output terminals of the first drive conversion unit and the second drive conversion unit, respectively, and is connected to the control power supply; The first drive conversion unit and the second drive conversion unit are used to convert the logic control bits output by the serial-to-parallel conversion latch unit into control levels suitable for use by the analog switch control terminal, so as to generate multiple frequency selection control signals.

3. The audio adjustment circuit according to claim 2, characterized in that, The first drive conversion unit includes: a multi-channel open collector driver, the input terminals of the multi-channel open collector driver are respectively connected to the first part of the control bits, and the output terminals of the multi-channel open collector driver respectively output the first group of control output signals to form the first group of frequency selection control signals after level conversion under the action of the pull-up unit; The second drive conversion unit includes a transistor and a current-limiting resistor. The control terminal of the transistor is connected to the second part of the control bit through the current-limiting resistor. The first terminal of the transistor is connected to the reference ground. The second terminal of the transistor outputs the second set of control output signals to form the second set of frequency selection control signals after level conversion under the action of the pull-up unit.

4. The audio adjustment circuit according to claim 2 or 3, characterized in that, The pull-up unit includes multiple pull-up resistors. One end of each pull-up resistor is connected to the control power supply, and the other end is connected to the corresponding control output terminal, so that the corresponding control output terminal is kept at a high level when the drive conversion unit is not turned on, and is pulled low when the drive conversion unit is turned on.

5. The audio adjustment circuit according to claim 1, characterized in that, The analog switching network includes a first analog switching device, which includes three sets of independent analog switching units. Each analog switching unit has a common terminal and two selection terminals. The common terminal is connected to the corresponding node in the frequency selection network, and the two selection terminals are connected to different candidate branch nodes to realize the switching access of different frequency correction branches.

6. The audio adjustment circuit according to claim 5, characterized in that, The analog switching network also includes a second analog switching device, which is used to switch another set of frequency correction branches to cooperate with the first analog switching device to achieve multi-level pre-equalization response.

7. The audio adjustment circuit according to claim 1, characterized in that, The first branch in the frequency correction branch includes: The first resistor has its input terminal connected to the input terminal or an input node connected to the input terminal; A parallel network, the input of which is connected to the output of the first resistor, the parallel network being composed of a second resistor and a first capacitor connected in parallel; The switching connection is connected to the output of the parallel network and controlled by the analog switching network; The switching connection terminal is selectively connected to the summing node under the control of the analog switching network, so that the first capacitor bypasses at least a portion of the impedance of the second resistor at a higher frequency.

8. The audio adjustment circuit according to claim 7, characterized in that, The frequency selection network further includes a second branch containing capacitors, which together with the first branch form multiple frequency inflection points.

9. The audio adjustment circuit according to claim 6, characterized in that, The multi-channel frequency selection control signal includes at least one set of high-frequency control signals, which are used to control the analog switching network to select the access state of different high-frequency correction branches. The control signal also includes at least one set of low-frequency control signals and one high-frequency control signal. The low-frequency control signal is used to control the second analog switching device to switch the connection state of the low-frequency correction branch.

10. An audio adjustment method, applied to the audio adjustment circuit according to any one of claims 1 to 9, characterized in that, The audio adjustment method includes: In response to receiving a serial control signal, the serial control signal is processed to generate a multi-channel frequency selection control signal; In response to the multi-channel frequency selection control signal, the analog switching network is controlled to connect the target node in the frequency selection network to the summing node and / or change the connection relationship between the branches inside the frequency selection network, so that different frequency components are injected into the summing node through branches with different equivalent impedances. The audio input signal is pre-equalized using an operational amplifier.

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