Manufacturing method of fast recovery diode, fast recovery diode and electronic device

Abstract

This application provides a method for fabricating a fast recovery diode, a fast recovery diode, and an electronic device, relating to the field of semiconductor technology. The method for fabricating a fast recovery diode includes: providing a substrate, the substrate including a first surface and a second surface disposed opposite to each other; performing ion doping treatment on the substrate to form ion-doped regions on the first surface and the second surface; etching the first surface based on a predetermined etching region to form a first groove; wherein the depth of the first groove is greater than the thickness of the ion-doped region; the predetermined etching region is located at the center of the first surface; forming a passivation layer in the first groove; and performing metal evaporation on the first surface to form a first metal layer. This method not only reduces the conduction loss of the fast recovery diode, improves energy conversion efficiency, effectively suppresses reverse current, and reduces electromagnetic interference, but also enhances its resistance to avalanche breakdown energy and surge capability.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a method for manufacturing a fast recovery diode, a fast recovery diode, and an electronic device. Background Technology

[0002] A fast recovery diode (FRD) is a special type of diode that can switch from a forward-conducting state to a reverse-blocking state in a relatively short time. Compared to ordinary diodes, fast recovery diodes have a faster recovery speed and a shorter reverse recovery time, making them better suited for operation in environments with high frequency, high voltage, and high temperature.

[0003] Fast recovery diodes are mainly used in high-efficiency, high-precision, and high-reliability electronic circuits such as power switches, inverters, frequency converters, and AC motor drivers. Fast recovery diodes can effectively reduce switching losses and stray noise in circuits, and improve system efficiency and stability.

[0004] Currently, the reliability of fast recovery diodes in existing technologies is insufficient. Summary of the Invention

[0005] In order to at least overcome the above-mentioned deficiencies in the prior art, the purpose of this application is to provide a method for manufacturing a fast recovery diode, a fast recovery diode, and an electronic device.

[0006] In a first aspect, embodiments of this application provide a method for manufacturing a fast recovery diode, the method comprising:

[0007] A substrate is provided, the substrate including a first surface and a second surface disposed opposite to each other; The substrate is subjected to ion doping treatment to form ion-doped regions on the first surface and the second surface; The first surface is etched based on a preset etching region to form a first groove; wherein the depth of the first groove is greater than the thickness of the ion-doped region; the preset etching region is located at the center of the first surface; A passivation layer is formed within the first groove; Metal is vapor-deposited onto the first surface to form a first metal layer.

[0008] In one possible implementation, the step of ion-doping the substrate to form ion-doped regions on the first surface and the second surface includes: By injecting a dose of 1E14 / cm 2 Up to 3E14 / cm 2 The substrate is first implanted with boron ions at an energy of 50 keV to 150 keV. The substrate after the first ion implantation is subjected to a first push-diffusion treatment; By injecting a dose of 1E15 / cm 2 Up to 3E15 / cm 2 A second ion implantation is performed on the substrate using boron ions with an implantation energy of 50 keV to 150 keV. The substrate after the second ion implantation is subjected to a second push-diffusion process to form ion-doped regions on the first surface and the second surface.

[0009] In one possible implementation, the step of performing a first push-diffusion process on the substrate after the first ion implantation includes: The diffusion push-off temperature is set to 1100℃ to 1300℃, and the diffusion push-off time is set to 400min to 560min, and the substrate after the first ion implantation is subjected to the first push-off diffusion treatment.

[0010] In one possible implementation, the step of performing a second push-diffusion process on the substrate after the second ion implantation includes: The diffusion push-bonding temperature is set to 900℃ to 1200℃, and the diffusion push-bonding time is set to 300min to 420min, and the substrate after the second ion implantation is subjected to a second push-bonding diffusion treatment.

[0011] In one possible implementation, prior to the step of ion doping the substrate, the method further includes: An oxide layer is formed on the first surface; After the step of ion doping the substrate, the method further includes: The oxide layer is subjected to photolithography to form a second groove as a preset etching area.

[0012] In one possible implementation, prior to the step of forming a passivation layer within the first groove, the method further includes: A polycrystalline silicon layer is formed on the side of the oxide layer away from the first surface, and the orthogonal projection of the polycrystalline silicon layer on the substrate covers the oxide layer and the first groove.

[0013] In one possible implementation, after the step of depositing a metal vapor layer on the first surface to form a first metal layer, the method includes: The substrate is subjected to electron irradiation treatment and then annealing treatment; The irradiation dose of the electron irradiation treatment ranges from 150 KGy to 250 KGy, and the annealing temperature of the annealing treatment ranges from 250°C to 350°C.

[0014] In one possible implementation, after the step of depositing a metal vapor layer on the first surface to form a first metal layer, the method includes: The second surface is thinned, and then metal is deposited on the thinned second surface to form a second metal layer.

[0015] Secondly, embodiments of this application also provide a fast recovery diode, which is manufactured by the fast recovery diode manufacturing method described in any of the above aspects.

[0016] Thirdly, embodiments of this application also provide an electronic device, which includes the fast recovery diode as described in any of the above aspects.

[0017] Based on any of the above aspects, the fast recovery diode manufacturing method, fast recovery diode, and electronic device provided in this application embodiment, by etching the first surface of the substrate to form a first groove and forming a passivation layer in the first groove, can reduce conduction loss, improve energy conversion efficiency, effectively suppress reverse current, and reduce electromagnetic interference; at the same time, it can also enhance resistance to avalanche breakdown energy and surge capability; in addition, the fast recovery diode manufacturing method provided in this embodiment has a simple process, low manufacturing cost, robust structure, good high-temperature reliability, and uniform current distribution. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a flowchart illustrating the fabrication method of the fast recovery diode provided in this embodiment; Figure 2 This is one of the structural schematic diagrams of the fast recovery diode provided in this embodiment; Figure 3 This is the second schematic diagram of the fast recovery diode provided in this embodiment; Figure 4 This is the third schematic diagram of the fast recovery diode provided in this embodiment; Figure 5 This is one of the schematic diagrams illustrating the fabrication process of the fast recovery diode provided in this embodiment; Figure 6 This is a schematic diagram of the sub-steps of step S120 provided in this embodiment; Figure 7This is the second schematic diagram of the manufacturing process of the fast recovery diode provided in this embodiment; Figure 8 This is the fourth schematic diagram of the fast recovery diode provided in this embodiment; Figure 9 This is the third schematic diagram illustrating the manufacturing process of the fast recovery diode provided in this embodiment; Figure 10 The fourth schematic diagram of the manufacturing process of the fast recovery diode provided in this embodiment; Figure 11 This is the fifth schematic diagram illustrating the manufacturing process of the fast recovery diode provided in this embodiment.

[0020] Icons: 100 - Substrate; 110 - First surface; 120 - Second surface; 101 - First trench; 200 - Ion-doped region; 300 - Passivation layer; 400 - First metal layer; 410 - Lead hole; 500 - Oxide layer; 510 - Second trench; 600 - Photoresist layer; 700 - Polysilicon layer; 800 - Second metal layer. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0022] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0023] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0024] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0025] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0026] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0027] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0028] The inventors discovered that existing fast recovery diodes are typically planar structures and employ a field-ring termination plus polycrystalline field plate process, which has the following main problems: the polycrystalline field plate process adds a layer of polycrystalline lithography, indirectly increasing production costs and production cycle; devices manufactured using the polycrystalline field plate process have unstable reliability under high frequency, high voltage, and high temperature environments; and the devices have weak avalanche breakdown energy and insufficient surge capability, failing to meet the needs of most end applications.

[0029] Furthermore, existing processes use platinum doping to control carrier lifetime, resulting in a negative temperature coefficient for the forward voltage drop. This means that the forward voltage drop decreases as the temperature increases. When multiple fast recovery diode chips are connected in parallel, current will surge to the chip with a higher initial temperature and lower forward voltage drop, causing the chip's temperature to rise further and potentially damaging it. Moreover, the negative temperature coefficient also easily leads to thermal breakdown problems, as the chip cannot limit heat generation under overload conditions and is prone to damage.

[0030] In view of this, this embodiment provides a solution that can reduce the risks of the above-mentioned problems. The solution provided in this embodiment will be described in detail below.

[0031] Please refer to Figure 1 , Figure 1 Example: A flowchart illustrating the manufacturing method of a fast recovery diode provided in this embodiment. The manufacturing method of a fast recovery diode may include the following steps.

[0032] Step S110: A substrate 100 is provided, the substrate 100 including a first surface 110 and a second surface 120 disposed opposite to each other.

[0033] In this embodiment, the substrate 100 can be an N-type substrate, composed of stacked N+ and N-type semiconductor layers. In some examples, the thickness of the N-type substrate can be from 500 micrometers to 540 micrometers, and the resistivity of the N-type substrate can be from 20 Ω·cm to 30 Ω·cm.

[0034] Step S120: The substrate 100 is subjected to ion doping treatment to form ion-doped regions 200 on the first surface 110 and the second surface 120.

[0035] In this embodiment, please refer to Figure 2 P-type impurities can be implanted into the first surface 110 and the second surface 120 of the substrate 100 to form an ion-doped region 200, which can form a PN junction with the N-type semiconductor layer. The thickness of the ion-doped region 200 can range from 8 micrometers to 10 micrometers.

[0036] Step S130: The first surface 110 is etched based on a preset etching region to form a first groove 101; wherein the depth of the first groove 101 is greater than the thickness of the ion-doped region 200; the preset etching region is located at the center of the first surface 110.

[0037] In this embodiment, please refer to Figure 3 The substrate 100 can be placed in a preset etching solution for etching, and a first groove 101 can be formed in the preset etching area. The preset etching area can be located at the geometric center of the first surface 110, and the depth of the first groove 101 can be 45 micrometers to 55 micrometers. The preset etching solution can be composed of nitric acid, hydrofluoric acid and glacial acetic acid, and the etching time can be 10 minutes to 20 minutes.

[0038] In some cases, the substrate 100 can be immersed in a preset etching solution at a temperature of -6°C to -10°C for etching.

[0039] After the first groove 101 is formed, the substrate 100 can be de-etched and rinsed in clean water to remove residual etching solution and impurities.

[0040] Step S140: A passivation layer 300 is formed in the first groove 101.

[0041] In this embodiment, please refer to Figure 4Glass powder can be coated into the first groove 101, and the substrate 100 is placed in the furnace tube for a first firing. Then, the substrate 100 is placed in the furnace tube for a second firing to form a passivation layer 300. Nitrogen and oxygen can be introduced into the furnace tube during both the first and second firings. The furnace tube temperature during the second firing is higher than that during the first firing, and the second firing time is equal to the first firing time. The furnace tube temperature during the first firing can be 500℃ to 640℃, and the furnace tube temperature during the second firing can be 700℃ to 820℃. The time for the second firing is 15 minutes to 25 minutes.

[0042] Step S150: Metal vapor deposition is performed on the first surface 110 to form a first metal layer 400.

[0043] In this embodiment, please refer to Figure 5 First, a lead hole 410 can be formed on the first surface 110. Then, metal evaporation is performed to allow the metal material to enter the lead hole 410 and contact the substrate 100. Next, an alloying process is used to form a first metal layer 400, thereby reducing contact resistance and achieving a stable ohmic contact. The material of the first metal layer 400 can be aluminum. The alloying process temperature can be 400℃ to 500℃, the time can be 20 min to 40 min, and the introduced gas can be nitrogen or hydrogen.

[0044] Based on the above design, in the fast recovery diode fabrication method provided in this embodiment, by etching the first surface 110 of the substrate 100 to form a first groove 101, and forming a passivation layer 300 in the first groove 101, the conduction loss can be reduced, the energy conversion efficiency can be improved, the reverse current can be effectively suppressed, and the electromagnetic interference can be reduced. At the same time, it can also enhance the resistance to avalanche breakdown energy and surge capability. In addition, the fast recovery diode fabrication method provided in this embodiment has a simple process, low manufacturing cost, robust structure, good high-temperature reliability, and uniform current distribution.

[0045] In one possible implementation, please refer to Figure 6 Step S120 may include the following sub-steps.

[0046] Step S121, by injecting a dose of 1E14 / cm 2 Up to 3E14 / cm 2 The substrate 100 is first implanted with boron ions at an energy of 50 keV to 150 keV.

[0047] Step S122: Perform a first push-diffusion treatment on the substrate 100 after the first ion implantation.

[0048] Step S123, by injecting a dose of 1E15 / cm 2 Up to 3E15 / cm 2 The substrate 100 is subjected to a second ion implantation using boron ions with an implantation energy of 50 keV to 150 keV.

[0049] Step S124: Perform a second push-diffusion process on the substrate 100 after the second ion implantation to form ion-doped regions 200 on the first surface 110 and the second surface 120.

[0050] In this embodiment, please refer to Figure 7 First, a low dose of boron ions can be implanted into the first surface 110 and the second surface 120 of the substrate 100, followed by a first push-diffusion treatment to form a PN junction. Then, based on the first ion implantation, a higher dose of boron ions is implanted, followed by a second push-diffusion treatment, thereby forming ion-doped regions 200 on the first surface 110 and the second surface 120, respectively. The implantation dose for the first ion implantation can be 1E14 / cm². 2 Up to 3E14 / cm 2 The implantation energy can range from 50 keV to 150 keV. The implantation dose for the second ion implantation can be 1E15 / cm². 2 Up to 3E15 / cm 2 The injected energy can range from 50 keV to 150 keV.

[0051] In the above design, the second injection of a higher dose of boron ions can achieve impurity compensation, improve the forward surge current of the device, and enhance the surge capability of the device. At the same time, it can also increase the number of charge carriers injected into the N-type semiconductor layer in the active region, thereby significantly reducing the on-state voltage drop and device turn-on loss. In addition, the two junction diffusion processes can increase the radius of curvature at the bottom of the PN junction, prevent electric field concentration, and make the electric field distribution more uniform, thereby improving the avalanche breakdown voltage and avalanche energy (EAS). At the same time, it can also improve the softness of the fast recovery diode, making the reverse recovery current change more gradual during turn-off, and minimizing switching oscillation and electromagnetic interference.

[0052] In one possible implementation, in step S122, when performing the first push-bond diffusion treatment on the substrate 100 after the first ion implantation, the diffusion push-bond temperature can be set to 1100°C to 1300°C, and the diffusion push-bond time can be set to 400 min to 560 min, and the first push-bond diffusion treatment can be performed on the substrate 100 after the first ion implantation.

[0053] In some examples, the substrate 100 can be placed in a diffusion furnace and nitrogen and oxygen can be introduced to perform push-junction diffusion treatment, forming a P-type region on the first surface 110 and the second surface 120 of the substrate 100. The P-type region forms a PN junction with the N-type semiconductor layer.

[0054] In one possible implementation, in step S124, when performing a second push-diffusion process on the substrate 100 after the second ion implantation, the diffusion push-diffusion temperature can be set to 900°C to 1200°C and the diffusion push-diffusion time can be set to 300 min to 420 min, and the substrate 100 after the second ion implantation can be subjected to a second push-diffusion process.

[0055] In some examples, the substrate 100 can be placed in a diffusion furnace and hydrogen and oxygen can be introduced to perform push-diffusion treatment, forming ion-doped regions 200 on the first surface 110 and the second surface 120 of the substrate 100.

[0056] In one possible implementation, an oxide layer 500 may be formed on the first surface 110 before the substrate 100 is subjected to ion doping.

[0057] In this embodiment, please refer to Figure 8 The substrate 100 can be placed in an oxidation furnace for oxidation treatment, and an oxide layer 500 is grown on the first surface 110 and the second surface 120. The thickness of the oxide layer 500 can be from 800 angstroms to 1000 angstroms, and the material of the oxide layer 500 can be silicon dioxide. In some examples, oxygen is introduced into the oxidation furnace during the oxidation treatment, and the oxidation time is from 60 min to 90 min.

[0058] In the above design, by forming an oxide layer 500 before ion doping, the oxide layer 500 can be used as a buffer layer for ion implantation. When boron ions are implanted, the boron ions will first collide with the atoms of the oxide layer 500, reducing their energy and disrupting their directional movement, thereby significantly reducing the channeling effect and improving the doping uniformity.

[0059] After the substrate 100 is subjected to ion doping, the oxide layer 500 can be photolithographically processed to form a second groove 510 as a preset etching area.

[0060] In this embodiment, please refer to Figure 9 A photoresist layer 600 can be formed on the side of the oxide layer 500 away from the first surface 110. The photoresist layer 600 exposes part of the oxide layer 500. Then, the photoresist layer 600 is used as a high-precision mask to etch the exposed oxide layer 500 to form a second groove 510. The second groove 510 can expose the first surface 110 of the substrate 100, which facilitates subsequent etching of the first surface 110.

[0061] In one possible implementation, before the passivation layer 300 is formed in the first groove 101, a polysilicon layer 700 may be formed on the side of the oxide layer 500 away from the first surface 110, and the orthogonal projection of the polysilicon layer 700 on the substrate 100 covers the oxide layer 500 and the first groove 101.

[0062] In this embodiment, please refer to Figure 10 After forming the first groove 101, a semi-insulating polysilicon (SIPOS) material can be deposited on the side of the oxide layer 500 away from the first surface 110 to form a polysilicon layer 700. This polysilicon layer 700 can completely cover the oxide layer 500 and the first groove 101. After forming the polysilicon layer 700, a passivation layer 300 is then formed within the first groove 101. In some examples, the thickness of the polysilicon layer 700 can be from 4000 angstroms to 8000 angstroms. The formation time of the polysilicon layer 700 can be from 120 minutes to 160 minutes.

[0063] When forming the lead hole 410 on the first surface 110, the oxide layer 500 and the polysilicon layer 700 can be etched to form the lead hole 410 that exposes the first surface 110, wherein the orthogonal projection of the lead hole 410 on the substrate 100 does not cover the first groove 101.

[0064] In the above design, by forming a polysilicon layer 700 in the first groove 101, the electric field distribution on the sidewall of the first groove 101 can be effectively balanced, and the electric field can be prevented from being excessively concentrated at the corner of the first groove 101, thereby further improving the breakdown voltage and terminal reliability of the device.

[0065] In one possible implementation, after metal evaporation is performed on the first surface 110 to form a first metal layer 400, the substrate 100 can be subjected to electron irradiation treatment and annealing treatment; wherein the irradiation dose of the electron irradiation treatment is 150KGy to 250KGy, and the annealing temperature of the annealing treatment is 250℃ to 350℃.

[0066] In this embodiment, the substrate 100 can be subjected to electron irradiation treatment to achieve global lifetime control, making the forward voltage drop of the fast recovery diode exhibit a positive temperature coefficient. During electron irradiation treatment, high-energy particles collide with semiconductor lattice atoms, generating point defects such as vacancies and interstitial atoms, and even forming clusters or bands of lattice damage. Therefore, annealing treatment can activate atomic diffusion capabilities, promoting defect recombination or rearrangement, thereby restoring crystal integrity and eliminating lattice damage and defects. The annealing temperature can be from 250°C to 350°C, and the annealing time can be from 460 min to 500 min.

[0067] In the above design, by subjecting the substrate 100 to electron irradiation treatment, the forward voltage drop of the fast recovery diode can be made to exhibit a positive temperature coefficient, thereby improving the thermal stability of the fast recovery diode. When the temperature rises, the increase in forward voltage drop will lead to a decrease in current, which helps to prevent overheating and thermal runaway. It can also achieve uniform current distribution when multiple fast recovery diode chips are connected in parallel, providing protection under overload conditions.

[0068] In one possible implementation, after metal vapor deposition is performed on the first surface 110 to form a first metal layer 400, the second surface 120 can be thinned, and metal vapor deposition is performed on the thinned second surface 120 to form a second metal layer 800.

[0069] In this embodiment, please refer to Figure 11 The second surface 120 of the substrate 100 can be thinned first, and then metal can be deposited on the second surface 120 to form a second metal layer 800 as a contact electrode, which enhances the thermal conductivity path between the chip and the packaging substrate or heat sink, and achieves efficient heat dissipation.

[0070] In some cases, the second metal layer 800 can consist of multiple metal layers, such as titanium-nickel-silver multilayer metals deposited sequentially during metal evaporation. The thickness of the titanium-nickel-silver multilayer metals can vary.

[0071] The thinning thickness can be from 120 micrometers to 160 micrometers. During the thinning process, the ion-doped region 200 located on the second surface 120 can be completely removed.

[0072] This application also provides a fast recovery diode, which can be manufactured using the fast recovery diode manufacturing method provided in this embodiment.

[0073] This application also provides an electronic device, which may include the fast recovery diode provided in this embodiment.

[0074] In summary, this embodiment provides a method for manufacturing a fast recovery diode, a fast recovery diode, and an electronic device. By etching the first surface of the substrate to form a first groove and forming a passivation layer within the first groove, conduction losses can be reduced, energy conversion efficiency can be improved, reverse current can be effectively suppressed, and electromagnetic interference can be reduced. At the same time, it can also enhance resistance to avalanche breakdown energy and surge capability. In addition, the fast recovery diode manufacturing method provided in this embodiment has a simple process, low manufacturing cost, robust structure, good high-temperature reliability, and uniform current distribution.

[0075] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0076] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for manufacturing a fast recovery diode, characterized in that, The method includes: A substrate is provided, the substrate including a first surface and a second surface disposed opposite to each other; The substrate is subjected to ion doping treatment to form ion-doped regions on the first surface and the second surface; The first surface is etched based on a preset etching region to form a first groove; wherein the depth of the first groove is greater than the thickness of the ion-doped region; the preset etching region is located at the center of the first surface; A passivation layer is formed within the first groove; Metal is vapor-deposited onto the first surface to form a first metal layer.

2. The method for manufacturing a fast recovery diode according to claim 1, characterized in that, The step of performing ion doping treatment on the substrate to form ion-doped regions on the first surface and the second surface includes: By injecting a dose of 1E14 / cm 2 Up to 3E14 / cm 2 The substrate is first implanted with boron ions at an energy of 50 keV to 150 keV. The substrate after the first ion implantation is subjected to a first push-diffusion treatment; By injecting a dose of 1E15 / cm 2 Up to 3E15 / cm 2 A second ion implantation is performed on the substrate using boron ions with an implantation energy of 50 keV to 150 keV. The substrate after the second ion implantation is subjected to a second push-diffusion process to form ion-doped regions on the first surface and the second surface.

3. The method for manufacturing a fast recovery diode according to claim 2, characterized in that, The step of performing a first push-diffusion treatment on the substrate after the first ion implantation includes: The diffusion push-off temperature is set to 1100℃ to 1300℃, and the diffusion push-off time is set to 400min to 560min, and the substrate after the first ion implantation is subjected to the first push-off diffusion treatment.

4. The method for manufacturing a fast recovery diode according to claim 2, characterized in that, The step of performing a second push-diffusion process on the substrate after the second ion implantation includes: The diffusion push-bonding temperature is set to 900℃ to 1200℃, and the diffusion push-bonding time is set to 300min to 420min, and the substrate after the second ion implantation is subjected to a second push-bonding diffusion treatment.

5. The method for manufacturing a fast recovery diode according to claim 1, characterized in that, Prior to the step of ion doping the substrate, the method further includes: An oxide layer is formed on the first surface; After the step of ion doping the substrate, the method further includes: The oxide layer is subjected to photolithography to form a second groove as a preset etching area.

6. The method for manufacturing a fast recovery diode according to claim 5, characterized in that, Prior to the step of forming a passivation layer within the first groove, the method further includes: A polycrystalline silicon layer is formed on the side of the oxide layer away from the first surface, and the orthogonal projection of the polycrystalline silicon layer on the substrate covers the oxide layer and the first groove.

7. The method for manufacturing a fast recovery diode according to claim 1, characterized in that, After the step of depositing a metal layer on the first surface by metal vapor deposition, the method includes: The substrate is subjected to electron irradiation treatment and then annealing treatment; The irradiation dose of the electron irradiation treatment ranges from 150 KGy to 250 KGy, and the annealing temperature of the annealing treatment ranges from 250°C to 350°C.

8. The method for manufacturing a fast recovery diode according to claim 1, characterized in that, After the step of depositing a metal layer on the first surface by metal vapor deposition, the method includes: The second surface is thinned, and then metal is deposited on the thinned second surface to form a second metal layer.

9. A fast recovery diode, characterized in that, The fast recovery diode is manufactured using the method for manufacturing a fast recovery diode as described in any one of claims 1-8.

10. An electronic device, characterized in that, Includes the fast recovery diode as described in claim 9.

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