Built-in bypass diode structure and manufacturing method, solar cell module
By designing a built-in bypass diode structure in the solar cell module and utilizing insulation areas and electrode connections of varying widths, the hot spot effect problem was solved, a safe current path was achieved, and the module's output power and safety were improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- DAS SOLAR CO LTD
- Filing Date
- 2024-12-25
- Publication Date
- 2026-06-26
AI Technical Summary
Existing solar cell modules are prone to hot spot effects when partially shaded, leading to local voltage differences and high currents, which may cause fires.
A built-in bypass diode structure is designed, including an N-type substrate silicon, multiple first and second P-type regions, a front electrode, and a back electrode. By setting insulating regions of different widths and electrode connections, a current path is formed to reduce the risk of hot spots.
It effectively reduces the risk of hot spot effect and improves the output power and safety of solar cell modules.
Smart Images
Figure CN122294583A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of solar power generation technology, and in particular to a built-in bypass diode structure and manufacturing method, and a solar cell module. Background Technology
[0002] In recent years, photovoltaic power generation, as a form of clean energy generation, has received widespread attention both domestically and internationally. With the development and breakthroughs in crystalline silicon solar cell and photovoltaic module technology, improving the photoelectric conversion efficiency of these solar cells and photovoltaic modules and reducing their manufacturing costs have become the main goals of the photovoltaic industry.
[0003] When part of a solar panel is shaded, that part of the battery cannot generate current, while the rest continues to work, creating a voltage difference. This results in high current and high voltage in the shaded area, which can cause hot spots. The hot spot effect can potentially cause a fire. Summary of the Invention
[0004] In view of this, this application provides a built-in bypass diode structure and manufacturing method, as well as a solar cell module, with the aim of solving one of the technical problems in the prior art.
[0005] To achieve the above objectives, the technical solution adopted in this application is as follows:
[0006] In a first aspect, embodiments of this application provide a solar cell, comprising:
[0007] N-type substrate silicon, having a front side and a back side arranged opposite to each other;
[0008] Multiple first P-type regions are spaced apart on the front side of the N-type substrate silicon, and a first insulating region is formed between two adjacent first P-type regions. The width of the first insulating region is different from the width of the first P-type region.
[0009] Multiple second P-type regions are spaced apart on the back side of the N-type substrate silicon, and a second insulating region is formed between adjacent second P-type regions. The width of the second insulating region is different from the width of the second P-type region.
[0010] The front electrode connects the first P-type region and the N-type substrate silicon.
[0011] The back electrode connects the second P-type region and the N-type substrate silicon.
[0012] In one embodiment of the first aspect, the width of the first insulating region is smaller than the width of the first P-type region; and the width of the second insulating region is larger than the width of the second P-type region.
[0013] In one embodiment of the first aspect, the width of the first insulating region or the second P-type region is 100–250 μm.
[0014] In one embodiment of the first aspect, the width of the first insulating region is greater than the width of the first P-type region; and the width of the second insulating region is less than the width of the second P-type region.
[0015] In one embodiment of the first aspect, the width of the first P-type region or the second insulating region is 100 to 250 μm.
[0016] In one embodiment of the first aspect, the front electrode includes:
[0017] First confluence section;
[0018] Multiple first branches, each first branch being connected to the first busbar, and one first branch being connected to the N-type substrate silicon at a first P-type region or a first insulating region.
[0019] In one embodiment of the first aspect, the back electrode includes:
[0020] Second confluence section;
[0021] Multiple second branches, each second branch being connected to the second busbar, and one second branch being connected to the N-type substrate silicon at a second P-type region or a second insulating region.
[0022] Secondly, embodiments of this application also provide a method for manufacturing a built-in bypass diode structure, used to manufacture the built-in bypass diode structure in any of the above embodiments, comprising:
[0023] Obtaining N-type substrate silicon;
[0024] Multiple first P-type regions of a predetermined size are generated on the front side of the N-type substrate silicon;
[0025] Multiple second P-type regions of a predetermined size are generated on the back side of an N-type substrate silicon.
[0026] Electrodes are fabricated so that the first P-type region on the front side and the second P-type region on the back side are respectively connected to the N-type substrate silicon.
[0027] In one embodiment of the second aspect, multiple P-type regions of a predetermined size are formed on the front or back side of an N-type substrate silicon by means of a masking method; or, P-type regions are grown on the entire front or back side of an N-type substrate silicon, and a portion of the P-type regions on the front or back side are removed by laser etching to form P-type regions of a predetermined size.
[0028] Thirdly, embodiments of this application also provide a solar cell module, including multiple built-in bypass diode structures and solar cells as described in any of the above embodiments, wherein the multiple built-in bypass diode structures are respectively disposed on the solar cell, and the bypass diodes are electrically connected to each other.
[0029] Compared to existing technologies, the advantages of this application are as follows: This application proposes a built-in bypass diode structure, including an N-type substrate silicon, multiple first P-type regions, multiple second P-type regions, a front electrode, and a back electrode. The N-type substrate silicon has a front and a back side arranged opposite to each other. Multiple first P-type regions are spaced apart on the front side of the N-type substrate silicon, with a first insulating region formed between adjacent first P-type regions. The width of the first insulating region is different from the width of the first P-type region. Multiple second P-type regions are spaced apart on the back side of the N-type substrate silicon, with a second insulating region formed between adjacent second P-type regions. The width of the second insulating region is different from the width of the second P-type region. The front electrode connects the first P-type regions and the N-type substrate silicon. The back electrode connects the second P-type regions and the N-type substrate silicon. When a hot spot effect occurs, current flows through the front electrode and reaches the N-type substrate silicon at the first insulating region on the front side. At this time, the diode formed by the N-type substrate silicon at the first insulating region on the front side and the second P-type region on the back side conducts forward, serving as the current path and reducing the risk of hot spots. Attached Figure Description
[0030] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0031] Figure 1 This paper shows one of the schematic diagrams of the built-in bypass diode structure in some embodiments of this application;
[0032] Figure 2 This is shown as a second schematic diagram of a built-in bypass diode structure in some embodiments of this application;
[0033] Figure 3 A flowchart illustrating the fabrication method of the built-in bypass diode structure in some embodiments of this application is shown.
[0034] Key component symbols: 100 - Built-in bypass diode structure; 110 - N-type substrate silicon; 120 - First P-type region; 130 - First insulating region; 140 - Second P-type region; 150 - Second insulating region; 160 - Front electrode; 161 - First busbar; 162 - First branch; 170 - Back electrode; 171 - Second busbar; 172 - Second branch. Detailed Implementation
[0035] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0036] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0037] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0038] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0039] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0040] Bypass diodes are important components in photovoltaic modules used to prevent hot spot effects and improve system efficiency.
[0041] The bypass diode works as follows: When a solar cell is shaded or malfunctions, it switches from generating to consuming power, causing a drop in local voltage. At this time, the bypass diode connected in parallel with the affected cell is reverse-biased. When the reverse voltage reaches a certain threshold, the diode conducts. Once conducting, current flows through the bypass diode, bypassing the faulty cell string, thus preventing that cell from continuing to consume power, preventing a rapid temperature increase, and reducing hot spot effects.
[0042] like Figure 1 and Figure 2 As shown, an embodiment of this application provides a built-in bypass diode structure 100, mainly used to reduce the hot spot effect of solar cells. The solar cell includes an N-type substrate silicon 110, a plurality of first P-type regions 120, a plurality of second P-type regions 140, a front electrode 160, and a back electrode 170.
[0043] The N-type substrate silicon 110 has a front side and a back side that are arranged opposite to each other. The front side of the N-type substrate silicon 110 is the negative electrode, and the back side is the positive electrode.
[0044] Multiple first P-type regions 120 are spaced apart on the front side of the N-type substrate silicon 110, and a first insulating region 130 is formed between two adjacent first P-type regions 120.
[0045] It should be noted that since solar cells generate electricity under sunlight, if the P-region on the front side is fully connected to the front side of the N-type substrate silicon 110, recombination channels can easily form, reducing the output power of the solar cell. Therefore, insulation treatment is required on the front side of the solar cell.
[0046] Based on this, this application sets up multiple first P-type regions 120 spaced apart, and a first insulating region 130 is formed between two adjacent first P-type regions 120 to improve the output power of the solar cell.
[0047] Similarly, this application provides multiple second P-type regions 140 spaced apart on the back side of the N-type substrate silicon 110, and a second insulating region 150 is formed between adjacent second P-type regions 140 to improve the output power of the solar cell.
[0048] The front electrode 160 connects the first P-type region 120 and the N-type substrate silicon 110; the back electrode 170 connects the second P-type region 140 and the N-type substrate silicon 110. When a hot spot effect occurs, current flows through the front electrode 160 and reaches the N-type substrate silicon 110 at the first insulating region 130 on the front side. At this time, the diode formed by the N-type substrate silicon 110 at the first insulating region 130 on the front side and the second P-type region 140 on the back side is forward-biased, serving as the current path, thereby reducing the risk of hot spots.
[0049] In some embodiments, the width of the first insulating region 130 is different from the width of the first P-type region 120, and the width of the second insulating region 150 is different from the width of the second P-type region 140.
[0050] In one embodiment, the width of the first insulating region 130 is smaller than the width of the first P-type region 120; and the width of the second insulating region 150 is greater than the width of the second P-type region 140.
[0051] The width of the first insulating region 130 or the second P-type region 140 is 100–250 μm. The width of the first insulating region 130 or the second P-type region 140 is 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm, 210 μm, 220 μm, 230 μm, 240 μm, 250 μm, etc., and is not limited to the widths shown in the examples.
[0052] It should be noted that the size of a single first insulating region 130 or a second P-type region 140 depends on the current density of the solar cell. The diode current formed by a single first insulating region 130 or a second P-type region 140 is 0.0026 to 0.055 A, and the area of a single first insulating region 130 or a second P-type region 140 is recommended not to exceed 3000 square micrometers.
[0053] In one embodiment, the width of the first insulating region 130 is greater than the width of the first P-type region 120; and the width of the second insulating region 150 is less than the width of the second P-type region 140.
[0054] In some embodiments, the width of the first P-type region 120 or the second insulating region 150 is 100–250 μm. The width of the first P-type region 120 or the second insulating region 150 is 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm, 210 μm, 220 μm, 230 μm, 240 μm, 250 μm, etc., and is not limited to the widths shown in the examples.
[0055] It should be noted that the size of a single second insulating region 150 or a single first P-type region 120 depends on the current density of the solar cell. The diode current formed by a single second insulating region 150 or a single first P-type region 120 is 0.0026 to 0.055 A, and the area of a single second insulating region 150 or a single first P-type region 120 is recommended not to exceed 3000 square micrometers.
[0056] like Figure 1 As shown, the positions of the first insulating region 130 and the second P-type region 140 correspond, and the positions of the first P-type region 120 and the second insulating region 150 correspond.
[0057] like Figure 1 As shown, in some embodiments, the front electrode 160 includes a first busbar 161 and a plurality of first branches 162. The front electrode 160 is used to collect the current wound onto the solar cell under normal illumination.
[0058] Each first branch 162 is connected to the first busbar 161, and one first branch 162 is connected to the N-type substrate silicon 110 at a first P-type region 120 or a first insulating region 130.
[0059] like Figure 1 As shown, in some embodiments, the back electrode 170 includes a second busbar 171 and a plurality of second branches 172. The back electrode 170 is used to collect the current wound onto the solar cell under normal illumination.
[0060] Each second branch 172 is connected to a second busbar 171, and one second branch 172 is connected to an N-type substrate silicon 110 in a second P-type region 140 or a second insulating region 150. The front electrode 160 needs to connect the first P-type region 120 and the N-type substrate silicon 110 together as a current path for the solar cell when the hot spot is reverse-biased. When reverse-biased, the current flows through the front electrode 160 and reaches the first insulating region 130. At this time, the diode formed by the first insulating region 130 and the second P-type region 140 is forward-biased, serving as a current path to reduce the risk of hot spots.
[0061] like Figure 3 As shown, this application embodiment also provides a method for manufacturing a built-in bypass diode structure 100, used to manufacture the built-in bypass diode structure 100 in any of the above embodiments, including:
[0062] Step S1: Obtain N-type substrate silicon 110.
[0063] Step S2: Generate multiple first P-type regions 120 of preset size on the front side of the N-type substrate silicon 110.
[0064] In some embodiments, multiple P-type regions of a predetermined size are formed on the front side of the N-type substrate silicon 110 by means of a mask method; or, P-type regions are grown on the entire front side of the N-type substrate silicon 110, and a portion of the P-type regions on the front side are removed by laser etching to form P-type regions of a predetermined size.
[0065] Step S3: Generate multiple second P-type regions 140 of a preset size on the back side of the N-type substrate silicon 110.
[0066] In some embodiments, multiple P-type regions of a predetermined size are formed on the back side of the N-type substrate silicon 110 by means of a mask method; or, P-type regions are grown on the entire back side of the N-type substrate silicon 110, and a portion of the P-type regions on the back side are removed by laser etching to form P-type regions of a predetermined size.
[0067] Step S4: Fabricate electrodes to make the first P-type region 120 on the front side and the second P-type region 140 on the back side connected to the N-type substrate silicon 110.
[0068] In some embodiments, a metal conductive paste is applied to the surface of the battery cell using a screen printing method and then dried to obtain a front electrode 160 and a back electrode 170.
[0069] This application also provides a solar cell module, including a built-in bypass diode structure 100 and a solar cell. Multiple built-in bypass diode structures 100 are respectively disposed on the solar cell, and the bypass diodes are electrically connected to each other. The built-in bypass diode structure 100 can provide higher current under reverse bias to reduce power consumption.
[0070] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0071] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.
Claims
1. A structure with a built-in bypass diode, characterized in that, include: N-type substrate silicon, having a front side and a back side arranged opposite to each other; Multiple first P-type regions are spaced apart on the front side of the N-type substrate silicon, and a first insulating region is formed between two adjacent first P-type regions. The width of the first insulating region is different from the width of the first P-type region. Multiple second P-type regions are spaced apart on the back side of the N-type substrate silicon, and a second insulating region is formed between adjacent second P-type regions. The width of the second insulating region is different from the width of the second P-type region. The front electrode connects the first P-type region and the N-type substrate silicon. The back electrode connects the second P-type region and the N-type substrate silicon.
2. The built-in bypass diode structure according to claim 1, characterized in that, The width of the first insulating region is smaller than the width of the first P-type region; and the width of the second insulating region is greater than the width of the second P-type region.
3. The built-in bypass diode structure according to claim 2, characterized in that, The width of the first insulating region or the second P-type region is 100–250 μm.
4. The built-in bypass diode structure according to claim 1, characterized in that, The width of the first insulating region is greater than the width of the first P-type region; and the width of the second insulating region is less than the width of the second P-type region.
5. The built-in bypass diode structure according to claim 4, characterized in that, The width of the first P-type region or the second insulating region is 100–250 μm.
6. The built-in bypass diode structure according to any one of claims 1 to 4, characterized in that, The front electrode includes: First confluence section; Multiple first branches, each first branch being connected to the first busbar, and one first branch being connected to the N-type substrate silicon at a first P-type region or a first insulating region.
7. The built-in bypass diode structure according to claim 2, characterized in that, The back electrode includes: Second confluence section; Multiple second branches, each second branch being connected to the second busbar, and one second branch being connected to the N-type substrate silicon at a second P-type region or a second insulating region.
8. A method for fabricating a built-in bypass diode structure, characterized in that, For fabricating the built-in bypass diode structure according to any one of claims 1 to 7, comprising: Obtaining N-type substrate silicon; Multiple first P-type regions of a predetermined size are generated on the front side of the N-type substrate silicon; Multiple second P-type regions of a predetermined size are generated on the back side of an N-type substrate silicon. Electrodes are fabricated so that the first P-type region on the front side and the second P-type region on the back side are respectively connected to the N-type substrate silicon.
9. The method for manufacturing the built-in bypass diode structure according to claim 8, characterized in that, Multiple P-type regions of a predetermined size can be fabricated on the front or back side of an N-type substrate silicon using a masking method; alternatively, P-type regions can be grown on the entire front or back side of an N-type substrate silicon, and then a portion of the P-type regions on the front or back side can be removed by laser etching to form P-type regions of a predetermined size.
10. A solar cell module, characterized in that, It includes a plurality of built-in bypass diode structures as described in any one of claims 1 to 7 and a solar cell, wherein the plurality of built-in bypass diode structures are respectively disposed on the solar cell and the bypass diodes are electrically connected to each other.