Thermo-optical phase shifter array and its formation method
By designing electrode and isolation trench structures in the thermo-optical phase shifter array, the problem of imbalance between modulation efficiency and modulation rate was solved, and the performance of the thermo-optical phase shifter was improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI INTEGRATED CIRCUIT RESEARCH & DEVELOPMENT CENTER CO LTD
- Filing Date
- 2024-12-31
- Publication Date
- 2026-06-30
AI Technical Summary
In existing technologies, thermo-optical phase shifters improve modulation efficiency but reduce modulation rate, failing to achieve a balance between modulation efficiency and modulation rate.
By designing the structure of electrodes and isolation trenches in the thermo-optical phase shifter array, the electrode area gradually increases along the second direction, and the isolation trench area gradually decreases along the second direction. By utilizing the low thermal conductivity of air, heat is concentrated, heat dissipation is reduced, and modulation efficiency is improved. At the same time, the thermal time constant is reduced to improve the modulation rate.
While maintaining the phase shift, a balance between modulation efficiency and modulation rate is achieved, improving the overall performance of the thermo-optical phase shifter.
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Figure CN122307828A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a thermo-optical phase shifter array and its formation method. Background Technology
[0002] To meet the demands of multi-data transmission in optical communication, multi-channel transmission technology has developed rapidly and been widely applied. For example, multi-channel optical phase modulation is one of the most important characteristics of multi-channel transmission systems. Silicon has a larger thermo-optical coefficient (approximately 1.8 × 10⁻⁶ at room temperature) compared to materials such as SiO₂, Si₃N₄, and LiNbO₃. -4 The high thermal conductivity (approximately 149 W / mK) and K-1 (K-1) properties of silicon-based thermo-optical phase shifters ensure a fast response speed, with switching times typically within tens of microseconds. Furthermore, compared to other modulation methods, thermo-optical phase shifters are widely used in low-loss and high-bandwidth tuning scenarios due to their simple fabrication process and wide modulatory range.
[0003] Modulation efficiency and modulation rate are two important but contradictory indicators of thermo-optical phase shifters. The formula for calculating the phase shift, which represents modulation efficiency, is as follows: in Here, n represents the thermo-optic coefficient, p represents the modulation efficiency, and C represents the input power. Ρ Let ρ be the waveguide heat capacity, ρ be the waveguide density, and S be the waveguide cross-sectional area. Let A be the thermal time constant of the modulation rate, and A be the waveguide thermal convection area. The formula shows that while reducing heat dissipation increases thermal modulation efficiency, it also increases the thermal time constant, thus reducing the modulation rate. In existing technologies, to achieve higher modulation efficiency, it is necessary to address the problem of heat dissipation from the silicon substrate. The most effective method is to etch silicon dioxide and the silicon substrate in the vicinity of the waveguide, utilizing the low thermal conductivity of air to concentrate heat near the waveguide, reducing heat dissipation and improving the modulation efficiency of the phase shifter.
[0004] However, in the existing technology, although strong thermal constraint can improve the modulation efficiency of the phase shifter, poor heat dissipation will reduce the modulation rate, making it impossible to achieve a balance between modulation efficiency and modulation rate. Summary of the Invention
[0005] The purpose of this invention is to provide a thermo-optical phase shifter array and its formation method, which can balance modulation efficiency and modulation rate while ensuring phase shift amount.
[0006] To achieve the above objectives, the present invention provides a method for forming a thermo-optical phase shifter array, comprising:
[0007] An SOI is provided, the SOI comprising a bottom silicon layer, a buried oxide layer, and a top silicon layer stacked sequentially.
[0008] The top silicon layer is etched to form a plurality of waveguides extending along a first direction and arranged along a second direction. The plurality of waveguides have the same length in the first direction and the plurality of waveguides have the same width in the second direction, wherein the first direction and the second direction are perpendicular to each other.
[0009] Electrodes are formed on the surface of each waveguide, and the area of the plurality of electrodes on the plane formed by the first direction and the second direction gradually increases along the second direction;
[0010] A dielectric layer is formed on the surface of each of the electrodes, the dielectric layer filling the gaps between adjacent electrodes and adjacent waveguides;
[0011] Isolation trenches are formed in the dielectric layer and buried oxide layer on both sides of each waveguide along the second direction and in the bottom silicon layer below each waveguide. The isolation trenches expose the bottom surface of the buried oxide layer. The waveguides and the buried oxide layer below the waveguides are suspended on the isolation trenches. The area of the multiple isolation trenches located below the waveguides on the plane formed by the first direction and the second direction gradually decreases along the second direction.
[0012] Optionally, in the method for forming the thermo-optical phase shifter array, the material of the electrode includes indium hydroxide-doped material.
[0013] Optionally, in the method of forming the thermo-optical phase shifter array, the plurality of electrodes have the same length in the first direction, and the width of the plurality of electrodes in the second direction gradually increases along the second direction.
[0014] Optionally, in the method for forming the thermo-optical phase shifter array, the multiple isolation trenches located below the waveguide have the same width in the second direction, and their length in the first direction gradually decreases along the second direction.
[0015] Optionally, in the method for forming the thermo-optical phase shifter array, the method for forming isolation trenches in the dielectric layer and buried oxide layer on both sides of each waveguide along the second direction and in the underlying silicon layer below each waveguide includes:
[0016] Dry etching is used to etch the dielectric layer and buried oxide layer on both sides of the waveguide along the second direction to form isolation trenches located within the dielectric layer and buried oxide layer;
[0017] Starting from the silicon substrate exposed by the isolation trench located within the dielectric layer and buried oxide layer, the underlying silicon is wet-etched to form the isolation trench.
[0018] Optionally, in the method for forming the thermo-optical phase shifter array, the method for forming electrodes on the surface of each waveguide includes:
[0019] A patterned photoresist layer is formed on the surfaces of the waveguide and the buried oxide layer, and the patterned photoresist layer forms a plurality of electrode windows, and at least a part of the surface of the waveguide is exposed by each of the plurality of electrode windows;
[0020] Each of the electrode windows is filled with an electrode material to form a plurality of electrodes. Optionally, in the method for forming the thermo-optic phase shifter array, the width of each of the electrodes in the second direction satisfies: W2 < W1 + d / 2, where W2 is the width of the electrode in the second direction, W1 is the width of the waveguide in the second direction, and d is the distance between adjacent waveguides in the second direction.
[0021] Optionally, in the method for forming the thermo-optic phase shifter array, the dielectric layer includes silicon dioxide.
[0022] The present invention also provides a thermo-optic phase shifter array, including:
[0023] A bottom silicon layer and a buried oxide layer, and the buried oxide layer is located on the surface of the bottom silicon layer;
[0024] A plurality of waveguides located on the surface of the buried oxide layer and extending along a first direction and arranged along a second direction, the lengths of the plurality of waveguides in the first direction are the same, and the widths of the plurality of waveguides in the second direction are the same, wherein the first direction and the second direction are perpendicular to each other;
[0025] Electrodes located on the surfaces of the respective waveguides, and the areas of the plurality of electrodes in the plane formed by the first direction and the second direction gradually increase along the second direction;
[0026] A dielectric layer located on the surfaces of the respective electrodes, and the dielectric layer fills the gaps between adjacent electrodes and adjacent waveguides;
[0027] Isolation trenches located in the dielectric layer and the buried oxide layer on both sides of each of the waveguides along the second direction and in the bottom silicon layer below each of the waveguides, the isolation trenches expose the bottom surface of the buried oxide layer, the waveguides and the buried oxide layer below the waveguides are suspended on the isolation trenches, and the areas of the plurality of isolation trenches in the plane formed by the first direction and the second direction gradually decrease along the second direction.
[0028] In the thermo-optical phase shifter array and its formation method provided by this invention, the area of multiple electrodes on the plane formed by the first and second directions gradually increases along the second direction, while the area of the isolation trench located below the waveguide on the plane formed by the first and second directions gradually decreases along the second direction. A larger area of the isolation trench reduces heat dissipation and improves modulation efficiency. Conversely, a smaller area of the corresponding electrodes effectively reduces the thermal time constant, thus increasing the modulation rate of the phase shifter. Therefore, this invention achieves a balance between modulation rate and modulation efficiency while satisfying the phase shift requirement. Attached Figure Description
[0029] Figure 1 This is a flowchart of a method for forming a thermo-optical phase shifter array according to an embodiment of the present invention;
[0030] Figures 2 to 10 This is a schematic diagram of the structure during the formation of the thermo-optical phase shifter array according to an embodiment of the present invention;
[0031] In the diagram: 101-bottom silicon, 102-buried oxide layer, 103-top silicon, 104-waveguide, 105-patterned photoresist layer, 106-electrode, 107-dielectric layer, 108-isolation trench. Detailed Implementation
[0032] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0033] In the following text, the terms “first,” “second,” etc., are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used herein, may be replaced where appropriate. Similarly, if the methods described herein comprise a series of steps, and the order of these steps presented herein is not necessarily the only possible order in which they can be performed, and some described steps may be omitted and / or other steps not described herein may be added to the method.
[0034] Furthermore, it should be understood that when a layer (or film), region, pattern, or structure is referred to as being "on" a substrate, layer (or film), region, and / or pattern, it can be located directly on another layer or substrate, and / or intercalation layers may also be present. Additionally, it should be understood that when a layer is referred to as being "under" another layer, it can be located directly under that layer, and / or one or more intercalation layers may also be present. Furthermore, references to "on" and "under" the layers may be made based on the accompanying drawings.
[0035] Please refer to Figure 1 The present invention provides a method for forming a thermo-optical phase shifter array, comprising:
[0036] S11: Provides SOI, which includes a bottom silicon layer, a buried oxide layer, and a top silicon layer stacked sequentially.
[0037] S12: Etch the top silicon layer to form multiple waveguides extending along a first direction and arranged along a second direction, exposing a portion of the buried oxide layer surface between adjacent waveguides. The multiple waveguides have the same length in the first direction and the multiple waveguides have the same width in the second direction, wherein the first direction and the second direction are perpendicular to each other.
[0038] S13: Electrodes are formed on the surface of each waveguide, and the area of multiple electrodes on the plane formed by the first direction and the second direction gradually increases along the second direction;
[0039] S14: A dielectric layer is formed on the surface of each electrode, and the dielectric layer fills the gaps between adjacent electrodes and adjacent waveguides.
[0040] S15: Isolation trenches are formed in the dielectric layer and buried oxide layer on both sides of each waveguide along the second direction and in the bottom silicon layer below each waveguide. The isolation trenches expose the bottom surface of the buried oxide layer. The waveguides and the buried oxide layer below the waveguides are suspended on the isolation trenches. The area of the multiple isolation trenches on the plane formed by the first direction and the second direction gradually decreases along the second direction.
[0041] Please refer to Figure 2 First, an SOI (Silicon Insulator) is provided, comprising a bottom silicon layer 101, a buried oxide layer 102, and a top silicon layer 103 stacked sequentially. Both the bottom silicon layer 101 and the top silicon layer 103 are made of silicon, while the buried oxide layer 102 is made of silicon dioxide. Organic contaminants are removed from the SOI using an SC1 solution, followed by metal ion contamination removal using an SC2 solution, and finally the native oxide film on the silicon surface is removed using an HF solution.
[0042] Next, please refer to Figures 2 to 4 , Figure 2 and Figure 3 It is a longitudinal section view along the second direction. Figure 4 This is a top view of the waveguide. The top silicon layer 103 is etched to form multiple waveguides 104 extending along a first direction and arranged along a second direction. The surface of the buried oxide layer 102 is exposed between adjacent waveguides 104. The multiple waveguides 104 have the same length L1 in the first direction and the same width W1 in the second direction. The first direction and the second direction are perpendicular to each other.
[0043] Next, please refer to Figure 5, a photoresist layer is formed on the surface of the waveguide 104 and the exposed buried oxide layer 102 of the waveguide 104, and the photoresist layer is patterned to form a patterned photoresist layer 105. The patterned photoresist layer 105 includes a plurality of electrode windows, and all the electrode windows expose at least a part of the surface of the waveguide 104. Along the second direction, the width of the electrode window in the second direction gradually increases.
[0044] Next, please refer to Figure 6 , electrode material is filled in the electrode windows to form electrodes 106. Preferably, after forming a plurality of electrodes 106 and removing the remaining patterned photoresist layer 105, thermal annealing can also be performed to improve the quality of the electrodes 106. The lengths of the plurality of electrodes 106 in the first direction are the same and less than the length of the waveguide 104 in the first direction. The widths of the plurality of electrodes 106 in the second direction gradually increase along the second direction. In the embodiment of the present invention, the electrode material is preferably indium hydroxide doped (IHO). The IHO material has high mobility and low carrier concentration and can be directly deposited on the waveguide of silicon material, thereby introducing lower loss and improving the thermal utilization rate.
[0045] Please refer to Figure 7 , Figure 7 is a top view between the waveguide and the electrodes. The length L2 of each electrode 106 in the first direction is less than the length of the waveguide 104 in the first direction. The width of each electrode 106 in the second direction satisfies: W2 < W1 + d / 2, where W2 is the width of the electrode 106 in the second direction, W1 is the width of the waveguide 104 in the second direction, and d is the distance between adjacent waveguides 104 in the second direction. Increasing the distance between adjacent electrodes 106 can reduce the thermal crosstalk between adjacent waveguides 104.
[0046] Next, please refer to Figure 8 , a dielectric layer 107 is formed on the surface of each electrode 106. The dielectric layer 107 fills the gaps between adjacent electrodes 106 and adjacent waveguides 104. In order to improve the dielectric filling ability, a method of FCVD can be used to deposit a layer of silicon dioxide as the dielectric layer 107.
[0047] Next, please refer to Figure 9 and Figure 10 , Figure 10This is a top view of the waveguide 104, electrode 106, dielectric layer 107, and isolation trench 108. The dielectric layer 107 and buried oxide layer 102 along both sides of each waveguide 104 in the second direction are etched to expose a portion of the surface of the underlying silicon 101. Dry etching of the dielectric layer 107 and buried oxide layer 102 can be performed using etching gases C4F8 (with a small amount of H) and Cl. The isolation trench 108 formed within the dielectric layer 107 and buried oxide layer 102 enhances the thermal confinement capability of the waveguide 104, thereby reducing thermal crosstalk between adjacent waveguides 104. Next, starting from the surface of the underlying silicon 101 exposed by the dielectric layer 107 and the buried oxide layer 102, the underlying silicon 101 can be etched using SF6 to form an isolation trench 108 within the underlying silicon 101 below the waveguide 104. The isolation trench 108 exposes the bottom surface of the buried oxide layer 102, and the waveguide 104 and the buried oxide layer 102 below the waveguide 104 are suspended on the isolation trench 108. The area of the plurality of isolation trenches 108 on the plane formed by the first direction and the second direction gradually decreases along the second direction. Specifically, the length L3 of the isolation trench 108 below the waveguide in the first direction is less than the length of the waveguide 104 in the first direction, and the width W3 in the second direction gradually decreases along the second direction. This invention utilizes the low thermal conductivity of air (the thermal conductivity of air is almost three orders of magnitude lower than that of Si and SiO2) to concentrate heat near the waveguide 104. If the area of the isolation trench 108 is large, the modulation efficiency is high.
[0048] Please refer to Figure 9 The present invention also provides a thermo-optical phase shifter array, comprising: a bottom silicon layer 101 and a buried oxide layer 102, the buried oxide layer 102 being located on the surface of the bottom silicon layer 101; a plurality of waveguides 104 extending along a first direction and arranged along a second direction on the surface of the buried oxide layer 102, the plurality of waveguides 104 having the same length in the first direction and the same width in the second direction, wherein the first direction and the second direction are perpendicular to each other; electrodes 106 located on the surface of each waveguide 104, the area of the plurality of electrodes 106 on the plane formed by the first direction and the second direction gradually increasing along the second direction; and electrodes 106 located on the surface of each waveguide 104. The dielectric layer 107 on the surface of 06 fills the gap between adjacent electrodes 106 and adjacent waveguides 104; the isolation trenches 108 are located in the dielectric layer 107 and buried oxide layer 102 on both sides of each waveguide 104 along the second direction and in the bottom silicon 101 below each waveguide 104. The isolation trenches 108 expose the bottom surface of the buried oxide layer 102. The waveguide 104 and the buried oxide layer 102 below the waveguide 104 are suspended on the isolation trenches 108. The area of the multiple isolation trenches 108 located below the waveguide 104 on the plane formed by the first direction and the second direction gradually decreases along the second direction.
[0049] In summary, in the thermo-optical phase shifter array and formation method provided in this embodiment of the invention, the area of multiple electrodes on the plane formed by the first and second directions gradually increases along the second direction, while the area of the isolation trench located below the waveguide on the plane formed by the first and second directions gradually decreases along the second direction. A larger area of the isolation trench reduces heat dissipation and improves modulation efficiency. Conversely, a smaller area of the corresponding electrodes effectively reduces the thermal time constant, thus increasing the modulation rate of the phase shifter. Therefore, this invention achieves a balance between modulation rate and modulation efficiency while satisfying the phase shift requirement.
[0050] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.
Claims
1. A method of forming an array of thermo-optic phase shifters, the method comprising: Comprising: Providing a SOI, the SOI including a bottom silicon layer, a buried oxide layer, and a top silicon layer stacked in sequence; Etching the top silicon layer to form a plurality of waveguides extending in a first direction and arranged in a second direction, the lengths of the plurality of waveguides in the first direction being the same, and the widths of the plurality of waveguides in the second direction being the same, wherein the first direction and the second direction are perpendicular to each other; Forming electrodes on the surfaces of the respective waveguides, the areas of the plurality of electrodes in the plane formed by the first direction and the second direction gradually increasing along the second direction; Forming a dielectric layer on the surfaces of the respective electrodes, the dielectric layer filling the gaps between adjacent electrodes and adjacent waveguides; Forming isolation trenches in the dielectric layer and the buried oxide layer on both sides of each waveguide along the second direction and in the bottom silicon layer under each waveguide, the isolation trenches exposing the bottom surface of the buried oxide layer, the waveguide and the buried oxide layer under the waveguide being suspended on the isolation trenches, and the areas of the plurality of isolation trenches in the plane formed by the first direction and the second direction gradually decreasing along the second direction.
2. The method of forming a thermal-optic phase shifter array of claim 1, wherein, The material of the electrode includes indium hydroxide doped.
3. The method for forming a thermo-optical phase shifter array as described in claim 1, characterized in that, The lengths of the plurality of electrodes in the first direction are the same, and the widths of the plurality of electrodes in the second direction gradually increase along the second direction.
4. The method for forming a thermo-optical phase shifter array as described in claim 1, characterized in that, The widths of the plurality of isolation trenches located under the waveguides in the second direction are the same, and the lengths of the plurality of isolation trenches in the first direction gradually decrease along the second direction.
5. The method for forming a thermo-optical phase shifter array as described in claim 1, characterized in that, The method of forming isolation trenches in the dielectric layer and the buried oxide layer on both sides of each waveguide along the second direction and in the bottom silicon layer under each waveguide includes: Dry-etching the dielectric layer and the buried oxide layer on both sides of the waveguide along the second direction to form isolation trenches in the dielectric layer and the buried oxide layer; Starting from the silicon substrate exposed by the isolation trenches in the dielectric layer and the buried oxide layer, wet-etching the bottom silicon layer to form the isolation trenches.
6. The method for forming a thermo-optical phase shifter array as described in claim 1, characterized in that, The method of forming electrodes on the surfaces of the respective waveguides includes: Forming a patterned photoresist layer on the surfaces of the waveguide and the buried oxide layer, the patterned photoresist layer forming a plurality of electrode windows, and each of the plurality of electrode windows at least exposing a part of the surface of the waveguide; Filling each electrode window with an electrode material to form a plurality of electrodes.
7. The method for forming a thermo-optical phase shifter array as described in claim 1, characterized in that, The width of each electrode in the second direction satisfies: W2 < W1 + d / 2, where W2 is the width of the electrode in the second direction, W1 is the width of the waveguide in the second direction, and d is the distance between adjacent waveguides in the second direction.
8. The method for forming a thermo-optical phase shifter array as described in claim 1, characterized in that, The dielectric layer includes silicon dioxide.
9. A thermo-optical phase shifter array, characterized in that, Comprising: A bottom silicon layer and a buried oxide layer, the buried oxide layer being located on the surface of the bottom silicon layer; A plurality of waveguides located on the surface of the buried oxide layer, extending in a first direction and arranged in a second direction, the lengths of the plurality of waveguides in the first direction being the same, and the widths of the plurality of waveguides in the second direction being the same, wherein the first direction and the second direction are perpendicular to each other; Electrodes located on the surfaces of the respective waveguides, the areas of the plurality of electrodes in the plane formed by the first direction and the second direction gradually increasing along the second direction; A dielectric layer is located on the surface of each electrode, the dielectric layer filling the gaps between adjacent electrodes and adjacent waveguides; Isolation trenches are located in the dielectric layer and buried oxide layer on both sides of each waveguide along the second direction and in the bottom silicon layer below each waveguide. The isolation trenches expose the bottom surface of the buried oxide layer. The waveguides and the buried oxide layer below the waveguides are suspended on the isolation trenches, and the area of the plurality of isolation trenches on the plane formed by the first direction and the second direction gradually decreases along the second direction.