Voltage regulator circuits, chips and electronic devices

Abstract

This application relates to the field of circuits, and particularly to a voltage regulator circuit, chip, and electronic device. The voltage regulator circuit includes: an output module, a voltage divider network, a reference voltage module, and an isolation module. The output module includes an input terminal, an output terminal, and a control terminal. The input terminal of the output module is connected to a power supply, the output terminal of the output module is configured as the output terminal of the voltage regulator circuit, and the control terminal of the output module is connected to the output terminal of the reference voltage module. The input terminal of the voltage divider network is connected to the output terminal of the output module, and the output terminal of the voltage divider network is connected to the input terminal of the isolation module. The input terminal of the reference voltage module is connected to the output terminal of the isolation module. The isolation module isolates the current of the voltage divider network and the reference voltage module, thereby preventing the current of the voltage divider network from being affected and ensuring the accuracy of the output voltage of the voltage regulator circuit.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and in particular to a voltage regulator circuit, chip, and electronic device. Background Technology

[0002] A voltage regulator circuit typically includes a reference voltage module, an error amplifier, an adjustment module, and a voltage divider network. Through its internal adjustment module and feedback network, the voltage regulator circuit can maintain a stable output voltage even when the input voltage or load current changes.

[0003] For example, taking a low dropout linear regulator (LDO) circuit as an example, when the input voltage or load current in the LDO circuit changes, the voltage divider network can obtain a feedback voltage associated with the output voltage. Then, the error amplifier amplifies the voltage difference between the reference voltage output by the reference voltage module and the feedback voltage, and adjusts the module according to the voltage difference, thereby adjusting the output voltage to ensure a stable output voltage for the LDO circuit. Therefore, voltage regulator circuits are frequently used in power management units of electronic devices to provide stable voltages to various components.

[0004] However, some current voltage regulator circuits have additional current affecting the voltage divider network during the feedback regulation process, resulting in insufficient accuracy of the voltage output by the voltage regulator circuit. Summary of the Invention

[0005] This application provides a voltage regulator circuit, chip, and electronic device that can ensure the accuracy of the voltage output by the voltage regulator circuit.

[0006] In a first aspect, embodiments of this application provide a voltage regulator circuit, comprising an output module, a voltage divider network, a reference voltage module, and an isolation module. The output module includes an input terminal, an output terminal, and a control terminal. The input terminal of the output module is connected to a power supply, and the output terminal of the output module is configured as the output terminal of the voltage regulator circuit. The control terminal of the output module is connected to the output terminal of the reference voltage module. The input terminal of the voltage divider network is connected to the output terminal of the output module, and the output terminal of the voltage divider network is connected to the input terminal of the isolation module. The input terminal of the reference voltage module is connected to the output terminal of the isolation module. The isolation module is used to transmit the feedback voltage generated by the voltage divider network to the reference voltage module, and the isolation module forms impedance isolation between the voltage divider network and the reference voltage module.

[0007] This design isolates the voltage divider network and the reference voltage module from the gain amplifier, preventing current from flowing from the reference voltage module into the voltage divider network or vice versa. This ensures the current in the voltage divider network is unaffected by the reference voltage module, thereby guaranteeing the accuracy of the output voltage.

[0008] In one possible implementation of the first aspect described above, the isolation module is a buffer.

[0009] In this possible implementation, the buffer has a high input impedance, resulting in a very small current draw from the signal source, which has almost no load effect on the voltage divider network. Furthermore, the buffer has a low output impedance, allowing it to provide sufficient current to drive the reference voltage module without causing a significant drop in the buffer's output voltage. Therefore, the buffer can be used to isolate the voltage divider network and the reference voltage module, reducing mutual interference and ensuring the accuracy of the regulator circuit's output voltage.

[0010] In one possible implementation of the first aspect described above, the buffer is a unity-gain buffer.

[0011] In this possible implementation, the voltage gain of the unity-gain buffer is very close to 1, meaning the output voltage of the unity-gain buffer is almost equal to its input voltage, thus maintaining a constant signal voltage level. Furthermore, the unity-gain buffer can provide feedback voltage to the reference voltage module.

[0012] In one possible implementation of the first aspect described above, the unity-gain buffer includes a first amplifier and a first transistor. A first input terminal of the amplifier is configured as the input terminal of the unity-gain buffer, a second input terminal of the amplifier is connected to the drain of the first transistor, and the second input terminal of the first amplifier is configured as the output terminal of the unity-gain buffer. The output terminal of the first amplifier is connected to the gate of the first transistor. The source of the first transistor is connected to the power supply.

[0013] In this possible implementation, the first amplifier can be an error amplifier, which can isolate the current between the voltage divider network and the reference voltage module through the virtual open characteristic of the error amplifier. Furthermore, based on the virtual short characteristic of the error amplifier, the voltage output from the drain of the first transistor can be made the same as the feedback voltage output from the voltage divider network, thereby transmitting the feedback voltage to the reference voltage module to enable the reference voltage module to adjust the output voltage of the voltage regulator circuit through feedback.

[0014] In one possible implementation of the first aspect described above, the reference voltage module includes a first temperature coefficient submodule, a second temperature coefficient submodule, and a second amplifier. The input terminal of the first temperature coefficient submodule is configured as the input terminal of the reference voltage module, and the input terminal of the first temperature coefficient submodule is connected to the input terminal of the second temperature coefficient submodule. The output terminal of the first temperature coefficient submodule is connected to the first input terminal of the second amplifier. The output terminal of the second temperature coefficient submodule is connected to the second input terminal of the second amplifier, and the output terminal of the second amplifier is configured as the output terminal of the reference voltage module.

[0015] In this possible implementation, the reference voltage module can generate a voltage that varies negatively with temperature using a first temperature coefficient submodule, and a current that varies positively with temperature using a second temperature coefficient submodule. Furthermore, the parameters of the electrical components in the reference voltage module can be configured to keep the voltage at the input of the reference voltage module stable and unaffected by temperature. This ensures that the feedback voltage output by the voltage divider network remains stable. Since the feedback voltage is related to the output voltage of the voltage regulator circuit, the output voltage of the voltage regulator circuit can also remain stable and unaffected by temperature.

[0016] In one possible implementation of the first aspect described above, the first temperature coefficient submodule includes a first resistor and a first bipolar transistor. A first terminal of the first resistor is configured as an input terminal of the first temperature coefficient module, a second terminal of the first resistor is configured as an output terminal of the first temperature coefficient module, the second terminal of the first resistor is connected to the emitter of the first bipolar transistor, and the base of the first bipolar transistor is grounded to the collector of the first bipolar transistor.

[0017] In one possible implementation of the first aspect described above, the second temperature coefficient submodule includes a second resistor, a third resistor, and a second bipolar transistor. A first terminal of the second resistor is configured as an input terminal of the second temperature coefficient submodule, a second terminal of the second resistor is configured as an output terminal of the second temperature coefficient submodule, the second terminal of the second resistor is connected to the first terminal of the third resistor, the second terminal of the third resistor is connected to the emitter of the second bipolar transistor, and the base of the second bipolar transistor is grounded to the collector of the second bipolar transistor.

[0018] In one possible implementation of the first aspect described above, the voltage divider network includes a fourth resistor and a fifth resistor. A first terminal of the fourth resistor is configured as the input terminal of the voltage divider network, and a second terminal of the fourth resistor is configured as the output terminal of the voltage divider network. The second terminal of the fourth resistor is connected to the first terminal of the fifth resistor, and the second terminal of the fifth resistor is grounded.

[0019] Secondly, embodiments of this application provide a chip including the voltage regulator circuit described in the first aspect and any possible implementation thereof. The effects achievable in the second aspect are the same as those in the first aspect and any possible implementation thereof.

[0020] Thirdly, embodiments of this application provide an electronic device including the voltage regulator circuit described in the first aspect and any possible implementation thereof. Alternatively, it may include the chip described in the second aspect. The effects achievable by this third aspect are comparable to those achieved in the first aspect and any possible implementation thereof. Attached Figure Description

[0021] Figure 1A A schematic diagram of an LDO circuit is shown;

[0022] Figure 1B A schematic diagram of another LDO circuit is shown;

[0023] Figure 2 A schematic diagram of a voltage regulator circuit is shown according to some embodiments of this application;

[0024] Figure 3 According to some embodiments of this application, a circuit connection diagram of a voltage regulator circuit is shown. Detailed Implementation

[0025] The illustrative embodiments of this application include, but are not limited to, voltage regulator circuits, chips, and electronic devices.

[0026] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0027] As shown in the background section, some current voltage regulator circuits have additional current affecting the voltage divider network during the feedback regulation process, resulting in insufficient accuracy of the voltage output by the voltage regulator circuit.

[0028] The following describes a voltage regulator circuit.

[0029] For example, Figure 1A A schematic diagram of an LDO circuit is shown.

[0030] Reference Figure 1A The LDO circuit includes a reference voltage module 10, an error amplifier 20, an adjustment module 30, and a voltage divider network 40. The voltage divider network 40 includes a first resistor R1 and a second resistor R2 connected in series.

[0031] The first terminal of the adjustment module 30 is used to receive the input voltage. The second terminal of the adjustment module 30 is connected to the first terminal of the first resistor R1. The control terminal of the adjustment module 30 is connected to the output terminal of the error amplifier 20. The second terminal of the first resistor R1 is connected to the first terminal of the second resistor R2, and the second terminal of the second resistor R2 is grounded. The second terminal of the first resistor R1 is also connected to the first input terminal of the error amplifier 20 (e.g., the inverting input terminal of the error amplifier 20), and the second terminal of the first resistor R1 is used to provide a feedback voltage VFB to the error amplifier 20. The second input terminal of the error amplifier 20 (e.g., the non-inverting input terminal of the error amplifier 20) is connected to the output terminal of the reference voltage module 10, and the second input terminal of the error amplifier 20 is used to receive the reference voltage VREF.

[0032] It can be understood that in the LDO circuit described above, a feedback voltage VFB that is proportional to the output voltage VOUT can be generated through the voltage divider network 40. That is, the change of the feedback voltage VFB generated by the voltage divider network 40 is the same as the change of the output voltage VOUT.

[0033] After receiving the feedback voltage VFB at the first input terminal and the reference voltage VREF at the second terminal, the error amplifier 20 can amplify the difference between the reference voltage VREF and the feedback voltage VFB, thereby outputting an error signal. The error signal is used to drive the adjustment module 30 to adjust the output voltage.

[0034] For example, the adjustment module 30 can be an N-channel metal-oxide-semiconductor field-effect transistor (MOSFET) NM1. The source of the MOSFET NM1 receives the input voltage, its gate is connected to the output terminal of the error amplifier 20, and its drain serves as the output terminal to generate the output voltage VOUT. The error signal output by the error amplifier 20 can adjust the voltage of the gate of the MOSFET NM1, thereby controlling the conduction level of the MOSFET NM1 and thus adjusting the magnitude of the output voltage VOUT.

[0035] It can be understood that the feedback voltage VFB is a signal associated with the output voltage VOUT. Therefore, changes in the output voltage VOUT can be reflected in changes in the feedback voltage VFB. After receiving the feedback voltage VFB, the error amplifier 20 can generate an error signal based on the reference voltage VREF that changes in the opposite direction to the feedback voltage VFB. This signal controls the field-effect transistor NM1 to suppress further changes in the output voltage VOUT, thereby maintaining the stability of the output voltage VOUT.

[0036] However, the LDO circuits described above contain a large number of components, resulting in higher costs. For example, the reference voltage module 10 in an LDO circuit is typically a bandgap voltage reference circuit (BG). The working principle of a bandgap reference circuit generally involves generating a temperature-invariant reference voltage VREF using devices such as bipolar diodes, error amplifiers, and resistor networks. In other words, a bandgap reference circuit also includes devices such as an error amplifier. Therefore, in some embodiments, the LDO circuit can control the adjustment module 30 through the output of the error amplifier in the bandgap reference circuit.

[0037] For example, Figure 1B A schematic diagram of another LDO circuit is shown.

[0038] Reference Figure 1B In some embodiments, the LDO circuit does not require an additional error amplifier 20. Instead, the second terminal of the first resistor R1 in the voltage divider network 40 is connected to one end of the reference voltage module 10 that outputs the reference voltage VREF. Furthermore, the reference voltage module 10 internally includes an error amplifier 11 and a resistor network 12. The input terminal of the resistor network 12 receives the feedback voltage VFB output from the voltage divider network 40 and transmits the feedback voltage VFB to the error amplifier 11. The voltage at the input terminal of the resistor network 12 is the reference voltage VREF output by the reference voltage module 10. The error amplifier 11 inside the reference voltage module 10 can control the adjustment module 30 based on the error signal output by the feedback voltage VFB, thereby adjusting the magnitude of the output voltage VOUT.

[0039] It can be understood that, under the control of the error signal output by the error amplifier 11 based on the feedback voltage VFB, the voltage at one end of the reference voltage module 10 receiving the feedback voltage VFB will eventually stabilize near the reference voltage VREF. In other words, a portion of the LDO circuit's output voltage VOUT stabilizes near the reference voltage VREF, and the output voltage VOUT will also remain stable. Furthermore, ideally, VOUT = VFB × (R1 + R2) / R2.

[0040] However, the end where resistor network 12 connects to voltage divider network 40 is usually not a high-resistance point. This can cause current to flow from reference voltage module 10 into voltage divider network 40, or current to voltage divider network 40 into reference voltage module 10. This can lead to changes in the current in voltage divider network 40, thus affecting the magnitude of the LDO circuit's output voltage VOUT and making the LDO circuit's output voltage less accurate.

[0041] For example, if a current IA flows into the voltage divider network, then VOUT = VFB × (R1 + R2) / R2 - IA × R2. That is, if VFB remains constant, VOUT will be affected by the current IA flowing into the voltage divider network, resulting in a lower VOUT and making VOUT less accurate.

[0042] To address the aforementioned problems, this application provides a voltage regulator circuit comprising an output module, a voltage divider network, a reference voltage module, and an isolation module. The output module includes an input terminal, an output terminal, and a control terminal. The input terminal of the output module is connected to a power supply, and the output terminal is configured as the output terminal of the voltage regulator circuit. The control terminal of the output module is connected to the output terminal of the reference voltage module. The input terminal of the voltage divider network is connected to the output terminal of the output module, and the output terminal of the voltage divider network is connected to the input terminal of the isolation module. The input terminal of the reference voltage module is connected to the output terminal of the isolation module. The isolation module transmits the feedback voltage generated by the voltage divider network to the reference voltage module, and provides impedance isolation between the voltage divider network and the reference voltage module.

[0043] Through the above scheme, the isolation module can isolate the voltage divider network and the reference voltage module, thereby preventing current from flowing from the reference voltage module into the voltage divider network or from flowing out of the voltage divider network into the reference voltage module. This ensures that the current in the voltage divider network is not affected by the reference voltage module, thus guaranteeing the accuracy of the output voltage. Furthermore, the voltage regulator circuit does not require an additional error amplifier to output an error signal to control the output voltage of the output module. Instead, the feedback voltage from the voltage divider network is output to the reference voltage module via the isolation module, and the reference voltage module then generates an error signal based on the feedback voltage to adjust the output voltage. This reduces the number of components required for the voltage regulator circuit, thereby lowering its cost.

[0044] The voltage regulator circuit in the embodiments of this application is described below.

[0045] As an example, Figure 2 According to some embodiments of this application, a schematic diagram of a voltage regulator circuit is shown.

[0046] like Figure 2 As shown, the voltage regulator circuit includes an output module, a voltage divider network, a reference voltage module, and an isolation module.

[0047] The output module includes an input terminal, an output terminal, and a control terminal. The input terminal of the output module is used to connect to the power supply, the output terminal of the output module is configured as the output terminal of the voltage regulator circuit, and the control terminal of the output module is connected to the output terminal of the reference voltage module.

[0048] The input of the voltage divider network is connected to the output of the output module, and the output of the voltage divider network is connected to the input of the isolation module. The input of the reference voltage module is connected to the output of the isolation module. The isolation module is used to transmit the feedback voltage generated by the voltage divider network to the reference voltage module, and the isolation module forms impedance isolation between the voltage divider network and the reference voltage module.

[0049] Exemplarily, in some embodiments of this application, the voltage regulator circuit may be an LDO circuit. The output module MP0 may be a MOSFET, for example, a P-channel MOSFET (PMOS) or an N-channel MOSFET (NMOS). In embodiments of this application, the output module MP0 may be a PMOS. The output module MP0 includes a source, a gate, and a drain. The source of the output module MP0 is configured as the input terminal of the output module to receive the power supply voltage VDD provided by the power supply. The drain of the output module MP0 is configured as the output terminal of the output module to output a stable output voltage VOUT. The gate of the output module MP0 is configured as the control terminal of the output module. It can be understood that after receiving the control signal from the reference voltage module, the gate of the output module MP0 can adjust the voltage (VGS) between the gate and source of the output module based on the magnitude of the control signal, thereby adjusting the conduction level of the output module to adjust the magnitude of the output voltage VOUT.

[0050] The input terminal of the voltage divider network is connected to the output terminal of the output module MP0. It can obtain the output voltage VOUT from the output terminal of the output module MP0 and generate a feedback voltage VFB associated with the output voltage VOUT. Then, it outputs the feedback voltage VFB to the isolation module through the output terminal.

[0051] After receiving the feedback voltage VFB, the isolation module generates a voltage associated with VFB. This VFB is then passed to the input of the reference voltage module. The input of the isolation module is a high-impedance point, preventing current from flowing into or out of the gain amplifier's input. Therefore, the isolation module can be used to isolate the voltage divider network and the reference voltage module, preventing current in the reference voltage module from affecting the voltage divider network and thus ensuring the accuracy of the output voltage.

[0052] After receiving the voltage associated with the feedback voltage VFB, the reference voltage module can generate a control signal based on the voltage, thereby controlling the conduction level of the output module according to the control signal, and adjusting the output voltage VOUT of the output module to complete the closed-loop control.

[0053] The specific components in each of the above modules are described below.

[0054] As an example, Figure 3A circuit connection diagram of a voltage regulator circuit is shown according to some embodiments of this application.

[0055] like Figure 3 As shown, in some embodiments of this application, the isolation module can be a buffer. The buffer has a high input impedance, which results in a very small current drawn from the signal source, hardly causing a load effect on the signal source (corresponding to the voltage divider network). Furthermore, the buffer has a low output impedance, so it can provide sufficient current to drive the load (corresponding to the reference voltage module) without causing a significant drop in the buffer's output voltage. Therefore, the buffer can be used to isolate upstream and downstream circuits (i.e., isolate the voltage divider network and the reference voltage module), reducing mutual interference.

[0056] In embodiments of this application, the buffer can be a unity-gain buffer, where the voltage gain is very close to 1, meaning the output voltage of the unity-gain buffer is almost equal to its input voltage, thus maintaining a constant signal voltage level. Specifically, the unity-gain buffer can generate a unity-gain voltage VFB_BUF identical to the feedback voltage VFB, thereby enabling the transmission of the feedback voltage VFB to the reference voltage module.

[0057] Reference Figure 3 The unity-gain buffer includes a first amplifier EA1 and a first transistor MP1. The first amplifier EA1 can be an error amplifier (EA). The error amplifier can continuously compare the electrical signals input at the first input terminal and the second input terminal, and then generate a voltage or current signal (error signal) representing the difference. The error signal is amplified to a sufficiently high level to drive subsequent control elements. In the embodiments of this application, the first input terminal of the first amplifier EA1 is configured as the input terminal of the unity-gain buffer, the second input terminal of the first amplifier EA1 is connected to the drain of the first transistor MP1, and the second input terminal of the first amplifier EA1 is configured as the output terminal of the unity-gain buffer. The output terminal of the first amplifier EA1 is connected to the gate of the first transistor MP1, and the source of the first transistor MP1 is connected to a power supply.

[0058] It is understandable that, due to the large differential input resistance of the error amplifier (the input resistance of a typical operational amplifier is generally above 1MΩ), the current flowing into the input terminal of the error amplifier is often less than 1uA, far less than the current in the external circuit of the error amplifier's input terminal. Therefore, the two input terminals of the error amplifier can be considered as open circuits. That is, the first and second input terminals of the first amplifier EA1 can be considered as high-resistance points, with no current flowing in or out (the virtual open characteristic of the error amplifier). Therefore, the first input terminal of the first amplifier EA1 can be configured as the input terminal of a unity-gain buffer, thus isolating the voltage divider network and the reference voltage module. Furthermore, in the embodiments of this application, the first transistor MP1 in the unity-gain buffer can also serve as a current source for the reference voltage module, thereby providing current to the reference voltage module. In this way, the devices used to generate mirror current in the reference voltage module can be saved, thereby further reducing the cost of the LDO circuit.

[0059] Continue to refer to Figure 3 The second input terminal of the first amplifier EA1 is connected to the drain of the first transistor MP1, and the output terminal of the first amplifier EA1 is connected to the gate of the first transistor MP1. In this way, the first amplifier EA1 can amplify the voltage difference between the feedback voltage VFB and the drain voltage of the first transistor MP1, thereby adjusting the gate of the first transistor MP1 according to the voltage difference to control the conduction level of the first transistor MP1. This ensures that the drain output of the first transistor MP1 has the same unity-gain voltage VFB_BUF as the feedback voltage VFB. That is, the first amplifier EA1 can adjust the voltages at its two input terminals through the feedback loop to make the voltages at its two input terminals equal (corresponding to the virtual short characteristic of the error amplifier). Furthermore, the unity-gain buffer can isolate the voltage divider network and the reference voltage module, and ensure that the reference voltage module can obtain an accurate feedback voltage VFB.

[0060] In some embodiments of this application, the reference voltage module includes a first temperature coefficient submodule, a second temperature coefficient submodule, and a second amplifier EA2.

[0061] The input terminal of the first temperature coefficient submodule is configured as the input terminal of the reference voltage module, and the input terminal of the first temperature coefficient submodule is connected to the input terminal of the second temperature coefficient submodule. The output terminal of the first temperature coefficient submodule is connected to the first input terminal of the second amplifier, and the output terminal of the second temperature coefficient submodule is connected to the second input terminal of the second amplifier EA2. The output terminal of the second amplifier EA2 is configured as the output terminal of the reference voltage module.

[0062] In some embodiments of this application, the reference voltage module can generate a reference voltage that does not change with temperature through feedback, thereby controlling the output voltage VOUT of the output module to remain stable. For example, the first temperature coefficient submodule of the reference voltage module can generate a negative temperature coefficient voltage at the output terminal, that is, the voltage decreases as the temperature increases. The second temperature coefficient submodule of the reference voltage module can generate a negative temperature coefficient current, that is, the current decreases as the temperature increases. The first and second input terminals of the second amplifier EA2 are respectively connected to the output terminals of the second and first temperature coefficient submodules, and the voltages at the output terminals of the second and first temperature coefficient submodules can be clamped to be equal through negative feedback. Therefore, the voltage at the output terminal of the second temperature coefficient submodule decreases as the temperature increases, and the current at the output terminal of the second temperature coefficient submodule increases as the temperature increases. The corresponding device parameters in the second temperature coefficient submodule can be set so that the voltage at the input terminal of the second temperature coefficient submodule does not change with temperature.

[0063] For example, continue to refer to Figure 3 In some embodiments of this application, the first temperature coefficient submodule includes a first resistor R1 and a first bipolar transistor Q1. The first terminal of the first resistor R1 is configured as the input terminal of the negative temperature coefficient module, and the second terminal of the first resistor R1 is configured as the output terminal of the first temperature coefficient module. The second terminal of the first resistor R1 is connected to the emitter of the first bipolar transistor Q1, and the base and collector of the first bipolar transistor Q1 are grounded.

[0064] It is understandable that, based on the characteristics of bipolar transistors, the voltage between the emitter and base of a bipolar transistor decreases with increasing temperature. Therefore, when the base and collector of the first bipolar transistor Q1 are both grounded, the voltage at the emitter of the first bipolar transistor Q1 can be V. BE1 That is, V BE1 It is a negative temperature coefficient voltage. In some embodiments, V BE1 It can be determined by the following formula (1):

[0065] V BE1 =V t ×ln(I c1 / I s1 (1)

[0066] Among them, V BE1 It is the emitter voltage of the first bipolar transistor Q1, V. t It is the thermal voltage, which is related to the electron charge q, the absolute temperature T, and the Boltzmann constant k, V t = k × T / q. I c1 For the current flowing through the first bipolar transistor Q1, Is1 I is the saturation current of the first bipolar transistor Q1. s1 The area of ​​the emitter junction of the first bipolar transistor Q1 is positively correlated with the temperature and negatively correlated with the temperature. This is understandable, although V... BE1 It is positively correlated with the thermal voltage, but due to the small k / q ratio, the effect of the thermal voltage is limited. In contrast, the saturation current of a bipolar transistor is strongly correlated with temperature, therefore V... BE1 Overall, it is negatively correlated with temperature; that is, as temperature increases, V... BE1 Decrease.

[0067] It can be understood that the output terminal of the first temperature coefficient submodule is the emitter of the first bipolar transistor Q1, therefore the voltage output by the first temperature coefficient submodule is V, which is negatively correlated with temperature. BE1 .

[0068] The second temperature coefficient submodule will be introduced below. (Continue referring to...) Figure 3 In some embodiments of this application, the second temperature coefficient submodule includes a second resistor R2, a third resistor R3, and a second bipolar transistor Q2.

[0069] The first end of the second resistor R2 is configured as the input terminal of the second temperature coefficient submodule, and the second end of the second resistor R2 is configured as the output terminal of the second temperature coefficient submodule.

[0070] The second terminal of the second resistor R2 is connected to the first terminal of the third resistor R3. The second terminal of the third resistor R3 is connected to the emitter of the second bipolar transistor Q2, and the base and collector of the second bipolar transistor Q2 are grounded.

[0071] Similar to the first bipolar transistor Q1, the emitter voltage of the second bipolar transistor Q2 can be determined by the following equation (2):

[0072] V BE2 =V t ×ln(I c2 / I s2 (2)

[0073] Among them, V BE2 It is the emitter voltage of the second bipolar transistor Q2, V. t It is thermal voltage. c2 For the current flowing through the second bipolar transistor Q2, I s2 I is the saturation current of the second bipolar transistor Q2. s2 The area of ​​the emitter junction of the second bipolar transistor Q2 is positively correlated with the temperature and negatively correlated with the area of ​​the emitter junction.

[0074] It can be understood that the output terminal of the second temperature coefficient submodule is the first terminal of the third resistor R3. Since the output terminals of the second and first temperature coefficient submodules are connected to the first and second input terminals of the second amplifier EA2, respectively, the second amplifier EA2 can be an error amplifier. Under the clamping effect of the second amplifier EA2, the voltage VA at the output terminal of the second temperature coefficient submodule is approximately equal to the voltage VB at the output terminal of the first temperature coefficient submodule (corresponding to the virtual short characteristic of the error amplifier). The voltage VB at the output terminal of the first temperature coefficient submodule is the emitter voltage V of the first bipolar transistor Q1. BE1 Therefore, the voltage VA at the output of the second temperature coefficient submodule is also clamped to V. BE1 In other words, the voltage at the first terminal of the third resistor R3 (the output terminal of the second temperature coefficient submodule) is V. BE1 The voltage across the second terminal of the third resistor R3 is the emitter voltage V of the second bipolar transistor Q2. BE2 Then the voltage ΔV across the third resistor R3 BE =V BE1 -V BE2 The current I of the second temperature coefficient submodule C2 =ΔV BE / R3.

[0075] It is understandable that, based on equations (1) and (2), ΔV can be obtained. BE =V t ×ln(I c1 / I s1 ) - V t ×ln(I c2 / I s2 ) = V t ×ln((I c1 ×I s2 ) / (I c2 ×I s1 In some embodiments of this application, the resistance values ​​of the first resistor R1 and the second resistor R2 can be configured to be the same. Since the first terminals of both the first resistor R1 and the second resistor R2 are input terminals of the reference voltage module, the voltages at the first terminals of the first resistor R1 and the second resistor R2 are the same. Furthermore, under the action of the second amplifier, the voltages at the second terminals of the first resistor R1 and the second resistor R2 are also the same, thereby determining that the current flowing through the first resistor R1 and the second resistor R2 is the same. That is, the current I of the first temperature coefficient submodule is... c1 The current I of the second temperature coefficient submodule c2 Same, i.e., I c1 =I c2 .

[0076] In embodiments of this application, the ratio of the emitter junction area of ​​the first bipolar transistor Q1 and the second bipolar transistor Q2 can be configured as 1:n, where n can be any value greater than 0, and in some embodiments, n is preferably 8. That is, in embodiments of this application, I s1 :I s2 =1:n,I s2 =n×I s1 .

[0077] Then, ΔV BE =V t ×ln(n), i.e., ΔV BE Only with positive temperature change, therefore I C2 =ΔV BE / R3 is also a current that changes only positively with temperature. Therefore, the voltage received by the reference voltage module at this time is V. BE1 +R2×ΔV BE / R3, meaning the voltage at the second terminal of the second resistor R2 plus the voltage across the second resistor R2, equals the voltage at the first terminal of the second resistor R2. The first terminal of the second resistor R2 is the input terminal of the reference voltage module; therefore, the voltage received at the input terminal of the reference voltage module is V. BE1 +R2×ΔV BE With R3, the reference voltage module can maintain a steady state. That is, under the control of the second amplifier, the voltage at the input of the reference voltage module needs to be maintained at V. BE1 +R2×ΔV BE / R3.

[0078] It's understandable, V BE1 The voltage ΔV is negatively correlated with temperature. BE =V t ×ln(n) is a voltage that is positively correlated with temperature. Therefore, by configuring the resistance values ​​of R2 and R3, and the value of n, V can be made... BE1 The change in temperature with negative variation and R2×ΔV BE / R3 changes by the same amount as the positive change in temperature, thus making V BE1 +R2×ΔV BE / R3 as a whole does not change with temperature.

[0079] For example, in some embodiments, R2 / R3 can be configured as (- V BE2 / T) / (2×ln(n)×(k / q)), where, V BE2 / T is the partial derivative of the emitter voltage of the second bipolar transistor Q2 with respect to absolute temperature T. It can be understood that, based on equation (2), we can obtain... V BE2 / T is a constant related to the parameters of the second bipolar transistor Q2. Therefore, after determining the parameters of the second bipolar transistor Q2, R2 / R3 is also a constant. Furthermore, by configuring the values ​​of R2 / R3, V can be adjusted... BE1 +R2×ΔV BE / R3 does not change with temperature.

[0080] The voltage divider network of the voltage regulator circuit is described below. (Refer to...) Figure 3 In some embodiments of this application, the voltage divider network includes a fourth resistor R4 and a fifth resistor R5. The first terminal of the fourth resistor R4 is configured as the input terminal of the voltage divider network, the second terminal of the fourth resistor R4 is connected to the first terminal of the fifth resistor R5, and the second terminal of the fourth resistor R4 is configured as the output terminal of the voltage divider network, while the second terminal of the fifth resistor R5 is grounded.

[0081] It can be understood that the voltage divider network consists of a fourth resistor R4 and a fifth resistor R5 connected in series. The voltage across the first terminal of the fourth resistor R4 is the output voltage VOUT, and the second terminal of the fourth resistor R4 is the output terminal of the voltage divider network, used to output the feedback voltage VFB. Based on the voltage divider capability of the series resistors, VOUT = VFB × (R4 + R5) / R5.

[0082] The isolation module isolates the current between the voltage divider network and the reference voltage module via a first operational amplifier. For example, without an isolation module, if a current IA flows into the voltage divider network, then VOUT = VFB × (R4 + R5) / R5 - IA × R4. That is, with VFB remaining constant, VOUT will be too low, resulting in inaccurate VOUT. Therefore, in the embodiments of this application, the current between the base voltage module and the voltage divider network can be isolated by configuring an isolation module, thereby ensuring the stability of the output voltage VOUT.

[0083] The feedback regulation process of the voltage regulator circuit in the embodiments of this application is described below.

[0084] refer to Figure 3When the power supply voltage VDD received at the source of output module MP0 increases, the output voltage VOUT also increases, and consequently, the feedback voltage VFB output by the voltage divider network also increases. At this time, the voltages received at the first and second input terminals of the first amplifier EA1 are different. The first amplifier EA1 can adjust the gate of the first transistor MP1 according to the voltage difference between the first and second input terminals, thereby adjusting the conduction level of the gate of the first transistor MP1 and increasing the drain voltage of the first transistor MP1 so that the drain voltage of the first transistor MP1 is the same as the increased VFB. That is, at this time, the unity-gain voltage VFB_BUF output by the isolation module will also increase.

[0085] When the unity-gain voltage VFB_BUF received by the reference voltage module increases, the currents of the second and first temperature coefficient submodules deviate from their equilibrium points, meaning the currents of the second and negative temperature coefficient submodules are different. At this time, the voltages VB and VA at the first and second input terminals of the second amplifier EA2 are different. The second amplifier EA2 outputs an error signal to adjust the gate of the output module MP0, reducing the conduction level of MP0 and thus lowering the source output voltage VOUT, thereby ensuring the stability of the output voltage VOUT. In other words, the magnitude of the feedback voltage VFB associated with the output voltage VOUT is always kept constant at the level limited by the input terminal of the reference voltage module. BE1 +R2×ΔV BE / R3, thereby ensuring the stability of the output voltage VOUT.

[0086] This application also provides a chip. The chip includes the voltage regulator circuit and other functional circuits provided in the foregoing embodiments of this application.

[0087] This application also provides an electronic device, including the voltage regulator circuit provided in any of the above embodiments, or the chip provided in the above embodiments.

[0088] In the accompanying drawings, some structural or methodological features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be necessary. Rather, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. Furthermore, the inclusion of structural or methodological features in a particular figure does not imply that such features are required in all embodiments, and in some embodiments, these features may be omitted or may be combined with other features.

[0089] It should be noted that all units / modules mentioned in the device embodiments of this application are logical units / modules. Physically, a logical unit / module can be a physical unit / module, a part of a physical unit / module, or a combination of multiple physical units / modules. The physical implementation of these logical units / modules themselves is not the most important factor; the combination of functions implemented by these logical units / modules is the key to solving the technical problems proposed in this application. Furthermore, to highlight the innovative aspects of this application, the above-described device embodiments of this application have not introduced units / modules that are not closely related to solving the technical problems proposed in this application. This does not mean that the above-described device embodiments do not contain other units / modules.

[0090] It should be noted that in the examples and description of this patent, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0091] Although this application has been illustrated and described with reference to certain preferred embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made thereto without departing from the scope of this application.

Claims

1. A voltage stabilizing circuit, characterized by comprising: The voltage regulator circuit includes an output module, a voltage divider network, a reference voltage module, and an isolation module; The output module includes an input terminal, an output terminal, and a control terminal. The input terminal of the output module is used to connect to a power supply, the output terminal of the output module is configured as the output terminal of the voltage regulator circuit, and the control terminal of the output module is connected to the output terminal of the reference voltage module. The input terminal of the voltage divider network is connected to the output terminal of the output module, and the output terminal of the voltage divider network is connected to the input terminal of the isolation module. The input terminal of the reference voltage module is connected to the output terminal of the isolation module; The isolation module is used to transmit the feedback voltage generated by the voltage divider network to the reference voltage module, and the isolation module forms impedance isolation between the voltage divider network and the reference voltage module.

2. The voltage regulator circuit according to claim 1, characterized in that The isolation module is a buffer.

3. The voltage regulator circuit of claim 2, wherein The buffer is a unity-gain buffer.

4. The voltage regulator circuit according to claim 3, characterized in that, The unity-gain buffer includes a first amplifier and a first transistor; The first input terminal of the amplifier is configured as the input terminal of the unity-gain buffer, the second input terminal of the amplifier is connected to the drain of the first transistor, and the second input terminal of the first amplifier is configured as the output terminal of the unity-gain buffer, and the output terminal of the first amplifier is connected to the gate of the first transistor. The source of the first transistor is connected to the power supply.

5. The voltage regulator circuit according to claim 1, characterized in that, The reference voltage module includes a first temperature coefficient submodule, a second temperature coefficient submodule, and a second amplifier; The input terminal of the first temperature coefficient submodule is configured as the input terminal of the reference voltage module, and the input terminal of the first temperature coefficient submodule is connected to the input terminal of the second temperature coefficient submodule. The output terminal of the first temperature coefficient submodule is connected to the first input terminal of the second amplifier; The output of the second temperature coefficient submodule is connected to the second input of the second amplifier; The output of the second amplifier is configured as the output of the reference voltage module.

6. The voltage regulator circuit according to claim 5, characterized in that, The first temperature coefficient submodule includes a first resistor and a first bipolar transistor; The first end of the first resistor is configured as the input end of the first temperature coefficient module, and the second end of the first resistor is configured as the output end of the first temperature coefficient module. The second end of the first resistor is connected to the emitter of the first bipolar transistor, and the base of the first bipolar transistor is grounded to the collector of the first bipolar transistor.

7. The voltage regulator circuit according to claim 5, characterized in that, The second temperature coefficient submodule includes a second resistor, a third resistor, and a second bipolar transistor; The first end of the second resistor is configured as the input terminal of the second temperature coefficient submodule, and the second end of the second resistor is configured as the output terminal of the second temperature coefficient submodule. The second end of the second resistor is connected to the first end of the third resistor, the second end of the third resistor is connected to the emitter of the second bipolar transistor, and the base of the second bipolar transistor is grounded to the collector of the second bipolar transistor.

8. The voltage regulator circuit according to claim 1, characterized in that, The voltage divider network includes a fourth resistor and a fifth resistor; The first terminal of the fourth resistor is configured as the input terminal of the voltage divider network, and the second terminal of the fourth resistor is configured as the output terminal of the voltage divider network. The second end of the fourth resistor is connected to the first end of the fifth resistor, and the second end of the fifth resistor is grounded.

9. A chip, characterized in that, The voltage regulator circuit includes any one of claims 1 to 8.

10. An electronic device, characterized in that, The voltage regulator circuit includes any one of claims 1 to 8.

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