Interrupt verification method, device, system, apparatus, storage medium and program product

Abstract

This application relates to an interrupt verification method, apparatus, system, device, storage medium, and program product, applied to an interrupt verification device. The method includes: first, injecting an interrupt verification program into a microcontroller under test (MCU), wherein the MCU is communicatively connected to the interrupt verification device; then, receiving interrupt information sent by the MCU according to the interrupt verification program, and sending an interrupt signal to the MCU according to the interrupt information to instruct the MCU to execute the interrupt service routine corresponding to the interrupt signal; finally, outputting the interrupt verification result of the MCU based on the result of the MCU executing the interrupt service routine. This method enables interrupt verification through simultaneous hardware and software verification, rather than simply simulating interrupts in software, thus achieving higher accuracy in interrupt verification.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to an interrupt verification method, apparatus, system, device, storage medium, and program product. Background Technology

[0002] With the rapid development of big data and artificial intelligence technologies, integrated circuits are moving towards large-scale and ultra-large-scale applications, and the complexity and performance requirements of integrated circuits are increasing day by day.

[0003] To ensure the normal operation of large-scale integrated circuit chips, a Microcontroller Unit (MCU) is typically integrated inside the chip for configuration and management, ensuring efficient and reliable execution of system-issued tasks. In related technologies, the MCU usually controls and manages multiple internal modules through a CPU (Central Processing Unit). During CPU program execution, when an exception occurs requiring CPU handling, an interrupt mechanism can be used to notify the CPU to temporarily suspend the currently running program and execute the corresponding interrupt service routine, thus achieving multitasking and real-time response.

[0004] Therefore, how to accurately verify the interrupt mechanism of the MCU has become an urgent technical problem to be solved. Summary of the Invention

[0005] Therefore, it is necessary to provide an interrupt verification method, apparatus, system, device, storage medium, and program product that can accurately verify the interrupt mechanism of an MCU in response to the above-mentioned technical problems.

[0006] In a first aspect, this application provides an interruption verification method applied to an interruption verification device, the method comprising:

[0007] Inject an interrupt verification program into the microcontroller under test; the microcontroller establishes a communication connection with the interrupt verification device;

[0008] Receive interrupt information sent by the microcontroller according to the interrupt verification program;

[0009] An interrupt signal is sent to the microcontroller based on the interrupt information; the interrupt signal is used to instruct the microcontroller to execute the interrupt service routine corresponding to the interrupt signal.

[0010] Based on the result of the microcontroller executing the interrupt service routine, output the interrupt verification result of the microcontroller.

[0011] In one embodiment, the microcontroller includes an interrupt controller, and the interrupt information includes an interrupt pattern and an interrupt type. Sending an interrupt signal to the microcontroller based on the interrupt information includes:

[0012] Generate an interrupt signal based on the interrupt pattern;

[0013] Based on the interrupt type, determine the pin corresponding to the interrupt type from multiple pins of the interrupt verification device;

[0014] An interrupt signal is sent to the interrupt controller via the pin corresponding to the interrupt type.

[0015] In one embodiment, the interrupt information includes interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities. An interrupt signal is sent to the microcontroller based on the interrupt information, including:

[0016] Based on the interrupt pattern of each interrupt task, generate the interrupt signal corresponding to each interrupt task;

[0017] Based on the interrupt type of each interrupt task, determine the pin corresponding to the interrupt type of each interrupt task from multiple pins of the interrupt verification device;

[0018] The interrupt signals corresponding to each interrupt task are simultaneously sent to the interrupt controller via the pins corresponding to the interrupt types of each interrupt task.

[0019] In one embodiment, the interrupt pattern includes at least one level information, position information corresponding to each level information, and duration corresponding to each level information; generating an interrupt signal based on the interrupt pattern includes:

[0020] The level width corresponding to each level information is determined based on the position information and duration corresponding to each level information.

[0021] An interrupt signal is generated based on each level information and the corresponding level width.

[0022] In one embodiment, the microcontroller includes an instruction memory, and an interrupt verification program is injected into the microcontroller under test, including:

[0023] The interrupt verification program is injected into the instruction memory via the port of the instruction memory.

[0024] The microcontroller also includes a central processing unit and a clock reset unit. Accordingly, before receiving interrupt information sent by the microcontroller according to the interrupt verification procedure, the method further includes:

[0025] A reset instruction is sent to the clock reset unit. The reset instruction is used to instruct the central processing unit to perform a reset operation on the microcontroller. After the reset operation is completed, the interrupt verification program is read from the instruction memory and executed.

[0026] In one embodiment, based on the result of the microcontroller executing the interrupt service routine, the interrupt verification result of the microcontroller is output, including:

[0027] Receive the result of the microcontroller executing the interrupt service routine;

[0028] If the result indicates that the interrupt service routine check passed, the interrupt verification result will be output as "verification successful".

[0029] If the result indicates that the interrupt service routine check failed, the interrupt verification result will be output as "verification failed".

[0030] Secondly, this application provides an interrupt verification method applied to a microcontroller, the method comprising:

[0031] Receives interrupt verification program injected by interrupt verification device; microcontroller communicates with interrupt verification device;

[0032] The interrupt verification procedure generates interrupt information and sends it to the interrupt verification device; the interrupt information is used to instruct the interrupt verification device to send an interrupt signal.

[0033] Receive interrupt signals and execute the interrupt service routine corresponding to the interrupt signal;

[0034] Send the result of executing the interrupt service routine to the interrupt verification device to instruct the interrupt verification device to output the interrupt verification result.

[0035] In one embodiment, interrupt information is generated according to the interrupt verification procedure, including:

[0036] The interrupt pattern and interrupt type are generated according to the interrupt verification procedure. The interrupt pattern is used to instruct the interrupt verification device to generate an interrupt signal according to the interrupt pattern. The interrupt type is used to instruct the interrupt verification device to send an interrupt signal through the pin corresponding to the interrupt type among the multiple pins of the interrupt verification device.

[0037] In one embodiment, the microcontroller includes an instruction memory that receives an interrupt verification program injected by an interrupt verification device, including:

[0038] The interrupt verification program is injected into the device by receiving interrupts through the port of the instruction memory.

[0039] The microcontroller also includes a central processing unit and a clock reset unit; correspondingly, the method also includes:

[0040] The clock reset unit receives the reset command sent by the interrupt verification device and sends it to the central processing unit;

[0041] The central processing unit executes the microcontroller's reset operation based on the reset instruction;

[0042] Once the reset operation is complete, the central processing unit reads from the instruction memory and executes the interrupt verification program.

[0043] In one embodiment, the microcontroller includes an interrupt controller and a central processing unit, receives an interrupt signal, and executes the interrupt service routine corresponding to the interrupt signal, including:

[0044] The interrupt controller receives the interrupt signal and sends it to the central processing unit.

[0045] The central processing unit determines the interrupt service routine corresponding to the interrupt signal and executes the interrupt service routine. If the interrupt service routine check result is abnormal, it determines that the result of executing the interrupt service routine is that the check failed. If the interrupt service routine check result is normal, it performs an interrupt flag variable check.

[0046] If the interrupt flag variable check result is normal, the CPU determines that the interrupt service routine execution result is a pass; if the interrupt flag variable check result is abnormal, the CPU determines that the interrupt service routine execution result is a fail.

[0047] In one embodiment, the interrupt information includes interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities. The interrupt controller receives the interrupt signal and sends the interrupt signal to the central processing unit, including:

[0048] The interrupt controller receives the interrupt signals corresponding to each interrupt task;

[0049] The interrupt controller sorts the interrupt tasks according to their respective interrupt priorities;

[0050] The interrupt controller sends the interrupt signals corresponding to each interrupt task to the central processing unit according to the sorting results.

[0051] In one embodiment, the microcontroller includes an I / O unit, and the method further includes:

[0052] The interrupt information is sent to the interrupt verification device via the I / O unit;

[0053] Alternatively, the result of executing the interrupt service routine can be sent to the interrupt verification device via the I / O unit.

[0054] Thirdly, this application provides an interrupt verification system, which includes an interrupt verification device and a microcontroller under test; the microcontroller is communicatively connected to the interrupt verification device.

[0055] An interrupt verification device for performing the steps of the method as described in any of the first aspects above;

[0056] A microcontroller for performing the steps of the method as described in any of the second aspects above.

[0057] Fourthly, this application provides an interruption verification apparatus for use in interruption verification equipment, the apparatus comprising:

[0058] The injection module is used to inject the interrupt verification program into the microcontroller under test; the microcontroller communicates with the interrupt verification device.

[0059] The interrupt information receiving module is used to receive interrupt information sent by the microcontroller according to the interrupt verification program;

[0060] The interrupt signal sending module is used to send an interrupt signal to the microcontroller based on the interrupt information; the interrupt signal is used to instruct the microcontroller to execute the interrupt service routine corresponding to the interrupt signal.

[0061] The verification result output module is used to output the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine.

[0062] Fifthly, this application provides an interrupt verification device applied to a microcontroller, the device comprising:

[0063] The program receiving module is used to receive the interrupt verification program injected by the interrupt verification device; the microcontroller is communicatively connected to the interrupt verification device.

[0064] The generation module is used to generate interrupt information according to the interrupt verification program and send the interrupt information to the interrupt verification device; the interrupt information is used to instruct the interrupt verification device to send an interrupt signal.

[0065] The interrupt signal receiving module is used to receive interrupt signals and execute the interrupt service routine corresponding to the interrupt signal.

[0066] The sending module is used to send the result of executing the interrupt service routine to the interrupt verification device, so as to instruct the interrupt verification device to output the interrupt verification result.

[0067] Sixthly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the method described in any one of the first or second aspects above.

[0068] In a seventh aspect, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method described in any one of the first or second aspects above.

[0069] Eighthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the method described in any one of the first or second aspects above.

[0070] The aforementioned interrupt verification method, apparatus, system, device, storage medium, and program product, applied to an interrupt verification device, firstly, injects an interrupt verification program into the microcontroller under test (MCU). The MCU is communicatively connected to the interrupt verification device. Then, the device receives interrupt information sent by the MCU according to the interrupt verification program and sends an interrupt signal to the MCU, instructing it to execute the interrupt service routine corresponding to the interrupt signal. Finally, based on the result of the MCU executing the interrupt service routine, the device outputs the interrupt verification result of the MCU. In this way, when performing interrupt verification on the MCU, the interrupt verification device receives interrupt information sent by the MCU according to the injected interrupt verification program, then sends an interrupt signal based on the interrupt information. Upon detecting the interrupt signal, the MCU executes the corresponding interrupt service routine to determine the interrupt verification result. This interrupt verification is performed synchronously through hardware and software, rather than simply simulating interrupts in software; therefore, the accuracy of interrupt verification is higher. Attached Figure Description

[0071] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0072] Figure 1 This is a diagram illustrating the application environment of the interrupt verification method in one embodiment;

[0073] Figure 2 This is a flowchart illustrating the interrupt verification method in one embodiment;

[0074] Figure 3 This is a flowchart illustrating the interrupt signal transmission step in one embodiment;

[0075] Figure 4 This is a flowchart illustrating the interrupt signal generation step in one embodiment;

[0076] Figure 5 This is a flowchart illustrating the interrupt signal transmission step in another embodiment;

[0077] Figure 6 This is a flowchart illustrating the steps for outputting the interruption verification result in one embodiment;

[0078] Figure 7This is a flowchart illustrating the interrupt verification method in another embodiment;

[0079] Figure 8 This is a flowchart illustrating the steps for determining the result of executing an interrupt service routine in one embodiment;

[0080] Figure 9 This is a flowchart illustrating the interrupt signal transmission step in another embodiment;

[0081] Figure 10 This is a flowchart illustrating the interrupt verification method in another embodiment;

[0082] Figure 11 A flowchart of the interrupt verification procedure in another embodiment;

[0083] Figure 12 This is one of the structural block diagrams of the interrupt verification device in one embodiment;

[0084] Figure 13 This is a second structural block diagram of the interrupt verification device in one embodiment;

[0085] Figure 14 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0086] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0087] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0088] In existing technologies, interrupt service routines corresponding to different interrupt tasks are usually entered through software simulation to verify the interrupt mechanism. However, this method lacks simultaneous software and hardware verification, resulting in low flexibility and accuracy.

[0089] In view of this, this application provides an interrupt verification method applied to an interrupt verification device. First, an interrupt verification program is injected into the microcontroller under test (MCU), wherein the MCU is communicatively connected to the interrupt verification device. Then, the device receives interrupt information sent by the MCU according to the interrupt verification program and sends an interrupt signal to the MCU based on the interrupt information, instructing the MCU to execute the interrupt service routine corresponding to the interrupt signal. Finally, based on the result of the MCU executing the interrupt service routine, the interrupt verification result of the MCU is output. Thus, when performing interrupt verification on the MCU, the interrupt verification device receives interrupt information sent by the MCU according to the injected interrupt verification program, then sends an interrupt signal based on the interrupt information. Upon detecting the interrupt signal, the MCU executes the corresponding interrupt service routine and determines the interrupt verification result. Interrupt verification is performed synchronously through hardware and software, rather than simply simulating interrupts in software; therefore, the accuracy of interrupt verification is higher.

[0090] The interruption verification method provided in this application embodiment can be applied to Figure 1 The interrupt verification system shown includes an interrupt verification device 10 and a microcontroller under test (MCU) 20; the MCU 20 is communicatively connected to the interrupt verification device 10. The MCU 20 includes a central processing unit (CPU), a clock / reset unit, an instruction memory, a data memory, an interrupt controller, and I / O (Input / Output) units. The CPU, clock / reset unit, instruction memory, data memory, interrupt controller, and I / O units are connected via a system bus. The CPU provides computational and control capabilities. The MCU's memory includes an instruction memory and a data memory. The instruction memory stores the operating system, computer programs, and a database. The data memory provides the environment for the operating system and computer programs stored in the instruction memory. The MCU's I / O units are used to exchange information with external devices.

[0091] The interrupt verification device 10 can be a verification environment based on an interrupt signal generation component of a UVM (Universal Verification Methodology) platform, and may include, for example: Figure 1The clock and reset signal generation module, program instruction injection module, interrupt stimulus generation module, port monitoring module, and verification result printing output module shown are communicatively connected to the microprocessor 20. The clock and reset signal generation module generates clock and reset signals to reset the microcontroller 20. The program instruction injection module injects the interrupt verification program into the instruction memory of the microcontroller 20. The port monitoring module monitors the interrupt information output by the microcontroller through the I / O unit. The interrupt stimulus generation module outputs an interrupt signal based on the interrupt information, enabling the microcontroller's interrupt controller to detect the interrupt signal and perform interrupt verification. The verification result printing output module receives the interrupt service routine check results output by the I / O unit and outputs the interrupt verification results for user viewing.

[0092] Those skilled in the art will understand that Figure 1 The structure of the interrupt verification system shown in the figure is only a block diagram of a part of the structure related to the solution of this application, and does not constitute a limitation on the interrupt verification system applied thereto. A specific interrupt verification system may include more or fewer components than shown in the figure, or combine some components, or have different component arrangements.

[0093] The following describes the various embodiments of the interruption verification method provided in this application.

[0094] In one exemplary embodiment, such as Figure 2 As shown, an interruption verification method is provided, which is applied to... Figure 1 Taking the interrupt verification device 10 as an example, the explanation includes the following steps S101 to S104. Wherein:

[0095] S101, injects an interrupt verification program into the microcontroller under test.

[0096] The microcontroller communicates with the interrupt verification device. This communication connection can be fixed or detachable, allowing for easy disconnection or connection as needed. Optionally, the microcontroller can use interfaces such as USB (Universal Serial Bus), UART (Universal Asynchronous Receiver / Transmitter), or I2C (Inter-Integrated Circuit) to establish communication with the interrupt verification device, ensuring the stability and reliability of data transmission.

[0097] In the embodiments of this application, when interrupt verification of the microcontroller is required, the microcontroller is communicatively connected to an interrupt verification device. The interrupt verification device injects an interrupt verification program into the microcontroller, and the microcontroller executes the interrupt verification program to achieve interrupt verification of the microcontroller. The interrupt verification program is a compiled application binary file. After the microcontroller interrupt verification is completed, the interrupt verification device can be disassembled from the microcontroller. The interrupt verification device can be connected to other microcontrollers under test, or other processors with the same instruction set system, for interrupt verification. Processors with the same instruction set system can directly reuse the interrupt verification program, achieving portability of interrupt verification.

[0098] S102 receives interrupt information sent by the microcontroller according to the interrupt verification program.

[0099] The microcontroller runs an interrupt verification program, which generates interrupt information based on this program. The interrupt information may include at least one of the following: interrupt number, interrupt source, interrupt type, interrupt pattern, interrupt flag, or interrupt priority of the interrupt task to be verified. The microcontroller sends the interrupt information through a communication port connected to the interrupt verification device. The interrupt verification device monitors the microcontroller's port and receives the interrupt information. The interrupt information may include interrupt information corresponding to a single interrupt task, or it may include interrupt information corresponding to multiple interrupt tasks with different priorities simultaneously.

[0100] S103 sends an interrupt signal to the microcontroller based on the interrupt information.

[0101] The interrupt signal is used to instruct the microcontroller to execute the interrupt service routine corresponding to the interrupt signal. After receiving the interrupt information, the interrupt verification device generates an interrupt signal based on the content of the interrupt information. Optionally, the interrupt triggering method can include level triggering and edge triggering. Taking level triggering as an example, the interrupt information can include an interrupt pattern, which is a level pattern that can trigger an interrupt. An interrupt signal is generated based on the interrupt pattern, and then the interrupt signal is sent to the microcontroller through the communication connection with the microcontroller to trigger the microcontroller to respond to the interrupt.

[0102] S104 outputs the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine.

[0103] In the embodiments of this application, after the microcontroller detects an interrupt signal, it interrupts the program currently running on the central processing unit, executes the interrupt service routine corresponding to the interrupt signal, performs interrupt detection through the interrupt service routine, and then outputs the check result of the interrupt service routine. If the interrupt service routine check is normal, to ensure that each interrupt service routine is executed exactly once, an interrupt flag variable can be set. After the interrupt service routine check is normal, the value of the interrupt flag variable is further checked. If the value of the interrupt flag variable determines that each interrupt service routine has been executed exactly once, then the interrupt verification result of the microcontroller is determined to be successful. If the interrupt service routine check or the interrupt flag variable check is abnormal, then the interrupt verification result of the microcontroller is determined to be unsuccessful. After determining the interrupt verification result of the microcontroller, the interrupt verification device saves and records the interrupt verification result and interrupt verification information. Optionally, the interrupt verification result can be displayed on the interface of the interrupt verification device to facilitate developers to view and locate the problem, thereby improving verification and debugging efficiency.

[0104] In the above embodiment, firstly, an interrupt verification program is injected into the microcontroller under test (MCU). The MCU is communicatively connected to the interrupt verification device. Then, the device receives interrupt information sent by the MCU according to the interrupt verification program and sends an interrupt signal to the MCU, instructing it to execute the interrupt service routine corresponding to the interrupt signal. Finally, based on the result of the MCU executing the interrupt service routine, the device outputs the MCU's interrupt verification result. In this way, when performing interrupt verification on the MCU, the interrupt verification device receives interrupt information sent by the MCU according to the injected interrupt verification program, then sends an interrupt signal based on the interrupt information. Upon detecting the interrupt signal, the MCU executes the corresponding interrupt service routine and determines the interrupt verification result. This interrupt verification is performed synchronously through hardware and software, rather than simply simulating interrupts in software; therefore, the accuracy of the interrupt verification is higher.

[0105] In one embodiment, such as Figure 1 As shown, the microcontroller includes an instruction memory. Step S101 above injects an interrupt verification program into the microcontroller under test, including: injecting the interrupt verification program into the instruction memory through a port of the instruction memory.

[0106] In the embodiments of this application, the interrupt verification device's program instruction injection module injects the interrupt verification program into the instruction memory through the instruction memory port. The instruction memory can be IRAM (Instruction RAM), a high-speed random access memory specifically designed to store the processor's instruction code. The instruction memory is connected to the central processing unit (CPU) via the system bus to reduce instruction fetch latency. The instruction memory has extremely low access latency, enabling rapid response to CPU instruction requests, thereby improving overall system performance.

[0107] The microcontroller also includes a central processing unit and a clock reset unit. Accordingly, before receiving the interrupt information sent by the microcontroller according to the interrupt verification program, the method further includes: sending a reset instruction to the clock reset unit, the reset instruction being used to instruct the central processing unit to perform a reset operation of the microcontroller, and reading and executing the interrupt verification program from the instruction memory when the reset operation is completed.

[0108] The interrupt verification program is injected into the instruction memory. The clock and reset signal generation module of the interrupt verification device sends a reset signal to the clock reset unit of the microcontroller. After receiving the reset signal, the clock service unit sends it to the central processing unit through the system bus. The central processing unit responds to the reset instruction to reset the microcontroller. After the microcontroller is reset, it reads the program from the instruction memory and starts executing the interrupt verification program.

[0109] In the above embodiments, the interrupt verification device injects the interrupt verification program into the microcontroller. After the microcontroller is reset, it executes the interrupt verification program, generates interrupt information, and sends it to the interrupt verification device. The interrupt verification device then performs interrupt verification on the microcontroller based on the interrupt information. This ensures that the microcontroller can send interrupt information after initialization and then perform interrupt verification, avoiding the situation where the interrupt verification device has already triggered an interrupt signal before the microcontroller has completed initialization, thus preventing anomalies.

[0110] like Figure 3 As shown, in one embodiment, the microcontroller includes an interrupt controller, and the interrupt information includes an interrupt pattern and an interrupt type. Sending an interrupt signal to the microcontroller based on the interrupt information includes:

[0111] S201 generates an interrupt signal based on the interrupt pattern.

[0112] The interrupt pattern can represent the waveform information of the interrupt trigger. The interrupt pattern can be a single-cycle trigger signal or a multi-cycle trigger signal. Optionally, the interrupt pattern includes at least one level information, position information corresponding to each level information, and duration corresponding to each level information. The steps for generating the interrupt signal are as follows: Figure 4 As shown, it may include:

[0113] S301, determine the level width corresponding to each level information based on the position information and the duration corresponding to each level information.

[0114] The level information can include high and low levels, with different level information representing different level values ​​or logic states. The position information corresponding to each level information can determine the position of each level in the signal waveform, which can include the starting position. Based on the starting position and duration of each level information, the ending position of each level information can be determined. Based on the starting and ending positions of each level information, the corresponding level width can be determined.

[0115] S302 generates an interrupt signal based on each level information and the corresponding level width.

[0116] The interrupt signal waveform can be generated based on the level value and the corresponding level width of each level information.

[0117] S202, based on the interrupt type, determines the pin corresponding to the interrupt type from multiple pins of the interrupt verification device.

[0118] The pins of the interrupt verification device are connected to the pins of the microcontroller's interrupt controller. Different interrupt types generate interrupt signals on different pins. For example, in a microcontroller, interrupt types may include external interrupts, timer interrupts, serial communication interrupts, etc. Each interrupt type may correspond to one or more pins. Based on the interrupt type in the interrupt information, the pin corresponding to the received interrupt type is determined from among the multiple pins of the interrupt verification device.

[0119] S203 sends an interrupt signal to the interrupt controller through the pin corresponding to the interrupt type.

[0120] The interrupt stimulus generation module generates an interrupt signal based on the interrupt pattern on the pin corresponding to the interrupt type. After receiving the interrupt signal, the pin corresponding to the interrupt controller sends the interrupt signal to the central processing unit. The central processing unit suspends the currently executing task and executes the interrupt service routine corresponding to the interrupt signal.

[0121] In the above embodiments, interrupt signals are generated by interrupt patterns. Different interrupt patterns can generate different interrupt signals, which can realize diversified verification of interrupt signals, such as verification of single-cycle and multi-cycle interrupt signals.

[0122] In one embodiment of this application, to verify interrupt priorities, the interrupt information may include interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities. The step of sending an interrupt signal to the microcontroller based on the interrupt information is as follows: Figure 5 As shown, it includes:

[0123] S401 generates the interrupt signal corresponding to each interrupt task based on the interrupt pattern of each interrupt task.

[0124] Based on the interrupt pattern information of interrupt tasks with different interrupt priorities in the interrupt information, and according to the above... Figure 4 The interrupt signal generation step generates the interrupt signal corresponding to each interrupt task.

[0125] S402 determines the pin corresponding to the interrupt type of each interrupt task from multiple pins of the interrupt verification device, based on the interrupt type of each interrupt task.

[0126] Based on the method for determining the pins corresponding to the above interrupt types, the pins corresponding to each interrupt type are determined, and each interrupt signal can be sent through its respective interrupt pin.

[0127] S403 simultaneously sends the interrupt signal corresponding to each interrupt task to the interrupt controller through the pin corresponding to the interrupt type of each interrupt task.

[0128] To verify interrupt priorities and determine whether the interrupt handling priority matches the interrupt setting priority, interrupt signals can be sent simultaneously on multiple pins, enabling multiple interrupt tasks to be triggered simultaneously. That is, interrupt signals are sent simultaneously on the pins corresponding to the interrupt types of each interrupt task. The interrupt controller receives the interrupt signals of multiple interrupt tasks at the same time and sorts and processes them according to the interrupt priorities of the multiple interrupt tasks.

[0129] In the above embodiments, interrupt signals are sent through multiple pins to enable multiple interrupt tasks to be triggered simultaneously, thereby verifying the interrupt priority.

[0130] In one embodiment, the interrupt verification device outputs the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine, such as... Figure 6 As shown, it includes:

[0131] S501 receives the result of the microcontroller executing the interrupt service routine.

[0132] The microcontroller executes an interrupt service routine to check the interrupt function. Optionally, the check steps may include interrupt source check, interrupt number check, and interrupt priority check to determine whether the interrupt source, interrupt number, and interrupt priority of the interrupt task triggered by the interrupt signal are consistent with the interrupt information stored in the register. If they are consistent, the internal check of the interrupt service routine passes; if they are inconsistent, the internal check of the interrupt service routine fails, that is, the result of the interrupt service routine is that the check fails.

[0133] To verify that the interrupt service routine executes exactly once, an interrupt flag variable is set in the interrupt verification program. The interrupt flag variable is initialized during system initialization. Then, each time the interrupt service routine is executed, the interrupt flag variable is incremented by 1. After the interrupt service routine passes the check, the interrupt flag variable is further verified. If the interrupt flag variable indicates that the interrupt service routine executes exactly once, the result of the interrupt service routine is determined to be a pass; otherwise, the result of the interrupt service routine is determined to be a fail.

[0134] The interrupt verification device receives the result of the microcontroller executing the interrupt service routine through the I / O unit.

[0135] S502 If the result indicates that the interrupt service routine check passed, the interrupt verification result is output as "verification successful".

[0136] If the result indicates that the interrupt service routine check passed, the interrupt verification device determines that the interrupt verification result is successful and prints and displays the result information in the interrupt verification device.

[0137] S503 If the result indicates that the interrupt service routine check failed, the interrupt verification result will be output as verification failed.

[0138] If the result indicates that the interrupt service routine check fails, the interrupt verification device determines the interrupt verification result as a verification failure, prints and displays the result information in the interrupt verification device, and records the corresponding verification information in the log to facilitate the localization of verification failure issues. Optionally, when multiple interrupt signals are generated for verification, if an interrupt service routine check fails, the verification failure can be output and the interrupt verification program can be exited during the verification debugging phase. At this time, other unprocessed interrupts are stopped from being verified, which can facilitate quick determination of the verification failure cause and improve the efficiency of verification debugging. At the same time, the interrupt signals that failed verification can also be recorded, and the interrupt verification program can be exited after all interrupt signals have been verified. The above verification result output process can be set according to the actual situation, and this application embodiment does not limit it.

[0139] In the above embodiments, the interrupt verification device can output and print the interrupt verification results, which facilitates interrupt verification debugging.

[0140] In the embodiments of this application, an interruption verification method is also provided, applied to Figure 1 The microcontroller 20 in the middle, such as Figure 7 As shown, the method includes:

[0141] S601 receives the interrupt verification program injected by the interrupt verification device.

[0142] The microcontroller communicates with the interrupt verification device. This communication connection can be fixed or detachable, allowing for easy disconnection or reconnection as needed. The microcontroller includes an instruction memory, which receives interrupt verification programs injected by the interrupt verification device through its ports. The microcontroller also includes a central processing unit (CPU) and a clock reset unit. The clock reset unit receives a reset command from the interrupt verification device and sends it to the CPU. The CPU executes a reset operation on the microcontroller based on the reset command. After the reset operation is complete, the CPU reads and executes the interrupt verification program from the instruction memory.

[0143] During the interrupt verification process, global interrupts are first disabled to prevent the interrupt verification device from triggering an interrupt signal and causing an exception before the program is fully initialized. Then, interrupt configuration and interrupt flag variables are initialized. After configuration and initialization are complete, global interrupts are enabled, and the microcontroller can proceed with the interrupt verification process.

[0144] S602 generates interrupt information according to the interrupt verification procedure and sends the interrupt information to the interrupt verification device.

[0145] Interrupt information is used to instruct the interrupt verification device to send an interrupt signal. After global interrupts are enabled, the microcontroller generates interrupt information for the interrupt tasks that need to be verified according to the interrupt verification program. The microcontroller includes an I / O unit, which sends the interrupt information to the interrupt verification device. The interrupt verification device monitors whether it has received the interrupt information through a port monitoring module, and generates an interrupt signal based on the interrupt information and sends it to the microcontroller.

[0146] The interrupt pattern and interrupt type are generated according to the interrupt verification procedure. The interrupt pattern is used to instruct the interrupt verification device to generate an interrupt signal according to the interrupt pattern. The interrupt type is used to instruct the interrupt verification device to send an interrupt signal through the pin corresponding to the interrupt type among the multiple pins of the interrupt verification device.

[0147] S603 receives an interrupt signal and executes the interrupt service routine corresponding to the interrupt signal.

[0148] The microcontroller receives an interrupt signal and determines the interrupt service routine based on the signal. The interrupt service routine is then executed. The specific process may include incrementing the interrupt flag variable by 1, determining the interrupt source for level-triggered interrupts based on the interrupt type, and checking the interrupt number, interrupt source, and interrupt priority. After the internal checks of the interrupt service routine are completed, if the internal checks pass, a further check of the interrupt flag variable is performed to ensure that the interrupt service routine is executed exactly once.

[0149] S604 sends the result of executing the interrupt service routine to the interrupt verification device, instructing the interrupt verification device to output the interrupt verification result.

[0150] After the interrupt service routine is completed, the result of the interrupt service routine is sent to the interrupt verification device through the I / O unit.

[0151] In the above embodiments, after the interrupt verification program is initialized, a global interrupt is enabled to receive the interrupt signal, thereby synchronizing the interrupt generation and program verification. This avoids the interrupt verification device triggering the interrupt signal before the program is initialized, thus preventing an interrupt verification exception.

[0152] In one embodiment, the microcontroller includes an interrupt controller and a central processing unit, which receives interrupt signals and executes the specific steps of the interrupt service routine corresponding to the interrupt signal as follows: Figure 8 As shown, it includes:

[0153] The S701 interrupt controller receives interrupt signals and sends them to the central processing unit.

[0154] After receiving an interrupt signal, the interrupt controller sends it to the central processing unit (CPU) for processing. When the interrupt information includes interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities, the interrupt verification device generates multiple interrupt signals corresponding to these tasks and sends them simultaneously to the interrupt controller. The interrupt controller then sends the simultaneously received interrupt signals to the CPU for processing according to their interrupt priorities. The specific steps are as follows: Figure 9 As shown, it includes:

[0155] S801, the interrupt controller receives the interrupt signals corresponding to each interrupt task.

[0156] The interrupt controller simultaneously receives the interrupt signals corresponding to each interrupt task sent by the interrupt verification device through the pins corresponding to each interrupt task.

[0157] S802, the interrupt controller sorts the interrupt tasks according to the interrupt priority corresponding to each interrupt task.

[0158] The interrupt tasks are sorted according to their interrupt priority. Optionally, interrupt tasks with higher interrupt priority are placed near the head of the task processing queue. Then, the interrupt tasks are sorted in descending order of interrupt priority.

[0159] The S803 interrupt controller sends the interrupt signals corresponding to each interrupt task to the central processing unit according to the sorting result.

[0160] After the interrupt tasks are sorted, the interrupt signals corresponding to each interrupt task in the task processing queue are sent to the central processing unit (CPU) in sequence for processing.

[0161] S702, the central processing unit determines the interrupt service routine corresponding to the interrupt signal and executes the interrupt service routine. If the interrupt service routine check result is abnormal, it determines that the result of executing the interrupt service routine is that the check failed. If the interrupt service routine check result is normal, it performs an interrupt flag variable check.

[0162] S703, if the interrupt flag variable check result is normal, the CPU determines that the result of executing the interrupt service routine is that the check passed; if the interrupt flag variable check result is abnormal, the CPU determines that the result of executing the interrupt service routine is that the check failed.

[0163] After determining the result of executing the interrupt service routine, the result is sent to the interrupt verification device. The implementation steps in some of the above method embodiments are the same as those in the above embodiments of the interrupt verification method applied to the interrupt verification device, and will not be repeated here.

[0164] In the above embodiments, the interrupt service routine checks the interrupt source, interrupt number, and interrupt priority of the interrupt task, ensuring the correspondence between interrupt signals and pins and the correctness of the interrupt system connection. At the same time, the interrupt flag variable is used to verify the number of times the interrupt service routine is executed, ensuring that the interrupt service routine is executed only once.

[0165] In the embodiments of this application, such as Figure 10 The diagram shows a flowchart of an interruption verification method, including:

[0166] S1001, the interrupt verification device injects the interrupt verification program into the instruction memory through the port of the instruction memory.

[0167] S1002, the microcontroller receives the interrupt verification program injected by the interrupt verification device.

[0168] S1003, the interrupt verification device sends a reset command to the clock reset unit.

[0169] S1004, the microcontroller's clock reset unit receives the reset command sent by the interrupt verification device and sends it to the central processing unit; the central processing unit executes the microcontroller's reset operation according to the reset command; after the reset operation is completed, the central processing unit reads from the instruction memory and executes the interrupt verification program.

[0170] S1005, the microcontroller generates interrupt information according to the interrupt verification program and sends the interrupt information to the interrupt verification device.

[0171] S1006, the interrupt verification device receives interrupt information sent by the microcontroller according to the interrupt verification program.

[0172] S1007, the interrupt verification device sends an interrupt signal to the microcontroller based on the interrupt information.

[0173] S1008: The microcontroller receives an interrupt signal and executes the interrupt service routine corresponding to the interrupt signal.

[0174] S1009, the microcontroller sends the result of executing the interrupt service routine to the interrupt verification device, instructing the interrupt verification device to output the interrupt verification result.

[0175] In one embodiment of this application, such as Figure 11 The diagram shows the execution flowchart of the interrupt verification program.

[0176] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0177] Based on the same inventive concept, this application also provides an interrupt verification device for implementing the interrupt verification method described above. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more interrupt verification device embodiments provided below can be found in the limitations of the interrupt verification method described above, and will not be repeated here.

[0178] In one exemplary embodiment, such as Figure 12 As shown, an interrupt verification device 120 is provided, applied to an interrupt verification equipment, including: an injection module 121, an interrupt information receiving module 122, an interrupt signal sending module 123, and a verification result output module 124, wherein:

[0179] The injection module 121 is used to inject an interrupt verification program into the microcontroller under test; the microcontroller is communicatively connected to the interrupt verification device.

[0180] Interrupt information receiving module 122 is used to receive interrupt information sent by the microcontroller according to the interrupt verification program;

[0181] The interrupt signal sending module 123 is used to send an interrupt signal to the microcontroller according to the interrupt information; the interrupt signal is used to instruct the microcontroller to execute the interrupt service routine corresponding to the interrupt signal.

[0182] The verification result output module 124 is used to output the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine.

[0183] In one embodiment, the microcontroller includes an interrupt controller, and the interrupt information includes an interrupt pattern and an interrupt type. The interrupt signal sending module 123 includes:

[0184] The first signal generation unit is used to generate an interrupt signal according to the interrupt pattern;

[0185] The first pin determination unit is used to determine the pin corresponding to the interrupt type from multiple pins of the interrupt verification device according to the interrupt type.

[0186] The first signal transmitting unit is used to send an interrupt signal to the interrupt controller through a pin corresponding to the interrupt type.

[0187] In one embodiment, the interrupt information includes interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities, and the interrupt signal sending module 123 further includes:

[0188] The second signal generation unit is used to generate the interrupt signal corresponding to each interrupt task based on the interrupt pattern of each interrupt task.

[0189] The second pin determination unit is used to determine the pin corresponding to the interrupt type of each interrupt task from multiple pins of the interrupt verification device according to the interrupt type of each interrupt task.

[0190] The second signal transmitting unit is used to simultaneously send the interrupt signal corresponding to each interrupt task to the interrupt controller through the pin corresponding to the interrupt type of each interrupt task.

[0191] In one embodiment, the interrupt pattern includes at least one level information, position information corresponding to each level information, and duration corresponding to each level information; the first signal generation unit includes:

[0192] The level width determination unit is used to determine the level width corresponding to each level information based on the position information and the duration corresponding to each level information.

[0193] The interrupt signal generation unit is used to generate an interrupt signal based on each level information and the corresponding level width.

[0194] In one embodiment, the microcontroller includes an instruction memory, and the aforementioned injection module 121 is specifically used to inject an interrupt verification program into the instruction memory through a port of the instruction memory.

[0195] The microcontroller also includes a central processing unit and a clock reset unit. Accordingly, before receiving the interrupt information sent by the microcontroller according to the interrupt verification program, a reset instruction sending module is also included, which is used to send a reset instruction to the clock reset unit. The reset instruction is used to instruct the central processing unit to perform a reset operation of the microcontroller. After the reset operation is completed, the interrupt verification program is read from the instruction memory and executed.

[0196] In one embodiment, the verification result output module 124 includes:

[0197] The result receiving unit is used to receive the result of the microcontroller executing the interrupt service routine.

[0198] The success result output unit is used to output the interrupt verification result as successful if the result indicates that the interrupt service routine check has passed.

[0199] The failure result output unit is used to output the interrupt verification result as verification failure if the result indicates that the interrupt service routine check failed.

[0200] Each module in the aforementioned interrupt verification device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0201] In one exemplary embodiment, such as Figure 13 As shown, an interrupt verification device 130 is provided, applied to a microcontroller, including: a program receiving module 131, a generation module 132, an interrupt signal receiving module 133, and a sending module 134, wherein:

[0202] The program receiving module 131 is used to receive the interrupt verification program injected by the interrupt verification device; the microcontroller is communicatively connected to the interrupt verification device.

[0203] The generation module 132 is used to generate interrupt information according to the interrupt verification program and send the interrupt information to the interrupt verification device; the interrupt information is used to instruct the interrupt verification device to send an interrupt signal.

[0204] Interrupt signal receiving module 133 is used to receive the interrupt signal and execute the interrupt service routine corresponding to the interrupt signal;

[0205] The sending module 134 is used to send the result of executing the interrupt service routine to the interrupt verification device, so as to instruct the interrupt verification device to output the interrupt verification result.

[0206] In one embodiment, the generation module 132 includes:

[0207] The interrupt pattern and interrupt type generation unit is used to generate interrupt patterns and interrupt types according to the interrupt verification program. The interrupt pattern is used to instruct the interrupt verification device to generate an interrupt signal according to the interrupt pattern; the interrupt type is used to instruct the interrupt verification device to send an interrupt signal through the pin corresponding to the interrupt type among the multiple pins of the interrupt verification device.

[0208] In one embodiment, the microcontroller includes an instruction memory, and the program receiving module 131 is specifically used to receive an interrupt verification program injected by the interrupt verification device through the port of the instruction memory; the microcontroller also includes a central processing unit and a clock reset unit, and correspondingly, the device also includes a reset instruction receiving module, which is used for the clock reset unit to receive a reset instruction sent by the interrupt verification device and send it to the central processing unit; the central processing unit executes a reset operation of the microcontroller according to the reset instruction; when the reset operation is completed, the central processing unit reads and executes the interrupt verification program from the instruction memory.

[0209] In one embodiment, the microcontroller includes an interrupt controller and a central processing unit, and the interrupt signal receiving module 133 includes:

[0210] The signal receiving unit is used by the interrupt controller to receive interrupt signals and send the interrupt signals to the central processing unit;

[0211] The program execution unit is used by the central processing unit to determine the interrupt service routine corresponding to the interrupt signal and execute the interrupt service routine. If the interrupt service routine check result is abnormal, it determines that the result of executing the interrupt service routine is that the check fails, and if the interrupt service routine check result is normal, it performs an interrupt flag variable check.

[0212] The interrupt flag variable checking unit is used to determine that the result of executing the interrupt service routine is a pass if the result of the interrupt flag variable check is normal, and a fail if the result of the interrupt flag variable check is abnormal.

[0213] In one embodiment, the interrupt information includes interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities, and the signal receiving unit includes:

[0214] The receiving subunit is used by the interrupt controller to receive the interrupt signals corresponding to each interrupt task.

[0215] The sorting subunit is used by the interrupt controller to sort the interrupt tasks according to their respective interrupt priorities.

[0216] The signal sending subunit is used by the interrupt controller to send the interrupt signals corresponding to each interrupt task to the central processing unit according to the sorting result.

[0217] In one embodiment, the microcontroller includes an I / O unit, and the device further includes an I / O sending module for sending interrupt information to an interrupt verification device via the I / O unit; or, sending the result of executing an interrupt service routine to the interrupt verification device via the I / O unit.

[0218] Each module in the aforementioned interrupt verification device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0219] In one exemplary embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 14 As shown, the computer device includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When the computer program is executed by the processor, it implements an interrupt verification method. The display unit is used to form a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0220] Those skilled in the art will understand that Figure 14The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0221] In one exemplary embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to perform the following steps: injecting an interrupt verification program into a microcontroller under test; the microcontroller communicatingly connecting with an interrupt verification device; receiving interrupt information sent by the microcontroller according to the interrupt verification program; sending an interrupt signal to the microcontroller according to the interrupt information; the interrupt signal instructing the microcontroller to execute the interrupt service routine corresponding to the interrupt signal; and outputting the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine.

[0222] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, it performs the following steps: injecting an interrupt verification program into a microcontroller under test; the microcontroller communicating with an interrupt verification device; receiving interrupt information sent by the microcontroller according to the interrupt verification program; sending an interrupt signal to the microcontroller according to the interrupt information; the interrupt signal being used to instruct the microcontroller to execute the interrupt service routine corresponding to the interrupt signal; and outputting the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine.

[0223] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the interrupt verification method provided in any embodiment of this application.

[0224] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0225] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0226] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0227] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An interruption verification method, characterized in that, Applied to an interrupt verification device, the method includes: An interrupt verification program is injected into the microcontroller under test; the microcontroller is communicatively connected to the interrupt verification device. Receive interrupt information sent by the microcontroller according to the interrupt verification procedure; An interrupt signal is sent to the microcontroller according to the interrupt information; the interrupt signal is used to instruct the microcontroller to execute the interrupt service routine corresponding to the interrupt signal; Based on the result of the microcontroller executing the interrupt service routine, the interrupt verification result of the microcontroller is output.

2. The method according to claim 1, characterized in that, The microcontroller includes an interrupt controller, and the interrupt information includes an interrupt pattern and an interrupt type. Sending an interrupt signal to the microcontroller based on the interrupt information includes: The interrupt signal is generated according to the interrupt pattern; Based on the interrupt type, determine the pin corresponding to the interrupt type from among the multiple pins of the interrupt verification device; An interrupt signal is sent to the interrupt controller via the pin corresponding to the interrupt type.

3. The method according to claim 2, characterized in that, The interrupt information includes interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities. Sending an interrupt signal to the microcontroller based on the interrupt information includes: Based on the interrupt pattern of each interrupt task, generate an interrupt signal corresponding to each interrupt task; Based on the interrupt type of each interrupt task, determine the pin corresponding to the interrupt type of each interrupt task from among the multiple pins of the interrupt verification device; The interrupt signal corresponding to each interrupt task is simultaneously sent to the interrupt controller via the pin corresponding to the interrupt type of each interrupt task.

4. The method according to claim 3, characterized in that, The interrupt pattern includes at least one level information, position information corresponding to each level information, and duration corresponding to each level information; The step of generating the interrupt signal according to the interrupt pattern includes: The level width corresponding to each level information is determined based on the position information corresponding to each level information and the duration corresponding to each level information; The interrupt signal is generated based on each of the stated level information and the corresponding level width.

5. The method according to any one of claims 1-4, characterized in that, The microcontroller includes an instruction memory, and the injection of an interrupt verification program into the microcontroller under test includes: The interrupt verification program is injected into the instruction memory through the port of the instruction memory; The microcontroller further includes a central processing unit and a clock reset unit. Accordingly, before receiving the interrupt information sent by the microcontroller according to the interrupt verification procedure, the method further includes: A reset instruction is sent to the clock reset unit, which instructs the central processing unit to perform a reset operation on the microcontroller. Upon completion of the reset operation, the interrupt verification program is read from the instruction memory and executed.

6. The method according to any one of claims 1-4, characterized in that, The step of outputting the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine includes: Receive the result of the microcontroller executing the interrupt service routine; If the result indicates that the interrupt service routine check passed, then the interrupt verification result is output as successful. If the result indicates that the interrupt service routine check fails, then the interrupt verification result is output as verification failed.

7. An interruption verification method, characterized in that, Applied to a microcontroller, the method includes: The microcontroller receives an interrupt verification program injected by the interrupt verification device; the microcontroller is communicatively connected to the interrupt verification device. The interrupt verification procedure generates interrupt information and sends the interrupt information to the interrupt verification device; the interrupt information is used to instruct the interrupt verification device to send an interrupt signal. Receive the interrupt signal and execute the interrupt service routine corresponding to the interrupt signal; The result of executing the interrupt service routine is sent to the interrupt verification device to instruct the interrupt verification device to output the interrupt verification result.

8. The method according to claim 7, characterized in that, The step of generating interrupt information according to the interrupt verification procedure includes: The interrupt verification procedure generates an interrupt pattern and an interrupt type. The interrupt pattern is used to instruct the interrupt verification device to generate the interrupt signal according to the interrupt pattern. The interrupt type is used to instruct the interrupt verification device to send an interrupt signal through the pin corresponding to the interrupt type among the multiple pins of the interrupt verification device.

9. The method according to any one of claims 7-8, characterized in that, The microcontroller includes an instruction memory, and the interrupt verification program injected by the interrupt verification device includes: The interrupt verification program is received by the interrupt verification device through the port of the instruction memory; The microcontroller further includes a central processing unit and a clock reset unit; correspondingly, the method further includes: The clock reset unit receives the reset command sent by the interrupt verification device and sends it to the central processing unit; The central processing unit executes the reset operation of the microcontroller according to the reset instruction; Upon completion of the reset operation, the central processing unit reads from the instruction memory and executes the interrupt verification program.

10. The method according to any one of claims 7-8, characterized in that, The microcontroller includes an interrupt controller and a central processing unit. Receiving the interrupt signal and executing the interrupt service routine corresponding to the interrupt signal includes: The interrupt controller receives the interrupt signal and sends the interrupt signal to the central processing unit; The central processing unit determines the interrupt service routine corresponding to the interrupt signal and executes the interrupt service routine. If the interrupt service routine check result is abnormal, it determines that the result of executing the interrupt service routine is that the check fails. If the interrupt service routine check result is normal, it performs an interrupt flag variable check. If the interrupt flag variable check result is normal, the CPU determines that the result of executing the interrupt service routine is a pass; if the interrupt flag variable check result is abnormal, the CPU determines that the result of executing the interrupt service routine is a fail.

11. The method according to claim 10, characterized in that, The interrupt information includes interrupt patterns and interrupt types for multiple interrupt tasks with different interrupt priorities. The interrupt controller receives the interrupt signal and sends the interrupt signal to the central processing unit, including: The interrupt controller receives the interrupt signal corresponding to each interrupt task; The interrupt controller sorts the interrupt tasks according to their respective interrupt priorities; The interrupt controller sends the interrupt signal corresponding to each interrupt task to the central processing unit according to the sorting result.

12. The method according to claim 7, characterized in that, The microcontroller includes input / output (I / O) units, and the method further includes: The interrupt information is sent to the interrupt verification device through the IO unit; Alternatively, the result of executing the interrupt service routine can be sent to the interrupt verification device via the IO unit.

13. An interrupt verification system, characterized in that, The system includes an interrupt verification device and a microcontroller under test; the microcontroller is communicatively connected to the interrupt verification device. The interrupt verification device is used to perform the steps of the method as described in any one of claims 1 to 6; The microcontroller is used to perform the steps of the method as described in any one of claims 7 to 12.

14. An interrupt verification device, characterized in that, Applied to an interrupt verification device, the device includes: An injection module is used to inject an interrupt verification program into the microcontroller under test; the microcontroller is communicatively connected to the interrupt verification device. An interrupt information receiving module is used to receive interrupt information sent by the microcontroller according to the interrupt verification program; An interrupt signal sending module is used to send an interrupt signal to the microcontroller according to the interrupt information; the interrupt signal is used to instruct the microcontroller to execute the interrupt service routine corresponding to the interrupt signal. The verification result output module is used to output the interrupt verification result of the microcontroller based on the result of the microcontroller executing the interrupt service routine.

15. An interrupt verification device, characterized in that, Applied to a microcontroller, the device includes: The program receiving module is used to receive the interrupt verification program injected by the interrupt verification device; the microcontroller is communicatively connected to the interrupt verification device. The generation module is used to generate interrupt information according to the interrupt verification program and send the interrupt information to the interrupt verification device; the interrupt information is used to instruct the interrupt verification device to send an interrupt signal; An interrupt signal receiving module is used to receive the interrupt signal and execute the interrupt service routine corresponding to the interrupt signal; The sending module is used to send the result of executing the interrupt service routine to the interrupt verification device, so as to instruct the interrupt verification device to output the interrupt verification result.

16. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 12.

17. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 12.

18. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 12.

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