A computing power center short-scale transient simulation model construction method and device

Abstract

This invention provides a method and apparatus for constructing a short-scale transient simulation model of a computing center, relating to the field of computing center modeling technology. The method includes: modeling the power grid side using a three-phase AC voltage source; modeling the uninterruptible power supply using a series-connected three-phase full-bridge rectifier circuit, a boost chopper circuit, and a three-phase bridge PWM inverter circuit, wherein the boost chopper circuit has energy storage elements for powering the computing center during grid-side faults; modeling the cooling module using a constant torque load; modeling the server using CPU power consumption, GPU power consumption, total server power consumption, and server variable impedance; and modeling the ZIP load using a ZIP model. This invention can more effectively describe the interaction between the computing center and the power supply system, providing a new modeling approach for the energy efficiency optimization and stable operation of computing centers.

Description

Technical Field

[0001] This invention relates to the field of computing center modeling technology, specifically to a method and apparatus for constructing a short-scale transient simulation model for a computing center. Background Technology

[0002] With the rapid development of cloud computing, artificial intelligence, and big data technologies, the scale and power demand of global computing centers (also known as high-performance computing centers or data centers) have experienced explosive growth. As highly concentrated and variable power loads, large-scale computing centers pose significant challenges to the planning, operation, and transient stability of modern power systems.

[0003] Traditionally, in existing power system stability analysis, the load of computing centers is usually simplified into a constant power (PQ) model or a ZIP model. Although such simplified models are convenient for calculation, they completely ignore key dynamic processes such as changes in server CPU / GPU utilization, periodic pulse loads caused by AI training tasks, and batch power jumps caused by task queuing and execution. They cannot reflect the true characteristics of computing centers as time-varying loads and cannot characterize the complex dynamic electrical behavior inside computing centers.

[0004] Therefore, there is an urgent need to develop a refined model that can accurately describe the dynamic characteristics of each subsystem within the computing center server under constant load mode, batch processing mode, and AI load mode, as well as its interaction with the power grid. This model is of great practical engineering significance for power grid dispatching agencies to assess system stability, optimize operation modes, and prevent cascading failures caused by large load surges. Summary of the Invention

[0005] The purpose of this invention is to provide a method and apparatus for constructing a short-scale transient simulation model of a computing center, which can more effectively describe the interaction between the computing center and the power supply system, and provide a new modeling approach for the energy efficiency optimization and stable operation of the computing center.

[0006] To achieve the above objectives, in a first aspect, the present invention provides a method for constructing a short-scale transient simulation model of a computing center. The computing center includes a power grid, an uninterruptible power supply (UPS), a cooling module, a server, and a ZIP load. The power grid, cooling module, server, and ZIP load are all connected to the UPS. The method includes: The grid side is modeled using a three-phase AC voltage source; the uninterruptible power supply is modeled using a series three-phase full-bridge rectifier circuit, a boost chopper circuit, and a three-phase bridge PWM inverter circuit. The boost chopper circuit has energy storage components to power the computing center in the event of a grid-side fault; the cooling module is modeled using a constant torque load; the server is modeled using CPU power consumption, GPU power consumption, total server power consumption, and server variable impedance; and the ZIP load is modeled using a ZIP model.

[0007] According to the present invention, a method for constructing a short-scale transient simulation model of a computing center is provided, wherein the cooling module is modeled using a three-phase asynchronous motor. According to the present invention, a method for constructing a short-scale transient simulation model of a computing center is provided, in which the ZIP load is modeled using a constant impedance model. According to the method for constructing a short-scale transient simulation model of a computing center provided by the present invention, the expression for CPU power consumption modeling is as follows:

[0008] in, This indicates the CPU's raw instantaneous power consumption; This indicates the CPU's base power consumption when idle; This indicates the maximum power consumption of the CPU under full load. u CPU Indicates CPU utilization; p Burst This represents the burst power consumption component, simulating the additional power consumption caused by periodic tasks or sudden computing demands. According to the present invention, a method for constructing a short-scale transient simulation model of a computing center is provided, wherein the burst power consumption component is:

[0009]

[0010] in, Indicates the assumed burst power; Indicates the cycle of emergencies, This represents the duration of each emergency; n is a positive integer representing the number of emergencies. T CPU p represents the CPU's first-order low-pass filter time constant; CPU t represents the instantaneous power consumption of the CPU after the first-order low-pass filter; t represents time. According to the present invention, a method for constructing a short-scale transient simulation model of a computing center is provided, wherein the instantaneous power consumption of the CPU after first-order low-pass filtering fluctuates according to a Poisson distribution. According to the method for constructing a short-scale transient simulation model of a computing center provided by the present invention, the expression for GPU power consumption modeling is as follows:

[0011] in, This indicates the GPU's raw instantaneous power consumption; This indicates the GPU's base power consumption when idle; This indicates the maximum power consumption of the GPU under full load. uGPU Indicates GPU utilization; GPU utilization exhibits a periodic square wave pulse pattern, expressed as:

[0012]

[0013] in, To maximize GPU utilization, Minimum GPU utilization; The pulse width; The pulse period; T GPU p represents the GPU's first-order low-pass filter time constant; GPU This represents the instantaneous power consumption of the GPU after a first-order low-pass filter. According to the method for constructing a short-scale transient simulation model of a computing center provided by the present invention, the expression for modeling the total power consumption of the server is as follows:

[0014] Where, p total This indicates the total power consumption of the server. This indicates a slight disturbance.

[0015] According to the method for constructing a short-scale transient simulation model of a computing center provided by the present invention, the expression for modeling the variable impedance of the server is as follows:

[0016]

[0017]

[0018] Where, q total The total reactive power consumption of the server is represented by pf, and the power factor is represented by R. eq L represents the server's equivalent resistance. eq U represents the server's equivalent reactance. ref represents the effective value of the output voltage of the three-phase AC voltage source, and f represents the frequency of the three-phase AC voltage source. Secondly, the present invention provides a device for constructing a short-scale transient simulation model of a computing center. The computing center includes a power grid, an uninterruptible power supply (UPS), a cooling module, a server, and a ZIP load. The power grid, cooling module, server, and ZIP load are all connected to the UPS. The device includes: The first modeling unit is used to model the power grid side using a three-phase AC voltage source. The second modeling unit is used to model the uninterruptible power supply using a three-phase full-bridge rectifier circuit, a boost chopper circuit and a three-phase bridge PWM inverter circuit connected in series. The boost chopper circuit has an energy storage element to power the computing center in the event of a grid-side fault. The third modeling unit is used to model the cooling module using a constant torque load. The fourth modeling unit is used to model the server using CPU power consumption, GPU power consumption, total server power consumption, and server variable impedance. The fifth modeling unit is used to model the ZIP payload using a ZIP model.

[0019] Compared with the prior art, the present invention has at least the following technical effects: (1) The present invention simulates the amount of tasks received by the server under the batch processing load mode by using Poisson distribution. While ensuring that the probability of tasks arriving per second is the same, the randomness of the server power consumption is guaranteed. At the same time, in order to deal with transient phenomena and the possibility that the load of each server may be uneven or the response is not synchronized, a fast low-pass filter is used to smooth the CPU and GPU load of the server.

[0020] (2) The present invention completes the modeling of UPS through a three-phase full-bridge rectifier circuit, a boost chopper circuit and a three-phase bridge PWM inverter circuit. At the same time, the voltage on the input side of the server is detected to perform PI control on the duty cycle of the boost chopper circuit. This provides a voltage-stable control strategy to cope with the sudden changes in power consumption under the working modes of each server, and provides a stable environment for the normal operation of each module of the computing center.

[0021] (3) The method of the present invention simplifies and equivalentizes the server operating conditions under various processing modes through the design of variable impedance. In the case of server batch processing mode, an AI load mode related to the GPU is added. By controlling the impedance, the server module is regulated, which is an effective and reliable server power consumption simulation model. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0023] In the attached diagram: Figure 1 This is a structural diagram of the computing power center of this invention; Figure 2 This is a circuit diagram of the three-phase full-bridge rectifier circuit of the present invention; Figure 3This is a circuit diagram of the boost chopper circuit of the present invention; Figure 4 This is a circuit diagram of the three-phase bridge PWM inverter circuit of the present invention; Figure 5 This is a comparison chart of the active power of the CPU and GPU in this invention; Figure 6 This is a comparison chart of CPU and GPU utilization in this invention; Figure 7 This is a power consumption statistics chart for the server in this invention; Figure 8 This is a comparison chart of CPU power consumption of this invention; Figure 9 This is the CPU power consumption error diagram of the present invention; Figure 10 This is a comparison chart of GPU power consumption in this invention; Figure 11 This is the GPU power consumption error diagram of the present invention; Figure 12 This is a flowchart of the method for constructing a short-scale transient simulation model for computing power centers according to the present invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0025] The following detailed description of some embodiments of the present invention will be provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0026] Terminology Explanation: UPS (Uninterruptible Power Supply) is a power protection device that provides uninterrupted power supply when the main power supply is interrupted or abnormal, to ensure the continuous operation of the load and protect it from the impact of power outages.

[0027] A three-phase full-bridge controlled rectifier circuit is a rectifier circuit that uses six fully controlled switching devices (such as thyristors) to convert three-phase alternating current into controllable direct current, and adjusts the output voltage by controlling the firing angle.

[0028] A boost chopper circuit is a type of DC-DC converter circuit that uses the periodic switching of switching devices (such as IGBTs or MOSFETs) and the energy storage of inductors to boost the input DC voltage to a higher output voltage.

[0029] A three-phase full-bridge PWM inverter circuit is an inverter circuit that uses pulse width modulation technology to convert direct current into three-phase alternating current, and adjusts the frequency and amplitude of the output voltage by controlling the switching sequence.

[0030] The Poisson distribution is a discrete probability distribution used to describe the probability distribution of the number of times a random event occurs within a fixed time or space. It is suitable for situations where the occurrence rate of events is low and they are independent.

[0031] To address the technical problems raised in the background, this invention constructs a complete and concise short-scale transient simulation model of a computing center based on Simulink. This model encompasses five core modules: the power grid side, UPS, cooling module, ZIP load, and server. The research focuses on deriving and analyzing the server power consumption model and its dynamic operating characteristics. Based on this, an innovative power consumption modeling method for computing centers based on variable impedance characteristics is proposed. This method can more effectively describe the interaction between the computing center and the power supply system, providing a new modeling approach for energy efficiency optimization and stable operation of computing centers.

[0032] Please see Figure 1 The computing center consists of five main modules: the power grid side (three-phase AC voltage source), UPS (Uninterruptible Power Supply), cooling module, server, and ZIP load. The power grid side, cooling module, server, and ZIP load are all connected to the UPS.

[0033] like Figure 12 As shown, the method for constructing a short-scale transient simulation model for a computing center provided by this invention includes: Step 1: Model the grid side using a three-phase AC voltage source (frequency 50Hz, effective value 220V); Step 2: Model the uninterruptible power supply using a series three-phase full-bridge rectifier circuit, a boost chopper circuit, and a three-phase bridge PWM inverter circuit. The boost chopper circuit has an energy storage element to power the computing center in the event of a grid-side fault. Step 3: Model the cooling module using a constant torque load (e.g., a three-phase asynchronous motor); Step 4: Model the server using CPU power consumption, GPU power consumption, total server power consumption, and server variable impedance; Step 5: Model the ZIP load using the ZIP model (constant impedance, constant current, constant power model).

[0034] Among them, the circuit diagram of the three-phase full-bridge rectifier circuit is as Figure 2 shown. The three phases A, B, and C respectively correspond to the input of the three-phase AC voltage source and are connected to the rectifier bridge arm (VT1 to VT6) through the winding T. Its output voltage is as follows: (1) Among them, V LL is the effective value of the grid line voltage, α is the trigger delay angle.

[0035] For Figure 2 the three-phase full-bridge rectifier circuit shown, the open-loop control strategy can be used to meet the steady-state operation of the model.

[0036] The circuit diagram of the boost chopper circuit is as Figure 3 shown. When the switch tube Q1 is turned on, the inductor L1 stores energy; when it is turned off, the energy of the inductor L1 is released to the output capacitor C1 through the diode D1. The output voltage is higher than the input voltage to achieve the boost function as shown in the following formula: (2) In the formula, V i is the input voltage, V o is the output voltage, D (0 < D < 1) is the duty cycle of the switch tube Q 1. For its control strategy, by collecting the voltage at the input end of the server and passing it through the pi link (proportional coefficient K p , integral coefficient K i ) to control the duty cycle D of the boost chopper circuit, the voltage on the server side is stabilized at the effective value of 220V.

[0037] The circuit diagram of the three-phase bridge PWM inverter circuit is as Figure 4 shown, which is composed of six IGBT anti-parallel diodes (V1, V2, V3, V4, V5, V6). As Figure 4 shown, it has three pairs of bridge arms for the three phases A, B, and C, and generates three-phase sinusoidal voltage through the PWM modulation circuit. From the perspective of the circuit structure, the three-phase bridge PWM inverter circuit can only select the bipolar control method, and its working principle is as follows: The modulation signals of the three phases U,V,W u rU , u rV and urW The first wave consists of sine waves with phases differing by 120°, while the third wave consists of a triangular wave that shares a common positive and negative direction. u c ,like Figure 4 As shown. The control methods for the self-turn-off switching devices of phases U, V, and W are the same. Taking phase U as an example: In u rU > u c In each interval, a drive signal is given to V1 of the upper bridge arm to turn on, and a turn-off signal is given to V4 of the lower bridge arm. The control principle of the other two phases is the same as that of U.

[0038] Considering fault reconnection, the U, V, and W three-phase modulation signals will be... u rU , u rV and u rW It is connected to the A, B, and C phase voltage signals of the power grid side respectively, which can effectively avoid the problem of phase mismatch between the computing center and the power grid side after the UPS is disconnected.

[0039] (3) (4) In the formula V m Indicates the output three-phase voltage amplitude. v a , v b , v c It is the instantaneous value of the output voltage. V LL，rms This is the effective value of the output line voltage. m a The modulation ratio, V dc It is the input DC voltage.

[0040] The focus of this invention is the second-level transient stability of power systems. Within this short timescale, the thermodynamic processes of the cooling module change slowly, and their impact is negligible; however, the huge inrush current (electromechanical transient) generated by the motor stalling due to voltage drops during grid faults and during reconnection after fault clearance due to flux rebuilding and re-acceleration immediately and significantly affects the recovery of grid voltage and frequency. The constant torque assumption simplifies complex fluid loads, focusing the analysis on the most critical electromechanical energy conversion transient processes. To accommodate ZIP loads, this invention sets the constant torque at 530 N·m.

[0041] Specifically, the expression for a ZIP payload is: (5) Where, p ZIP This indicates the active power of the ZIP load. This indicates the rated active power of the ZIP load, v i q represents the input voltage. ZIP This indicates the reactive power of the ZIP load. Indicates the rated reactive power of the ZIP load; a p b p c p a q b q c q All are constants.

[0042] This invention addresses the constant current and constant power loads in ZIP loads, which have already been reflected in server power consumption modeling. To simplify the model, this invention adopts a constant impedance model for the equivalent ZIP load. The equivalent resistance is set to 0.06Ω, and the equivalent inductance to 0.006H.

[0043] Specifically, the CPU power consumption model is shown in the following formula: (6) in, This represents the raw instantaneous power consumption of the CPU, and the direct computational amount without any filtering processing. This represents the CPU's base power consumption when it is idle (utilization is 0), including static leakage current and basic circuit power consumption. This indicates the maximum power consumption of the CPU when it is fully loaded (utilization is 100%). u CPU This represents the CPU utilization rate, with a value range of [0,1]. It indicates the proportion of the current computing load to the maximum processing capacity. p Burst This represents the burst power consumption component, simulating the additional power consumption caused by periodic tasks or sudden computing demands. Among them, (7) (8) in, This indicates that the burst power is assumed to be a constant. This represents the duration of each emergency; n is a positive integer representing the number of emergencies. T CPU p represents the CPU's first-order low-pass filter time constant; CPU t represents the instantaneous power consumption of the CPU after the first-order low-pass filter; t represents time.

[0044] Specifically, GPU power consumption represents the computational energy consumed in artificial intelligence (AI) training tasks. Unlike general-purpose computing, AI training has a unique periodic pattern; therefore, the expression for modeling GPU power consumption is: (9) (10) (11) in This indicates the GPU's raw instantaneous power consumption; This indicates that the GPU maintains basic power consumption such as memory refresh when it is idle; This indicates the power consumption of the GPU under full load. u GPU This represents GPU utilization, with a value range of [0,1], and it exhibits a periodic square wave pulse form. To maximize its utilization To achieve its minimum utilization rate; The pulse width; This is the pulse period. T GPU p represents the GPU's first-order low-pass filter time constant; GPU This represents the instantaneous power consumption of the GPU after a first-order low-pass filter.

[0045] Therefore, the expression for modeling the total power consumption of the server is obtained as follows: (12) Where, p total This indicates the total power consumption of the server. This indicates a slight disturbance.

[0046] It should be noted that the instantaneous power consumption of the CPU after the first-order low-pass filter fluctuates according to a Poisson distribution, expressed as: (13) In batch load processing mode, the Poisson distribution is represented by the above equation, where P represents the time... t Time The probability of k sudden events occurring within this time period, i.e., the amount of tasks that the computing center needs to process within a certain time period. N represents the calculation process, and represents the total number of tasks processed by the computing center at the deadline t. λ represents the parameters of the Poisson distribution, which is both the expected value and the variance.

[0047] The output power needs to pass through a first-order low-pass filter to control the variable impedance. Taking CPU power consumption as an example: (14) (15) In the formula, Represents a time interval.

[0048] Taking the power factor pf as a constant value, we have (16) Based on the obtained total reactive power q of the server total Under ideal conditions, the effective value of the output voltage of a three-phase AC voltage source can be considered to be constant. U ref The variable impedance of the server is modeled as follows: (17) (18) Among them, R eq L represents the server's equivalent resistance. eq denoted by , where f represents the equivalent reactance of the server, and f represents the frequency of the three-phase AC voltage source.

[0049] To verify the effectiveness of the method of the present invention, the parameter values ​​in Table 1 were used to conduct simulation verification of the method for constructing a short-scale transient simulation model of the computing center of the present invention.

[0050] Table 1. Parameter Value Table

[0051] Based on the above simulation, the following server power consumption results are shown in the figure: Figure 5 The average power consumption of CPU, GPU, and total power during the experimental period was determined (190.1kW, 231.6kW, and 421.6kW, respectively), and a step-like fluctuation pattern of power over time was observed. According to... Figure 9 As can be seen, the server is operating under a mixed workload of batch processing and AI, and there are sudden bursts of tasks.

[0052] Figure 6 It contains four sub-plots: the top left shows the CPU utilization change with a blue line (marked "burst count = 5"), the top right shows the periodic fluctuation of GPU utilization with a red line, the bottom left compares the time-series differences of the two utilizations with blue and red lines, and the bottom right shows the mean, standard deviation and median of CPU and GPU utilization with bars, I-shaped markers and dashed lines, respectively, comprehensively covering the dynamic changes and statistical characteristics of device utilization.

[0053] Figure 7Composed of histograms and pie charts: The left histogram uses blue, red, and gray bars to represent the distribution frequency of CPU, GPU, and total power consumption, respectively, and marks the mean and standard deviation of the three; the right pie chart uses blue and orange areas to quantify the energy consumption share of CPU (45.1%) and GPU (54.9%), which not only presents the dispersion of power consumption distribution, but also clarifies the energy consumption contribution ratio of the two.

[0054] Considering the time factor, a 1-minute run is sufficient for actual Simulink simulations.

[0055] Figure 8 The analysis consists of two subplots, focusing on CPU power: the left subplot shows the actual value (blue line) and reference value (red dashed line) of CPU active power, and the right subplot shows the actual value (blue line) and reference value (red dashed line) of CPU reactive power. Both of them fluctuate initially and then tend to stabilize.

[0056] The difference between the actual measured active power consumption and reactive power consumption and the calculated values ​​is obtained. Figure 9 The blue and red lines represent the error changes in CPU active and reactive power, respectively. The error is larger at startup and approaches zero during steady-state operation.

[0057] Similarly, the same processing is applied to GPU power consumption to obtain... Figure 10 GPU power consumption comparison chart and Figure 11 GPU power consumption error graph.

[0058] Based on the same inventive concept, this invention also provides a device for constructing a short-scale transient simulation model of a computing center, used to implement the aforementioned method for constructing a short-scale transient simulation model of a computing center. The device includes: The first modeling unit is used to model the power grid side using a three-phase AC voltage source. The second modeling unit is used to model the uninterruptible power supply using a three-phase full-bridge rectifier circuit, a boost chopper circuit and a three-phase bridge PWM inverter circuit connected in series. The boost chopper circuit has an energy storage element for powering the computing center in the event of a grid-side fault. The third modeling unit is used to model the cooling module using a constant torque load. The fourth modeling unit is used to model the server using CPU power consumption, GPU power consumption, total server power consumption, and server variable impedance. The fifth modeling unit is used to model the ZIP payload using a ZIP model.

[0059] In summary, the method and apparatus for constructing a short-scale transient simulation model of a computing center provided by this invention can accurately provide circuit values ​​at various times to analyze the precise electromagnetic transient processes between the computing center and the power grid. Compared to the existing technology that simplifies the computing center to a constant power (PQ) model or a simple ZIP model, the core advantage of this invention lies in overcoming the limitations of static simplification and achieving a precise characterization of the dynamic characteristics of the computing center and the interaction process with the power grid. Existing models ignore key dynamic processes such as fluctuations in server CPU / GPU utilization, periodic pulse loads during AI training, and power jumps in batch processing tasks, failing to reflect the true characteristics of the computing center as a time-varying load. This invention, however, simulates the randomness of batch processing task arrivals through a Poisson distribution, combines refined power consumption modeling of the CPU / GPU (including burst power components and periodic utilization characteristics), and smooths load fluctuations with a fast first-order low-pass filter, accurately restoring the dynamic changes in power consumption under multiple operating modes, making the model more closely resemble actual operating scenarios.

[0060] Meanwhile, this invention constructs a complete model covering the power grid side, UPS, cooling module, server, and ZIP load. In particular, through full-link modeling of the three-phase full-bridge rectifier circuit, boost chopper circuit, and three-phase bridge PWM inverter circuit, coupled with a PI voltage control strategy, it can accurately output circuit parameters at various times, providing precise support for analyzing electromagnetic transient processes such as voltage drops and fault reconnection between the computing center and the power grid. Furthermore, the model takes into account the electromechanical transient effects of the cooling module and the simplified equivalence of the ZIP load, balancing computational efficiency while ensuring comprehensiveness, thus addressing the pain point of existing technologies' single modeling dimension and inability to support precise transient analysis. This invention, through a combination of "variable impedance design + multi-module collaborative modeling + precise control strategy," achieves both equivalent simplification of multiple server operating modes and ensures voltage stability and transient analysis accuracy.

[0061] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the embodiments disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. It should be understood that the invention is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A method for constructing a short-scale transient simulation model for a computing center, characterized in that, The computing center includes a power grid, an uninterruptible power supply (UPS), a cooling module, servers, and ZIP loads. The power grid, cooling module, servers, and ZIP loads are all connected to the UPS. The method includes: The power grid side is modeled using a three-phase AC voltage source; the uninterruptible power supply is modeled using a series three-phase full-bridge rectifier circuit, a boost chopper circuit, and a three-phase bridge PWM inverter circuit. The boost chopper circuit has an energy storage element for powering the computing center in the event of a power grid fault; the cooling module is modeled using a constant torque load; the server is modeled using CPU power consumption, GPU power consumption, total server power consumption, and server variable impedance; and the ZIP load is modeled using a ZIP model.

2. The method for constructing a short-scale transient simulation model of a computing center according to claim 1, characterized in that, The cooling module is modeled using a three-phase asynchronous motor.

3. The method for constructing a short-scale transient simulation model of a computing center according to claim 1, characterized in that, The ZIP load is modeled using a constant impedance model.

4. The method for constructing a short-scale transient simulation model of a computing center according to claim 1, characterized in that, The expression for CPU power consumption modeling is: in, This represents the CPU's raw instantaneous power consumption; This indicates the CPU's base power consumption when idle; This indicates the maximum power consumption of the CPU under full load. u CPU Indicates CPU utilization; p Burst This represents the burst power consumption component, simulating the additional power consumption caused by periodic tasks or sudden computing demands.

5. The method for constructing a short-scale transient simulation model of a computing center according to claim 4, characterized in that, The burst power consumption component is: in, Indicates the assumed burst power; Indicates the cycle of emergencies, This represents the duration of each emergency; n is a positive integer representing the number of emergencies. T CPU p represents the CPU's first-order low-pass filter time constant; CPU t represents the instantaneous power consumption of the CPU after the first-order low-pass filter; t represents time.

6. The method for constructing a short-scale transient simulation model of a computing center according to claim 5, characterized in that, The instantaneous power consumption of the CPU after the first-order low-pass filter fluctuates according to a Poisson distribution.

7. The method for constructing a short-scale transient simulation model of a computing center according to claim 6, characterized in that, The expression for GPU power consumption modeling is: in, This indicates the GPU's raw instantaneous power consumption; This indicates the GPU's base power consumption when idle; This indicates the maximum power consumption of the GPU under full load. u GPU Indicates GPU utilization; The GPU utilization rate exhibits a periodic square wave pulse pattern, expressed as: in, To maximize GPU utilization, Minimum GPU utilization; The pulse width; The pulse period; T GPU p represents the GPU's first-order low-pass filter time constant; GPU This represents the instantaneous power consumption of the GPU after a first-order low-pass filter.

8. The method for constructing a short-scale transient simulation model of a computing center according to claim 7, characterized in that, The expression for modeling the total power consumption of the server is: Where, p total This indicates the total power consumption of the server. This indicates a slight disturbance.

9. The method for constructing a short-scale transient simulation model of a computing center according to claim 8, characterized in that, The expression for modeling the variable impedance of the server is: Where, q total The total reactive power consumption of the server is represented by pf, and the power factor is represented by R. eq L represents the server's equivalent resistance. eq U represents the server's equivalent reactance. ref represents the effective value of the output voltage of the three-phase AC voltage source, and f represents the frequency of the three-phase AC voltage source.

10. A device for constructing a short-scale transient simulation model for a computing center, characterized in that, The computing center includes a power grid side, an uninterruptible power supply (UPS), a cooling module, servers, and ZIP loads. The power grid side, cooling module, servers, and ZIP loads are all connected to the UPS. The device includes: The first modeling unit is used to model the power grid side using a three-phase AC voltage source. The second modeling unit is used to model the uninterruptible power supply using a three-phase full-bridge rectifier circuit, a boost chopper circuit and a three-phase bridge PWM inverter circuit connected in series. The boost chopper circuit has an energy storage element for powering the computing center in the event of a grid-side fault. The third modeling unit is used to model the cooling module using a constant torque load. The fourth modeling unit is used to model the server using CPU power consumption, GPU power consumption, total server power consumption, and server variable impedance. The fifth modeling unit is used to model the ZIP payload using a ZIP model.

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