Data transmission system, electronic device and data transmission method

Abstract

This application discloses a data transmission system, electronic device, and data transmission method, belonging to the field of data interaction technology. The system includes: a data processing module, a first receiver, and at least one second receiver. The data processing module is used to convert acquired raw data into parallel data. The data processing module includes a first output interface and at least one second output interface. The first receiver is connected to the first output interface, and the second receiver is connected to a corresponding second output interface. The data processing module is configured to: during the process of sending parallel data to the first receiver through the first output interface, when it is necessary to send parallel data to the second receiver, in response to the parallel data being in a blanking period, start sending parallel data to the second receiver through the second output interface. This application strives to ensure that the first receiver does not experience abnormal situations such as fragmented frames or abnormal frames, thereby improving the stability of data transmission.

Description

Technical Field

[0001] This application relates to the field of data interaction technology, and includes, but is not limited to, a data transmission system, an electronic device, and a data transmission method. Background Technology

[0002] In high-speed image processing systems such as panoramic driving visual assistance systems and multi-screen display systems installed on vehicles, serial-deserialization links composed of serializers and deserializers are often used for output transmission. The deserializer can output image data through multiple different physical layer interfaces to achieve the purpose of distributing the same image source to multiple processing units (such as SOC).

[0003] In related technologies, common deserializers, when already having one physical layer interface open to output image data to one processing unit, need to relock the phase-locked loop (PLL) inside the deserializer if they need to simultaneously output image data to another processing unit. This requires all physical layer interfaces to be in a low-power (LP) state before switching to a high-speed (HS) state. In this process, some image data will be lost; moreover, fragmented or abnormal frames are prone to occur, potentially leading to display errors. Therefore, after relocking the PLL, the backend image data receiving processing unit can be directly reset or reset, restoring any malfunctioning processing unit to a normal state.

[0004] However, the related technical solutions can lead to frequent resets or restarts of the processing unit, which may result in poor stability of the processing unit. Moreover, this solution cannot effectively solve the problem of fragmented or abnormal frames appearing during data distribution. Summary of the Invention

[0005] In view of this, the data transmission system, electronic device, and data transmission method provided in this application can ensure that the first receiver does not experience abnormal situations such as fragmented frames or abnormal frames, thereby improving the stability of data transmission. The data transmission system, electronic device, and data transmission method provided in this application are implemented as follows: A first aspect of this application provides a data transmission system applied to an electronic device, the data transmission system including a data processing module, a first receiver, and at least one second receiver; The data processing module is used to convert the acquired raw data into parallel data; and the data processing module includes a first output interface and at least one second output interface. The first receiver is connected to the first output interface, and the second receiver is connected to a corresponding second output interface. The first receiver and the second receiver are used to receive the parallel data. The data processing module is configured to: when sending the parallel data to the first receiver through the first output interface, and when it is necessary to send the parallel data to the second receiver, in response to the parallel data being in the blanking period, start sending the parallel data to the second receiver through the second output interface.

[0006] Optionally, the data processing module further includes: a status indicator pin and a first communication interface; The status indicator pin is connected to the first receiver and / or the second receiver, and the first communication interface is connected to the first receiver and / or the second receiver; The status indicator pin is used to output a synchronization signal, and the level of the synchronization signal is used to indicate whether the parallel data is in the valid data period or the blanking period. The receiver connected to the status indicator pin is configured to: when it is necessary to send the parallel data to the second receiver during the process of sending the parallel data to the first receiver through the first output interface, determine whether the parallel data is in the blanking period based on the received synchronization signal, and send a first control command to the first communication interface when the parallel data is in the blanking period; The data processing module is configured to, upon receiving the first control command, begin sending the parallel data to the second receiver through the second output interface.

[0007] Optionally, both the status indicator pin and the first communication interface are connected to the first receiver, and a second communication interface is also provided between the first receiver and the second receiver; The second receiver is configured to send a data request to the first receiver through the second communication interface when the second receiver needs to receive the parallel data. The first receiver is configured to: upon receiving the data request and while the first receiver is currently receiving the parallel data, if the synchronization signal meets a preset condition, determine that the parallel data is in the blanking period and send the first control command to the first communication interface.

[0008] Optionally, the first communication interface is connected to the first receiver and each of the second receivers respectively, and the status indication pin is connected to each of the second receivers; The first receiver is configured to send a second control command to the data processing module through the first communication interface when the first receiver needs to receive the parallel data. The second receiver is configured to: when the second receiver needs to receive the parallel data and the first receiver is currently receiving the parallel data, if the synchronization signal meets a preset condition, determine that the parallel data is in the blanking period, and send the first control command to the first communication interface.

[0009] Optionally, the synchronization signal includes at least one of the following: a vertical synchronization signal, a data enable signal, and a line synchronization signal.

[0010] Optionally, the receiver connected to the status indicator pin is further configured to: determine that the parallel data is in the blanking period in response to an edge change in the synchronization signal and the edge change satisfying a preset condition; Alternatively, in response to the level of the synchronization signal being a preset level indicated by the preset condition, it is determined that the parallel data is in the blanking period.

[0011] Optionally, the data processing module includes: a serializer and a deserializer; The input terminal of the serializer is used to connect to the acquisition device, the output terminal of the serializer is connected to the input terminal of the deserializer, the first output interface of the deserializer is connected to the first receiver, each of the second output interfaces of the deserializer is connected to each of the second receivers, the status indicator pin of the deserializer is connected to the first receiver and / or the second receiver, and the first communication interface of the deserializer is connected to the first receiver and / or the second receiver. The acquisition device is used to acquire the raw data and send the raw data to the serializer; The serializer is used to convert the received raw data into serial data and send the serial data to the deserializer; The deserializer is used to convert the received serial data into parallel data and send the parallel data to the first receiver and / or the second receiver.

[0012] A second aspect of the embodiments of this application also provides an electronic device, which includes at least any of the data transmission systems described in the first aspect above.

[0013] A second aspect of this application also provides a data transmission method applied to any of the data transmission systems described in the first aspect above, wherein the data transmission system includes a data processing module, a first receiver, and at least one second receiver; the method includes: In response to any second receiver needing to receive parallel data sent by the data processing module and the first receiver being receiving the parallel data, it is detected whether the parallel data is in the blanking period; If so, the parallel data is output to the second receiver; If not, wait until the parallel data is in the blanking period before outputting the parallel data to the second receiver.

[0014] Optionally, detecting whether the parallel data is in the blanking period includes: Determine whether the synchronization signal output by the data processing module meets the preset conditions. The level of the synchronization signal is used to indicate whether the parallel data is in the valid data period or the blanking period. If so, then the parallel data is determined to be in the blanking period.

[0015] The computer-readable storage medium provided in this application embodiment stores a computer program thereon, which, when executed by a processor, implements the method provided in this application embodiment.

[0016] The data transmission system, electronic device, and data transmission method provided in this application embodiment include a data processing module, a first receiver, and at least one second receiver. The data processing module converts acquired raw data into parallel data. It includes a first output interface and at least one second output interface. The first receiver is connected to the first output interface, and the second receiver is connected to a corresponding second output interface. Both the first and second receivers are used to receive the parallel data. Specifically, the data processing module is configured to, during the transmission of parallel data to the first receiver via the first output interface, when it is necessary to transmit parallel data to the second receiver, initiate transmission of the parallel data to the second receiver via the second output interface in response to the parallel data being in a blanking period.

[0017] As can be seen from the working principle of this data transmission system, when the data processing module is sending parallel data to the first receiver, if it needs to send parallel data to the second receiver, it will temporarily wait and continuously monitor whether the parallel data is in the blanking period. Only when it is confirmed that the parallel data is in the blanking period will it send the parallel data to the second receiver. That is, the parallel data is only sent to the second receiver when it is in the blanking period, avoiding the problem of the PLL relocking during the valid data period of the parallel data, which would cause the first output interface PHY1 to fall back to the LP state when transmitting valid data.

[0018] In this way, it can be ensured that the first receiver does not experience abnormal situations such as fragmented frames or abnormal frames, thereby improving the stability of data transmission and at least partially solving the technical problems mentioned in the background art. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the structure of a first data transmission system provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of a second data transmission system provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a third data transmission system provided in an embodiment of this application; Figure 4 This is a schematic diagram of the structure of the fourth data transmission system provided in the embodiments of this application; Figure 5 This is a schematic diagram of the structure of the fifth data transmission system provided in the embodiments of this application; Figure 6 This is a flowchart illustrating a data transmission method provided in an embodiment of this application. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the specific technical solutions of this application will be further described in detail below with reference to the accompanying drawings of the embodiments of this application. The following embodiments are used to illustrate this application, but are not intended to limit the scope of this application.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0023] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0024] It should be noted that the terms "first, second, third" used in the embodiments of this application are used to distinguish similar or different objects and do not represent a specific order of objects. It can be understood that "first, second, third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0025] In related technologies, common deserializers, when already having one physical layer interface open to output image data to one processing unit, need to relock the internal PLL of the deserializer if they need to simultaneously output image data to another processing unit. This requires all physical layer interfaces to be in LP state and then switched to HS state. In this process, some image data will be lost; moreover, fragmented or abnormal frames are prone to occur, which may even lead to abnormal display. Therefore, after relocking the PLL, the backend processing unit receiving image data can be directly reset or reset to restore the abnormal processing unit to a normal state.

[0026] However, the related technical solutions can lead to frequent resets or restarts of the processing unit, which may result in poor stability of the processing unit. Moreover, this solution cannot effectively solve the problem of fragmented or abnormal frames appearing during data distribution.

[0027] To address this, embodiments of this application provide a data transmission system. This system includes a data processing module, a first receiver, and at least one second receiver. The data processing module converts acquired raw data into parallel data. It includes a first output interface and at least one second output interface. The first receiver is connected to the first output interface, and the second receiver is connected to a corresponding second output interface. Both the first and second receivers receive the parallel data. The data processing module is configured such that, during the transmission of parallel data to the first receiver via the first output interface, when it is necessary to transmit parallel data to the second receiver, it begins transmitting the parallel data to the second receiver via the second output interface in response to the parallel data being in a blanking period. This ensures that the first receiver does not experience fragmented or abnormal frames, thereby improving the stability of data transmission.

[0028] This application describes an embodiment of a data transmission system used in electronic devices for image data transmission. However, it does not imply that this embodiment can only be applied to image data transmission in electronic devices.

[0029] Optionally, the electronic device can be a panoramic driving visual assistance system (i.e., 360° panoramic view) and / or a multi-screen display system in a vehicle; the electronic device can also be any possible device such as a mobile phone, wearable device (such as a smartwatch, smart bracelet, smart glasses, etc.), tablet computer, laptop computer, or PC (Personal Computer). Generally, as long as the electronic device has the function of distributing the same data source to different downstream devices through a deserializer, it can use the data transmission system provided in this application embodiment. This application embodiment does not limit this.

[0030] The data transmission system provided in the embodiments of this application will be explained in detail below.

[0031] Figure 1 This application provides a schematic diagram of a data transmission system, which can be applied to any of the aforementioned possible electronic devices. These electronic devices may include any data acquisition device capable of collecting relevant data, such as sensors, cameras, microphones, etc. This application does not limit the scope of the proposed system.

[0032] See Figure 1 This application provides a data transmission system 100, which includes a data processing module 101, a first receiver 102, and at least one second receiver 103.

[0033] The data processing module 101 is used to convert the acquired raw data into parallel data; and the data processing module 101 includes a first output interface PHY1 and at least one second output interface PHY2.

[0034] The first receiver 102 is connected to the first output interface PHY1, and the second receiver 103 is connected to a corresponding second output interface PHY2. The first receiver 102 and the second receiver 103 are used to receive the parallel data.

[0035] The data processing module 101 is configured to: when sending the parallel data to the first receiver 102 through the first output interface PHY1, and when it is necessary to send the parallel data to the second receiver 103, in response to the parallel data being in the blanking period, start sending the parallel data to the second receiver 103 through the second output interface PHY2.

[0036] In this embodiment, the raw data can be data sent to the data processing module 101 by any possible acquisition device. Generally, the acquisition device can be any possible component such as a camera, sensor, or microphone. Moreover, the raw data can be any possible digital signal; for example, the raw data can be image data based on the MIPI protocol. This application embodiment does not limit this.

[0037] Optionally, the data processing module 101 can be a single component or a device packaged from two or more components, and can be adjusted accordingly based on actual needs. For example, if the original data is serial data based on the MIPI protocol, in order to ensure that the first receiver 102 and / or the second receiver 103 can correctly receive and identify the original data, the data processing module 101 can include a converter for directly converting the original data into parallel data; or, it can include a serializer that first converts the original data into serial data and a deserializer that converts the serial data into parallel data. This application does not limit this aspect.

[0038] In this embodiment, the first output interface PHY1 can be any data transmission interface of the data processing module 101, and the first output interface PHY1 can be an interface for transmitting analog signals. Generally, the first output interface PHY1 is used for data interaction with the first receiver 102.

[0039] Optionally, when the data processing module 101 and the first receiver 102 transmit data based on the MIPI protocol, the first output interface PHY1 can serve as the physical layer in the MIPI protocol. The data processing module 101 can convert digital signals into analog signals and transmit them to the first receiver 102 through the first output interface PHY1.

[0040] In this embodiment, the second output interface PHY2 can be any data transmission interface of the data processing module 101, and the first output interface PHY1 can be an interface for transmitting analog signals. Generally, the second output interface PHY2 is used for data interaction with the second receiver 103.

[0041] Optionally, when the data processing module 101 and the second receiver 103 transmit data based on the MIPI protocol, the second output interface PHY2 can be used as the physical layer in the MIPI protocol. The data processing module 101 can convert digital signals into analog signals and transmit them to the corresponding second receiver 103 through the second output interface PHY2.

[0042] In addition, in some possible implementations, the first output interface PHY1 and the second output interface PHY2 can also be used for feedback data transmitted by the first receiver 102 and the second receiver 103. This application does not limit this aspect.

[0043] Optionally, the first receiver 102 and the second receiver 103 can be any device with functions such as communication, receiving, parsing, identification and / or storage. For example, the first receiver 102 and the second receiver 103 can each be a system on chip (SOC).

[0044] In this embodiment, when the electronic device is a vehicle, the first receiver 102 and the second receiver 103 can be a System-on-a-Chip (SOC) in the vehicle used to perform functions such as displaying images or videos. This application does not limit this aspect.

[0045] Optionally, the parallel data can be transmitted on the internal bus of the first receiver 102 and / or the second receiver 103, which has the advantages of fixed data bit width and low clock frequency.

[0046] Generally, during the transmission of parallel data, the parallel data typically includes a valid data period and a blanking period. The valid data period refers to the time interval during which valid data is transmitted in the parallel data. During this valid data period, the bus between the first output interface PHY1 of the data processing module 101 and the first receiver 102 transmits valid data.

[0047] Optionally, the blanking period refers to the vertical blanking period or the horizontal blanking period. When the parallel data is in the blanking period, there is no valid data in the parallel data. That is, in this case, no valid data is transmitted on the bus between the first output interface PHY1 of the data processing module 101 and the first receiver 102, and it may be in LP state or transmit a small number of synchronization packets.

[0048] In this embodiment, because the parallel data conforms to the MIPI protocol, it can transmit pixel data of the pixel values ​​of each line within the corresponding frame during the effective data period, and can transmit line synchronization packets (HSS) and line end packets (HET) during the blanking period. Furthermore, because the vertical blanking period has a relatively long time window, it is generally preferable to send the parallel data to the second receiver 103 via the second output interface PHY2 during the vertical blanking period. This embodiment does not limit this aspect.

[0049] Optionally, the parallel data may be identified or detected in any possible way, such as by periodically detecting the level of the signal that changes synchronously with the blanking period, detecting the edge of the signal that changes synchronously with the blanking period, or any other possible way. This application embodiment does not limit this.

[0050] Optionally, the first receiver 102 can be the main controller or a constantly online receiver in the electronic device. For example, the first receiver 102 can be a central control SOC or domain controller responsible for processing and displaying the core video stream, which can realize functions such as 360° panoramic view, instrument panel display, and driving recorder. In addition, the second receiver 103 can be an auxiliary controller or an on-demand receiver in the electronic device. For example, the second receiver can be a controller responsible for realizing functions such as reversing image, steering assist display, and assisted driving. This application embodiment does not limit this.

[0051] Under normal circumstances, the first receiver 102 needs to receive and continuously receive the parallel data immediately after the system is powered on, and the reception should generally not be interrupted. The second receiver 103 only needs to receive the parallel data under specific operating conditions (such as turning on the turn signal, activating the driver assistance function, or engaging reverse gear).

[0052] It is worth noting that the hardware structure of the data transmission system 100 provided in the embodiments of this application has been described in detail above. The working principle of the data transmission system 100 will be explained below: If the data processing module 101 does not receive the original data, the data processing module 101 is in a sleep or standby state and does not output data to the first receiver 102 and the second receiver 103.

[0053] When the data processing module 101 receives the raw data, it can convert the raw data into parallel data. After the first receiver 102 is powered on and successfully establishes communication with the data processing module 101, the data processing module 101, either actively or in response to a data request sent by the first receiver 102, opens the first output interface PHY1 and continuously outputs the parallel data to the first receiver 102. At this time, each of the second output interfaces PHY2 remains closed. Then, during the process of sending the parallel data to the first receiver 102, if it is necessary to send the parallel data to the second receiver 103 (either by receiving a data request sent by the second receiver 103 or by receiving a data request forwarded by the first receiver 102), it monitors whether the parallel data is in the blanking period.

[0054] If it is determined that the parallel data is currently in the blanking period, the parallel data is directly sent to the second receiver 103 through the second output interface PHY2; if it is determined that the parallel data is not currently in the blanking period (but is in the data validity period), the system waits temporarily and continuously monitors whether the parallel data is in the blanking period until it is determined that the parallel data is in the blanking period, and then sends the parallel data to the second receiver 103.

[0055] It's important to understand that during data transmission, the PLL is generally responsible for the frequency and phase of the data transmission process and provides the reference clock for data transmission to the first output interface PHY1 and each of the second output interfaces PHY2. When the data processing module 101 transmits parallel data to the first receiver 102 through the first output interface PHY1, the PLL will lock once. During this process, if the parallel data needs to be transmitted from one second receiver 103 to another, the PLL needs to be triggered to perform a global relock or recalibration. This may cause brief jitter or even interruption in the clock domain or clock signal of the entire system, which will affect the already locked and stable first output interface PHY1, causing it to fall back to the LP state and then switch back to the HS state.

[0056] Therefore, during the process of falling back to the LP state and switching back to the HS state, if the parallel data is in the valid data period, the first receiver 102 may lose the image data being transmitted, resulting in the problem of fragmented frames or abnormal frames.

[0057] It is worth noting that in the data transmission system 100 provided in this application, when the data processing module 101 has started sending parallel data to the first receiver 102 through the first output interface PHY1, if it is necessary to simultaneously send parallel data to the corresponding second receiver 103 through the second output interface PHY2, the data processing module 101 will only start sending the parallel data to the second receiver 103 through the second output interface PHY2 after determining that the parallel data is in the blanking period. In other words, the data processing module 101 will not start sending the parallel data to the second receiver 103 when the parallel data is in the valid data period, thus avoiding the problem of the PLL re-locking during the valid data period of the parallel data, causing the first output interface PHY1 to revert to the LP state when transmitting valid data.

[0058] This ensures that the first receiver 102 does not experience abnormal situations such as fragmented frames or abnormal frames, thereby improving the stability of data transmission.

[0059] In this embodiment, a data processing module 101, a first receiver 102, and at least one second receiver 103 are provided in the data transmission system 100. The data processing module 101 is used to convert the acquired raw data into parallel data; and the data processing module 101 includes a first output interface PHY1 and at least one second output interface PHY2. The first receiver 102 is connected to the first output interface PHY1, and the second receiver 103 is connected to a corresponding second output interface PHY2. The first receiver 102 and the second receiver 103 are used to receive the parallel data. The data processing module 101 is configured such that, during the transmission of parallel data from the first output interface PHY1 to the first receiver 102, when it is necessary to transmit the parallel data to the second receiver 103, in response to the parallel data being in a blanking period, it begins transmitting the parallel data from the second output interface PHY2 to the second receiver 103.

[0060] As can be seen from the above working principle, when the data processing module 101 is sending the parallel data to the first receiver 102, if it needs to send the parallel data to the second receiver 103, it will temporarily wait and continuously monitor whether the parallel data is in the blanking period. Only when it is determined that the parallel data is in the blanking period will it send the parallel data to the second receiver 103. That is, the parallel data is only sent to the second receiver 103 when the parallel data is in the blanking period, avoiding the problem of the PLL re-locking during the valid data period of the parallel data, which would cause the first output interface PHY1 to fall back to the LP state when transmitting valid data.

[0061] In this way, it can be ensured that the first receiver 102 does not experience abnormal situations such as fragmented frames or abnormal frames, thereby improving the stability of data transmission.

[0062] In one possible implementation, see [link to relevant documentation]. Figure 2 or Figure 3 The data processing module 101 also includes a status indicator pin MFP and a first communication interface I2C.

[0063] The status indicator pin MFP is connected to the first receiver 102 and / or the second receiver 103, and the first communication interface I2C is connected to the first receiver 102 and / or the second receiver 103.

[0064] The status indicator pin MFP is used to output a synchronization signal.

[0065] The receiver connected to the status indicator pin MFP is configured to: when the parallel data needs to be sent to the second receiver 103 during the process of sending the parallel data to the first receiver 102 through the first output interface PHY1, determine whether the parallel data is in the blanking period based on the received synchronization signal, and send a first control command to the first communication interface I2C when the parallel data is in the blanking period.

[0066] The data processing module 101 is configured to, upon receiving the first control command, begin sending the parallel data to the second receiver 103 via the second output interface PHY2.

[0067] In this embodiment, the level of the synchronization signal is used to indicate whether the parallel data is in the valid data period or the blanking period.

[0068] Optionally, the synchronization signal can be any signal that corresponds to the stage in which the parallel data is located. For example, the synchronization signal includes at least one of the following: a vertical synchronization (VS) signal, a data enable (DE) signal, and a horizontal synchronization (HS) signal. This application embodiment does not limit this.

[0069] For example, because a frame of image data is not transmitted continuously, but is transmitted in three layers according to a certain time sequence: "1. Transmission of data of each pixel", "2. Transmission of a row of data composed of multiple pixels", "3. Transmission of complete image data composed of multiple rows", there will be time gaps (i.e. blanking periods) between any two rows of data and between any two frames of data during the transmission process.

[0070] Generally, the VS signal can be used to indicate the start or end of a data frame. In a complete data timing sequence, the VS signal has one complete pulse. During this pulse, the parallel data will not transmit any valid data, which is called the vertical blanking period (or frame blanking period). For example, if the VS signal is high, it means that the parallel data is transmitting valid data, and the VS signal is low, it means that the parallel data is in the blanking period. Therefore, when a falling edge of the VS signal is detected, or when the VS signal is low, it can be determined that the parallel data is currently in the vertical blanking period.

[0071] Additionally, the HS signal can be used to indicate the start or end of a line of data. There is a brief gap between the transmission of the last valid data in a line and the transmission of the first valid data in the next line; this gap is called the horizontal blanking period (or horizontal blanking period). For example, if a high HS signal corresponds to the transmission of valid data in the parallel data, and a low HS signal corresponds to the parallel data being in the blanking period, then detecting a falling edge on the HS signal or detecting a low HS signal can determine that the parallel data is currently in the horizontal blanking period.

[0072] In addition, the DE signal is used to indicate in real time whether the currently transmitted parallel data is valid. Generally, when the DE signal is high, it indicates that the parallel data is valid, and when the DE signal is low, it indicates that the parallel data is invalid, that is, it is in the blanking period (which may be the horizontal blanking period or the vertical blanking period).

[0073] As can be seen, the embodiments of this application can determine whether the parallel data is in the blanking period by using a variety of different synchronization signals, which has high flexibility.

[0074] Optionally, the status indicator pin MFP can be any multi-function pin in the data processing module 101. In this embodiment, the status indicator pin MFP is used to map the synchronization signal; that is, the level state of the status indicator pin MFP will be synchronized with the level state of the synchronization signal. For example, if the synchronization signal is the VS signal, then when the VS signal is high, the status indicator pin MFP will output a high level; when the VS signal is low, the status indicator pin MFP will output a low level. This application embodiment does not limit this.

[0075] Optionally, the first communication interface I2C may be the interface through which the data processing module 101 establishes communication with the first receiver 102 and / or the second receiver 103. The number of first communication interfaces I2C may be one or more, and this embodiment does not limit this.

[0076] In this embodiment, the first control instruction can be an instruction used to control the data processing module 101 to output the parallel data to the second receiver 103. Furthermore, the first control instruction can also be used to indicate any possible parameters such as the data content, data format, and start and end times of the parallel data required by the second receiver 103. Generally, if the data processing module 101 does not receive the first control instruction, it will not send the parallel data to the second receiver 103. This application embodiment does not limit this aspect.

[0077] Optionally, after sending the first control command, the receiver connected to the status indicator pin MFP is also configured to stop receiving the synchronization signal. This avoids the problem that a change in the synchronization signal in the next cycle could cause the receiver connected to the status indicator pin MFP to detect that the parallel signal is in a valid data period, thus mistakenly controlling the data processing module 101 to stop sending the parallel data to the second receiver 103. This improves the reliability and stability of data transmission.

[0078] Understandably, the status indicator pin MFP of the data processing module 101 can output a synchronization signal to indicate whether the parallel data is in the valid data period or the blanking period. Therefore, the receiver connected to the status indicator pin MFP can determine based on the synchronization signal that the parallel data is in the blanking period before sending the first control command to the first communication interface I2C, and not send the first control command when the parallel data is in the valid data period. In this way, it can be ensured that the data processing module 101 only starts sending the parallel data to the second receiver 103 when the parallel data is in the blanking period, thereby ensuring that the first receiver 102 does not experience abnormal situations such as fragmented frames or abnormal frames.

[0079] In one possible implementation, see [link to previous section] Figure 2 The status indicator pin MFP and the first communication interface I2C are both connected to the first receiver 102, and a second communication interface GPIO1 is also provided between the first receiver 102 and the second receiver 103.

[0080] The second receiver 103 is configured to send a data request to the first receiver 102 through the second communication interface GPIO1 when the second receiver 103 needs to receive the parallel data.

[0081] The first receiver 102 is configured to: upon receiving the data request and while the first receiver 102 is currently receiving the parallel data, if the synchronization signal meets a preset condition, determine that the parallel data is in the blanking period and send the first control command to the first communication interface I2C.

[0082] Optionally, the first receiver 102 and the second receiver 103 may each be provided with a second communication interface GPIO1, which may be an interface that enables the first receiver 102 and the second receiver 103 to communicate.

[0083] In this embodiment, the data request may be an instruction indicating that parallel data needs to be sent to the corresponding second receiver 103. This application embodiment does not limit this.

[0084] Optionally, the preset condition can be set by relevant technical personnel according to actual needs. For example, when the synchronization signal is the aforementioned VS signal, HS signal, or DE signal, the preset condition can be that the synchronization signal is low or has a falling edge. This application embodiment does not limit this.

[0085] Optionally, the first receiver 102 can be connected to the status indication pin MFP via the identification pin INT. Furthermore, when the first receiver 102 is initially powered on, the identification pin INT can be set to be interrupt-triggered on either the rising or falling edge (the specific setting can be determined based on the correspondence between the synchronization signal and the blanking period), and the identification pin INT can be kept in an interrupt-disabled state. Alternatively, when the first receiver 102 is initially powered on, the identification pin INT can be set to detect high or low voltage levels, and the identification pin INT can be disabled.

[0086] Additionally, after receiving the data request, the first receiver 102 can switch the identification pin INT to an interrupt-triggered state to detect whether the synchronization signal output by the state indicator pin MFP has a rising or falling edge (or, control the identification pin INT to enable it to detect the level state of the synchronization signal output by the state indicator pin MFP), thereby determining whether the synchronization signal meets the preset condition. This application embodiment does not limit this aspect.

[0087] It is important to understand that, in Figure 3 In the system 100 shown, because the data processing module 101 has only one first communication interface I2C, and the first communication interface I2C is connected to the first receiver 102, when the second receiver 103 needs to receive the parallel data, it needs to first send the data request to the first receiver 102 through the second communication interface GPOP1, and then the first receiver 102 forwards the data request to the data processing module 101, so that the data processing module 101 knows that it needs to send the parallel data to the second receiver 103.

[0088] In one possible implementation, see [link to relevant documentation]. Figure 4 The data processing module 101 includes multiple first communication interfaces (I2C), which are respectively connected to the first receiver 102 and each second receiver 103, and the status indicator pin (MFP) is connected to each second receiver 103.

[0089] The first receiver 102 is configured to send a second control command to the data processing module 101 via the first communication interface I2C when the first receiver 102 needs to receive the parallel data.

[0090] The second receiver 103 is configured to: when the second receiver 103 needs to receive the parallel data and the first receiver 102 is currently receiving the parallel data, if the synchronization signal meets the preset conditions, determine that the parallel data is in the blanking period, and send the first control command to the first communication interface I2C.

[0091] Optionally, the second control instruction may be an instruction for controlling the data processing module 101 to output the parallel data to the first receiver 102. The second control instruction may also be used to indicate any possible parameters such as the data content, data format, and start and end times of the parallel data required by the first receiver 102. Generally, if the data processing module 101 does not receive the second control instruction, it will not send the parallel data to the first receiver 102. This application embodiment does not limit this aspect.

[0092] Normally, after the system 100 and the first receiver 102 are successfully started, the first receiver 102 needs to start receiving the parallel data. At this time, the second receiver 103 is generally not started yet. Therefore, after the data processing module 101 receives the second control command, it can directly transmit the parallel data to the first receiver 102 through the first output interface PHY1 without determining the blanking period.

[0093] Optionally, a second communication interface GPIO1 may be provided between the first receiver 102 and the second receiver 103, or the second communication interface GPIO1 may not be provided. This application embodiment does not limit this.

[0094] Optionally, the preset condition can be set by relevant technical personnel according to actual needs. For example, when the synchronization signal is the aforementioned VS signal, HS signal, or DE signal, the preset condition can be that the synchronization signal is low or has a falling edge. This application embodiment does not limit this.

[0095] Optionally, the first receiver 102 can be connected to the status indication pin MFP via the identification pin INT. For details, please refer to the description of the above embodiments; this application will not repeat those details.

[0096] Alternatively, the second receiver 103 can also be connected to the status indication pin MFP via the identification pin INT. Furthermore, the identification pin INT in the second receiver 103 can perform a similar function to the identification pin INT of the first receiver 102. For details, please refer to the description of the above embodiments; this application will not repeat those details.

[0097] It is important to understand that, in Figure 4In the system 100 shown, because the data processing module 101 has multiple first communication interfaces I2C, and the first communication interfaces I2C are respectively connected to the first receiver 102 and each of the second receivers 103, when the second receiver 103 needs to receive the parallel data, the second receiver 103 can directly send the first control command to the data processing module 101, so that the data processing module 101 can send the parallel data to the second receiver 103 during the blanking period of the parallel data.

[0098] As can be seen from the two embodiments above, the embodiments of this application can implement the function of ensuring that the data processing module 101 starts sending the parallel data to the second receiver 103 only when the parallel data is in the blanking period through different architectures, which has high flexibility.

[0099] In one possible implementation, the receiver connected to the status indicator pin MFP is further configured to determine that the parallel data is in the blanking period in response to an edge change in the synchronization signal and the edge change meeting a preset condition.

[0100] Optionally, the preset condition can be set by relevant technical personnel according to actual needs. For example, when the synchronization signal is the aforementioned VS signal, HS signal, or DE signal, the preset condition can be that the synchronization signal has a falling edge.

[0101] Optionally, the synchronization signal edge change can be detected by the identification pin INT in the receiver connected to the status indication pin MFP. This application does not limit this approach.

[0102] In one possible implementation, the receiver connected to the status indicator pin MFP is further configured to determine that the parallel data is in the blanking period in response to the level of the synchronization signal being a preset level indicated by the preset condition.

[0103] Optionally, the preset level can be set by relevant technical personnel according to actual needs. For example, when the synchronization signal is the aforementioned VS signal, HS signal, or DE signal, the preset level can be low.

[0104] Optionally, the level of the synchronization signal can be detected by an identification pin INT set in a receiver connected to the status indication pin MFP. This application does not limit this aspect.

[0105] Understandably, the receiver connected to the status indicator pin MFP can detect the blanking period not only by interrupt detection but also by polling to read the level, which offers high flexibility.

[0106] In one possible implementation, see [link to relevant documentation]. Figure 5The data processing module 101 includes a serializer 1011 and a deserializer 1012.

[0107] The input terminal of the serializer 1011 is used to connect to the acquisition device. The output terminal of the serializer 1011 is connected to the input terminal of the deserializer 1012. The first output interface of the deserializer 1012 is connected to the first receiver 102. Each of the second output interfaces of the deserializer 1012 is connected to each of the second receivers 103. The status indicator pin of the deserializer 1012 is connected to the first receiver 102 and / or the second receiver 103. The first communication interface of the deserializer 1012 is connected to the first receiver 102 and / or the second receiver 103.

[0108] The acquisition device is used to acquire the raw data and send the raw data to the serializer 1011.

[0109] The serializer 1011 is used to convert the received raw data into serial data and send the serial data to the deserializer 1012.

[0110] The deserializer 1012 is used to convert the received serial data into parallel data and send the parallel data to the first receiver 102 and / or the second receiver 103.

[0111] It is worth noting that, since the first receiver 102 and / or the second receiver 103 are generally on the SOC of electronic devices (vehicles), the acquisition device (camera, sensor, etc.) may be several meters away from the SOC. If parallel data is used to transmit between the acquisition device and the SOC, signal crosstalk may occur, resulting in a low signal-to-noise ratio. Therefore, a serializer 1011 is set in the data processing module 101 to convert the raw data into serial data suitable for long-distance transmission.

[0112] However, the core units inside the SOC, such as the image processor, display controller, and video codec, are all designed based on parallel buses and can generally only recognize parallel data. Moreover, the SOC needs to acquire multiple bits of data for processing within one clock cycle. If the SOC directly processes high-speed serial data, it would need to significantly increase the operating frequency of the SOC, which would result in high power consumption and processing pressure. Therefore, a deserializer 1012 is set in the data processing module 101 to convert the serial data output by the serializer 1011 into parallel data and send it to the first receiver 102 and / or the second receiver 103 in the subsequent stage.

[0113] As can be seen from the above, the present application's solution, by setting the serializer 1011 to convert the raw data into serial data, can reduce interference in data transmission between the sampling device and the data processing module 101; by setting the deserializer 1012 to convert the serial data into parallel data, it can ensure that the first receiver 102 and the second receiver 103 can correctly identify and process the parallel data, while also increasing bandwidth. Thus, data transmission performance can be improved.

[0114] Based on the foregoing embodiments, this application provides a data transmission method that can be applied to the data transmission system provided in any of the above embodiments. Each step of the method can be executed by the data processing module 101, the first receiver 102, and each of the second receivers 103 in the system. Specific adjustments can be made according to actual needs, and this application does not limit this.

[0115] See Figure 6 The method may include: Step 2001: In response to any second receiver needing to receive parallel data sent by the data processing module and the first receiver being receiving the parallel data, detect whether the parallel data is in the blanking period.

[0116] Optionally, the blanking period refers to the vertical blanking period or the horizontal blanking period. When the parallel data is in the blanking period, there is no valid data in the parallel data.

[0117] Optionally, the parallel data may be identified or detected in any possible way, such as by periodically detecting the level of the signal that changes synchronously with the blanking period, detecting the edge of the signal that changes synchronously with the blanking period, or any other possible way. This application embodiment does not limit this.

[0118] Optionally, the first receiver may be the first receiver 102 in the system 100 described above, and the second receiver may be the second receiver 103 in the system 100 described above.

[0119] Step 2002: If so, output the parallel data to the second receiver.

[0120] Optionally, the parallel data can be output to the second receiver via the second output interface PHY2 in the system 100 described above. Specifically, the parallel data can also be output to the second receiver upon receiving the first control command described above, but this embodiment of the application does not limit this.

[0121] Step 2003: If not, wait for the parallel data to be in the blanking period before outputting the parallel data to the second receiver.

[0122] Understandably, the data processing module 101 will not start sending the parallel data to the second receiver 103 when the parallel data is in the valid data period, thus avoiding the problem that the PLL will relock during the valid data period of the parallel data, causing the first output interface PHY1 to fall back to the LP state when transmitting valid data.

[0123] This ensures that the first receiver does not experience any abnormalities such as fragmented or abnormal frames, thereby improving the stability of data transmission.

[0124] One possible implementation involves detecting whether the parallel data is in the blanking period, including: Determine whether the synchronization signal output by the data processing module meets the preset conditions.

[0125] If so, then the parallel data is determined to be in the blanking period.

[0126] Optionally, the level of the synchronization signal is used to indicate whether the parallel data is in the valid data period or the blanking period.

[0127] Optionally, the preset condition can be set by relevant technical personnel according to actual needs. For example, when the synchronization signal is the aforementioned VS signal, HS signal, or DE signal, the preset condition can be that the synchronization signal is low or has a falling edge. This application embodiment does not limit this.

[0128] In this way, it can be accurately determined whether the parallel data is in the blanking period, thereby ensuring that the parallel data will only be output to the second receiver 103 when the parallel data is in the blanking period.

[0129] It is understood that the data transmission method and the data transmission system 100 provided in this application belong to the same inventive concept. The data transmission method may also include any other possible steps to control the data transmission system 100 to achieve any possible function and to achieve the corresponding technical effect. For technical details not disclosed in the method embodiments, please refer to the various embodiments of the system 100 described above. The embodiments of this application will not be described in detail here.

[0130] It should be understood that although the steps in the above flowcharts are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the above flowcharts may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0131] Based on the foregoing embodiments, this application provides a data transmission device, which includes the included modules and the units included in each module, which can be implemented by a processor; of course, it can also be implemented by specific logic circuits; in the implementation process, the processor can be a central processing unit (CPU), microprocessor (MPU), digital signal processor (DSP) or field programmable gate array (FPGA), etc.

[0132] This application provides a data transmission device, which includes: The detection module is used to detect whether the parallel data is in the blanking period in response to any second receiver needing to receive parallel data sent by the data processing module and the first receiver being receiving the parallel data.

[0133] The output module is used to output the parallel data to the second receiver when the parallel data is in the blanking period.

[0134] The waiting module is used to wait for the parallel data to enter the blanking period if the parallel data is not in the blanking period before outputting the parallel data to the second receiver.

[0135] The descriptions of the above device embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0136] It should be noted that, in the embodiments of this application, if the above-described methods are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware and software combination.

[0137] This application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the method provided in the above embodiments.

[0138] This application provides a computer program product containing instructions that, when run on a computer, cause the computer to perform the steps in the method provided in the above-described method embodiments.

[0139] Those skilled in the art will understand that Figures 1-5 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0140] In one embodiment, the data transmission apparatus provided in this application can be implemented as a computer program, which can run on any possible computer device. The memory of the computer device can store the various program modules that make up the apparatus. The computer program, composed of the various program modules, causes the processor to execute the steps of the methods in the various embodiments of this application described in this specification.

[0141] It should be noted that the descriptions of the storage media and product embodiments above are similar to the descriptions of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage media, storage media, and device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0142] It should be understood that the phrases "one embodiment," "an embodiment," or "some embodiments" mentioned throughout the specification mean that a specific feature, structure, or characteristic related to an embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment," "in one embodiment," or "in some embodiments" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely for descriptive purposes and do not represent the superiority or inferiority of the embodiments. The descriptions of the various embodiments above tend to emphasize the differences between the various embodiments; their similarities or commonalities can be referred to mutually, and for the sake of brevity, they will not be repeated here.

[0143] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three kinds of relationships. For example, object A and / or object B can represent three situations: object A exists alone, object A and object B exist simultaneously, and object B exists alone.

[0144] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0145] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The embodiments described above are merely illustrative. For example, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple modules or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or modules can be electrical, mechanical, or other forms.

[0146] The modules described above as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules. They may be located in one place or distributed across multiple network units. Some or all of the modules may be selected to achieve the purpose of this embodiment according to actual needs.

[0147] In addition, each functional module in the various embodiments of this application can be integrated into one processing unit, or each module can be a separate unit, or two or more modules can be integrated into one unit; the integrated modules can be implemented in hardware or in the form of hardware plus software functional units.

[0148] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0149] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0150] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.

[0151] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.

[0152] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.

[0153] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0154] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A data transmission system, characterized in that, The data transmission system, applicable to electronic devices, includes a data processing module, a first receiver, and at least one second receiver. The data processing module is used to convert the acquired raw data into parallel data; and the data processing module includes a first output interface and at least one second output interface. The first receiver is connected to the first output interface, and the second receiver is connected to a corresponding second output interface. The first receiver and the second receiver are used to receive the parallel data. The data processing module is configured to: when sending the parallel data to the first receiver through the first output interface, and when it is necessary to send the parallel data to the second receiver, in response to the parallel data being in the blanking period, start sending the parallel data to the second receiver through the second output interface.

2. The data transmission system as described in claim 1, characterized in that, The data processing module further includes: a status indicator pin and a first communication interface; The status indicator pin is connected to the first receiver and / or the second receiver, and the first communication interface is connected to the first receiver and / or the second receiver; The status indicator pin is used to output a synchronization signal, and the level of the synchronization signal is used to indicate whether the parallel data is in the valid data period or the blanking period. The receiver connected to the status indicator pin is configured to: when it is necessary to send the parallel data to the second receiver during the process of sending the parallel data to the first receiver through the first output interface, determine whether the parallel data is in the blanking period based on the received synchronization signal, and send a first control command to the first communication interface when the parallel data is in the blanking period; The data processing module is configured to, upon receiving the first control command, begin sending the parallel data to the second receiver through the second output interface.

3. The data transmission system as described in claim 2, characterized in that, The status indicator pin and the first communication interface are both connected to the first receiver, and a second communication interface is also provided between the first receiver and the second receiver; The second receiver is configured to send a data request to the first receiver through the second communication interface when the second receiver needs to receive the parallel data. The first receiver is configured to: upon receiving the data request and while the first receiver is currently receiving the parallel data, if the synchronization signal meets a preset condition, determine that the parallel data is in the blanking period and send the first control command to the first communication interface.

4. The data transmission system as described in claim 2, characterized in that, The first communication interface is connected to the first receiver and each of the second receivers respectively, and the status indicator pin is connected to each of the second receivers; The first receiver is configured to send a second control command to the data processing module through the first communication interface when the first receiver needs to receive the parallel data. The second receiver is configured to: when the second receiver needs to receive the parallel data and the first receiver is currently receiving the parallel data, if the synchronization signal meets a preset condition, determine that the parallel data is in the blanking period, and send the first control command to the first communication interface.

5. The data transmission system as described in claim 2, characterized in that, The synchronization signal includes at least one of the following: vertical synchronization signal, data enable signal, and line synchronization signal.

6. The data transmission system as described in claim 2, characterized in that, The receiver connected to the status indicator pin is further configured to: determine that the parallel data is in the blanking period in response to an edge change in the synchronization signal and the edge change satisfying a preset condition; Alternatively, in response to the level of the synchronization signal being a preset level indicated by the preset condition, it is determined that the parallel data is in the blanking period.

7. The data transmission system according to any one of claims 1-6, characterized in that, The data processing module includes: a serializer and a deserializer; The input terminal of the serializer is used to connect to the acquisition device, the output terminal of the serializer is connected to the input terminal of the deserializer, the first output interface of the deserializer is connected to the first receiver, each of the second output interfaces of the deserializer is connected to each of the second receivers, the status indicator pin of the deserializer is connected to the first receiver and / or the second receiver, and the first communication interface of the deserializer is connected to the first receiver and / or the second receiver. The acquisition device is used to acquire the raw data and send the raw data to the serializer; The serializer is used to convert the received raw data into serial data and send the serial data to the deserializer; The deserializer is used to convert the received serial data into parallel data and send the parallel data to the first receiver and / or the second receiver.

8. An electronic device, characterized in that, The electronic device includes at least the data transmission system described in any one of claims 1 to 7.

9. A data transmission method, characterized in that, The method is applied to the data transmission system according to any one of claims 1 to 7, the data transmission system comprising a data processing module, a first receiver, and at least one second receiver; the method comprises: In response to any second receiver needing to receive parallel data sent by the data processing module and the first receiver being receiving the parallel data, it is detected whether the parallel data is in the blanking period; If so, the parallel data is output to the second receiver; If not, wait until the parallel data is in the blanking period before outputting the parallel data to the second receiver.

10. The data transmission method as described in claim 9, characterized in that, The detection of whether the parallel data is in the blanking period includes: Determine whether the synchronization signal output by the data processing module meets the preset conditions. The level of the synchronization signal is used to indicate whether the parallel data is in the valid data period or the blanking period. If so, then the parallel data is determined to be in the blanking period.

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