Package structure and method of forming the same

By forming a heat dissipation functional layer and a ceramic solder resist layer on the back of the semiconductor chip, the problem of uneven solder layer thickness is solved, the welding quality and heat dissipation efficiency are improved, and better heat conduction is achieved.

CN122318878APending Publication Date: 2026-06-30CHANGDIAN TECHNOLOGY (JIANGYIN) CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
CHANGDIAN TECHNOLOGY (JIANGYIN) CO LTD
Filing Date
2026-03-11
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

In existing semiconductor chip packaging, uneven solder layer thickness leads to low heat dissipation efficiency, affecting soldering quality and heat dissipation performance.

Method used

A heat dissipation functional layer is formed on the back of the semiconductor chip, and a ceramic solder resist layer is formed on its top surface. Discrete openings are made in the ceramic solder resist layer, and solder balls are formed in the openings to prevent bridging, compensate for the solder balls and solder to the second substrate, and ensure the uniformity of the solder layer thickness.

Benefits of technology

By designing a ceramic solder resist layer, solder ball bridging is prevented, ensuring uniform solder layer thickness, improving welding quality and heat dissipation performance, and enhancing heat conduction efficiency.

✦ Generated by Eureka AI based on patent content.

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  • Figure CN122318878A_ABST
    Figure CN122318878A_ABST
Patent Text Reader

Abstract

This application discloses a packaging structure and its forming method. The forming method includes: providing an initial packaging structure, including a first substrate, a first semiconductor chip, a first molding compound layer, and a first solder bump. The first semiconductor chip is flip-mounted onto a first surface of the first substrate, and the first solder bump is located on one side of the first semiconductor chip. The first molding compound layer covers the first semiconductor chip and the first solder bump, exposing the back surface of the first semiconductor chip and the top surface of the first solder bump. A heat dissipation functional layer is formed on the back surface of the first semiconductor chip. A ceramic solder resist layer is formed on the top surface of the heat dissipation functional layer, and the ceramic solder resist layer has multiple discrete openings. Solder balls are formed in the openings. Compensation solder balls are formed on the top surface of the first solder bump. A second substrate is provided, and the second substrate has a heat dissipation metal block. The second substrate is mounted on the initial packaging structure, such that the heat dissipation metal block is soldered to the heat dissipation functional layer. This avoids solder ball bridging and improves heat dissipation efficiency.
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