A switch model simulation acceleration method based on FPGA and a related device

Abstract

This invention discloses an FPGA-based method and apparatus for accelerating the simulation of a two-resistance switch model. For a two-resistance switch model in electromagnetic transient simulation, the impedance matrix is ​​categorized based on cooperative action rules. All possible switch state combinations are traversed, and the cooperative action combinations that actually occur in the simulation are selected. Only for these valid combinations, the corresponding impedance matrix is ​​pre-solved by the CPU to obtain the target impedance matrix. A mapping relationship is established between the target impedance matrix and the cooperative action combinations that actually occur in the simulation, forming an action impedance matrix mapping table for storage. This reduces the number of impedance matrices from the source, thus solving the memory occupation problem caused by impedance matrix redundancy in the binary switch model. It also solves the technical problem that existing methods for accelerating electromagnetic transient simulation of two-resistance switch models struggle to address impedance matrix redundancy, memory resource consumption, and adaptability to complex multi-switch systems.

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