A method and system for regulating voltage of a vehicle-mounted direct-current power supply based on multi-stage conversion

Abstract

This application provides a method and system for voltage regulation control of an on-board DC power supply based on multi-stage converters, relating to the field of power supply voltage regulation control technology. The method involves extracting disturbance characteristics of the input voltage of the front-stage converter; determining the feedforward compensation amount of the outer loop of the subsequent converter voltage; determining the voltage regulation control command of the subsequent converter based on the feedforward compensation amount and the reference command of the subsequent converter voltage outer loop; synchronizing the start time of the carrier cycle of the front-stage converter with the start time of the carrier cycle of the subsequent converter to obtain a cooperative switching cycle of the shared carrier synchronization signal between the front-stage and subsequent converters; updating the duty cycle of the switching transistors of the subsequent converter during the cooperative switching cycle; and feeding back the real-time voltage of the intermediate DC bus under voltage tracking state to the control loop of the front-stage converter. This application can realize synchronous voltage regulation of multi-stage DC converter circuits under dynamic operating conditions, thereby improving the transient stability capability of the on-board DC bus.

Description

Technical Field

[0001] This application relates to the field of power supply voltage regulation and control technology, and more specifically, to a method and system for regulating and controlling an on-board DC power supply based on multi-stage conversion. Background Technology

[0002] Power supply voltage regulation and control technology is an important control technology in the field of power management used to maintain stable output voltage. It is widely used in scenarios such as automotive electronics, power conversion, energy storage power supply and intelligent control equipment. For automotive DC power supply systems, power supply voltage regulation and control technology can dynamically adjust the DC bus voltage when the input voltage fluctuates, the load power changes and the operating conditions switch, so that the domain controller, vehicle sensors, communication modules and other low-voltage power units can obtain stable and reliable power supply support, thereby improving the continuous operation capability and power supply safety of the vehicle electronic system.

[0003] In existing technologies, vehicle-mounted DC power supply systems typically employ multi-stage DC-DC converter circuits to achieve wide-range input adaptation and refined voltage regulation output. Each converter stage is configured with an independent controller, performing PWM modulation and feedback control according to its own control cycle, loop bandwidth, and compensation parameters. However, when the vehicle is under dynamic conditions such as rapid acceleration, instantaneous start-up of a high-power load, or regenerative braking, the input voltage is prone to rapid fluctuations. The response timing and compensation amplitude of the front and rear converters to the same disturbance are difficult to maintain consistency, leading to transient voltage drops, overshoot oscillations, or ripple accumulation on the intermediate DC bus. Simultaneously, voltage fluctuations on the output side of the front stage are transmitted along the cascade path to the subsequent voltage regulation module, causing a lag in the subsequent compensation process and affecting the stable operation of critical vehicle-mounted power units. Therefore, how to achieve synchronous voltage regulation of multi-stage DC-DC converter circuits under dynamic conditions, thereby improving the transient stability of the vehicle-mounted DC bus, has become a challenge for the industry. Summary of the Invention

[0004] This application provides a method and system for regulating the voltage of an on-board DC power supply based on multi-stage conversion, which can realize synchronous voltage regulation of multi-stage DC conversion circuits under dynamic operating conditions, thereby improving the transient stability capability of the on-board DC bus.

[0005] In a first aspect, this application provides a vehicle-mounted DC power supply voltage regulation and control method based on multi-stage conversion, the vehicle-mounted DC power supply voltage regulation and control method comprising the following steps:

[0006] The input voltage of the front-end converter is acquired in real time, and the disturbance characteristic of the input voltage is extracted based on the instantaneous change trend of the input voltage.

[0007] The disturbance characteristic quantity is transmitted to the front end of the control loop of the subsequent converter through the feedforward channel, and the feedforward compensation amount of the voltage outer loop of the subsequent converter is determined in combination with the voltage steady-state deviation of the intermediate DC bus.

[0008] Before the subsequent converter executes PWM modulation, the voltage regulation control command of the subsequent converter is determined based on the feedforward compensation amount and the reference command of the voltage outer loop of the subsequent converter.

[0009] Synchronize and align the start time of the carrier period of the front-stage converter with the start time of the carrier period of the rear-stage converter to obtain the coordinated switching period of the shared carrier synchronization signal of the front-stage converter and the rear-stage converter.

[0010] During the coordinated switching cycle, the duty cycle of the switching transistor of the subsequent converter is updated by the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter.

[0011] In this embodiment, extracting the disturbance characteristic of the input-side voltage based on the instantaneous change trend of the input-side voltage specifically includes:

[0012] The input voltage of the preceding converter is continuously sampled to obtain the time-series voltage sequence of the input voltage;

[0013] The instantaneous change trend of the input voltage is identified based on the voltage change direction and continuity characteristics of adjacent sampling points in the time-series voltage sequence;

[0014] Based on the instantaneous change trend, the voltage change segments with continuous unidirectional change characteristics in the input voltage are screened to obtain the feedforward disturbance trigger segment of the input voltage;

[0015] The disturbance characteristic quantity of the input side voltage is extracted based on the feedforward disturbance triggering segment.

[0016] In this embodiment, the disturbance characteristic quantity is transmitted to the front end of the control loop of the subsequent converter via the feedforward channel. The specific steps for determining the feedforward compensation amount of the outer voltage loop of the subsequent converter, combined with the steady-state voltage deviation of the intermediate DC bus, include:

[0017] Based on the disturbance characteristic, a feedforward disturbance quantity corresponding to the direction of the input voltage disturbance is generated, and the feedforward disturbance quantity is transmitted to the front end of the control loop of the subsequent converter through the feedforward channel to obtain the feedforward input quantity of the voltage outer loop of the subsequent converter.

[0018] Based on the feedforward input, the disturbance propagation phase and disturbance propagation intensity in the feedforward channel are fedforward to obtain the feedforward disturbance injection amount that is adapted to the front end of the control loop of the subsequent converter.

[0019] By constraining the feedforward disturbance injection amount by the steady-state voltage deviation of the intermediate DC bus, the deviation constraint characteristics of the voltage outer loop of the subsequent converter are obtained.

[0020] Based on the aforementioned deviation constraint characteristics, the compensation direction and compensation period of the voltage outer loop of the subsequent converter are matched to obtain the feedforward compensation amount of the voltage outer loop of the subsequent converter.

[0021] In this embodiment, the feedforward injection of disturbance propagation phase and disturbance propagation intensity in the feedforward channel based on the feedforward input amount to obtain the feedforward disturbance injection amount adapted to the front end of the subsequent converter control loop specifically includes:

[0022] Based on the feedforward input, the disturbance propagation phase in the feedforward channel is phase injected and located to obtain the disturbance phase injection position of the feedforward channel;

[0023] Based on the disturbance phase injection position, the disturbance propagation intensity in the feedforward channel is allocated by the injection intensity to obtain the disturbance intensity injection amount of the feedforward channel;

[0024] Based on the disturbance phase injection position and the disturbance intensity injection amount, a feedforward disturbance injection is performed on the front end of the control loop of the subsequent converter to obtain a feedforward disturbance injection amount adapted to the front end of the control loop of the subsequent converter.

[0025] In this embodiment, before the subsequent converter executes PWM modulation, determining the voltage regulation control command of the subsequent converter based on the feedforward compensation amount and the reference command of the subsequent converter's outer voltage loop specifically includes:

[0026] Before the subsequent converter performs PWM modulation, the reference command of the voltage outer loop of the subsequent converter is embedded with feedforward compensation according to the feedforward compensation amount to obtain the feedforward compensation embedding coefficient of the reference command before PWM modulation.

[0027] The modulation constraint command of the subsequent converter is determined by the feedforward compensation embedding coefficient and the duty cycle adjustment boundary before the subsequent converter performs PWM modulation.

[0028] Based on the modulation constraint instruction, the voltage regulation instruction is adapted to the PWM modulation input terminal of the subsequent converter to obtain the voltage regulation control instruction of the subsequent converter.

[0029] In this embodiment, before the subsequent converter performs PWM modulation, the reference command of the voltage outer loop of the subsequent converter is embedded with feedforward compensation based on the feedforward compensation amount. The feedforward compensation embedding coefficient of the reference command before PWM modulation specifically includes:

[0030] Before the subsequent converter performs PWM modulation, the embedding position of the reference command of the voltage outer loop of the subsequent converter is calibrated according to the feedforward compensation amount, so as to obtain the feedforward compensation embedding position of the reference command.

[0031] The reference command is embedded with a compensation amplitude according to the feedforward compensation embedding position to obtain the compensation embedding amount of the reference command before PWM modulation.

[0032] Based on the compensation embedding amount and the feedforward compensation embedding position, the pre-modulation embedding coefficients of the reference command are extracted to obtain the feedforward compensation embedding coefficients of the reference command before PWM modulation.

[0033] In this embodiment, the start time of the carrier period of the front-stage converter is synchronized with the start time of the carrier period of the rear-stage converter to obtain the cooperative switching period of the shared carrier synchronization signal of the front-stage converter and the rear-stage converter. Specifically, this includes:

[0034] Obtain the start time of the carrier period of the preceding converter and the start time of the carrier period of the following converter;

[0035] Based on the start time of the carrier period of the preceding converter and the start time of the carrier period of the following converter, the phase offset is identified to obtain the carrier phase offset.

[0036] The carrier phase offset is used to synchronously trigger the carrier trigger boundaries of the front-end converter and the back-end converter, thereby obtaining a carrier synchronization trigger window shared by the front-end converter and the back-end converter.

[0037] The carrier synchronization trigger window generates a shared carrier synchronization signal for the front-end converter and the back-end converter, and the cooperative switching period of the carrier synchronization signal is determined.

[0038] In this embodiment, the carrier phase offset is used to synchronize the carrier triggering boundaries of the front-stage converter and the rear-stage converter to obtain a shared carrier synchronization triggering window for the front-stage converter and the rear-stage converter. Specifically, this includes:

[0039] Based on the carrier phase offset, the carrier trigger boundaries of the front-end converter and the rear-end converter are located to obtain the carrier trigger offset boundaries of the front-end converter and the rear-end converter.

[0040] Based on the carrier trigger offset boundary, the carrier trigger times of the front-stage converter and the back-stage converter are synchronously triggered and arranged to obtain the carrier synchronization trigger times.

[0041] Based on the carrier synchronization trigger time, a synchronization window is defined for the carrier trigger intervals of the front-end converter and the back-end converter to obtain a carrier synchronization trigger window shared by the front-end converter and the back-end converter.

[0042] In this embodiment, during the coordinated switching cycle, the duty cycle of the switching transistor of the subsequent converter is updated by the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter. Specifically, this includes:

[0043] During the coordinated switching cycle, the duty cycle update time of the downstream converter switching transistor is periodically triggered and mapped according to the voltage regulation control command to obtain the duty cycle update trigger amount of the downstream converter switching transistor.

[0044] The duty cycle of the switching transistors in the subsequent converter is updated in a coordinated manner based on the duty cycle update trigger amount, and the coordinated duty cycle state of the switching transistors in the subsequent converter is obtained.

[0045] Based on the aforementioned coordinated duty cycle state, the voltage deviation state of the intermediate DC bus is regulated and tracked to obtain the voltage tracking state of the intermediate DC bus.

[0046] The real-time voltage of the intermediate DC bus under the voltage stabilization tracking state is acquired, and a real-time voltage feedback signal is generated based on the real-time voltage. The real-time voltage feedback signal is then transmitted to the control loop of the front-end converter, so that the front-end converter updates the input-side voltage disturbance response state based on the real-time voltage feedback signal.

[0047] Secondly, this application provides a multi-stage conversion-based vehicle DC power supply voltage regulation and control system for executing a multi-stage conversion-based vehicle DC power supply voltage regulation and control method, the vehicle DC power supply voltage regulation and control system comprising:

[0048] The front-end input disturbance feature extraction module is used to acquire the input-side voltage of the front-end converter in real time and extract the disturbance feature quantity of the input-side voltage based on the instantaneous change trend of the input-side voltage;

[0049] The feedforward compensation generation module is used to transmit the disturbance characteristic quantity to the front end of the control loop of the subsequent converter through the feedforward channel, and determine the feedforward compensation quantity of the voltage outer loop of the subsequent converter in combination with the voltage steady-state deviation of the intermediate DC bus.

[0050] The voltage regulation control command generation module is used to determine the voltage regulation control command of the subsequent converter based on the feedforward compensation amount and the reference command of the voltage outer loop of the subsequent converter before the subsequent converter performs PWM modulation.

[0051] The carrier synchronization coordination control module is used to synchronize and align the start time of the carrier period of the front-stage converter with the start time of the carrier period of the rear-stage converter, so as to obtain the coordinated switching period of the carrier synchronization signal shared by the front-stage converter and the rear-stage converter.

[0052] The downstream duty cycle update and upstream bus feedback module is used to update the duty cycle of the downstream converter switching transistors through the voltage regulation control command during the cooperative switching cycle, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and feeds back the real-time voltage of the intermediate DC bus in the voltage regulation tracking state to the control loop of the upstream converter.

[0053] The technical solutions provided by the embodiments disclosed in this application have the following beneficial effects:

[0054] The input voltage of the front-end converter is acquired in real time, and the disturbance characteristic of the input voltage is extracted based on the instantaneous change trend of the input voltage. The disturbance characteristic is transmitted to the front end of the control loop of the back-end converter through the feedforward channel, and the feedforward compensation amount of the voltage outer loop of the back-end converter is determined in combination with the steady-state voltage deviation of the intermediate DC bus. Before the back-end converter executes PWM modulation, the voltage regulation control command of the back-end converter is determined based on the feedforward compensation amount and the reference command of the voltage outer loop of the back-end converter. The start time of the carrier cycle of the front-end converter is synchronized with the start time of the carrier cycle of the back-end converter to obtain the cooperative switching cycle of the shared carrier synchronization signal of the front-end converter and the back-end converter. During the cooperative switching cycle, the duty cycle of the switching transistor of the back-end converter is updated through the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the front-end converter.

[0055] Therefore, in this application, the duty cycle of the switching transistor of the subsequent converter can be updated through the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter. Firstly, by real-time acquisition of the input voltage of the preceding converter and extraction of disturbance characteristics based on the instantaneous change trend of the input voltage, rapid fluctuations in the input voltage can be characterized in a timely manner under dynamic conditions such as rapid vehicle acceleration, instantaneous start-up of high-power loads, or regenerative braking, avoiding the lag in disturbance identification caused by relying solely on subsequent feedback control. Secondly, the disturbance characteristics are transmitted to the front end of the control loop of the subsequent converter via a feedforward channel, and the feedforward compensation amount of the voltage outer loop of the subsequent converter is determined in conjunction with the steady-state voltage deviation of the intermediate DC bus. This allows the subsequent voltage regulation module to obtain compensation basis before the output fluctuations of the preceding stage continue to propagate and cause significant bus deviation, thereby reducing the lag in the subsequent compensation process and lowering the risk of transient voltage drop and overshoot oscillation of the intermediate DC bus. Further... Before the subsequent converter executes PWM modulation, the voltage regulation control command is determined based on the feedforward compensation amount and the voltage outer loop reference command. The start time of the carrier cycle of the preceding converter is synchronized with the start time of the carrier cycle of the subsequent converter. This ensures that the voltage regulation compensation command and the modulation timing of the preceding and following stages remain consistent within the cooperative switching cycle, reducing response misalignment caused by differences in control cycles and loop bandwidth, and suppressing ripple accumulation during cascaded conversion. Finally, within the cooperative switching cycle, the duty cycle of the subsequent converter's switching transistor is updated through the voltage regulation control command, causing the intermediate DC bus voltage to enter a voltage regulation tracking state. The real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter. This allows the duty cycle adjustment result of the subsequent stage to have a reverse effect on the preceding stage control process, forming a cooperative voltage regulation mechanism that combines input disturbance feedforward, carrier cycle synchronization, and bus voltage feedback. This enhances the cooperative response capability of the multi-stage DC converter circuit to dynamic conditions such as rapid acceleration, load changes, and energy recovery, and improves the transient stability capability of the on-board DC bus.

[0056] In summary, the technical solution adopted in this application can realize synchronous voltage regulation of multi-stage DC-DC converter circuits under dynamic operating conditions, thereby improving the transient stability capability of the vehicle-mounted DC bus. Attached Figure Description

[0057] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only for this embodiment of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0058] Figure 1This is an exemplary flowchart of a vehicle-mounted DC power supply voltage regulation and control method based on multi-stage transformation provided in this application;

[0059] Figure 2 This is a principle block diagram of multi-stage conversion and voltage regulation control of vehicle DC power supply provided in this application;

[0060] Figure 3 This is a module structure diagram of an on-board DC power supply voltage regulation control system based on multi-stage conversion, provided in this application. Detailed Implementation

[0061] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0062] This application provides a method and system for regulating the voltage of an on-board DC power supply based on multi-stage conversion. The core of this method is to acquire the input voltage of the front-stage converter in real time, extract the disturbance characteristics of the input voltage based on its instantaneous change trend, transmit these disturbance characteristics to the front end of the control loop of the rear-stage converter via a feedforward channel, and determine the feedforward compensation amount for the outer loop of the rear-stage converter voltage based on the steady-state voltage deviation of the intermediate DC bus. Before the rear-stage converter executes PWM modulation, the voltage regulation control command of the rear-stage converter is determined based on the feedforward compensation amount and the reference command of the outer loop of the rear-stage converter voltage. The start time of the carrier cycle of the front-stage converter is synchronized with the start time of the carrier cycle of the rear-stage converter to obtain a cooperative switching cycle in which the front-stage and rear-stage converters share a carrier synchronization signal. During the cooperative switching cycle, the duty cycle of the switching transistors of the rear-stage converter is updated through the voltage regulation control command, causing the voltage of the intermediate DC bus to enter a voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the front-stage converter.

[0063] Example 1: To better understand the above technical solution, the following will provide a detailed description of the technical solution in conjunction with the accompanying drawings and specific implementation methods. (Refer to...) Figure 1 As shown in the figure, this is an exemplary flowchart of a vehicle-mounted DC power supply voltage regulation and control method based on multi-stage transformation according to this embodiment of the present application. The vehicle-mounted DC power supply voltage regulation and control method includes the following steps:

[0064] In step S1, the input voltage of the front-end converter is acquired in real time, and the disturbance characteristic of the input voltage is extracted based on the instantaneous change trend of the input voltage.

[0065] It should be noted that, in this application, the pre-converter refers to a power conversion unit located on the input power side of the vehicle DC power supply and used for pre-conversion and regulation of the input electrical energy; the input side voltage refers to the DC voltage received at the input terminal of the pre-converter during the operation of the vehicle DC power supply.

[0066] Additionally, it should be noted that the reference Figure 2 As shown, Figure 2 The principle block diagram of the multi-stage conversion and voltage regulation control of the vehicle DC power supply provided in this application is as follows: Figure 2 As shown, the vehicle-mounted high-voltage DC power supply is converted into power by the front-stage converter and then connected to the intermediate DC bus. The subsequent converter outputs stable DC power to the vehicle-mounted DC load. An input voltage sampling node is set on the input side of the front-stage converter to acquire the input voltage change and send it to the disturbance feature extraction stage to obtain the disturbance feature quantity reflecting the instantaneous change trend of the input voltage. The disturbance feature quantity is transmitted to the front end of the control loop of the subsequent converter through the feedforward channel and the compensation determination stage. Combined with the intermediate DC bus voltage change obtained by bus voltage sampling, a feedforward compensation quantity is generated. The voltage regulation control command generation stage outputs a voltage regulation control command based on the feedforward compensation quantity to drive the duty cycle update of the switching transistor of the subsequent converter. The carrier clock of the front-stage converter and the carrier clock of the subsequent converter are connected to the carrier synchronization alignment stage to generate a shared carrier synchronization signal, so that the front and rear converters operate synchronously within the cooperative switching cycle. The voltage regulation tracking and feedback stage feeds back the real-time voltage of the intermediate DC bus to the control loop of the front-stage converter, thus forming a voltage regulation control closed loop with the coordinated action of feedforward compensation, carrier synchronization and bus feedback.

[0067] In this embodiment, the disturbance characteristic of the input voltage can be extracted based on the instantaneous change trend of the input voltage using the following steps:

[0068] The input voltage of the preceding converter is continuously sampled to obtain the time-series voltage sequence of the input voltage;

[0069] The instantaneous change trend of the input voltage is identified based on the voltage change direction and continuity characteristics of adjacent sampling points in the time-series voltage sequence;

[0070] Based on the instantaneous change trend, the voltage change segments with continuous unidirectional change characteristics in the input voltage are screened to obtain the feedforward disturbance trigger segment of the input voltage;

[0071] The disturbance characteristic quantity of the input side voltage is extracted based on the feedforward disturbance triggering segment.

[0072] It should be noted that, in this application, the timing voltage sequence refers to a discrete data sequence used to record the instantaneous values ​​of the input voltage of the pre-amplifier in the order of sampling time; the voltage change direction refers to the positive or negative sign of the change in the input voltage value between adjacent sampling points; the change continuity characteristic refers to the characteristic that the change direction of the input voltage between adjacent sampling points remains consistent within multiple consecutive sampling intervals; the instantaneous change trend refers to the change trend of the input voltage of the pre-amplifier continuously increasing or decreasing in the same direction within a continuous sampling interval; the feedforward disturbance triggering segment refers to a continuous sampling interval in which the change direction of the input voltage remains consistent and the change amplitude exceeds the conventional ripple fluctuation range; and the disturbance characteristic quantity refers to the characteristic reflecting the direction and severity of the disturbance of the input voltage.

[0073] In specific implementation, firstly, the input voltage of the preceding converter is continuously sampled at a fixed sampling interval matching the switching frequency of the preceding converter. The instantaneous value of the input voltage obtained at each sampling moment is sequentially written into a circular buffer opened inside the controller according to the sampling time sequence. The discrete data sequence arranged in time sequence and with a length of a preset window in the circular buffer is used as the time-series voltage sequence of the input voltage. Secondly, a differential operation algorithm is used on the time-series voltage sequence to obtain the voltage difference between adjacent sampling points by subtracting the voltage values ​​of two adjacent sampling points in sequence. The sign of each voltage difference is extracted by a sign determination function (where a positive voltage difference is recorded as +1, a negative voltage difference as -1, and the absolute value of the voltage difference is less than 1). The preset noise threshold is set to 0. This preset noise threshold is based on half the peak-to-peak value of the input voltage ripple during steady-state operation of the preceding converter. The positive or negative sign of each adjacent sampling interval is used as the voltage change direction of the adjacent sampling point. Furthermore, a sliding window scanning method is applied to the voltage change directions arranged sequentially in the time-series voltage sequence. The window width is set to a preset continuous judgment length, and the window slides sequentially along the time-series direction. The number of sampling intervals with consistent voltage change direction signs within each window is counted. The ratio of the number of sampling intervals with consistent signs to the window width is used as the direction consistency ratio of that window. Windows with a direction consistency ratio not lower than a preset consistency threshold are marked as direction-consistent windows. The voltage within the direction-consistent window is... The sign of the change direction is used as a characteristic of the continuity of change, and the continuous increase or decrease of voltage corresponding to the continuous change characteristic is taken as the instantaneous change trend of the input voltage. Next, based on the instantaneous change trend, adjacent directional windows in the time-series voltage sequence are merged end-to-end along the time sequence direction. directional windows with the same change direction sign and continuous time sequence are merged into a continuous change segment. The cumulative change amplitude of the continuous change segment is obtained by subtracting the voltage value at the starting and ending sampling points of the continuous change segment. Continuous change segments whose absolute value of the cumulative change amplitude exceeds a preset disturbance amplitude threshold are designated as feedforward disturbance trigger segments for the input voltage. Finally, peak values ​​are applied to the feedforward disturbance trigger segments. The extraction method combines value detection and time stamping. By traversing the voltage values ​​of all sampling points within the feedforward disturbance triggering segment, the maximum and minimum voltage values ​​within that segment are found. The difference between the maximum and minimum values ​​is used as the disturbance amplitude, reflecting the severity of the disturbance. The start and end sampling times of the feedforward disturbance triggering segment are marked, and the time difference between the two times is used as the disturbance duration, reflecting the duration of the disturbance. Simultaneously, based on the voltage change direction sign corresponding to the feedforward disturbance triggering segment, the positive direction is marked as a boost disturbance, and the negative direction is marked as a buck disturbance, serving as a disturbance direction identifier. The feature data composed of the disturbance amplitude, the disturbance duration, and the disturbance direction identifier is used as the disturbance characteristic quantity of the input voltage of the front-end converter.

[0074] In step S2, the disturbance characteristic quantity is transmitted to the front end of the control loop of the subsequent converter through the feedforward channel, and the feedforward compensation amount of the voltage outer loop of the subsequent converter is determined in combination with the steady-state voltage deviation of the intermediate DC bus.

[0075] In this embodiment, the disturbance characteristic quantity is transmitted to the front end of the control loop of the subsequent converter via the feedforward channel. The feedforward compensation amount of the outer loop of the subsequent converter voltage is determined by combining the steady-state voltage deviation of the intermediate DC bus. This can be achieved by the following steps:

[0076] Based on the disturbance characteristic, a feedforward disturbance quantity corresponding to the direction of the input voltage disturbance is generated, and the feedforward disturbance quantity is transmitted to the front end of the control loop of the subsequent converter through the feedforward channel to obtain the feedforward input quantity of the voltage outer loop of the subsequent converter.

[0077] Based on the feedforward input, the disturbance propagation phase and disturbance propagation intensity in the feedforward channel are fedforward to obtain the feedforward disturbance injection amount that is adapted to the front end of the control loop of the subsequent converter.

[0078] By constraining the feedforward disturbance injection amount by the steady-state voltage deviation of the intermediate DC bus, the deviation constraint characteristics of the voltage outer loop of the subsequent converter are obtained.

[0079] Based on the aforementioned deviation constraint characteristics, the compensation direction and compensation period of the voltage outer loop of the subsequent converter are matched to obtain the feedforward compensation amount of the voltage outer loop of the subsequent converter.

[0080] It should be noted that, in this application, the feedforward disturbance amount refers to the value of the feedforward disturbance used to characterize the direction and strength of the input-side voltage disturbance; the feedforward input amount refers to the input amount that acts on the front end of the voltage outer loop of the subsequent converter after the feedforward disturbance is transmitted through the feedforward channel; the voltage steady-state deviation refers to the degree of deviation of the intermediate DC bus voltage from the steady-state target voltage; the deviation constraint feature refers to the feature reflecting the degree of limitation of the intermediate DC bus voltage steady-state deviation on the feedforward disturbance compensation effect; the compensation direction refers to the direction of the positive or negative compensation of the feedforward compensation amount on the voltage outer loop of the subsequent converter; the compensation period refers to the time range within which the feedforward compensation amount maintains an effective compensation effect in the voltage outer loop of the subsequent converter; and the feedforward compensation amount refers to the compensation amount used to offset the influence of the input-side voltage disturbance on the intermediate DC bus voltage in advance.

[0081] In specific implementation, firstly, the corresponding positive or negative sign is extracted based on the disturbance direction identifier in the disturbance characteristic quantity. The disturbance amplitude in the disturbance characteristic quantity is then multiplied by the positive or negative sign to obtain a signed voltage value. This signed voltage value is used as a feedforward disturbance quantity reflecting the direction and amplitude of the input-side voltage disturbance. The feedforward disturbance quantity is then sent to a pre-configured feedforward channel within the controller. The feedforward channel proportionally attenuates the feedforward disturbance quantity according to a preset proportional attenuation coefficient (wherein the proportional attenuation coefficient is set based on the ratio of the rated voltage on the input side of the preceding converter to the rated voltage of the intermediate DC bus), and the attenuated quantity reaches the subsequent converter. The instantaneous voltage value at the input terminal of the voltage outer loop adder node is used as the feedforward input of the voltage outer loop of the subsequent converter. Next, based on the feedforward input, the disturbance propagation phase and intensity in the feedforward channel are fed forward to obtain the feedforward disturbance injection amount adapted to the front end of the subsequent converter control loop. Then, a subtraction algorithm is used to subtract the intermediate DC bus voltage reference value from the sampled value of the intermediate DC bus voltage to obtain a difference. This difference is used as the steady-state voltage deviation of the intermediate DC bus. An amplitude limiter is then used to constrain the bus deviation of the feedforward disturbance injection amount. The upper and lower limits of the amplitude limiter are dynamically set based on the absolute value of the steady-state voltage deviation. The instantaneous value of the feedforward disturbance injection quantity after being constrained by the amplitude limiter is used as the compensation amplitude data. A constraint trigger flag is generated by comparing the relationship between the feedforward disturbance injection quantity and the upper and lower limit boundaries (wherein, the constraint trigger flag is set to 1 when the feedforward disturbance injection quantity exceeds the upper and lower limit boundaries, and set to 0 when it does not exceed them). The feature data formed by combining the compensation amplitude data and the constraint trigger flag is used as the deviation constraint feature of the voltage outer loop of the subsequent converter. Finally, a sign determination function is used to extract the positive and negative signs of the compensation amplitude data in the deviation constraint feature (wherein, the compensation amplitude data is recorded as positive compensation when it is greater than zero, and as negative compensation when it is less than zero). The positive or negative sign of the compensation is used as the compensation direction of the voltage outer loop of the subsequent converter. A time window truncation method is used to mark the start and end times of the continuous time interval where the constraint trigger flag is 1 in the deviation constraint feature. The moment when the constraint trigger flag first jumps from 0 to 1 is taken as the compensation start time, and the moment when the constraint trigger flag first returns from 1 to 0 is taken as the compensation end time. The time length between the compensation start time and the compensation end time is taken as the compensation period of the voltage outer loop of the subsequent converter. Furthermore, the feedforward compensation amount of the voltage outer loop of the subsequent converter can be calculated using the following formula: ,in, express The feedforward compensation amount of the outer loop voltage of the subsequent converter at a given time; express The steady-state voltage deviation of the intermediate DC bus at any given moment; express The absolute value of the steady-state voltage deviation at time t is used as the limiting boundary for the feedforward compensation amount; express The compensation magnitude data in the deviation constraint feature at the specified time; express The positive or negative sign of the compensation direction at any given time is used to represent positive or negative compensation; express The time period validity flag corresponding to the compensation period mentioned above, within the compensation period. Outside of the compensation period ; This indicates that the value within the parentheses is restricted to the lower limit. and upper limit Saturation constraint functions between; This represents the lower boundary of the saturation constraint function; This represents the upper bound of the saturation constraint function.

[0082] In this embodiment, the feedforward injection of disturbance propagation phase and disturbance propagation intensity in the feedforward channel based on the feedforward input amount can be achieved by the following steps:

[0083] Based on the feedforward input, the disturbance propagation phase in the feedforward channel is phase injected and located to obtain the disturbance phase injection position of the feedforward channel;

[0084] Based on the disturbance phase injection position, the disturbance propagation intensity in the feedforward channel is allocated by the injection intensity to obtain the disturbance intensity injection amount of the feedforward channel;

[0085] Based on the disturbance phase injection position and the disturbance intensity injection amount, a feedforward disturbance injection is performed on the front end of the control loop of the subsequent converter to obtain a feedforward disturbance injection amount adapted to the front end of the control loop of the subsequent converter.

[0086] It should be noted that, in this application, the disturbance phase injection position refers to the injection position where the feedforward disturbance completes phase adaptation in the feedforward channel and acts on the front end of the control loop of the subsequent converter; the disturbance intensity injection amount refers to the amplitude reflecting the strength of the effect of the feedforward disturbance on the control loop of the subsequent converter during the injection process; and the feedforward disturbance injection amount refers to the injection amount used to introduce the feedforward compensation effect of the input-side voltage disturbance into the front end of the control loop of the subsequent converter.

[0087] In specific implementation, firstly, a first-order lead compensation stage is used to inject and locate the disturbance propagation phase in the feedforward channel. The feedforward input is fed into the first-order lead compensation stage, and the lead time constant of the first-order lead compensation stage is set according to the relationship between the propagation delay of the feedforward input in the feedforward channel and the switching period of the outer loop of the subsequent converter voltage. The stage location value corresponding to the lead time constant is used as the disturbance phase injection position of the feedforward channel. Secondly, a proportional amplifier stage is used to allocate the injection intensity of the disturbance propagation intensity in the feedforward channel. The output terminal of the phase lead compensation stage corresponding to the disturbance phase injection position is connected to the input terminal of the proportional amplifier stage. The proportional coefficient of the proportional amplifier stage is based on the voltage magnitude ratio of the rated voltage on the input side of the preceding converter to the rated voltage of the intermediate DC bus, combined with the loop bandwidth of the outer loop of the subsequent converter voltage. The constraint synthesis setting involves multiplying the instantaneous voltage value of the feedforward input after passing through the phase lead compensation stage corresponding to the disturbance phase injection position with the proportional coefficient to obtain the amplitude adjustment value, which is then used as the disturbance intensity injection amount of the feedforward channel. Finally, the output terminal of the phase lead compensation stage corresponding to the disturbance phase injection position and the output terminal of the proportional amplification stage corresponding to the disturbance intensity injection amount are connected in series to the input terminal of the adder node of the voltage outer loop of the subsequent converter. This allows the feedforward input to sequentially pass through the phase lead compensation stage corresponding to the disturbance phase injection position to complete phase adaptation, and then through the amplitude amplification compensation stage corresponding to the disturbance intensity injection amount to complete amplitude adaptation before being injected into the adder node of the voltage outer loop of the subsequent converter. The instantaneous voltage value reaching the adder node of the voltage outer loop of the subsequent converter is used as the feedforward disturbance injection amount adapted to the front end of the control loop of the subsequent converter.

[0088] In step S3, before the subsequent converter performs PWM modulation, the voltage regulation control command of the subsequent converter is determined based on the feedforward compensation amount and the reference command of the voltage outer loop of the subsequent converter.

[0089] In this embodiment, before the subsequent converter executes PWM modulation, determining the voltage regulation control command of the subsequent converter based on the feedforward compensation amount and the reference command of the outer loop of the subsequent converter voltage can be achieved through the following steps:

[0090] Before the subsequent converter performs PWM modulation, the reference command of the voltage outer loop of the subsequent converter is embedded with feedforward compensation according to the feedforward compensation amount to obtain the feedforward compensation embedding coefficient of the reference command before PWM modulation.

[0091] The modulation constraint command of the subsequent converter is determined by the feedforward compensation embedding coefficient and the duty cycle adjustment boundary before the subsequent converter performs PWM modulation.

[0092] Based on the modulation constraint instruction, the voltage regulation instruction is adapted to the PWM modulation input terminal of the subsequent converter to obtain the voltage regulation control instruction of the subsequent converter.

[0093] It should be noted that, in this application, the duty cycle adjustment boundary refers to the boundary range within which the switching transistors of the subsequent converter are allowed to adjust the duty cycle within the safe operating range; the modulation constraint command refers to the constraint command used to limit excessive duty cycle changes during the PWM modulation process of the subsequent converter; the voltage regulation command adaptation refers to the command matching process that makes the modulation constraint command conform to the PWM modulation input requirements of the subsequent converter; and the voltage regulation control command refers to the control command used to drive the duty cycle adjustment of the subsequent converter and support the stability of the intermediate DC bus voltage.

[0094] In specific implementation, firstly, before the subsequent converter executes PWM modulation, the reference command of the voltage outer loop of the subsequent converter is embedded with feedforward compensation based on the feedforward compensation amount to obtain the feedforward compensation embedding coefficient of the reference command before PWM modulation; secondly, a preset duty cycle limiter is used to obtain the duty cycle adjustment boundary of the subsequent converter before PWM modulation. The upper and lower limits of the duty cycle limiter are set according to the safe operating area of ​​the switching transistors of the subsequent converter. Then, a multiplication algorithm is used to multiply the feedforward compensation embedding coefficient with the original voltage outer loop reference value to obtain the compensated reference voltage value. The compensated reference voltage value is then divided by the voltage sampling value of the input side of the subsequent converter to obtain the corresponding target duty cycle value. The target duty cycle value is constrained by the duty cycle limiter. Within the duty cycle adjustment boundary, a restricted duty cycle target value is output. This restricted duty cycle target value is packaged into a modulation command message, and the resulting modulation command message is used as the modulation constraint command for the subsequent converter. Finally, an instruction format adapter is used to adapt the modulation constraint command to the voltage regulation command at the PWM modulation input. The duty cycle target value in the modulation constraint command is format-converted according to the instruction format required by the PWM modulation input of the subsequent converter. The compensation activation flag is appended as an instruction enable bit to the front of the format-converted duty cycle target value. The control command formed by combining the instruction enable bit and the format-converted duty cycle target value, which can be directly received by the PWM modulation input of the subsequent converter, is used as the voltage regulation control command for the subsequent converter.

[0095] In this embodiment, before the subsequent converter performs PWM modulation, the reference command of the voltage outer loop of the subsequent converter is embedded with feedforward compensation based on the feedforward compensation amount. The feedforward compensation embedding coefficient of the reference command before PWM modulation can be obtained by the following steps:

[0096] Before the subsequent converter performs PWM modulation, the embedding position of the reference command of the voltage outer loop of the subsequent converter is calibrated according to the feedforward compensation amount, so as to obtain the feedforward compensation embedding position of the reference command.

[0097] The reference command is embedded with a compensation amplitude according to the feedforward compensation embedding position to obtain the compensation embedding amount of the reference command before PWM modulation.

[0098] Based on the compensation embedding amount and the feedforward compensation embedding position, the pre-modulation embedding coefficients of the reference command are extracted to obtain the feedforward compensation embedding coefficients of the reference command before PWM modulation.

[0099] It should be noted that, in this application, the reference instruction refers to the instruction used to characterize the target voltage control requirements of the voltage outer loop of the subsequent converter before PWM modulation; the feedforward compensation embedding position refers to the timing position in the reference instruction where the feedforward compensation amount plays a pre-modulation compensation role; the compensation embedding amount refers to the magnitude of the compensation superposition effect of the feedforward compensation amount on the reference instruction; and the feedforward compensation embedding coefficient refers to the proportional coefficient of the strength of the pre-modulation compensation effect of the feedforward compensation amount on the reference instruction.

[0100] In specific implementation, firstly, within the control cycle before the subsequent converter executes PWM modulation, a timing alignment method is used to align the non-zero start time of the feedforward compensation quantity with the control cycle timing of the voltage outer loop reference command. The position of the instant when the feedforward compensation quantity first takes a non-zero value on the reference command timing is used as the timing position parameter in the reference command timing that can accept the feedforward compensation quantity embedding operation. This timing position parameter is used as the feedforward compensation embedding position of the reference command. Secondly, an adder node is used to embed the compensation amplitude of the reference command. The first input terminal of the adder node is connected to the original voltage value of the reference command at the feedforward compensation embedding position, and the second input terminal of the adder node is connected to the instantaneous voltage value of the feedforward compensation quantity at the feedforward compensation embedding position. The two paths are completed through the adder node. The synchronous summation operation outputs the embedded composite voltage value. The difference between the composite voltage value and the original voltage value of the reference command at the feedforward compensation embedding position is taken as the compensation amplitude value embedded by the reference command at the feedforward compensation embedding position. The compensation amplitude value is taken as the compensation embedding amount of the reference command before PWM modulation. Finally, the embedding coefficient of the reference command before modulation is extracted by the division algorithm. The compensation embedding amount is divided by the original voltage value of the reference command at the feedforward compensation embedding position to obtain a proportional value reflecting the degree of compensation embedding. The proportional value is added to the number 1 by the bias increment operation to obtain an embedding ratio coefficient that comprehensively reflects the ratio relationship between the embedded reference command and the original reference command. The embedding ratio coefficient is taken as the feedforward compensation embedding coefficient of the reference command before PWM modulation.

[0101] In step S4, the start time of the carrier period of the front-stage converter is synchronized with the start time of the carrier period of the rear-stage converter to obtain the coordinated switching period of the shared carrier synchronization signal of the front-stage converter and the rear-stage converter.

[0102] In this embodiment, synchronizing the start time of the carrier period of the front-stage converter with the start time of the carrier period of the rear-stage converter to obtain the coordinated switching period of the shared carrier synchronization signal between the front-stage and rear-stage converters can be achieved by the following steps:

[0103] Obtain the start time of the carrier period of the preceding converter and the start time of the carrier period of the following converter;

[0104] Based on the start time of the carrier period of the preceding converter and the start time of the carrier period of the following converter, the phase offset is identified to obtain the carrier phase offset.

[0105] The carrier phase offset is used to synchronously trigger the carrier trigger boundaries of the front-end converter and the back-end converter, thereby obtaining a carrier synchronization trigger window shared by the front-end converter and the back-end converter.

[0106] The carrier synchronization trigger window generates a shared carrier synchronization signal for the front-end converter and the back-end converter, and the cooperative switching period of the carrier synchronization signal is determined.

[0107] It should be noted that, in this application, the start time of the carrier period refers to the carrier start time when the pre-stage converter or the post-stage converter enters the current switching cycle; the start phase deviation state refers to the misalignment state of the carrier period of the pre-stage converter and the carrier period of the post-stage converter in the start timing; the carrier phase offset refers to the degree of phase misalignment between the carrier triggering timing of the pre-stage converter and the post-stage converter; the shared carrier synchronization signal refers to the synchronization signal used to unify the carrier triggering timing of the pre-stage converter and the post-stage converter; and the cooperative switching cycle refers to the switching cycle in which the pre-stage converter and the post-stage converter operate together under the action of the shared carrier synchronization signal.

[0108] In specific implementation, firstly, a pre-stage carrier counter and a post-stage carrier counter are configured separately, and the counting clocks of the two carrier counters are connected to the same system master clock. The carrier signal output by the pre-stage carrier counter is scanned using a zero-rising-edge detection method. The instantaneous count of the carrier signal output by the pre-stage carrier counter first crossing from zero to a positive value is taken as the start time of the pre-stage converter carrier cycle. The same zero-rising-edge detection method is used to scan the carrier signal output by the post-stage carrier counter, and the instantaneous count of the carrier signal output by the post-stage carrier counter first crossing from zero to a positive value is taken as the start time of the post-stage converter carrier cycle. Secondly, a subtraction algorithm is used to identify the phase offset between the start times of the pre-stage and post-stage converter carrier cycles. The count value corresponding to the start time of the pre-stage converter carrier cycle is subtracted from the count value corresponding to the start time of the post-stage converter carrier cycle to obtain a count difference reflecting the time difference between the two. This count difference is then divided by the total count of the complete pre-stage carrier cycle and multiplied by 360. A phase value reflecting the initial phase deviation of the carriers of the preceding and following stages is obtained, and this phase value is used as the carrier phase offset between the start times of the carrier cycles of the preceding and following stages. Next, the carrier trigger boundaries of the preceding and following stages are synchronously triggered using this carrier phase offset to obtain a shared carrier synchronization trigger window. Finally, a synchronization pulse generator outputs a high-level pulse signal with a fixed pulse width at the start time of the carrier synchronization trigger window, and this high-level pulse signal is simultaneously distributed to the input terminals of the switching transistor drive circuits of the preceding and following stages through the same trigger signal line. This high-level pulse signal is used as the shared carrier synchronization signal of the preceding and following stages. The rise time difference between two adjacent high-level pulses in the carrier synchronization signal is then measured using a period measurement method. This measured time difference is used as the switching cycle duration followed by both the preceding and following stages, and the switching cycle duration is used as the cooperative switching cycle of the carrier synchronization signal.

[0109] In this embodiment, the carrier triggering boundaries of the pre-stage converter and the post-stage converter are synchronized by the carrier phase offset to obtain a shared carrier synchronization triggering window for the pre-stage converter and the post-stage converter. This can be achieved by the following steps:

[0110] Based on the carrier phase offset, the carrier trigger boundaries of the front-end converter and the rear-end converter are located to obtain the carrier trigger offset boundaries of the front-end converter and the rear-end converter.

[0111] Based on the carrier trigger offset boundary, the carrier trigger times of the front-stage converter and the back-stage converter are synchronously triggered and arranged to obtain the carrier synchronization trigger times.

[0112] Based on the carrier synchronization trigger time, a synchronization window is defined for the carrier trigger intervals of the front-end converter and the back-end converter to obtain a carrier synchronization trigger window shared by the front-end converter and the back-end converter.

[0113] It should be noted that, in this application, the carrier trigger offset boundary refers to the boundary position used to correct the carrier trigger misalignment between the pre-stage converter and the post-stage converter; the carrier synchronization trigger time refers to the moment when the pre-stage converter and the post-stage converter jointly trigger the carrier synchronization action under the same timing reference; and the carrier synchronization trigger window refers to the time window during which the pre-stage converter and the post-stage converter can jointly receive the synchronization trigger signal and complete the synchronization trigger.

[0114] In specific implementation, firstly, the phase value corresponding to the carrier phase offset is converted into the number of counting cycles by inversely proportional to the ratio of the total number of complete counts of the preceding carrier to 360 degrees. Then, the offset object is selected according to the positive or negative direction of the carrier phase offset (wherein, when the carrier phase offset is positive, the trigger boundary of the subsequent carrier is selected as the offset object; when it is negative, the trigger boundary of the preceding carrier is selected as the offset object, to ensure that the offset direction always faces the side with phase lag). The original position parameter of the carrier trigger boundary of the offset object is added to the converted number of counting cycles through the carrier trigger boundary register to obtain an offset boundary position parameter. The offset boundary position parameters are used as the carrier trigger offset boundary of the offset object. Meanwhile, the carrier trigger boundary position parameters of another converter not selected as the offset object remain unchanged and are directly used as the carrier trigger offset boundary of that converter. Next, a boundary comparison method is used to compare the real-time count value output by the preceding stage carrier counter with the carrier trigger offset boundary of the preceding stage converter. When the real-time count value of the preceding stage carrier counter first reaches or crosses the preceding stage carrier trigger offset boundary, the system master clock count value at that moment is recorded as the preceding stage carrier trigger moment. The same boundary comparison method is then used to compare the real-time count value output by the following stage carrier counter. The value is compared with the carrier trigger offset boundary of the subsequent converter. When the real-time count value of the subsequent carrier counter first reaches or crosses the subsequent carrier trigger offset boundary, the system master clock count value at that moment is recorded as the subsequent carrier trigger moment. Since the preceding and following stage carrier trigger offset boundaries have been compensated by carrier phase offset, the preceding stage carrier trigger moment and the following stage carrier trigger moment fall into the same count value on the system master clock coordinate. The same system master clock count value corresponding to the preceding stage carrier trigger moment and the following stage carrier trigger moment is taken as the carrier synchronization trigger moment. Finally, the time interval truncation method is used to select the preceding stage carrier... The time axis overlap comparison is performed between the pre-stage carrier trigger interval corresponding to the trigger time and the post-stage carrier trigger interval corresponding to the trigger time. The continuous time interval that coincides on the system master clock coordinate is extracted. The start time of the continuous time interval is determined as the start point of the synchronization window and the end time of the continuous time interval is determined as the end point of the synchronization window (wherein, the length of the synchronization window is set according to the minimum synchronization response time required by the pre-stage and post-stage switching transistor drive circuits). The continuous time interval covered between the start point and the end point of the synchronization window is used as the carrier synchronization trigger window shared by the pre-stage converter and the post-stage converter.

[0115] In step S5, during the coordinated switching cycle, the duty cycle of the switching transistor of the subsequent converter is updated by the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter.

[0116] In this embodiment, during the coordinated switching cycle, the duty cycle of the switching transistor of the subsequent converter is updated by the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state. The real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter, which can be achieved by the following steps:

[0117] During the coordinated switching cycle, the duty cycle update time of the downstream converter switching transistor is periodically triggered and mapped according to the voltage regulation control command to obtain the duty cycle update trigger amount of the downstream converter switching transistor.

[0118] The duty cycle of the switching transistors in the subsequent converter is updated in a coordinated manner based on the duty cycle update trigger amount, and the coordinated duty cycle state of the switching transistors in the subsequent converter is obtained.

[0119] Based on the aforementioned coordinated duty cycle state, the voltage deviation state of the intermediate DC bus is regulated and tracked to obtain the voltage tracking state of the intermediate DC bus.

[0120] The real-time voltage of the intermediate DC bus under the voltage stabilization tracking state is acquired, and a real-time voltage feedback signal is generated based on the real-time voltage. The real-time voltage feedback signal is then transmitted to the control loop of the front-end converter, so that the front-end converter updates the input-side voltage disturbance response state based on the real-time voltage feedback signal.

[0121] It should be noted that, in this application, the duty cycle update trigger quantity refers to the trigger quantity used to trigger the duty cycle of the downstream converter switch to be updated within the cooperative switching cycle; the cooperative duty cycle state refers to the duty cycle operating state formed by the cooperation of the on-time and off-time of the downstream converter switch within the cooperative switching cycle; the voltage deviation state refers to the direction and degree of deviation of the intermediate DC bus voltage relative to the target voltage; the voltage stabilization tracking state refers to the intermediate DC bus voltage continuously following the target voltage and maintaining a stable operating state under closed-loop regulation; the real-time voltage feedback signal refers to the feedback signal used to feed back the real-time voltage change of the intermediate DC bus to the control loop of the upstream converter; and the input-side voltage disturbance response state refers to the operating state of the upstream converter after responding to and adjusting the input-side voltage disturbance according to the real-time voltage feedback of the intermediate DC bus.

[0122] In specific implementation, firstly, the start time of the cooperative switching cycle is aligned with the trigger time of the duty cycle update interrupt within the controller using a period alignment method. The system master clock count value corresponding to the start time of the cooperative switching cycle is written into the duty cycle update trigger register. The duty cycle target value in the voltage regulation control instruction is bound to the count value in the duty cycle update trigger register as a set of trigger parameters. The combined value of the duty cycle target value and the count value bound in the trigger parameters is used as the duty cycle update trigger amount for the subsequent converter switching transistor. Secondly, the duty cycle target value in the duty cycle update trigger amount is sent to the threshold input terminal of the PWM modulation comparator, and the carrier signal corresponding to the cooperative switching cycle is sent to the carrier input terminal of the PWM modulation comparator. The PWM modulation comparator outputs a high level when the carrier signal is less than the duty cycle target value to drive the subsequent switching transistor into the conduction state, and outputs a low level when the carrier signal is greater than the duty cycle target value to drive the subsequent switching transistor into the off state. The continuous time segment covered by the high level output of the PWM modulation comparator is used as... The on-time of the subsequent converter switch and the continuous time segment covered by the low-level output are defined as the off-time of the subsequent converter switch. The ratio of the on-time duration to the total duration of the cooperative switching cycle and the ratio of the off-time duration to the total duration of the cooperative switching cycle, which together represent the operating state parameters within the cooperative switching cycle, are defined as the cooperative duty cycle state of the subsequent converter switch. Next, a subtraction algorithm is used to subtract the target value of the intermediate DC bus voltage from the sampled value of the intermediate DC bus voltage to obtain a deviation value reflecting the direction and magnitude of the voltage deviation. This deviation value is defined as the voltage deviation state of the intermediate DC bus. A proportional-integral (PI) regulator is then used to perform closed-loop tracking adjustment on the voltage deviation state (wherein, the proportional coefficient of the PI regulator is set according to the outer loop bandwidth of the subsequent converter voltage). The adjustment amount output by the PI regulator is superimposed on the duty cycle target value corresponding to the cooperative duty cycle state to obtain the updated duty cycle target value. Specifically, the updated duty cycle target value can be expressed by the following formula: ,in, express The target duty cycle value updated in real time; express The target duty cycle value corresponding to the cooperative duty cycle state at the specified time; This refers to the proportional coefficient in a proportional-integral controller; express The voltage deviation of the intermediate DC bus at any given moment; This represents the integral coefficient in a proportional-integral controller; This indicates the starting time at which the proportional-integral regulator begins to integrally regulate the voltage deviation state; Represents the time variable in the integration process; express The voltage deviation of the intermediate DC bus at any given moment; This represents the derivative time during the integration process. Therefore, the proportional and integral adjustment values ​​corresponding to the voltage deviation state are superimposed on the target duty cycle value corresponding to the coordinated duty cycle state. This allows the duty cycle of the subsequent converter's switching transistors to be updated in a closed loop according to the intermediate DC bus voltage deviation state. The above subtraction operation and proportional-integral adjustment are cyclically executed until the absolute value of the voltage deviation state is continuously less than a preset stability threshold. The operating state where the intermediate DC bus voltage continuously follows the target value when the absolute value of the voltage deviation state is continuously less than the preset stability threshold is taken as the voltage regulation tracking state of the intermediate DC bus. Finally, a resistor-divided voltage sampling circuit connected in parallel between the positive and negative terminals of the intermediate DC bus attenuates the real-time voltage of the intermediate DC bus in the voltage regulation tracking state into a low-voltage sampling signal. This low-voltage sampling signal is then electrically isolated by an isolation operational amplifier before being sent to the analog-to-digital converter. Periodic analog-to-digital conversion is performed to obtain discrete voltage values ​​reflecting the real-time voltage of the intermediate DC bus. These discrete voltage values ​​are then converted back into a continuous voltage signal carrying real-time voltage information by an analog-to-digital converter inside the controller. This continuous voltage signal is used as a real-time voltage feedback signal and transmitted to the control loop input of the front-stage converter via a pre-deployed feedback communication line. The front-stage converter control loop updates the adjustment direction of the input-side voltage disturbance response based on the difference between the real-time voltage feedback signal and the target value of the intermediate DC bus voltage (wherein, a positive difference tightens the disturbance propagation strength of the front-stage feedforward channel to avoid overcompensation, and a negative difference relaxes the disturbance propagation strength of the front-stage feedforward channel to strengthen compensation). The disturbance response operating state of the front-stage converter after adjustment based on the real-time voltage feedback signal is taken as the input-side voltage disturbance response state.

[0123] Therefore, in this application, the duty cycle of the switching transistor of the subsequent converter can be updated through the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter. Firstly, by real-time acquisition of the input voltage of the preceding converter and extraction of disturbance characteristics based on the instantaneous change trend of the input voltage, rapid fluctuations in the input voltage can be characterized in a timely manner under dynamic conditions such as rapid vehicle acceleration, instantaneous start-up of high-power loads, or regenerative braking, avoiding the lag in disturbance identification caused by relying solely on subsequent feedback control. Secondly, the disturbance characteristics are transmitted to the front end of the control loop of the subsequent converter via a feedforward channel, and the feedforward compensation amount of the voltage outer loop of the subsequent converter is determined in conjunction with the steady-state voltage deviation of the intermediate DC bus. This allows the subsequent voltage regulation module to obtain compensation basis before the output fluctuations of the preceding stage continue to propagate and cause significant bus deviation, thereby reducing the lag in the subsequent compensation process and lowering the risk of transient voltage drop and overshoot oscillation of the intermediate DC bus. Further... Before the subsequent converter executes PWM modulation, the voltage regulation control command is determined based on the feedforward compensation amount and the voltage outer loop reference command. The start time of the carrier cycle of the preceding converter is synchronized with the start time of the carrier cycle of the subsequent converter. This ensures that the voltage regulation compensation command and the modulation timing of the preceding and following stages remain consistent within the cooperative switching cycle, reducing response misalignment caused by differences in control cycles and loop bandwidth, and suppressing ripple accumulation during cascaded conversion. Finally, within the cooperative switching cycle, the duty cycle of the subsequent converter's switching transistor is updated through the voltage regulation control command, causing the intermediate DC bus voltage to enter a voltage regulation tracking state. The real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter. This allows the duty cycle adjustment result of the subsequent stage to have a reverse effect on the preceding stage control process, forming a cooperative voltage regulation mechanism that combines input disturbance feedforward, carrier cycle synchronization, and bus voltage feedback. This enhances the cooperative response capability of the multi-stage DC converter circuit to dynamic conditions such as rapid acceleration, load changes, and energy recovery, and improves the transient stability capability of the on-board DC bus.

[0124] In summary, the technical solution adopted in this application can realize synchronous voltage regulation of multi-stage DC-DC converter circuits under dynamic operating conditions, thereby improving the transient stability capability of the vehicle-mounted DC bus.

[0125] Example 2: This application provides a vehicle-mounted DC power supply voltage regulation control system based on multi-stage conversion, referencing... Figure 3 As shown in the figure, this is a block structure diagram of a vehicle-mounted DC power supply voltage regulation control system based on multi-stage transformation according to this embodiment of the present application. The vehicle-mounted DC power supply voltage regulation control system includes:

[0126] The front-end input disturbance feature extraction module 100 is used to collect the input side voltage of the front-end converter in real time and extract the disturbance feature quantity of the input side voltage according to the instantaneous change trend of the input side voltage;

[0127] The feedforward compensation generation module 200 is used to transmit the disturbance characteristic quantity to the front end of the control loop of the subsequent converter through the feedforward channel, and determine the feedforward compensation quantity of the voltage outer loop of the subsequent converter by combining the voltage steady-state deviation of the intermediate DC bus.

[0128] The voltage regulation control command generation module 300 is used to determine the voltage regulation control command of the subsequent converter based on the feedforward compensation amount and the reference command of the voltage outer loop of the subsequent converter before the subsequent converter performs PWM modulation.

[0129] The carrier synchronization coordination control module 400 is used to synchronize and align the start time of the carrier period of the front-stage converter with the start time of the carrier period of the rear-stage converter to obtain the coordinated switching period of the carrier synchronization signal shared by the front-stage converter and the rear-stage converter.

[0130] The downstream duty cycle update and upstream bus feedback module 500 is used to update the duty cycle of the downstream converter switching transistor through the voltage regulation control command during the cooperative switching cycle, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and feeds back the real-time voltage of the intermediate DC bus in the voltage regulation tracking state to the control loop of the upstream converter.

[0131] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0132] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, including read-only memory (ROM), random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), one-time programmable read-only memory (OTPROM), electrically-Erasable Programmable Read-Only Memory (EEPROM), compactdisc read-only memory (CD-ROM) or other optical disc storage, disk storage, magnetic tape storage, or any other computer-readable medium capable of carrying or storing data.

[0133] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

Claims

1. A method for regulating a voltage of a vehicle-mounted direct current power supply based on a multi-stage conversion, characterized in that, The on-board DC power supply voltage regulation and control method includes the following steps: The input voltage of the front-end converter is acquired in real time, and the disturbance characteristic of the input voltage is extracted based on the instantaneous change trend of the input voltage. The disturbance characteristic quantity is transmitted to the front end of the control loop of the subsequent converter through the feedforward channel, and the feedforward compensation amount of the voltage outer loop of the subsequent converter is determined in combination with the voltage steady-state deviation of the intermediate DC bus. Before the subsequent converter executes PWM modulation, the voltage regulation control command of the subsequent converter is determined based on the feedforward compensation amount and the reference command of the voltage outer loop of the subsequent converter. Synchronize and align the start time of the carrier period of the front-stage converter with the start time of the carrier period of the rear-stage converter to obtain the coordinated switching period of the shared carrier synchronization signal of the front-stage converter and the rear-stage converter. During the coordinated switching cycle, the duty cycle of the switching transistor of the subsequent converter is updated by the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter.

2. The method according to claim 1, wherein Extracting the disturbance characteristic of the input voltage based on the instantaneous change trend of the input voltage specifically includes: The input voltage of the preceding converter is continuously sampled to obtain the time-series voltage sequence of the input voltage; The instantaneous change trend of the input voltage is identified based on the voltage change direction and continuity characteristics of adjacent sampling points in the time-series voltage sequence; Based on the instantaneous change trend, the voltage change segments with continuous unidirectional change characteristics in the input voltage are screened to obtain the feedforward disturbance trigger segment of the input voltage; The disturbance characteristic quantity of the input side voltage is extracted based on the feedforward disturbance triggering segment.

3. The method of claim 1, wherein the method comprises: The disturbance characteristic quantity is transmitted to the front end of the control loop of the subsequent converter via the feedforward channel. The feedforward compensation amount of the outer loop of the subsequent converter voltage is determined by combining the steady-state voltage deviation of the intermediate DC bus. Specifically, this includes: Based on the disturbance characteristic, a feedforward disturbance quantity corresponding to the direction of the input voltage disturbance is generated, and the feedforward disturbance quantity is transmitted to the front end of the control loop of the subsequent converter through the feedforward channel to obtain the feedforward input quantity of the voltage outer loop of the subsequent converter. Based on the feedforward input, the disturbance propagation phase and disturbance propagation intensity in the feedforward channel are fedforward to obtain the feedforward disturbance injection amount that is adapted to the front end of the control loop of the subsequent converter. By constraining the feedforward disturbance injection amount by the steady-state voltage deviation of the intermediate DC bus, the deviation constraint characteristics of the voltage outer loop of the subsequent converter are obtained. Based on the aforementioned deviation constraint characteristics, the compensation direction and compensation period of the voltage outer loop of the subsequent converter are matched to obtain the feedforward compensation amount of the voltage outer loop of the subsequent converter.

4. The on-board DC power supply voltage regulation and control method based on multi-stage conversion as described in claim 3, characterized in that, Based on the feedforward input, the disturbance propagation phase and disturbance propagation intensity in the feedforward channel are fedforwardly injected to obtain the feedforward disturbance injection amount adapted to the front end of the subsequent converter control loop. Specifically, this includes: Based on the feedforward input, the disturbance propagation phase in the feedforward channel is phase injected and located to obtain the disturbance phase injection position of the feedforward channel; Based on the disturbance phase injection position, the disturbance propagation intensity in the feedforward channel is allocated by the injection intensity to obtain the disturbance intensity injection amount of the feedforward channel; Based on the disturbance phase injection position and the disturbance intensity injection amount, a feedforward disturbance injection is performed on the front end of the control loop of the subsequent converter to obtain a feedforward disturbance injection amount adapted to the front end of the control loop of the subsequent converter.

5. The on-board DC power supply voltage regulation and control method based on multi-stage conversion as described in claim 1, characterized in that, Before the subsequent converter executes PWM modulation, the voltage regulation control command of the subsequent converter is determined based on the feedforward compensation amount and the reference command of the outer loop of the subsequent converter voltage. Specifically, this includes: Before the subsequent converter performs PWM modulation, the reference command of the voltage outer loop of the subsequent converter is embedded with feedforward compensation according to the feedforward compensation amount to obtain the feedforward compensation embedding coefficient of the reference command before PWM modulation. The modulation constraint command of the subsequent converter is determined by the feedforward compensation embedding coefficient and the duty cycle adjustment boundary before the subsequent converter performs PWM modulation. Based on the modulation constraint instruction, the voltage regulation instruction is adapted to the PWM modulation input terminal of the subsequent converter to obtain the voltage regulation control instruction of the subsequent converter.

6. The on-board DC power supply voltage regulation and control method based on multi-stage conversion as described in claim 5, characterized in that, Before the subsequent converter performs PWM modulation, the reference command of the voltage outer loop of the subsequent converter is embedded with feedforward compensation based on the feedforward compensation amount. The feedforward compensation embedding coefficients of the reference command before PWM modulation specifically include: Before the subsequent converter performs PWM modulation, the embedding position of the reference command of the voltage outer loop of the subsequent converter is calibrated according to the feedforward compensation amount, so as to obtain the feedforward compensation embedding position of the reference command. The reference command is embedded with a compensation amplitude according to the feedforward compensation embedding position to obtain the compensation embedding amount of the reference command before PWM modulation. Based on the compensation embedding amount and the feedforward compensation embedding position, the pre-modulation embedding coefficients of the reference command are extracted to obtain the feedforward compensation embedding coefficients of the reference command before PWM modulation.

7. The on-board DC power supply voltage regulation and control method based on multi-stage conversion as described in claim 1, characterized in that, Synchronize and align the start time of the carrier period of the front-stage converter with the start time of the carrier period of the rear-stage converter to obtain the coordinated switching period of the shared carrier synchronization signal for the front-stage and rear-stage converters. Specifically, this includes: Obtain the start time of the carrier period of the preceding converter and the start time of the carrier period of the following converter; Based on the start time of the carrier cycle of the preceding converter and the start time of the carrier cycle of the following converter, the phase offset is identified to obtain the carrier phase offset. The carrier phase offset is used to synchronously trigger the carrier trigger boundaries of the front-end converter and the back-end converter, thereby obtaining a carrier synchronization trigger window shared by the front-end converter and the back-end converter. The carrier synchronization trigger window generates a shared carrier synchronization signal for the front-end converter and the back-end converter, and the cooperative switching period of the carrier synchronization signal is determined.

8. The on-board DC power supply voltage regulation and control method based on multi-stage conversion as described in claim 7, characterized in that, Synchronizing the carrier trigger boundaries of the pre-stage converter and the post-stage converter using the carrier phase offset to obtain a shared carrier synchronization trigger window for the pre-stage converter and the post-stage converter specifically includes: Based on the carrier phase offset, the carrier trigger boundaries of the front-end converter and the rear-end converter are located to obtain the carrier trigger offset boundaries of the front-end converter and the rear-end converter. Based on the carrier trigger offset boundary, the carrier trigger times of the front-stage converter and the back-stage converter are synchronously triggered and arranged to obtain the carrier synchronization trigger times. Based on the carrier synchronization trigger time, a synchronization window is defined for the carrier trigger intervals of the front-end converter and the back-end converter to obtain a carrier synchronization trigger window shared by the front-end converter and the back-end converter.

9. The on-board DC power supply voltage regulation and control method based on multi-stage conversion as described in claim 1, characterized in that, During the coordinated switching cycle, the duty cycle of the switching transistor of the subsequent converter is updated through the voltage regulation control command, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and the real-time voltage of the intermediate DC bus in the voltage regulation tracking state is fed back to the control loop of the preceding converter. Specifically, this includes: During the coordinated switching cycle, the duty cycle update time of the downstream converter switching transistor is periodically triggered and mapped according to the voltage regulation control command to obtain the duty cycle update trigger amount of the downstream converter switching transistor. The duty cycle of the switching transistors in the subsequent converter is updated in a coordinated manner based on the duty cycle update trigger amount, and the coordinated duty cycle state of the switching transistors in the subsequent converter is obtained. Based on the aforementioned coordinated duty cycle state, the voltage deviation state of the intermediate DC bus is regulated and tracked to obtain the voltage tracking state of the intermediate DC bus. The real-time voltage of the intermediate DC bus under the voltage stabilization tracking state is acquired, and a real-time voltage feedback signal is generated based on the real-time voltage. The real-time voltage feedback signal is then transmitted to the control loop of the front-end converter, so that the front-end converter updates the input-side voltage disturbance response state based on the real-time voltage feedback signal.

10. A vehicle-mounted DC power supply voltage regulation control system based on multi-stage conversion, used to execute the vehicle-mounted DC power supply voltage regulation control method based on multi-stage conversion as described in any one of claims 1 to 9, characterized in that, The on-board DC power supply voltage regulation and control system includes: The front-end input disturbance feature extraction module is used to acquire the input-side voltage of the front-end converter in real time and extract the disturbance feature quantity of the input-side voltage based on the instantaneous change trend of the input-side voltage; The feedforward compensation generation module is used to transmit the disturbance characteristic quantity to the front end of the control loop of the subsequent converter through the feedforward channel, and determine the feedforward compensation quantity of the voltage outer loop of the subsequent converter in combination with the voltage steady-state deviation of the intermediate DC bus. The voltage regulation control command generation module is used to determine the voltage regulation control command of the subsequent converter based on the feedforward compensation amount and the reference command of the voltage outer loop of the subsequent converter before the subsequent converter performs PWM modulation. The carrier synchronization coordination control module is used to synchronize and align the start time of the carrier period of the front-stage converter with the start time of the carrier period of the rear-stage converter, so as to obtain the coordinated switching period of the carrier synchronization signal shared by the front-stage converter and the rear-stage converter. The downstream duty cycle update and upstream bus feedback module is used to update the duty cycle of the downstream converter switching transistors through the voltage regulation control command during the cooperative switching cycle, so that the voltage of the intermediate DC bus enters the voltage regulation tracking state, and feeds back the real-time voltage of the intermediate DC bus in the voltage regulation tracking state to the control loop of the upstream converter.

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