Method and apparatus for data rearrangement in block-based coding, electronic device and computer storage medium

Abstract

This invention provides a method, apparatus, electronic device, and computer storage medium for intra-block data rearrangement based on encoding and decoding, comprising: acquiring original data; processing the original data according to a first scan order to obtain and store first data; calculating the write address offset of the first data to obtain a target physical address; reading the first data according to the target physical address, and processing the read first data according to a second scan order to obtain second data. Obtaining the target physical address by calculating the write address offset not only eliminates the overhead of constructing and storing a sequential mapping table, improving system responsiveness and stability, but also ensures the efficiency of obtaining the target physical address, reduces latency and power consumption, and solves the problems of high hardware resource consumption, high latency, and high power consumption in existing intra-block data rearrangement methods.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a method and apparatus for intra-block data rearrangement based on encoding and decoding, an electronic device, and a computer storage medium. Background Technology

[0002] To improve image or video compression efficiency, existing codecs typically employ different intra-block scanning orders at different processing stages. For example, in the entropy coding / decoding stage, non-raster scanning orders such as wavefront scanning, zigzag scanning, or diagonal scanning are often used to utilize the correlation between adjacent coefficients or indices. However, in pixel reconstruction, prediction, or residual processing stages, data is usually required to be organized in raster scan order to match the image memory layout or data access patterns of subsequent modules. Therefore, a data rearrangement mechanism must be introduced to ensure that data corresponds across different processing stages.

[0003] Currently, data reordering mechanisms typically employ a "caching + mapping table" approach. This involves pre-calculating and storing a sequence mapping table based on the relationship between the scanning orders used in different processing stages. This table records the index of the data corresponding to each position in the scanning order of the previous processing stage within the scanning order of the next processing stage. Thus, upon receiving data from the previous processing stage, the position where the data for the next processing stage should be written can be determined by querying the sequence mapping table.

[0004] However, the existing "caching + mapping table" data rearrangement mechanism requires a lot of storage resources to store the sequential mapping table and related data. Moreover, in practical applications, the sequential mapping table needs to be regenerated or loaded before each encoding unit is processed, which leads to complex control logic and low throughput, resulting in high initialization latency. In addition, the sequential mapping table needs to be queried once for each data element, which causes the sequential mapping table to be read frequently, resulting in high power consumption. Summary of the Invention

[0005] The purpose of this invention is to provide a method, apparatus, electronic device, and computer storage medium for intra-block data rearrangement based on encoding and decoding, so as to solve the problems of high hardware resource consumption, high latency, and high power consumption in existing intra-block data rearrangement methods.

[0006] To address the aforementioned technical problems, this invention provides a method for intra-block data rearrangement based on encoding and decoding, comprising: Obtain the raw data; The raw data is processed according to the first scanning order to obtain and store the first data; Calculate the write address offset of the first data to obtain the target physical address; The first data is read according to the target physical address, and the read first data is processed according to the second scanning order to obtain the second data.

[0007] Optionally, in the aforementioned codec-based intra-block data rearrangement method, the method of processing the original data according to the first scan order to obtain and store the first data includes: The raw data is processed according to the first scanning order to obtain the first data; The first data is written into the cache in a linear order for storage.

[0008] Optionally, in the aforementioned codec-based intra-block data rearrangement method, before reading the first data according to the target physical address, the intra-block data rearrangement method further includes: The synchronization signal is used to check whether the first data to be processed according to the second scanning order is ready; If preparation is complete, the first data is read based on the target physical address.

[0009] Optionally, in the aforementioned codec-based intra-block data rearrangement method, the first scan order and the second scan order are different.

[0010] Optionally, in the aforementioned codec-based intra-block data rearrangement method, the write address offset is calculated within one clock cycle.

[0011] Optionally, in the aforementioned codec-based intra-block data rearrangement method, the method for calculating the write address offset of the first data to obtain the target physical address includes: Calculate the scan index of the first scan order corresponding to the second scan order; Calculate the scan offset using the scan index; Calculate the total length of historical scans using the scan index and scan offset; The target physical address is obtained based on the scan offset and the total length of the historical scan.

[0012] Optionally, in the aforementioned codec-based intra-block data rearrangement method, the method for calculating the scan index of the first scan order corresponding to the second scan order includes: Obtain the coordinates in the second scan sequence; Based on the pattern between the second and first scanning sequences, the scan index is calculated using the coordinates under the second scanning sequence.

[0013] Optionally, in the aforementioned codec-based intra-block data rearrangement method, the method for calculating the scan offset using the scan index includes: Calculate the largest column value or the smallest row value in the scanned index; The scan offset is calculated based on the coordinates in the second scan order and the largest column value or the smallest row value.

[0014] Optionally, in the aforementioned codec-based intra-block data rearrangement method, the method for calculating the total length of historical scans using the scan index includes: Based on the size of the coding block, the coding block is divided into rising area, equal value area and falling area; If the current scan index is 0, then the total length of the historical scan is 0; If the previous scan index of the currently scanned index is in the ascending region, then the total length of the historical scans sum = (iM1+1)×(iM1+2) / 2, where iM1 represents the previous scan index of the currently scanned index; If the previous scan index of the current scan index is in the equal value region, then the total length of the historical scan is sum=M×[(1+M) / 2+(iM1-M+1)], where M=MIN(w,h), w represents the width of the coding block, and h represents the height of the coding block; If the previous scan of the current scan index is in the descending region, then the total length of the historical scan is sum=M×[(1+M) / 2+(NM)]+(iM1-N+1)×[M-(iM1-N+2) / 2], where N=MAX(w,h).

[0015] To address the aforementioned technical problems, the present invention also provides an intra-block data rearrangement apparatus based on encoding and decoding, used to implement the intra-block data rearrangement method based on encoding and decoding as described in any of the preceding claims, wherein the intra-block data rearrangement apparatus based on encoding and decoding comprises: The first scan sequence processing module is used to process the raw data according to the first scan sequence to obtain the first data; The data rearrangement processing module is used to store the first data and calculate the write address offset of the first data to obtain the target physical address; The second scan order processing module is used to read the first data according to the target physical address and process the read first data according to the second scan order to obtain the second data.

[0016] Optionally, in the aforementioned codec-based intra-block data rearrangement device, the data rearrangement processing module includes a cache unit, an address translation unit, and a synchronization unit; the cache unit is used to store first data; the address translation unit is used to calculate the write address offset of the first data to obtain the target physical address; and the synchronization unit is used to control the processing speed of the first scan order processing module and the second scan order processing module.

[0017] To address the aforementioned technical problems, the present invention also provides an electronic device, including a memory, a processor, and an executable program stored in the memory and executable by the processor; when the processor executes the executable program, it performs the intra-block data rearrangement method based on encoding and decoding as described in any of the preceding claims.

[0018] To address the aforementioned technical problems, the present invention also provides a computer storage medium storing an executable program; when the executable program is executed, it implements the intra-block data rearrangement method based on encoding and decoding as described in any of the preceding claims.

[0019] The present invention provides a method, apparatus, electronic device, and computer storage medium for intra-block data rearrangement based on encoding and decoding, comprising: acquiring original data; processing the original data according to a first scan order to obtain and store first data; calculating the write address offset of the first data to obtain a target physical address; reading the first data according to the target physical address, and processing the read first data according to a second scan order to obtain second data. Obtaining the target physical address by calculating the write address offset not only eliminates the overhead of constructing and storing a sequential mapping table, improving system responsiveness and stability, but also ensures the efficiency of obtaining the target physical address, reduces latency and power consumption, and solves the problems of high hardware resource consumption, high latency, and high power consumption in existing intra-block data rearrangement methods. Attached Figure Description

[0020] Figure 1 This is a flowchart of the intra-block data rearrangement method based on encoding and decoding provided in this embodiment; Figure 2 A schematic diagram of the wavefront scanning sequence of an 8x4 block (1,1) coordinate system provided in this embodiment; Figure 3 A schematic diagram of the wavefront scanning sequence of the 8x4 (5,2) coordinate block provided in this embodiment; Figure 4 This is a schematic diagram of the structure of the intra-block data rearrangement device based on encoding and decoding provided in this embodiment. Detailed Implementation

[0021] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed account of the intra-block data rearrangement method and apparatus, electronic device, and computer storage medium based on encoding and decoding proposed in this invention. It should be noted that the drawings are all in a very simplified form and use non-precise scales, intended only to facilitate and clarify the illustration of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and sometimes use different scales.

[0022] It should be noted that the terms "first," "second," etc., used in the specification, claims, and drawings of this invention are used to distinguish similar objects in order to describe embodiments of the invention, and are not used to describe a specific order or sequence. It should be understood that such uses of terminology are interchangeable where appropriate. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0023] This embodiment provides a method for intra-block data rearrangement based on encoding and decoding, such as... Figure 1 As shown, it includes: S1, Obtain raw data; S2, process the raw data according to the first scanning order to obtain and store the first data; S3, calculate the write address offset of the first data to obtain the target physical address; S4: Read the first data according to the target physical address, and process the read first data according to the second scanning order to obtain the second data.

[0024] The codec-based intra-block data rearrangement method provided in this embodiment obtains the target physical address by calculating the write address offset. This not only eliminates the overhead of constructing and storing the sequential mapping table and improves system responsiveness and stability, but also ensures the efficiency of obtaining the target physical address, reduces latency and power consumption, and solves the problems of high hardware resource consumption, high latency and power consumption in existing intra-block data rearrangement methods.

[0025] Specifically, in this embodiment, step S1 involves obtaining the raw data.

[0026] In this embodiment, the original data is any intra-block data type, such as palette index, transform coefficient, motion vector component, prediction mode flag, residual sample, syntax element, etc.

[0027] In practical applications, the original data can also be various types of information data such as image data or video data, or it can be compressed data, decompressed data, or even various types of data obtained through encoding or decoding, not limited to images or videos. This application does not impose any restrictions on these.

[0028] Furthermore, in this embodiment, step S2 involves processing the original data according to the first scanning order to obtain and store the first data.

[0029] Specifically, in this embodiment, firstly, the original data is processed according to a first scanning order to obtain first data. Then, the first data is written into a buffer for storage in a linear order, wherein the capacity of the buffer must meet the requirements of the first data, that is, the capacity of the buffer is at least equal to the total number of data units contained in the data block.

[0030] In practical applications, such as during encoding and decoding, the first scanning order can be a non-raster scanning order such as wavefront scanning, zigzag scanning, or diagonal scanning; in pixel reconstruction, prediction, or residual processing, the first scanning order can be raster scanning, column-wise scanning, etc. This application does not impose specific restrictions on the first scanning order. The specific implementation methods of processing the original data according to the first scanning order to obtain the first data are well known to those skilled in the art, and this application will not elaborate on them.

[0031] Furthermore, in this embodiment, the first scanning order and the second scanning order are different. Both the first and second scanning orders can be selected as raster scanning, column-wise scanning, wavefront scanning, zigzag scanning, diagonal scanning, or standard custom scanning (such as AV1's palette_scan_order, VVC's ISP scanning, etc.).

[0032] Furthermore, in this embodiment, step S3, calculating the write address offset of the first data to obtain the target physical address, includes: S31, calculate the scan index of the first scan order corresponding to the second scan order.

[0033] Specifically, in this embodiment, firstly, the coordinates under the second scanning order are obtained; then, based on the pattern between the second scanning order and the first scanning order, the scanning index is calculated using the coordinates under the second scanning order.

[0034] In one specific embodiment, the second scanning sequence is raster scanning, and the first scanning sequence is wavefront scanning. In this case, the raster scanning coordinates (x, y) are first obtained, and then, based on the relationship between raster scanning and wavefront scanning, the scanning index (wavefront index) i is obtained, where i = x + y.

[0035] Of course, those skilled in the art can obtain other second scanning orders and scanning indexes obtained under the first scanning order based on the above examples, which will not be elaborated upon in this application.

[0036] S32, calculate the scan offset using the scan index.

[0037] Specifically, in this embodiment, firstly, the largest column value or the smallest row value in the scan index is calculated; then, the scan offset is calculated based on the coordinates under the second scan order and the largest column value or the smallest row value.

[0038] Taking the second scanning order as raster scanning and the first scanning order as wavefront scanning as an example, we can calculate the largest column value in the scan index i, denoted as MaxCol=MIN(i, w-1), where w represents the width of the coded block; then, based on the coordinates under the second scanning order and the largest column value, we can calculate the scan offset, denoted as offset=MaxCol-x.

[0039] Of course, in practical applications, the scan offset can also be calculated using the minimum row value. Specifically, calculate the minimum row value in scan index i, denoted as MinRow=MAX(i-w+1, 0); then, based on the coordinates in the second scan order and the minimum row value, calculate the scan offset, denoted as offset=y-MinRow.

[0040] The scan offset at this point indicates which position the coordinate is located in from the upper right to the lower left of the current wave, such as... Figure 2 As shown, the coordinate (1,1) of the raster scan corresponds to the position of the wavefront scan with wave index i = 2 and offset = 1.

[0041] S33, calculate the total length of the historical scan using the scan index and scan offset.

[0042] Taking the second scanning sequence as a raster scan and the first scanning sequence as a wavefront scan as an example, the total length of the historical scans is the sum of all wavelengths preceding the current wave.

[0043] Specifically, in this embodiment, firstly, the coding block is divided into an ascending region, an equal-value region, and a descending region according to its size. In practical applications, the width of the coding block is denoted as w, and the height is denoted as h. The wave index range is [0, w + h - 2], where the scan length Length[0] of Wave[0] is 1. According to the length characteristics of the wave, the coding block is divided into an ascending region, an equal-value region, and a descending region. The wave index range corresponding to the ascending region is [0, M - 1], the wave index range corresponding to the equal-value region is [M, N - 1], and the wave index range corresponding to the descending region is [N, w + h - 2], where M = MIN(w, h) and N = MAX(w, h).

[0044] In one specific embodiment, see Figure 2 If the width of the coded block is w=8 and the height is h=4, then the range of the wave index is [0,10]. M=4 and N=8, and the wave indices corresponding to the rising region, the equal value region and the falling region are [0,3], [4,7] and [8,10], respectively.

[0045] Depend on Figure 2 The example shows that: Within the rising region: the length of each wave increases sequentially, forming an arithmetic sequence with a difference of 1; Within the isotropic region: the wave length increases sequentially and remains constant; Within the descent region: the lengths of the waves decrease one by one, forming an arithmetic sequence with a difference of 1.

[0046] Then, the current scan index i is determined: if the current scan index i is 0, the total historical scan length is 0, representing the first element of the wavefront scan order; if the current scan index i > 0, the total historical scan length is calculated, where: If the previous scan index iM1 (iM1=i-1) of the current scan index i is in the rising region, i.e. 0<iM1<M, then the total length of the historical scan sum=(iM1+1)×(iM1+2) / 2, which represents the sum of the lengths of all waves with wave indices [0, iM1]. If the previous scan index iM1 of the current scan index i is in the equal value region, i.e., M≤iM1<N, then the total length of the historical scan is sum=sum_rise+M×flat_count=M×[(1+M) / 2+(iM1-M+1)], where M×sum_rise=(1+M) / 2 represents the sum of all wave lengths in the rising region; flat_count=iM1-M+1 represents the number of waves in the equal value region; and M×(iM1-M+1) represents the sum of all wave lengths in the equal value region. If the previous scan index iM1 of the current scan index i is in the descending region, i.e., N≤iM1<w+h-2, then the total length of the historical scan is sum=sum_rise+sum_flat+sum_desc=M×[(1+M) / 2+(NM)]+(iM1-N+1)×[M-(iM1-N+2) / 2], where sum_rise=M×(1+M) / 2 represents the sum of all wave lengths in the rising region; sum_flat=M×(NM) represents the sum of all wave lengths in the equal value region; desc_count=iM1-N+1 represents the number of waves in the descending region; desc_count×M-desc_count×(1+desc_count) / 2=sum_desc represents the sum of all wave lengths in the descending region.

[0047] S34, obtain the target physical address based on the scan offset and the total length of the historical scan.

[0048] Specifically, in this embodiment, the sum of the scan offset and the total length of the historical scan is used as the target physical address, i.e., the wavefront scan order.

[0049] Taking the above example, the width w of the coding block is 8, the height h is 4, the raster scan coordinates (x, y) are (5, 2). It is calculated that M = 4, N = 8, i = x + y = 5 + 2 = 7, and iM1 = i - 1 = 7 - 1 = 6. The maximum column value is calculated as MaxCol = MIN(i, w - 1) = MIN(7, 7) = 7, and then the scan offset is obtained as offset = MaxCol - x = 7 - 5 = 2. Since M ≤ iM1 < N is satisfied, sum = sum_rise + M × flat_count = M × [(1 + M) / 2 + (iM1 - M + 1)] = 22. Finally, the target physical address (wavefront scan order) is 24, that is, in the current block, the element with raster scan coordinates (5, 2) corresponds to the 24th element in the wavefront scan order, where the counting starts from the 0th element.

[0050] In practical applications, the calculation of the write address offset can be implemented by combinational logic such as adders, comparators, multiplexers, etc., so that the calculation of the write address offset can be completed within one clock cycle. This method not only has a simple circuit structure and low hardware resource cost, but also does not introduce additional pipeline stages or delays, ensuring efficient and real-time data processing.

[0051] Of course, when the first scan order and the second scan order are other scan orders, those skilled in the art can, based on the above example, know the calculation methods of the scan offset and the total historical scan length, and the present application will not elaborate on this.

[0052] Further, in this embodiment, in step S4, the first data is read according to the target physical address, and the read first data is processed according to the second scan order to obtain the second data.

[0053] Preferably, in order to ensure the accuracy of the data, in this embodiment, first, the synchronization signal is used to check whether the first data to be processed according to the second scan order is ready; if it is ready, the first data is read according to the target physical address.

[0054] Specifically, an identification signal can be used to mark whether the data at different positions in the buffer is valid. Among them, the position storing the first data is marked as valid. If the mark at a certain position in the buffer shows invalid, the first data can be written to this position and the identification signal is updated to valid. When reading the first data, it is judged whether to read the data at this position in the buffer according to the identification signal. Among them, if the mark shows valid, the first data at this position is read, and the identification signal is updated to invalid. In this way, the synchronization of the write and read processes of the first data can be ensured.

[0055] The specific implementation of processing the read first data in the second scanning order to obtain the second data is well known to those skilled in the art, and will not be described in detail here.

[0056] The codec-based intra-block data rearrangement method provided in this embodiment completely eliminates the construction and storage overhead of the sequential mapping table, reducing the hardware implementation area and power consumption. The target physical address calculation is completed within a single clock cycle, without introducing new latency into the decoding pipeline, maintaining high throughput and ensuring overall decoding performance. The codec-based intra-block data rearrangement method provided in this embodiment features a simple hardware design, relying on pure logic combination to calculate the write address offset, thus improving system responsiveness and stability.

[0057] In practical applications, the codec-based intra-block data rearrangement method provided in this embodiment is applicable to the encoding process, where data is generated according to the first scan order and written to the bitstream according to the second scan order; it is also applicable to the decoding process, where data is parsed from the bitstream according to the first scan order and reconstructed according to the second scan order. Furthermore, the codec-based intra-block data rearrangement method provided in this embodiment is applicable to two-dimensional blocks of any size and to any intra-block data type, exhibiting high versatility and a wide range of application scenarios. Additionally, the codec-based intra-block data rearrangement method provided in this embodiment is fully compatible with existing mainstream video coding standards, including AV1, HEVC (including SCC extension), VVC (H.266), AVS3, JPEG XL, etc.

[0058] This embodiment also provides an intra-block data rearrangement apparatus based on encoding and decoding, used to implement the intra-block data rearrangement method based on encoding and decoding as described above, such as... Figure 4 As shown, the codec-based intra-block data rearrangement device includes: The first scan sequence processing module is used to process the raw data according to the first scan sequence to obtain the first data; The data rearrangement processing module is used to store the first data and calculate the write address offset of the first data to obtain the target physical address; The second scan order processing module is used to read the first data according to the target physical address and process the read first data according to the second scan order to obtain the second data.

[0059] Furthermore, in this embodiment, as Figure 4As shown, the data rearrangement processing module includes a cache unit, an address translation unit, and a synchronization unit; the cache unit is used to store first data; the address translation unit is used to calculate the write address offset of the first data to obtain the target physical address; the synchronization unit is used to control the processing speed of the first scan order processing module and the second scan order processing module.

[0060] In practical applications, the address translation unit can use pure combinational logic such as adders, comparators, and multiplexers to calculate the write address offset, thus enabling the calculation of the write address offset to be completed within one clock cycle. This approach not only has a simple circuit structure and low hardware resource cost, but also ensures efficient and real-time data processing without introducing additional pipeline stages or delays.

[0061] Furthermore, the synchronization unit can check whether the first data to be processed according to the second scanning order is ready using a synchronization signal. Specifically, an identification signal can be used to mark whether the data at different positions in the buffer is valid. The position storing the first data is marked as valid. If the mark at a certain position in the buffer shows invalidity, the first data can be written to that position and the identification signal can be updated to be valid. When reading the first data, the identification signal is used to determine whether the data at that position in the buffer should be read. If the mark shows validity, the first data at that position is read and the identification signal is updated to be invalid. In this way, the synchronization of the writing and reading process of the first data can be guaranteed.

[0062] In practical applications, the cache unit and address translation unit in the data rearrangement processing module can be reused, thereby improving hardware utilization and reducing hardware resource costs.

[0063] The codec-based intra-block data rearrangement device provided in this embodiment is particularly suitable for resource-constrained embedded or mobile video processing systems, as well as products highly sensitive to hardware cost, chip area, and dynamic / static power consumption. Examples include mobile terminal SoCs (smartphones, tablets), Internet of Things (IoT) vision chips (smart cameras, doorbells, sensors), automotive multimedia processors, AR / VR headsets, and ultra-low-power edge AI video accelerators.

[0064] Furthermore, this embodiment also provides an electronic device, including a memory, a processor, and an executable program stored in the memory and capable of being run by the processor; when the processor runs the executable program, it performs the intra-block data rearrangement method based on encoding and decoding as described above.

[0065] Furthermore, this embodiment also provides a computer storage medium storing an executable program; when the executable program is executed, it implements the intra-block data rearrangement method based on encoding and decoding as described above.

[0066] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to mutually. In addition, different parts between embodiments can also be combined with each other, and this invention does not limit this.

[0067] This embodiment provides a method, apparatus, electronic device, and computer storage medium for intra-block data rearrangement based on encoding and decoding, comprising: acquiring original data; processing the original data according to a first scan order to obtain and store first data; calculating the write address offset of the first data to obtain a target physical address; reading the first data according to the target physical address, and processing the read first data according to a second scan order to obtain second data. Obtaining the target physical address by calculating the write address offset not only eliminates the overhead of constructing and storing a sequential mapping table, improving system responsiveness and stability, but also ensures the efficiency of obtaining the target physical address, reduces latency and power consumption, and solves the problems of high hardware resource consumption, high latency, and high power consumption in existing intra-block data rearrangement methods.

[0068] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A method of block-based data rearrangement based on coding, characterized in that, include: Obtain the raw data; The raw data is processed according to the first scanning order to obtain and store the first data; Calculate the write address offset of the first data to obtain the target physical address; The first data is read according to the target physical address, and the read first data is processed according to the second scanning order to obtain the second data.

2. The codec-based intra-block data rearrangement method of claim 1, wherein, The method for processing the raw data according to the first scanning order to obtain and store the first data includes: The raw data is processed according to the first scanning order to obtain the first data; The first data is written into the cache in a linear order for storage.

3. The codec-based in-block data rearrangement method of claim 1, wherein, Before reading the first data according to the target physical address, the intra-block data rearrangement method further includes: The synchronization signal is used to check whether the first data to be processed according to the second scanning order is ready; If preparation is complete, the first data is read based on the target physical address.

4. The codec-based in-block data rearrangement method of claim 1, wherein, The first scanning order is different from the second scanning order.

5. The codec-based in-block data rearrangement method of claim 1, wherein, The write address offset is calculated within one clock cycle.

6. The codec-based intra-block data rearrangement method of claim 1, wherein, The method for calculating the write address offset of the first data to obtain the target physical address includes: Calculate the scan index of the first scan order corresponding to the second scan order; Calculate the scan offset using the scan index; Calculate the total length of historical scans using the scan index and scan offset; The target physical address is obtained based on the scan offset and the total length of the historical scan.

7. The codec-based intra-block data rearrangement method of claim 6, wherein, The method for calculating the scan index of the first scan order corresponding to the second scan order includes: Obtain the coordinates in the second scan sequence; Based on the pattern between the second and first scanning sequences, the scan index is calculated using the coordinates under the second scanning sequence.

8. The intra-block data rearrangement method based on encoding and decoding according to claim 6, characterized in that, The method for calculating the scan offset using the scan index includes: Calculate the largest column value or the smallest row value in the scan index; The scan offset is calculated based on the coordinates in the second scan order and the largest column value or the smallest row value.

9. The intra-block data rearrangement method based on encoding and decoding according to claim 6, characterized in that, The method for calculating the total length of historical scans using the scan index includes: Based on the size of the coding block, the coding block is divided into rising area, equal value area and falling area; If the current scan index is 0, then the total length of the historical scan is 0; If the previous scan index of the currently scanned index is in the ascending region, then the total length of historical scans sum=(iM1+1)×(iM1+2) / 2, where iM1 represents the previous scan index of the currently scanned index; If the previous scan index of the current scan index is in the equal value region, then the total length of the historical scan is sum=M×[(1+M) / 2+(iM1-M+1)], where M=MIN(w,h), w represents the width of the coding block, and h represents the height of the coding block; If the previous scan of the current scan index is in the descending region, then the total length of the historical scan is sum=M×[(1+M) / 2+(NM)]+(iM1-N+1)×[M-(iM1-N+2) / 2], where N=MAX(w,h).

10. A block-based data rearrangement apparatus based on encoding and decoding, used to implement the block-based data rearrangement method based on encoding and decoding as described in any one of claims 1 to 9, characterized in that, The encoding / decoding-based intra-block data rearrangement device includes: The first scan sequence processing module is used to process the raw data according to the first scan sequence to obtain the first data; The data rearrangement processing module is used to store the first data and calculate the write address offset of the first data to obtain the target physical address; The second scan order processing module is used to read the first data according to the target physical address and process the read first data according to the second scan order to obtain the second data.

11. The intra-block data rearrangement apparatus based on encoding and decoding according to claim 10, characterized in that, The data rearrangement processing module includes a cache unit, an address translation unit, and a synchronization unit; the cache unit is used to store first data; the address translation unit is used to calculate the write address offset of the first data to obtain the target physical address; the synchronization unit is used to control the processing speed of the first scan order processing module and the second scan order processing module.

12. An electronic device, characterized in that, It includes a memory, a processor, and an executable program stored in the memory and capable of being run by the processor; when the processor runs the executable program, it performs the intra-block data rearrangement method based on encoding and decoding as described in any one of claims 1 to 9.

13. A computer storage medium, characterized in that, The computer storage medium stores an executable program; when the executable program is executed, it implements the block-based data rearrangement method based on encoding and decoding as described in any one of claims 1 to 9.

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