Photosensitive device and imaging apparatus
By integrating photosensitive material structure and multi-layer functional layer design, combined with carbon nanotube channel layer, the problems of process damage and signal crosstalk in existing infrared imaging chips are solved, achieving efficient photogenerated carrier transport and improved imaging performance, and expanding the array size.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- PEKING UNIV CHONGQING CARBON-BASED INTEGRATED CIRCUIT RES INST
- Filing Date
- 2026-03-18
- Publication Date
- 2026-07-03
AI Technical Summary
Existing silicon-based and carbon-based quantum dot infrared imaging chips suffer from problems such as process damage to quantum dot performance, difficulty in reducing pixel size, limitation of array size, and signal crosstalk during fabrication, which make it difficult to improve imaging performance.
By adopting an integrated photosensitive material structure and a multi-layer functional layer design, combined with a carbon nanotube channel layer, the system achieves efficient generation, directional transport, and collection of photogenerated carriers, avoids damaging processes, optimizes the signal amplification mechanism, and reduces crosstalk and improves area utilization through common source design and back gate structure.
It achieves efficient generation and directional transport of photogenerated carriers, avoids damage to quantum dot performance, improves imaging resolution and sensitivity, simplifies control circuitry, reduces inter-pixel crosstalk, and expands array size.
Smart Images
Figure CN122340920A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the technical fields of semiconductor devices, and in particular to a photosensitive device and imaging equipment. Background Technology
[0002] Infrared imaging chips based on traditional compound semiconductor materials face significant challenges in terms of increasing array size and manufacturing efficiency.
[0003] Traditional silicon-based imaging chips typically have pixel sizes including 14µm, 10µm, 9µm, 7µm, 6.45µm, 3.75µm, 3.0µm, 2.0µm, 1.75µm, 1.4µm, 1.2µm, and 1.0µm. Larger pixel sizes result in higher full-well coverage, wider dynamic range, and better image sensor performance. However, at the same resolution, larger pixel sizes lead to larger chip areas, and the chip cost increases quadratically with pixel size.
[0004] In low-light applications, pixel sizes are typically between 10µm and 24µm to ensure sufficient chip sensitivity and improve image signal-to-noise ratio. This makes it difficult to reduce pixel size in low-light imaging chips, increase the number of pixels per unit area, and improve the chip's imaging resolution.
[0005] Existing silicon-based quantum dot (QDs) infrared imaging chips require patterning of quantum dots (removing the QDs connected to the top electrode area by acid washing) and fabrication of other processes on the quantum dots to achieve the fabrication of the imaging chip. However, processes such as acid washing to pattern the quantum dots, spin-coating photoresist, and magnetron sputtering inevitably damage the performance of the quantum dots, resulting in reduced device detection efficiency and difficulty in improving the chip's imaging capabilities.
[0006] Carbon-based imaging chips, currently implemented in laboratory settings, have achieved 64×64 pixel infrared imaging capabilities. However, limitations in circuit area, manufacturing process, and array design restrict the chip to accommodating only one switching transistor per row. This limitation leads to crosstalk between the 64 pixels in each row. Furthermore, this approach requires more gate terminals and complex control circuitry, and is only suitable for integrated circuits, not PCBs (printed circuit boards). Summary of the Invention
[0007] This disclosure provides a photosensitive device and an imaging apparatus, as detailed below.
[0008] According to one aspect of this disclosure, a photosensitive device is provided, comprising: a silicon substrate; an insulating material body disposed on the silicon substrate; a photosensitive material layer disposed on the insulating material body, the photosensitive material layer generating photogenerated carriers when photoexcited; a metal source, a metal drain, and a metal gate, the metal source, metal drain, and metal gate all disposed in the insulating material body; a metal gate dielectric layer and a channel layer, the metal gate dielectric layer covering the metal gate, and the channel layer covering the metal gate dielectric layer; the metal source and metal drain are spaced apart on the side of the channel layer away from the metal gate; The space between the metal source and the metal drain is filled with a photosensitive material filling portion, which is integral with the photosensitive material layer. A photosensitive gate dielectric layer and a carrier collection layer are also present, with the photosensitive gate dielectric layer covering the channel layer and the carrier collection layer covering the photosensitive gate dielectric layer. The carrier collection layer collects the photogenerated carriers. The photosensitive material filling portion contacts the carrier collection layer to facilitate the transfer of photogenerated carriers to the carrier collection layer. The photosensitive gate dielectric layer ensures that the photosensitive material filling portion and the channel layer function independently, and the photosensitive material filling portion and the channel layer are combined to form a complete phototransistor.
[0009] According to one aspect of the technical solution of this disclosure, by adopting an integrated photosensitive material structure combined with a multi-layer functional layer design, the efficient generation, directional transport and collection of photogenerated carriers are realized, while avoiding damage to the photosensitive material and optimizing the signal amplification mechanism.
[0010] According to at least one embodiment of the photosensitive device of this disclosure, the photogenerated charge carriers are photogenerated electrons or photogenerated holes.
[0011] According to at least one embodiment of the photosensitive device of the present disclosure, the metal gate is disposed opposite to the photosensitive material filling portion.
[0012] According to the photosensitive device of this embodiment, the facing structural design ensures that the metal gate is directly located below the photosensitive material filling part, thereby optimizing the electric field control and signal modulation efficiency of the metal gate on the channel layer.
[0013] According to at least one embodiment of the photosensitive device of the present disclosure, the photosensitive device includes at least two photosensitive device units; each photosensitive device unit includes the metal gate dielectric layer, the channel layer, the photosensitive gate dielectric layer, the carrier collection layer, the metal drain, the metal gate and the photosensitive material filling portion corresponding to the metal gate; two adjacent photosensitive device units share one metal source.
[0014] According to the photosensitive device of this embodiment, this common source design enables the sharing of the source between adjacent photosensitive device units, thereby improving the area utilization of the photosensitive device.
[0015] According to at least one embodiment of the photosensitive device of the present disclosure, the metal source and the metal drain both pass through the carrier collection layer and the photogate dielectric layer and are in direct contact with the channel layer, such that the carrier collection layer and the photogate dielectric layer are located at least within the gap between the metal source and the metal drain.
[0016] According to the photosensitive device of this embodiment, the structural design ensures that the photosensitive material filling portion is localized in the trench region between the source and drain electrodes, and does not directly contact the metal source and metal drain electrodes.
[0017] According to at least one embodiment of the photosensitive device of the present disclosure, both the photosensitive material layer and the photosensitive material filling portion comprise quantum dot material.
[0018] According to at least one embodiment of the photosensitive device of the present disclosure, the photosensitive device includes a plurality of photosensitive device unit groups arranged along a first direction and a plurality of photosensitive device unit groups arranged along a second direction, wherein the first direction and the second direction are perpendicular to each other; each photosensitive device unit group includes two adjacent photosensitive device units arranged along the first direction.
[0019] According to at least one embodiment of the photosensitive device of this disclosure, for photosensitive device units arranged along a first direction: the metal source of each photosensitive device unit is led out from the same source trace to connect the metal source of each photosensitive device unit to a unified first voltage; the metal drain of each photosensitive device unit is led out from the same drain trace to provide a unified second voltage to the metal drain of each photosensitive device unit; the metal gate of each photosensitive device unit is led out from different gate traces to realize independent switching control of each photosensitive device unit; the voltage value of the second voltage is greater than the voltage value of the first voltage.
[0020] According to at least one embodiment of the photosensitive device of the present disclosure, for photosensitive device units arranged along a second direction: the metal source of each photosensitive device unit is led out by different source lines and connected to the unified first voltage; the metal drain of each photosensitive device unit is led out by different drain lines and connected to the unified second voltage; the metal gate of each photosensitive device unit is led out by the same gate line, thereby enabling the application of gate voltages sequentially to the photosensitive device units arranged along the second direction along the first direction.
[0021] According to at least one embodiment of the photosensitive device of the present disclosure, the gate voltage applied along the second direction is a pulse voltage, and the gate pulse voltages applied to adjacent photosensitive device units in the first direction have no overlapping timing, so as to avoid signal crosstalk.
[0022] According to at least one embodiment of the photosensitive device of the present disclosure, the photogate dielectric layer is a high dielectric constant insulating material layer, so as to transmit the electric field signal corresponding to the photogenerated carriers generated by the quantum dot to the channel layer through capacitive coupling, thereby realizing signal amplification.
[0023] According to at least one embodiment of the photosensitive device of the present disclosure, the channel layer is a carbon nanotube channel layer.
[0024] According to at least one embodiment of the photosensitive device of the present disclosure, the metal gate dielectric layer is a high dielectric constant insulating material layer.
[0025] According to another aspect of this disclosure, an imaging device is provided, comprising: a photosensitive device according to any embodiment of this disclosure; and a switch for controlling the application of a gate voltage to the metal gate. Attached Figure Description
[0026] The accompanying drawings illustrate exemplary embodiments of the present disclosure and, together with the description thereof, serve to explain the principles of the present disclosure. These drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification.
[0027] Figure 1 This is a schematic diagram of the structure of a photosensitive device according to one embodiment of the present disclosure.
[0028] Figure 2 It is marked Figure 1 The two photosensitive device units in the image are photosensitive device unit A and photosensitive device unit B.
[0029] Figure 3 This is a schematic diagram of the structure of a photosensitive device according to another embodiment of this disclosure.
[0030] Figure 4 This is a schematic diagram of the source, drain, and gate traces of a photosensitive device according to one embodiment of this disclosure.
[0031] Figure 5 This is a timing diagram of the pulse voltage applied to a photosensitive device unit in a first direction according to one embodiment of the present disclosure.
[0032] Figure 6 This is a schematic diagram showing that the gate of the photosensitive chip is in a normally off state when the shutter of a camera device is not pressed.
[0033] Figure 7This shows the photosensitive chip in a non-functional state.
[0034] Figure 8 The image shows the state of the photosensitive chip when it is working (i.e., when it is acquiring an image).
[0035] Explanation of reference numerals in the attached figures: 100 Photosensitive device; 101 Silicon substrate layer; 102 Insulating material body; 103 Photosensitive material layer; 104 Metal source; 105 Metal drain; 106 Metal gate; 107 Metal gate dielectric layer; 108 Channel layer; 109 Photosensitive material filling portion; 110 Photosensitive gate dielectric layer; 111 Carrier collection layer; 112 Source wiring metal; 113 Drain wiring metal; 115 Gate wiring metal; 116 Connection metal; 1061 First metal portion; A Photosensitive device unit; B Photosensitive device unit. Detailed Implementation
[0036] The present disclosure will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the disclosure. Furthermore, it should be noted that, for ease of description, only the parts relevant to the present disclosure are shown in the accompanying drawings.
[0037] It should be noted that, where there is no conflict, the embodiments and features described in this disclosure can be combined with each other. The technical solutions of this disclosure will now be described in detail with reference to the accompanying drawings and embodiments.
[0038] Unless otherwise stated, the exemplary implementations / embodiments shown are to be understood as providing exemplary features of various details that provide ways in which the technical concepts of this disclosure can be implemented in practice. Therefore, unless otherwise stated, the features of various implementations / embodiments may be additionally combined, separated, interchanged and / or rearranged without departing from the technical concepts of this disclosure.
[0039] The use of crosshairs and / or shading in the accompanying drawings is generally used to clarify the boundaries between adjacent components. Thus, unless otherwise stated, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for the specific material, material properties, dimensions, proportions, commonalities between the illustrated components, or any other characteristics, properties, etc., of the components. Furthermore, in the accompanying drawings, the dimensions and relative dimensions of components may be exaggerated for clarity and / or descriptive purposes. When exemplary embodiments can be implemented differently, a specific process sequence may be performed in a different order than that described. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of their description. Furthermore, the same reference numerals denote the same components.
[0040] When a component is referred to as being "on" or "above" another component, "connected to," or "joined to" another component, the component may be directly on, directly connected to, or directly joined to the other component, or there may be intermediate components. However, when a component is referred to as being "directly on" another component, "directly connected to," or "directly joined to" another component, there are no intermediate components. Therefore, the term "connection" can refer to a physical connection, an electrical connection, etc., and may or may not have intermediate components.
[0041] For descriptive purposes, this disclosure may use spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “higher,” and “side (e.g., in a “sidewall”)” to describe the relationship between one component and another component as shown in the accompanying drawings. In addition to the orientations depicted in the drawings, the spatial relative terms are also intended to encompass different orientations of the device during use, operation, and / or manufacture. For example, if the device in the drawings is flipped, a component described as “below” or “under” another component or feature would subsequently be positioned “above” said other component or feature. Thus, the exemplary term “below” can encompass both “above” and “below” orientations. Furthermore, the device may be otherwise positioned (e.g., rotated 90 degrees or in other orientations), thus interpreting the spatial relative descriptive terms used herein accordingly.
[0042] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms “a” and “the” are intended to include the plural forms as well. Furthermore, when the terms “comprising” and / or “including” and variations thereof are used in this specification, it indicates the presence of the stated features, integrals, steps, operations, parts, components, and / or groups thereof, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, parts, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximate terms rather than as terms of degree, thus explaining the inherent biases in measurements, calculated values, and / or provided values that would be recognized by one of ordinary skill in the art.
[0043] The existing technology has at least the following technical problems: silicon-based QDs infrared imaging chips require processes such as acid washing of quantum dots to fabricate the imaging chip. Etching processes after quantum dot film formation will damage the performance of quantum dots, resulting in reduced device detection efficiency and difficulty in improving chip imaging capabilities; carbon-based QDs infrared imaging chips are currently limited by the difficulty in increasing array size, and laboratory processes cannot reduce the size of individual pixels; carbon-based QDs infrared imaging chips require more gate terminals and complex control circuits to modulate each individual pixel in order to improve flexibility and improve the overall consistency of the array.
[0044] In order to solve at least one of the above-mentioned technical problems, this disclosure provides a new photosensitive device and imaging apparatus.
[0045] Figure 1 This is a schematic diagram of the structure of a photosensitive device according to one embodiment of the present disclosure.
[0046] refer to Figure 1 In some embodiments of this disclosure, the photosensitive device 100 includes a silicon substrate layer 101, an insulating material body 102, a photosensitive material layer 103, a metal source electrode 104, a metal drain electrode 105, a metal gate electrode 106, a metal gate dielectric layer 107, a channel layer 108, a photosensitive gate dielectric layer 110, and a carrier collection layer 111.
[0047] An insulating material body 102 is disposed on a silicon substrate layer 101. A photosensitive material layer 103 is disposed on the insulating material body 102, and the photosensitive material layer 103 generates photogenerated carriers when it is excited by light.
[0048] The metal source 104, metal drain 105, and metal gate 106 are all disposed within the insulating material body 102. A metal gate dielectric layer 107 covers the metal gate 106, and a channel layer 108 covers the metal gate dielectric layer 107. The metal source 104 and metal drain 105 are spaced apart on the side of the channel layer 108 away from the metal gate 106. A photosensitive material filling portion 109 is filled in the gap between the metal source 104 and metal drain 105, and the photosensitive material filling portion 109 is integrally formed with the photosensitive material layer 103.
[0049] A photogate dielectric layer 110 is disposed over the channel layer 108, and a carrier collection layer 111 is disposed over the photogate dielectric layer 110. The carrier collection layer 111 is used to collect photogenerated carriers. The photosensitive material filling portion 109 is in contact with the carrier collection layer 111 to realize the transmission of photogenerated carriers to the carrier collection layer 111. The photogate dielectric layer 110 is used to ensure that the photosensitive material filling portion 109 and the channel layer 108 do not interfere with each other and realize their respective functions. The photosensitive material filling portion 109 and the channel layer 108 are combined to form a complete phototransistor.
[0050] The photosensitive device disclosed herein achieves efficient generation, directional transport, and collection of photogenerated carriers by employing an integrated photosensitive material structure combined with a multi-layer functional layer design, while avoiding damage to the photosensitive material and optimizing the signal amplification mechanism.
[0051] Specifically, the silicon substrate 101 serves as a base, providing mechanical support and electrical stability; an insulating material body 102 is stacked on it for electrical isolation and to support the metal source 104, the metal drain 105, and the metal gate 106.
[0052] By disposing the photosensitive material layer 103 on the insulating material body 102, photogenerated carriers are generated when light (e.g., infrared light) is incident. The photosensitive gate dielectric layer 110 is located between the photosensitive material filling portion 109 (i.e., the photosensitive gate) and the channel layer 108, and is used to realize capacitive coupling between the photosensitive gate and the channel layer 108.
[0053] refer to Figure 1 In this disclosure, the metal source 104 and the metal drain 105 are spaced apart on the side of the channel layer 108 away from the gate, and the space between them is filled with a photosensitive material filling portion 109, which does not contact the metal source 104 and the metal drain 105.
[0054] Preferably, the photosensitive material filling part 109 is integrally formed with the photosensitive material layer 103 to avoid damage to the photosensitive material caused by traditional patterning (such as pickling).
[0055] This disclosure covers the channel layer 108 with a photogate dielectric layer 110 to physically isolate photogenerated carriers from the channel layer 108 and prevent photogenerated carriers from being directly injected into the channel layer; the carrier collection layer 111 covers the photogate dielectric layer 110 to collect photogenerated carriers transmitted from the photosensitive material filling portion 109, and transmits the electric field signal to the channel layer 108 through the capacitive coupling of the photogate dielectric layer 110, thereby amplifying the signal through the channel layer 108.
[0056] The working principle of the photosensitive device disclosed herein is as follows: When the shutter is not pressed, the source-drain bias and metal gate do not provide voltage, the phototransistor is turned off, there is no light, the imaging chip is completely blocked, and the chip does not work.
[0057] When the shutter is pressed, the source-drain bias provides voltage, and the metal gate provides a pulse voltage with non-overlapping timing, causing adjacent transistors to turn on sequentially. In the unlit imaging section, a stable and uniform electrical signal is output through the drain. In the illuminated imaging section, light incident on the photosensitive material layer 103 and the photosensitive material filling section 109 generates photogenerated carriers, which migrate from the photosensitive material filling section 109 to the carrier collection layer 111. Through coupling with the photosensitive gate dielectric layer 110, they affect the electrical performance of the channel layer. Combined with the source-drain bias and metal gate control, a modulated current signal or voltage signal is generated and output from the drain. Compared with the unlit imaging section, the electrical signal changes significantly, realizing photoelectric detection.
[0058] The photosensitive device disclosed herein employs a common-source design, with the source grounded and a drain voltage (Vd) provided. A metal gate provides non-overlapping timing pulse voltages to adjacent transistors, and the electrical signal is output from the drain. The non-overlapping timing pulse voltages provided by the metal gate enable photosensitive device unit A (i.e., the phototransistor described above) and photosensitive device unit B (i.e., the phototransistor described above) to be turned on sequentially without timing overlap; that is, when photosensitive device unit A is turned on, photosensitive device unit B is turned off, and when photosensitive device unit B is turned on, photosensitive device unit A is turned off. This avoids signal crosstalk, and changes in electrical signal can be sequentially output from the drains of photosensitive device unit A and photosensitive device unit B.
[0059] The photosensitive device disclosed herein avoids damaging processes and improves photoelectric conversion efficiency and detection sensitivity through an integrated photosensitive gate structure design.
[0060] Specifically, preferably, during the manufacturing process, a groove process is used to form a channel in the gap between the metal source electrode 104 and the metal drain electrode 105. Then, quantum dot material is deposited and filled by spin coating or other methods to achieve localization of quantum dots. This eliminates the need for damaging processes such as acid washing, etching or secondary processing after quantum dot film formation in the traditional patterning process, thus avoiding damage to the performance of quantum dots.
[0061] The insulating material 102 disclosed herein may be made of insulating materials such as silicon dioxide, and this disclosure does not impose any particular limitation on it.
[0062] Preferably, both the photosensitive material layer 103 and the photosensitive material filling portion 109 include quantum dot (QD) materials, such as PbSQDs, PbSeQDs, PbTeQDs, HgTeQDs, HgSeQDs, etc. These quantum dots can effectively absorb infrared light and generate photogenerated carriers. By combining them with carbon nanotubes (channel layer) to form a phototransistor, they can improve the quantum efficiency and response speed of the photosensitive device, reduce dark current, and improve the signal-to-noise ratio and imaging resolution under weak light conditions.
[0063] The metal source 104, metal drain 105, and metal gate 106 disclosed herein can be made of conductive metals such as palladium (Pd), scandium (Sc), gold (Au), titanium (Ti), chromium (Cr), or aluminum (Al). Both the metal source and metal drain are composed of contact metal and filler metal. The contact metal can be a metal or compound such as palladium (Pd), scandium (Sc), gold (Au), chromium (Cr), or titanium nitride (TiN), and the filler metal can be a metal such as tungsten (W) or copper (Cu). This disclosure does not impose any particular limitation on these metals.
[0064] Preferably, the metal gate dielectric layer 107 of the photosensitive device 100 of this disclosure is a high dielectric constant insulating material layer, such as HfO2, Al2O3, etc.
[0065] In a preferred embodiment of this disclosure, the channel layer 108 is a carbon nanotube channel layer. Carbon nanotubes have high carrier mobility and excellent electrical properties, which can effectively amplify weak photogenerated signals, achieve high-gain and low-noise signal conversion, thereby improving the sensitivity and dynamic range of the device in weak light (such as infrared weak light) detection.
[0066] Continue to refer to Figure 1 In some embodiments of this disclosure, the photogenerated charge carriers are photogenerated electrons, and the charge carrier collection layer 111 can be an electron transport material, such as ZnO or TiO2, and the photogate dielectric layer 110 can be a high dielectric constant insulating material, such as Al2O3, HfO, etc.
[0067] This disclosure designs the photogate dielectric layer 110 as a high dielectric constant insulating material layer, and transmits the electric field signal corresponding to the photogenerated carriers generated by the quantum dot to the channel layer 108 through capacitive coupling, thereby achieving signal amplification.
[0068] In some other embodiments of this disclosure, the photogenerated charge carriers are photogenerated holes, and the charge carrier collection layer 111 can be a hole transport material, such as NiO, and the photogate dielectric layer 110 can be a high dielectric constant insulating material, such as Al2O3, HfO, etc.
[0069] Continue to refer to Figure 1 A wiring layer (such as) is formed in the insulating material body 102. Figure 1 and Figure 2(The area indicated by the dashed box in the middle arrow) The wiring layer of this disclosure can accommodate multiple layers of metal wiring. For example, the electrode leads of the source wiring metal 112, drain wiring metal 113, and gate wiring metal 115 are realized through multiple layers of metal interconnects (such as multiple layers of copper wiring or tungsten-filled vias). These wiring metals are all embedded in the wiring layer, thereby constructing vertical and horizontal interconnect structures below the photosensitive material layer 103. The multilayer wiring design of this disclosure can realize large-scale pixel array expansion, such as achieving efficient row / column separation control in a two-dimensional matrix layout, unifying the source voltage, unifying the drain voltage, and independent gate scanning, avoiding the inter-pixel crosstalk problem caused by traditional single-layer wiring.
[0070] In this disclosure, the metal source 104 can be led out to the source trace via the source wiring metal 112, the metal drain 105 can be led out to the drain trace via the drain wiring metal 113, and the metal gate 106 can be led out to the gate trace via the gate wiring metal 115.
[0071] refer to Figure 1 The source wiring metal 112, drain wiring metal 113 and gate wiring metal 115 are all located within the wiring layer.
[0072] Since the metal gate 106 of this disclosure is a back-gate structure, preferably, the metal gate 106 can be configured as a two-part structure. The metal gate 106 has a first metal portion 1061 for lead-out, and the first metal portion 1061 is connected to the gate wiring metal 115 via a connecting metal 116. This structural design simplifies the back-gate lead-out process, reduces parasitic capacitance and resistance, improves signal transmission efficiency, and facilitates effective gate control in arrayed structures.
[0073] Continue to refer to Figure 1 In some embodiments of this disclosure, the metal gate 106 of the photosensitive device 100 is disposed opposite to the photosensitive material filling portion 109.
[0074] The aforementioned facing structural design ensures that the metal gate 106 is directly below the photosensitive material filling portion 109, optimizing the gate's electric field control and signal modulation efficiency in the channel layer 108. Specifically, the photosensitive material filling portion 109 is both a photosensitive layer and a critical path for the transport of photogenerated carriers to the carrier collection layer 111. Positioning the metal gate 106 directly opposite the photosensitive material filling portion 109 enhances the sensitivity of the gate voltage to changes in the electric field along this path, improving the response speed and accuracy of the photoelectric signal.
[0075] Figure 2 It is marked Figure 1 The two photosensitive device units in the image are photosensitive device unit A and photosensitive device unit B.
[0076] refer to Figure 1 and Figure 2 The photosensitive device 100 disclosed herein includes at least two photosensitive device units.
[0077] Each photosensitive device unit includes a metal gate dielectric layer, a channel layer, a photosensitive gate dielectric layer, a carrier collection layer, a metal drain, a metal gate, and a photosensitive material filling portion corresponding to the metal gate; thus, two adjacent photosensitive device units (photosensitive device unit A and photosensitive device unit B) share a metal source 104.
[0078] This common-source design enables the sharing of the source between adjacent photosensitive device units, thereby improving the area utilization of the photosensitive chip (i.e., the photosensitive device of this disclosure).
[0079] Specifically, the shared metal source 104 reduces the space occupied by the independent source of each photosensitive device unit, minimizing the area of a single pixel and allowing more pixels to be accommodated within the same unit area, thus improving the chip's imaging resolution. Furthermore, at the same pixel size, the common source structure allows for a larger photosensitive area (i.e., the effective area of the photosensitive material layer 103 and the photosensitive material filling portion 109), enhancing the detection capability for weak light and achieving higher low-light detection sensitivity and image signal-to-noise ratio.
[0080] Continue to refer to Figure 1 and Figure 2 In a preferred embodiment of this disclosure, both the metal source 104 and the metal drain 105 pass through the carrier collection layer 111 and the photogate dielectric layer 110. Both the metal source 104 and the metal drain 105 are in direct contact with the channel layer 108, and both the carrier collection layer 111 and the photogate dielectric layer 110 are located at least within the gap between the metal source 104 and the metal drain 105.
[0081] This structural design ensures the presence of a carrier collection layer 111 and a photosensitive gate dielectric layer 110 above the channel layer 108, providing the necessary conditions for the fabrication of phototransistors.
[0082] During the manufacturing process, a filling space for the photosensitive material filling part 109 can be prepared between the metal source electrode 104 and the metal drain electrode 105 by a grooving process, and the photosensitive material can be filled in one go to form an integrated photosensitive material filling part 109 and photosensitive material layer 103.
[0083] The aforementioned structural design further protects the integrity of the quantum dot material. Simultaneously, this design optimizes the directional collection efficiency of photogenerated carriers, reduces interference from parasitic effects, and improves signal transmission efficiency.
[0084] Figure 3 This is a schematic diagram of the structure of a photosensitive device according to another embodiment of this disclosure.
[0085] Figure 3 From Figure 2 A schematic diagram of the layout of the photosensitive device unit of the photosensitive device 100 when viewed from the top.
[0086] refer to Figure 3 In some embodiments of this disclosure, the photosensitive device 100 described above includes a plurality of photosensitive device unit groups arranged along a first direction and a plurality of photosensitive device unit groups arranged along a second direction, wherein the first direction and the second direction are perpendicular to each other; each photosensitive device unit group includes two adjacent photosensitive device units arranged along the first direction.
[0087] Figure 3 In the diagram, A and B are... Figure 2 The image shows two adjacent photosensitive device units.
[0088] Figure 3 In the first direction, five photosensitive device unit groups are exemplarily shown, and in the second direction, eight photosensitive device unit groups are exemplarily shown. Figure 3 In the middle, the photosensitive device unit group is arranged in 8 rows and 5 columns.
[0089] Continue to refer to Figure 3 Multiple photosensitive device unit groups are arranged along the first direction (horizontal direction in the figure). Each unit group consists of two adjacent photosensitive device units (A and B). The two adjacent photosensitive device units in each unit group share a metal source through a common source design, which ensures the compactness of the array. At the same time, multiple unit groups are arranged along the second direction (vertical direction in the figure) to form an exemplary 8-row × 5-column (group) matrix layout.
[0090] The two-dimensional arrangement of the photosensitive devices disclosed herein allows the chip to integrate more pixels (i.e., photosensitive device units) within a limited area.
[0091] The photosensitive device 100 disclosed herein significantly improves the area utilization of the chip by having adjacent cells (A and B) within a cell group share a source. Each independent pixel of this disclosure is equipped with a back gate as a switching transistor, avoiding crosstalk between pixels, and further optimizing the detection performance in weak light through the signal amplification function of the carbon nanotube (CNT) channel.
[0092] Figure 4 This is a schematic diagram of the source, drain, and gate traces of a photosensitive device according to one embodiment of this disclosure.
[0093] refer to Figure 4 The following preferred technical solutions are provided.
[0094] For photosensitive device units (A, B) arranged along the first direction: the metal source of each photosensitive device unit is led out from the same source trace to connect the metal source of each photosensitive device unit to a unified first voltage; the metal drain of each photosensitive device unit is led out from the same drain trace to provide a unified second voltage to the metal drain of each photosensitive device unit; the metal gate of each photosensitive device unit is led out from different gate traces to realize independent switching control of each photosensitive device unit; the voltage value of the second voltage is greater than the voltage value of the first voltage.
[0095] For photosensitive device units (A, B) arranged along the second direction: the metal source of each photosensitive device unit is led out by different source lines and connected to a unified first voltage; the metal drain of each photosensitive device unit is led out by different drain lines and connected to a unified second voltage; the metal gate of each photosensitive device unit is led out by the same gate line, so that gate voltage can be applied sequentially to the photosensitive device units arranged along the second direction along the first direction.
[0096] Figure 4 The metal PAD "S" connected is the source trace, the metal PAD "D" connected is the drain trace, and the metal PAD "G" connected is the gate trace.
[0097] The routing design disclosed herein enables efficient array control through row and column separation. A unified source / drain voltage in the first direction (horizontal) simplifies the bias circuitry, while allowing independent control of the gates of different columns; a unified gate voltage in the second direction (vertical) enables column scan activation.
[0098] Preferably, the source trace of the photosensitive device 100 is grounded, so that the source of each photosensitive device unit of the photosensitive device 100 is grounded; and a drain voltage (Vd) is provided for each row of photosensitive device units.
[0099] For the gate, each column of pixels (i.e., photosensitive device units) is sequentially activated by a column scan (i.e., along the first direction) at a preset fixed time period. Photogenerated carriers (e.g., photogenerated electrons) provide a grating signal (e.g., a voltage signal). The channel layer (CNT) generates a change in electrical signal due to the change in the grating signal, and the changed signal is output from the drain terminal (i.e., terminal D in the figure). The output signal can locate the X (i.e., the position in the first direction) and Y (i.e., the position in the second direction) according to the output row and the activated column of gates, thereby realizing imaging.
[0100] The photosensitive device 100 disclosed herein avoids crosstalk between pixels by periodically scanning the gate and uniformly biasing the drain voltage (Vd), thereby improving array consistency and low-light imaging resolution. At the same time, it simplifies the control circuit and enables larger-scale pixel array expansion.
[0101] Continue to refer to Figure 4 In a preferred embodiment of this disclosure, the gate voltage applied along the second direction is a pulse voltage, and the gate pulse voltages applied to adjacent photosensitive device units in the first direction have no overlapping timing, so as to avoid signal crosstalk.
[0102] Figure 5 This is a timing diagram of the pulse voltage applied to a photosensitive device unit in a first direction according to one embodiment of the present disclosure (i.e., a gate scan schematic diagram).
[0103] refer to Figure 5 In some embodiments, this disclosure uses positive gate pulses to sequentially scan columns (Tcol, from column 1 to M), with each pulse corresponding to the activation, or exposure, of one column of pixels (see [reference]). Figure 5 The reset signals Reset(1), Reset(2), Reset(3), Reset(4), Reset(5), Reset(6), etc. are used to ensure that the timing does not overlap. During the exposure period (within the pulse width), photogenerated carriers are collected to output the signal. The next frame is exposed after each frame period (Tframe).
[0104] In summary, this disclosure utilizes a common-source design and array arrangement to couple and amplify the weak photogenerated signals of quantum dots (QDs) through carbon nanotube (CNT) channels. This achieves pixel size reduction, array scale increase, and non-destructive localization of QDs, thereby improving the weak light detection capability, resolution, and consistency of devices such as infrared imaging chips, and avoiding inter-pixel crosstalk.
[0105] Based on the photosensitive device 100 (i.e., photosensitive chip) provided in this disclosure, this disclosure also provides an imaging device, including: a photosensitive device according to any embodiment of this disclosure and a switch, the switch being used to control the application of a gate voltage to a metal gate.
[0106] Imaging devices can be cameras, mobile phones with camera functions, etc., and switches can be camera shutters, mobile phone camera control buttons, etc.
[0107] Taking a camera as an example of an imaging device, if the camera shutter is not pressed, the gate of the camera's photosensitive chip is normally off, i.e., in a light-off state. Figure 6 As shown. Figure 6 In the diagram, the horizontal axis represents time, and the vertical axis represents the voltage applied to the gate.
[0108] When the camera's photosensitive chip's gate is in the normally off state (shutter not pressed), there is no light, the photosensitive chip is completely blocked, and the chip does not work. Figure 7 This shows the state where the photosensitive chip is not working.
[0109] Figure 8 This diagram illustrates how an object is imaged and focused onto a photosensitive chip (i.e., an imaging chip) through the optical lens of an imaging device.
[0110] refer to Figure 8 When the camera shutter is pressed, light enters the camera and is focused onto the imaging chip through the camera's optical lens. Simultaneously, each row of the photosensitive chip is provided with a fixed second voltage (Vd), and each column of the photosensitive chip is provided with a grid scan signal with a fixed time period, sequentially activating each column of photosensitive units. At the location where optical imaging light is present, the phototransistor (i.e., the photosensitive device unit) outputs a photogenerated response signal when it is turned on.
[0111] In the description of this specification, the references to terms such as "one embodiment / mode," "some embodiments / modes," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment / mode or example is included in at least one embodiment / mode or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment / mode or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments / modes or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments / modes or examples described in this specification, as well as the features of different embodiments / modes or examples.
[0112] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0113] Those skilled in the art should understand that the above embodiments are merely for illustrating the present disclosure and are not intended to limit the scope of the disclosure. Those skilled in the art can make other changes or modifications based on the above disclosure, and these changes or modifications still fall within the scope of the present disclosure.
Claims
1. A photosensitive device, characterized in that, include: Silicon substrate; An insulating material body disposed on the silicon substrate layer; A photosensitive material layer is disposed on the insulating material body, and the photosensitive material layer generates photogenerated carriers when it is excited by light; The metal source, metal drain, and metal gate are all disposed within the insulating material body. A metal gate dielectric layer and a channel layer are provided, wherein the metal gate dielectric layer covers the metal gate, and the channel layer covers the metal gate dielectric layer; a metal source and a metal drain are spaced apart on the side of the channel layer away from the metal gate; a photosensitive material filling portion is filled in the gap between the metal source and the metal drain, and the photosensitive material filling portion is integrally formed with the photosensitive material layer; and The device comprises a photosensitive gate dielectric layer and a carrier collection layer, wherein the photosensitive gate dielectric layer is disposed on the channel layer, and the carrier collection layer is disposed on the photosensitive gate dielectric layer; the carrier collection layer is used to collect the photogenerated carriers, and the photosensitive material filling portion is in contact with the carrier collection layer to realize the transmission of photogenerated carriers to the carrier collection layer; the photosensitive gate dielectric layer is used to ensure that the photosensitive material filling portion and the channel layer do not interfere with each other in realizing their respective functions, and the photosensitive material filling portion and the channel layer are combined to form a complete phototransistor.
2. The photosensitive device according to claim 1, characterized in that, The metal gate is disposed opposite to the photosensitive material filling portion.
3. The photosensitive device according to claim 1, characterized in that, The photosensitive device includes at least two photosensitive device units; Each of the photosensitive device units includes the metal gate dielectric layer, the channel layer, the photosensitive gate dielectric layer, the carrier collection layer, the metal drain, the metal gate, and the photosensitive material filling portion corresponding to the metal gate; Two adjacent photosensitive device units share a single metal source electrode.
4. The photosensitive device according to claim 1, characterized in that, Both the metal source and the metal drain pass through the carrier collection layer and the photogate dielectric layer and are in direct contact with the channel layer, such that the carrier collection layer and the photogate dielectric layer are located at least within the gap between the metal source and the metal drain.
5. The photosensitive device according to claim 1, characterized in that, Both the photosensitive material layer and the photosensitive material filling portion include quantum dot materials.
6. The photosensitive device according to claim 3, characterized in that, The photosensitive device includes multiple photosensitive device unit groups arranged along a first direction and multiple photosensitive device unit groups arranged along a second direction, wherein the first direction and the second direction are perpendicular to each other. Each photosensitive device unit group includes two adjacent photosensitive device units arranged along a first direction.
7. The photosensitive device according to claim 6, characterized in that, For photosensitive device units arranged along the first direction: The metal source of each photosensitive device unit is led out from the same source trace to connect the metal source of each photosensitive device unit to a unified first voltage; The metal drains of each photosensitive device unit are led out from the same drain line to provide a uniform second voltage to the metal drains of each photosensitive device unit; The metal gates of each photosensitive device unit are led out by different gate traces to achieve independent switching control of each photosensitive device unit; The voltage value of the second voltage is greater than the voltage value of the first voltage.
8. The photosensitive device according to claim 7, characterized in that, For photosensitive device units arranged along the second direction: The metal source electrodes of each photosensitive device unit are led out by different source electrode traces and connected to the unified first voltage; The metal drains of each photosensitive device unit are led out by different drain traces and connected to the unified second voltage; The metal gates of each photosensitive device unit are led out from the same gate trace, thereby enabling the application of gate voltages sequentially to the photosensitive device units arranged along the second direction along the first direction.
9. The photosensitive device according to any one of claims 1 to 8, characterized in that, The gate voltage applied along the second direction is a pulse voltage, and the gate pulse voltages applied to adjacent photosensitive device units in the first direction have no overlapping timing to avoid signal crosstalk; Optionally, the metal gate and the photosensitive material filling portion are disposed opposite each other, including: The projection of the metal gate onto the plane containing the cross-section of the photosensitive material filling portion completely covers the cross-section of the photosensitive material filling portion, thereby maximizing the electric field control region and reducing edge effects. Optionally, the photogate dielectric layer is a high dielectric constant insulating material layer, so as to transmit the electric field signal corresponding to the photogenerated carriers generated by the quantum dot to the channel layer through capacitive coupling, thereby realizing signal amplification; Optionally, the channel layer is a carbon nanotube channel layer; Optionally, the metal gate dielectric layer is a high dielectric constant insulating material layer; Optionally, the photogenerated carriers are photogenerated electrons or photogenerated holes.
10. An imaging device, characterized in that, include: The photosensitive device according to any one of claims 1 to 9; as well as A switch, the switch being used to control the application of a gate voltage to the metal gate.