Controller, memory device and data storage system

Abstract

The present disclosure relates to a controller, a memory device, and a data storage system. The data storage system improves access performance to a memory device by having a plurality of channels, and improves operation performance, prevents operation errors, and improves efficiency by controlling timing of transmitting an operation command to a storage area based on occupancy state information of the storage area included in the memory device.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2025-0002522, filed with the Korean Intellectual Property Office on January 8, 2025, which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments of this disclosure relate to controllers, memory devices, and data storage systems. Background Technology

[0004] A data storage system may include at least one memory device for storing data. The data storage system may include a controller that controls the operation of the at least one memory device. The controller can access the memory device and control its operation according to commands received from external devices.

[0005] The operational performance of a data storage system can be demonstrated by the time spent by the controller accessing memory devices and processing commands received from external sources. The number of memory devices included in a data storage system may be limited. Therefore, a method is needed to improve the operational performance of a data storage system when using a limited number of memory devices. Summary of the Invention

[0006] The purposes of this disclosure are not limited to those expressly set forth herein. Other purposes not expressly mentioned will become apparent to those skilled in the art from the description provided below.

[0007] Embodiments of this disclosure can provide a method for reducing the time required for a controller included in a data storage system to access memory devices and process commands received from external sources, and for improving the operational performance of the data storage system.

[0008] Embodiments of this disclosure may provide a data storage system comprising: a plurality of storage areas for storing data, including a first storage area and a second storage area; a memory device including a first channel and a second channel for communication; and a controller for transmitting operation commands to the memory device via at least one of the first channel and the second channel, and for controlling the operation of the first storage area via the first channel during a first time period, and controlling the operation of the second storage area via the second channel during a portion of the first time period.

[0009] Embodiments of this disclosure may provide a memory device comprising: a plurality of memory regions; and a switching unit controlling the connection between each of the plurality of memory regions and N (where N is an integer equal to or greater than 2) channels, wherein the memory device receives an operation command for a first memory region through a first channel among the N channels, and receives an operation command for a second memory region, different from the first memory region, through a second channel during at least a portion of a time period during which an operation is performed on the first memory region.

[0010] Embodiments of this disclosure may provide a controller comprising: an interface unit for communicating with a memory device via a first channel and a second channel; and control logic for transmitting an occupancy request command for a target memory region via the first channel, checking occupancy status information of the target memory region, and transmitting an operation command for the target memory region via the first channel if the occupancy status information of the target memory region is a first value.

[0011] According to embodiments of this disclosure, the operational performance of a data storage system can be improved by setting occupancy status information for each storage region included in the memory device and allowing the controller to access the storage regions through multiple channels.

[0012] The advantages of the embodiments disclosed herein are not limited to those mentioned above, and other advantages not mentioned will be clearly understood by those skilled in the art through the description of the claims. Attached Figure Description

[0013] This disclosure will be more fully understood through the detailed embodiments and accompanying drawings provided below. These detailed embodiments and accompanying drawings are provided for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0014] Figure 1 This is a schematic configuration diagram of a data storage system according to an embodiment of the present disclosure.

[0015] Figure 2 Examples of memory devices and controllers included in a data storage system according to embodiments of the present disclosure are shown.

[0016] Figures 3 to 5 Show Figure 2 Examples of how the memory device and controller operate are shown.

[0017] Figure 6 Another example of a memory device and controller included in a data storage system according to an embodiment of the present disclosure is shown.

[0018] Figure 7 and Figure 8 Illustrations of embodiments according to this disclosure Figure 6 Examples of how the memory device and controller operate are shown.

[0019] Figure 9A and Figure 9B An example of the connection structure of a memory device and a controller included in a data storage system according to an embodiment of the present disclosure is shown.

[0020] Figure 10 An example of the configuration of a computing system including a data storage system is shown in an embodiment of this disclosure. Detailed Implementation

[0021] In the following description of examples or embodiments of this disclosure, reference will be made to the accompanying drawings, in which specific examples or embodiments that may be implemented are illustrated by way of illustration, and in which the same reference numerals and symbols may be used to denote the same or similar components even if the same reference numerals and symbols are shown in different drawings. Furthermore, in the following description of examples or embodiments of this disclosure, detailed descriptions of well-known functions and components incorporated herein will be omitted where it is determined that such detailed descriptions might obscure the subject matter of some embodiments of this disclosure. Terms such as “comprising,” “having,” “including,” “constituting,” “forming,” “comprise,” and “form” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” As used herein, the singular forms are intended to include the plural forms unless the context clearly indicates otherwise.

[0022] Terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” may be used herein to describe elements of this disclosure. None of these terms are used to define the nature, order, sequence, or number of elements, but are only used to distinguish the corresponding element from other elements.

[0023] When referring to the first element and the second element as "connected or joined," "in contact or overlapping," etc., it should be understood that not only can the first element be "directly connected or joined" or "directly in contact or overlapping" with the second element, but a third element can also be "inserted" between the first element and the second element, or the first element and the second element can be "connected or joined," "in contact or overlapping," etc., with each other via a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or joined," "in contact or overlapping," etc., with each other.

[0024] When time-relative terms such as “after,” “following,” “next,” “before,” etc., are used to describe a process or operation of an element or configuration, or a flow or step in a method of operation, processing, or manufacturing, these terms may also be used to describe discontinuous or non-sequential processes or operations, unless they are used in conjunction with the terms “directly” or “immediately.”

[0025] Furthermore, when referring to any size, relative dimensions, etc., even without a specific description, the numerical values ​​or corresponding information of the component or feature (e.g., level, range, etc.) should be taken into account, including tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.). Moreover, the term "can" fully encompasses all the meanings of the term "able to".

[0026] In the following, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0027] Figure 1 A schematic configuration diagram of a data storage system according to an embodiment of the present disclosure is shown.

[0028] Reference Figure 1 The data storage system 100 may include at least one memory device 110. Figure 1 The data storage system 100 is illustrated exemplaryly, including a first memory device 111, a second memory device 112, a third memory device 113, and a fourth memory device 114; however, embodiments of this disclosure are not limited thereto. The data storage system 100 may include a controller 120 that controls the operation of the memory device 110.

[0029] For example, memory device 110 may be a volatile memory such as DRAM, SDRAM, DDR SDRAM, LPDDR SDRAM, etc., but embodiments of this disclosure are not limited thereto. Memory device 110 may also be a non-volatile memory such as NAND flash memory, 3D NAND flash memory, NOR flash memory, etc. Furthermore, in some cases, some portions of memory device 110 included in data storage system 100 may be volatile memory, while other portions may be non-volatile memory.

[0030] Alternatively, the memory device 110 can be one of various types of memory, such as resistive RAM, phase-change memory, magnetoresistive memory, ferroelectric memory, or spin-injected magnetization inversion memory.

[0031] Additionally, in some cases, memory device 110 may also be processing-in-memory with arithmetic or data processing functions. The configuration for performing computational functions in memory device 110 may be located inside or outside the memory bank of memory device 110. When located outside the memory bank, the configuration for performing computational functions may be located near the memory bank or in a region spaced apart from the memory bank.

[0032] The controller 120 can control the operation of the memory device 110 based on commands received from an external source (e.g., external commands). The controller 120 can also control the operation of the memory device 110 based on its own commands (e.g., internal commands).

[0033] The controller 120 can transmit commands, addresses, data, etc., to the memory device 110 for controlling the operation of the memory device 110. For example, the controller 120 can control the operation of writing data to the memory device 110. The controller 120 can control the operation of reading data written to the memory device 110.

[0034] Depending on the type of memory device 110, controller 120 can control refresh or erase operations on data written to memory device 110.

[0035] The controller 120 can perform operations for detecting and correcting errors in data read from the memory device 110. In some cases, error correction operations can be performed internally within the memory device 110.

[0036] The controller 120 can control the operation of the memory device 110 based on commands received from the external host device 200.

[0037] For example, host device 200 can be a computer, ultra-mobile PC (UMPC), workstation, personal digital assistant (PDA), tablet computer, mobile phone, smartphone, e-book reader, portable multimedia player (PMP), portable game console, navigation device, black box, digital camera, digital multimedia broadcast (DMB) player, smart TV, digital audio recorder, digital audio player, digital video recorder, digital video player, storage device constituting a data center, one of various electronic devices constituting a home network, one of various electronic devices constituting a telematics network, radio frequency identification (RFID) device, mobile device such as a vehicle, robot, or drone that is driven or can be driven autonomously under human control. Optionally, host device 200 can be a virtual / augmented reality device that provides two-dimensional or three-dimensional virtual reality images or augmented reality images. In addition to the examples above, host device 200 can be any of various electronic devices that require a data storage system 100 capable of storing data for data processing.

[0038] The host device 200 may include at least one operating system. The operating system can manage and control the overall functions and operation of the host device 200, and can control the interoperability between the host device 200 and the data storage system 100. Based on the mobility of the host device 200, the operating system can be classified as a general-purpose operating system or a mobile operating system.

[0039] The controller 120 and the host device 200 may be separate devices. In some cases, the controller 120 and the host device 200 may be implemented by integrating them into a single device. For ease of explanation, the controller 120 and the host device 200 will be described below as separate devices by way of example.

[0040] The controller 120 can communicate with each memory device 110 through at least one channel and control the operation of the memory device 110. In some cases, the controller 120 can communicate with each memory device 110 through multiple channels and control the operation of the memory device 110. The controller 120 can access each memory device 110 through two or more channels and control the operation of the memory device 110, thereby improving the operational performance of the data storage system 100.

[0041] Figure 2 Examples of memory devices and controllers included in a data storage system according to embodiments of the present disclosure are shown.

[0042] Reference Figure 2The memory device 110 may include at least one memory cell array 300. The memory cell array 300 may include a plurality of memory cells for storing data. The memory cell array 300 may include a plurality of word lines and a plurality of bit lines for applying signals to drive the memory cells. Two or more memory cells may constitute a memory region.

[0043] As an example, each of the memory cell array 300 may include multiple memory blocks. Each of the multiple memory blocks may include multiple planes 400. Each of the multiple planes 400 may include multiple pages. Each of the multiple pages may include multiple memory cells. In this specification, plane 400 is described as a unit storage region or storage area; however, a storage area according to embodiments of this disclosure may refer to one of the memory cell arrays 300, or various unit storage spaces included in the memory cell array 300.

[0044] like Figure 2 As shown, the plurality of memory cell arrays 300 may include a first memory cell array 301, a second memory cell array 302, a third memory cell array 303, a fourth memory cell array 304, a fifth memory cell array 305, a sixth memory cell array 306, a seventh memory cell array 307, and an eighth memory cell array 308, but the embodiments disclosed herein are not limited to these. Figure 2 The number and configuration of the memory cell array.

[0045] Multiple memory cell arrays 300 may include multiple planes 400, each plane 400 including page buffers for storing data written to or read from corresponding areas. Planes 400 may store occupancy status information used to manage access to channels to memory areas. Occupancy status information may be referred to as a semaphore, and may be stored in a portion of a memory area that serves as an access unit for controller 120. Optionally, in some cases, occupancy status information may be stored in a specific area within a plane 400 located within the memory cell array 300. Access to memory areas through multiple channels can be managed and controlled based on the occupancy status information for each memory area.

[0046] For example, memory device 110 can communicate with controller 120 via a first channel CH1 and a second channel CH2. In some cases, memory device 110 can communicate with controller 120 via three or more channels. Memory device 110 may include a multiplexer 500, and the connection between the channels and each memory region can be controlled via the multiplexer 500. The multiplexer 500 may be referred to as a switching unit. Data paths for transmitting and receiving signals can be arranged around the multiplexer 500 or between the multiplexer 500 and the memory region. Multiple wirings can be arranged in the data paths, and the connection between each channel and the memory region can be controlled according to the operation of the multiplexer 500.

[0047] The controller 120 can access the memory device 110 through the first channel and the second channel, and control the operation of the memory device 110. For example, the controller 120 may include control logic 120a and interface unit 120b.

[0048] The interface unit 120b of the controller 120 can communicate with the memory device 110 via at least one of a first channel and a second channel. The control logic 120a of the controller 120 can access the memory device 110 via either the first or second channel and control operations on multiple memory regions included in the memory device 110. When accessing a memory region, the control logic 120a can perform the access based on occupancy status information stored in the memory region. The occupancy status information can be information set for each memory region.

[0049] As an example, control logic 120a can communicate with memory device 110 via a first channel. Control logic 120a can request access to some of the multiple memory regions included in memory device 110. The memory region targeted by the access request can be referred to as the target memory region. Memory device 110 can check the occupancy status of the requested memory region. Memory device 110 can check occupancy status information stored or set in the corresponding target memory region, and if it is not occupied, it can allocate the target memory region to the channel that has been requested for access. If the corresponding target memory region is occupied, memory device 110 can provide controller 120 with information about the occupancy status.

[0050] Control logic 120a can access memory device 110 through multiple channels, check the occupancy status information of each requested memory region in the multiple channels, and perform access to each memory region accordingly. For example, control logic 120a can access memory device 110 through a first channel during a first time period. Furthermore, control logic 120a can access memory device 110 through a second channel during at least a portion of the first time period. Accessing through multiple channels improves operating speed, and by managing the occupancy status information set for each memory region, shared access to memory regions through multiple channels can be performed efficiently.

[0051] Before controlling the operation according to a write command or read command, control logic 120a may transmit at least one command to memory device 110 to check the occupancy status information of the memory area targeted for the operation, and then control the operation according to the write command or read command. In this specification, a command such as a write command or read command that instructs the direct execution of an operation on the memory area may be referred to as an operation command.

[0052] Figures 3 to 5 Show Figure 2 Examples of how the memory device and controller operate are shown.

[0053] Reference Figure 3 In order to check the occupancy status information, the controller 120 can transmit an occupancy request command to the memory device 110 through at least one of the first channel and the second channel in order to access the memory device 110.

[0054] For example, controller 120 can transmit an occupancy request command to memory device 110 via the first channel. Controller 120 can transmit an occupancy request command (①) to memory device 110 for a first memory region among a plurality of memory regions included in memory device 110. The first memory region may be referred to as the target memory region.

[0055] For example, the first storage region may be a first plane 401 included in the first memory cell array 301 in the memory device 110. In some cases, the first storage region may be the first memory cell array 301 or a storage region smaller than the first plane 401.

[0056] The memory device 110 can check the occupancy status information of the first memory region according to the occupancy request command from the controller 120. The memory device 110 can transmit the occupancy status information to the controller 120 in response to the occupancy request command (②).

[0057] The first storage area may be unoccupied, or it may be occupied through another channel.

[0058] If the first storage area is in an unoccupied state, the memory device 110 can allocate the first storage area to the first channel. For example, the occupancy status information of the first storage area can be set to, for example, a first value. The first value can indicate the state in which the corresponding storage area is allocated to the first channel.

[0059] The memory device 110 can set the occupancy status information of the first memory region to a first value and can transmit the occupancy status information of the first memory region to the controller 120. After receiving the occupancy status information of the first memory region, the controller 120 can transmit an operation command for the first memory region. The controller 120 can transmit a write command or a read command for the first memory region to the memory device 110. Therefore, before executing control according to the operation command, the controller 120 can first transmit an occupancy request command for the corresponding memory region, and then execute control according to the operation command based on the occupancy status information of the corresponding memory region. The controller 120 can control the operation through the second channel during a portion of the time period of the control operation through the first channel.

[0060] As another example, the first storage area can be in a state where it is allocated by another channel. The first storage area can also be in a state where it is allocated to a second channel. For example, the occupancy status information of the first storage area can be set to a second value. Within the first storage area, operations can be performed based on commands transmitted via the second channel.

[0061] The memory device 110 can provide the controller 120 with information indicating that the occupancy status information set in the first memory region is a second value and therefore allocated to the second channel. In this example, based on the occupancy status information received from the memory device 110, the controller 120 does not transmit an operation command for the first memory region. The controller 120 can control operations for different memory regions through the first channel. The controller 120 can retransmit the occupancy request command for the first memory region at different times.

[0062] When the occupancy status information of the first storage area is determined to be a first value, the controller 120 may transmit an operation command to the memory device 110 during a first time period. When the occupancy status information of the first storage area is determined to be a second value, the controller 120 may transmit an operation command to the memory device 110 during a second time period, which is later than the first time period. Before transmitting the operation command during the second time period, the controller 120 may first transmit an occupancy request command to the memory device 110.

[0063] As described above, in response to an occupancy request command, controller 120 may transmit an operation command after receiving occupancy status information. In other embodiments, the controller may further transmit a command requesting a check of occupancy status information before transmitting the operation command.

[0064] As an example, refer to Figure 4 The controller 120 can transmit an occupancy request command (①) for a first storage area to the memory device 110 via the first channel. The first storage area may be a first plane 401, but the example is not limited to this.

[0065] The memory device 110 can check the occupancy status information of the first storage area. If the first storage area is not occupied, the memory device 110 can set the occupancy status information of the first storage area to a first value.

[0066] After transmitting the occupancy request command, the controller 120 can transmit a command (②) to the memory device 110 through the first channel to request confirmation of the occupancy status information of the first storage area.

[0067] In response to a command requesting confirmation of the occupancy status information of the first storage area, the controller 120 can verify the occupancy status information of the first storage area. The memory device 110 can transmit a first value to the controller 120 in response to the command from the controller 120.

[0068] The controller 120 can verify that the occupancy status information of the first storage area is set to the first value, and transmit an operation command (③) for the first storage area to the memory device 110.

[0069] The controller 120 transmits an occupancy request command to the memory device 110, and then transmits a command to check the occupancy status information of the corresponding memory area before transmitting the operation command. Therefore, errors caused by accessing the same memory area through the first channel and the second channel can be prevented or reduced.

[0070] The controller 120 transmits an occupancy request command for the first storage area through the first channel, and then, if the occupancy status information of the first storage area is a first value, transmits an operation command to the memory device 110 during a first time period. Therefore, the operation of the first storage area can be controlled.

[0071] In other embodiments, if the occupancy status information of the first storage area is a value different from the first value, the controller 120 may transmit the corresponding operation command to the memory device 110 at a time period different from the first time period.

[0072] For example, refer to Figure 5The controller 120 can transmit an occupancy request command (①) for a first storage area to the memory device 110 via the first channel. The first storage area may be a first plane 401, but the embodiments are not limited thereto.

[0073] The memory device 110 can check the occupancy status information of the first memory region. The occupancy status information of the first memory region can be a second value, meaning that the first memory region can be in a state where it has been allocated to the second channel. Operations using the second channel to control the first memory region according to operation commands can be underway.

[0074] The controller 120 can transmit a command (②) requesting confirmation of the occupancy status information of the first storage area to the memory device 110 via the first channel. The controller 120 can receive the occupancy status information of the first storage area in response to the command and verify that the occupancy status information of the first storage area is the second value.

[0075] Since the occupancy status information of the first storage area is the second value, the controller 120 can adjust the timing of transmitting operation commands to the first storage area. The controller 120 can transmit operation commands to the first storage area in a second time period, which is later than the first time period.

[0076] Before the second time period, controller 120 may not perform communication through the first channel. Alternatively, controller 120 may attempt to access another storage area through the first channel.

[0077] As an example, controller 120 may transmit an occupancy request command (③) for a second storage region to memory device 110 via a first channel. The second storage region may be a second plane 402, but the embodiment is not limited thereto.

[0078] Based on the occupancy request command from the controller 120, the memory device 110 can check the occupancy status information of the second memory region. If the second memory region is not occupied, the memory device 110 can allocate the second memory region to the first channel and set the occupancy status information of the second memory region to a first value. If the second memory region is allocated to the second channel, the memory device 110 can maintain the occupancy status information of the second memory region at a second value.

[0079] After transmitting a request command for occupying the second storage area via the first channel, the controller 120 can transmit a command to the memory device 110 requesting confirmation of the occupancy status information of the second storage area via the first channel. If the occupancy status information of the second storage area is confirmed to be a first value, the controller 120 can transmit an operation command for the second storage area to the memory device 110 via the first channel. If the occupancy status information of the second storage area is confirmed to be a second value, the controller 120 can transmit operation commands for the second storage area to the memory device 110 at different time periods.

[0080] The controller 120 can access the memory device 110 through the first and second channels and control the operation of the memory device 110, thereby improving the operational performance of the data storage system 100. Since the controller 120 checks the occupancy status information of each storage area included in the memory device 110 and controls the operation of the corresponding storage area, access errors can be prevented and operational efficiency can be improved when control is performed through multiple channels.

[0081] In addition, since the memory device 110 communicates with the controller 120 through multiple channels, in some cases the memory device 110 can be controlled by multiple controllers 120.

[0082] Figure 6 Another example of a memory device and controller included in a data storage system according to an embodiment of the present disclosure is shown.

[0083] Reference Figure 6 The data storage system 100 may include a first controller 121, a second controller 122, and a memory device 110. The first controller 121 may include first control logic 121a and a first interface unit 121b. The second controller 122 may include second control logic 122a and a second interface unit 122b.

[0084] The memory device 110 may include a plurality of memory cell arrays 300. Each of the plurality of memory cell arrays 300 may include a plane. The memory cell arrays 300 or the planes 400 may correspond to the plurality of memory cell arrays and the plurality of planes in the memory region, respectively.

[0085] The memory device 110 can communicate with the first controller 121 and the second controller 122 through multiple channels. For example, the memory device 110 can communicate with either the first controller 121 or the second controller 122 through at least one of the first channel and the second channel.

[0086] For example, the first controller 121 can communicate with the memory device 110 through a first channel. The first controller 121 can occupy the first channel. The second controller 122 can communicate with the memory device 110 through a second channel. The second controller 122 can occupy the second channel.

[0087] In some cases, when the memory device 110 includes two or more channels, the first controller 121 or the second controller 122 can access the memory device 110 through two or more channels. For example, the first controller 121 can access the memory device 110 through two or more channels. The second controller 122 can also access the memory device 110 through two or more channels.

[0088] The first controller 121 can communicate with the memory device 110 through the first channel and access the storage areas included in the memory device 110. The time period during which the first controller 121 communicates with the memory device 110 through the first channel may overlap with the time period during which the second controller 122 communicates with the memory device 110. Optionally, the time period during which the first controller 121 communicates with the memory device 110 through the first channel may differ from the time period during which the second controller 122 communicates with the memory device 110 through the second channel.

[0089] For example, the first controller 121 can transmit an occupancy request command for the first storage area via the first channel. The memory device 110 can check the occupancy status information set for the first storage area. If the first storage area is not occupied, the memory device 110 can set the occupancy status information of the first storage area to a first value. If the first storage area is occupied by the second channel, the memory device 110 can maintain the occupancy status information of the first storage area at a second value.

[0090] After transmitting a request command to occupy the first storage area, the first controller 121 can transmit a command to the memory device 110 via the first channel requesting confirmation of the occupancy status information of the first storage area. If the occupancy status information of the first storage area is verified to be a first value, the first controller 121 can transmit an operation command to the memory device 110 via the first channel. According to the operation command, an operation can be performed to write data to the first storage area or to read data written to the first storage area.

[0091] If the occupancy status information of the first storage area is the second value, the first controller 121 can adjust the timing of transmitting operation commands for the first storage area. The timing of transmitting operation commands by the first controller 121 can vary according to the occupancy status information of the first storage area.

[0092] Similar to the first controller 121, the second controller 122 can check the occupancy status information of the storage area by transmitting an occupancy request command through the second channel, and then transmit operation commands for the corresponding storage area to the memory device 110 through the second channel. In some cases, the second controller 122 can receive the occupancy status information of the storage area as a response to the occupancy request command.

[0093] Each of the first controller 121 and the second controller 122 can communicate via the first channel and the second channel to set the occupancy status information of the storage area and control the operation of the storage area. Therefore, command processing performance can be improved, errors caused by simultaneous control by the first controller 121 and the second controller 122 can be prevented, and the operating efficiency of the memory device 110 can be improved.

[0094] When each of the first controller 121 and the second controller 122 occupies a separate channel and accesses the memory device 110, the default value of the occupancy status information of some of the multiple storage areas can be set to a first value, and the default value of the occupancy status information of the remaining storage areas can be set to a second value, but the embodiments of this disclosure are not limited thereto.

[0095] Since both the first controller 121 and the second controller 122 can access multiple storage areas included in the memory device 110 through any channel, data can be shared between the controllers 120 through the storage areas.

[0096] Figure 7 and Figure 8 Illustrations of embodiments according to this disclosure Figure 6 Examples of how the memory device and controller operate are shown.

[0097] Reference Figure 7 The first controller 121 may transmit an occupation request command (①) for the first storage region to the memory device 110 via the first channel during a first time period. For example, the first storage region may be the fourth plane 404 included in the fourth memory cell array 304.

[0098] The memory device 110 can check the occupancy status information of the fourth plane 404. If the fourth plane 404 is not occupied, the memory device 110 can set the occupancy status information of the fourth plane 404 to a first value.

[0099] After transmitting the occupancy request command, the first controller 121 can transmit a command (②) to the memory device 110 through the first channel to request confirmation of the occupancy status information of the first storage area.

[0100] The first controller 121 can verify that the occupancy status information of the fourth plane 404, which serves as the first storage area, is a first value. The first controller 121 can transmit operation commands (③) for the first storage area through the first channel. The operation commands for the first storage area can be write commands. Under the control of the first controller 121, data can be written to the first storage area.

[0101] The second controller 122 can access the same first storage area accessed by the first controller 121.

[0102] For example, refer to Figure 7 and Figure 8 The second controller 122 can transmit an occupancy request command (①) for the same first storage region to the memory device 110 via the second channel. If the occupancy request command from the second controller 122 is received during a first time period when a write operation is performed on the first storage region under the control of the first controller 121, the memory device 110 can maintain the occupancy status information of the first storage region at a first value. The second controller 122 can check the occupancy status information of the first storage region and adjust the timing of transmitting operation commands for the first storage region.

[0103] Subsequently, the second controller 122 may transmit an occupation request command for the first storage area to the memory device 110 via the second channel during a second time period following the first time period.

[0104] After the write operation on the first storage area is completed under the control of the first controller 121, the memory device 110 can set the occupancy status information of the first storage area to a second value according to the occupancy request command of the second controller 122.

[0105] The second controller 122 can transmit a command (②) to the memory device 110 via the second channel to request confirmation of the occupancy status information of the first memory area.

[0106] The second controller 122 can verify that the occupancy status information of the first storage area is a second value. The second controller 122 can transmit an operation command (③) for the first storage area through the second channel. The operation command for the first storage area can be a read command. The second controller 122 can access the first storage area and read the data stored in the first storage area. If the occupancy status information of the first storage area is not the second value, the second controller 122 can transmit an occupancy request command for another storage area. Optionally, the second controller 122 can repeatedly transmit the occupancy request command for the first storage area.

[0107] Since the memory device 110 provides multiple channels, one or more controllers 120 can communicate with the memory device 110 and control the operation of the memory device 110.

[0108] When multiple controllers 120 access the memory device 110, they can access the memory device 110 through at least one individually allocated channel. Since each of the multiple controllers 120 can access multiple storage areas included in the memory device 110, data can be easily shared among the multiple controllers 120 connected to the memory device 110 by setting occupancy status information for each of the multiple storage areas and transmitting operation commands.

[0109] Because the memory device 110 supports multiple channels, the structure in which the controller 120 is connected to the memory device 110 can vary, and the memory device 110 and the controller 120 can be connected in various ways depending on the number of memory devices 110, the number of channels, the number of controllers 120, and the number of channels included in the data storage system 100.

[0110] Figure 9A and Figure 9B An example of the connection structure of a memory device and a controller included in a data storage system according to an embodiment of the present disclosure is shown.

[0111] Reference Figure 9A The data storage system 100 may include a controller 120 and a memory device 110, and the memory device 110 may include, for example, a first memory device 111, a second memory device 112, a third memory device 113, and a fourth memory device 114. Each memory device 110 may be referred to as a memory die.

[0112] Each memory device 110 can communicate through multiple channels. For example, each memory device 110 may include two channels. The memory device 110 can communicate with the controller 120 through a first channel and a second channel.

[0113] The controller 120 can communicate with the memory device 110 through multiple channels. For example, the controller 120 may include eight channels.

[0114] The controller 120 can communicate with the first memory device 111 through two of the eight channels. The controller 120 can also communicate with each of the remaining memory devices (112, 113, and 114) using two separate channels.

[0115] For example, controller 120 can communicate with each memory device using two channels for each memory device 111 to 114, and can first transmit an occupancy request command for the target memory region for the operation command when communicating through the channels. Controller 120 can set the occupancy status information of the memory region through any one of the channels (at least one of each channel), transmit the operation command through the channel allocated according to the occupancy status information, and control the operation for the corresponding memory region.

[0116] The number of channels included in controller 120 may be greater than the number of channels included in memory device 110, or the number of channels included in memory device 110 may be greater than the number of channels included in controller 120. If the number of channels included in memory device 110 is greater than the number of channels included in controller 120, then controller 120 may use some channels of memory device 110 to communicate with each memory device 110.

[0117] As an example, refer to Figure 9B The data storage system 100 may include a controller 120 and a memory device 110, the memory device 110 including a plurality of memory devices 111 to 118. Figure 9B An example of eight memory devices 110 is shown, but other embodiments are not limited to eight.

[0118] The memory device 110 may include multiple channels. As an example, each of the memory devices 110 may include two channels. Therefore, the total number of channels of the memory devices 110 included in the data storage system 100 may be 16.

[0119] like Figure 9A As shown, the controller 120 may have eight channels. When the total number of channels included in the memory device 110 is N, and the number of channels included in the controller 120 is less than N, the controller 120 may communicate with the memory device 110 through some of the channels in the memory device 110.

[0120] As an example, when each memory device 111 to 118 includes a first channel and a second channel, the controller 120 can communicate with some of the memory devices through the first channel and with the remaining memory devices through the second channel. For example, the controller 120 can communicate with the first memory device 111, the second memory device 112, the third memory device 113, and the fourth memory device 114 through the first channel. The controller 120 can communicate with the fifth memory device 115, the sixth memory device 116, the seventh memory device 117, and the eighth memory device 118 through the second channel.

[0121] Even when the controller 120 communicates with each memory device 110 using only one channel, as described in the multi-channel communication description herein, the controller 120 can transmit an occupancy request command before transmitting an operation command. Regardless of the number of memory devices 110, the controller 120 can access the memory regions included in the memory devices 110 in a consistent process. In this case, all occupancy status information of the memory regions included in the memory devices 110 communicating via the first channel can be set to a first value. All occupancy status information of the memory regions included in the memory devices 110 communicating via the second channel can be set to a second value. The controller 120 can check the occupancy status information by checking the occupancy status request and control the operation of the corresponding memory region by transmitting an operation command.

[0122] In addition to the examples described above, some of the multiple memory devices 110 may communicate with the controller 120 via a single channel, while the remaining memory devices may communicate with the controller 120 via multiple channels. In a configuration where the memory device 110 includes multiple channels, the number of channels through which the memory device 110 communicates with the controller 120 can vary. However, by checking occupancy status information, the operational efficiency of the multi-channel memory device 110 can be improved.

[0123] By providing multiple channels in the data storage system 100, which includes the memory device 110, the operational performance of the computing system that performs data processing using the data storage system 100 can be improved. The computing system can also be implemented in a single package.

[0124] Figure 10 An example of the configuration of a computing system including a data storage system is shown in an embodiment of this disclosure.

[0125] Reference Figure 10 An example of a semiconductor package structure including a data storage system 100 and a processor 600 is shown. The data storage system 100 includes a memory device 110 and a controller 120. The memory device 110 has four memory devices numbered 111, 112, 113, and 114.

[0126] In this embodiment, the computing system includes a processor 600 and a data storage system 100. Each of the memory devices 110 included in the data storage system 100 can communicate with a controller 120 via two channels. The controller 120 can communicate with each numbered memory device 111 to 114 via the two channels and control the timing of transmitting operation commands based on the occupancy status information of the memory region to be operated.

[0127] Memory device 110 can be stacked and placed on controller 120. Controller 120 and memory device 110 can be placed on redistribution layer (RDL) 700. For example, memory device 110 can be electrically connected to redistribution layer 700 via vertical wires. Redistribution layer 700 can provide a wiring structure in which controller 120 or memory device 110 is electrically connected to interposer 800 located below redistribution layer 700. Redistribution layer 700 can be electrically connected to interposer 800 via micro-bumps 1001. Processor 600 can be placed on interposer 800. Processor 600 can be electrically connected to interposer 800 via micro-bumps 1001.

[0128] The redistribution layer 700 and the processor 600 on the intermediary layer 800 can be electrically connected via wiring included in the intermediary layer 800. Through this configuration, the controller 120 and the processor 600 in the data storage system 100 can be electrically connected.

[0129] Interposer 800 can be electrically connected to package substrate 900 via bump 1002. Package solder ball 1003 can be located below package substrate 900. Microbumps 1001 and bump 1002 can be electrically connected via interposer 800, and bump 1002 and package solder ball 1003 can be electrically connected via package substrate 900.

[0130] The arrangement of the interposer layer 800 and the redistribution layer 700 enables a compact structure that facilitates the electrical connection between the data storage system 100 and the processor 600 within a single semiconductor package.

[0131] The data storage system 100 is located near the processor 600 and provides enhanced operational performance via a controller 120 that communicates with and controls command processing for the memory device 110, which has multiple channels. This improves the operational performance of a computing system including a processor 600 that processes data using the data storage system 100.

[0132] Although various embodiments of the disclosed technology have been described in particular detail and with different specifics for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions may be made based on the content disclosed or described herein without departing from the spirit and scope of the invention as defined in the claims.

Claims

1. A data storage system, comprising: Multiple storage areas, including a first storage area and a second storage area, are used to store data; A memory device, including a first channel and a second channel for communication; as well as The controller transmits operation commands to the memory device through at least one of the first channel and the second channel, and controls operations on the first storage region through the first channel during a first time period, and controls operations on the second storage region through the second channel during a portion of the first time period.

2. The data storage system according to claim 1, wherein, The controller transmits an occupation request command for the first storage area to the memory device through at least one of the first channel and the second channel, checks the occupation status information of the first storage area, and controls the timing of transmitting operation commands for the first storage area based on the occupation status information of the first storage area.

3. The data storage system according to claim 2, wherein, When the occupancy request command is transmitted through the first channel, if the occupancy status information of the first storage area is a first value, the controller transmits an operation command for the first storage area during the first time period. If the occupancy status information of the first storage area is a value different from the first value, the controller transmits an operation command for the first storage area during the second time period, which is later than the first time period.

4. The data storage system according to claim 3, wherein, Before transmitting the operation command for the first storage area in the second time period, the controller transmits the occupation request command for the first storage area through the first channel.

5. The data storage system according to claim 3, wherein, If the occupancy status information of the first storage area is different from the first value, the controller transmits an occupancy request command for the third storage area among the plurality of storage areas through the first channel.

6. The data storage system according to claim 2, wherein, After transmitting a request command for the occupancy of the first storage area, the controller transmits a command to the memory device requesting confirmation of the occupancy status information of the first storage area.

7. The data storage system according to claim 2, wherein, The occupancy status information of the first storage area is a second value, and an operation based on the operation command received through the second channel is performed on the first storage area.

8. The data storage system according to claim 2, wherein, The memory device includes: A first memory device includes a first channel and a second channel, and communicates with the controller via the first channel; and The second memory device includes the first channel and the second channel, and communicates with the controller through the second channel.

9. The data storage system according to claim 8, wherein, The sum of the number of channels in the first memory device and the number of channels in the second memory device is greater than the number of channels in the controller.

10. The data storage system according to claim 8, wherein, The occupancy status information of all storage regions in the plurality of storage regions included in the first memory device is set to a first value, and The occupancy status information of all storage regions in the plurality of storage regions included in the second memory device is set to the second value.

11. The data storage system according to claim 8, wherein, The controller transmits the occupancy request command before transmitting the operation command to the first memory device and the second memory device.

12. The data storage system according to claim 2, wherein, The controller includes: A first controller communicates with the memory device via the first channel and accesses the plurality of memory regions; and The second controller communicates with the memory device through the second channel and accesses the plurality of memory regions during time periods other than the time periods during which the first controller accesses the plurality of memory regions.

13. The data storage system according to claim 12, wherein, The first controller transmits a write command for the first storage region to the memory device during the first time period, and The second controller transmits a read command for the first storage region to the memory device during a second time period following the first time period.

14. The data storage system according to claim 13, wherein, Before transmitting the write command, the first controller transmits an occupancy request command for the first storage region to the memory device, and Before transmitting the read command, the second controller transmits an occupancy request command for the first storage area to the memory device.

15. A memory device, comprising: Multiple storage areas; as well as A switching unit controls the connection between each of the plurality of storage areas and N channels, where N is an integer greater than or equal to 2. The memory device receives operation commands for the first storage region through the first channel of the N channels, and During at least a portion of the time period in which the memory device performs an operation on the first memory region, it receives an operation command for a second memory region, which is different from the first memory region, via a second channel of the N channels.

16. The memory device according to claim 15, wherein, The memory device sets the occupancy status information of the first storage area to a first value according to the occupancy request command for the first storage area received through the first channel, and the memory device receives the operation command for the first storage area through the first channel.

17. The memory device according to claim 16, wherein, When performing an operation according to the operation command on the first storage area, the memory device receives an occupancy request command for the first storage area through the second channel, and The occupancy status information of the first storage area remains at the first value.

18. The memory device according to claim 17, wherein, After the operation on the first storage area according to the operation command is terminated, the memory device receives an occupancy request command for the first storage area through the second channel. The occupancy status information of the first storage area changes to the second value, and After the occupancy status information of the first storage area changes to the second value, the operation command for the first storage area is received through the second channel.

19. A controller, comprising: The interface unit communicates with the memory device through the first and second channels; as well as The control logic transmits an occupation request command for the target storage area through the first channel, checks the occupation status information of the target storage area, and if the occupation status information of the target storage area is a first value, transmits an operation command for the target storage area through the first channel.

20. The controller according to claim 19, wherein, When the occupancy status information of the target storage area is the first value, the control logic transmits the operation command in a first time period, and when the occupancy status information of the target storage area is the second value, the control logic transmits the operation command in a second time period after the first time period.

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