Data transmission method and device, chip, equipment, medium and program product
Through a collaborative control mechanism, the microprocessor and the main processor work together to perform data transmission tasks, which solves the problems of high processor load and high power consumption, improves data transmission efficiency and reduces power consumption, and optimizes user experience and chip design.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING X RING TECHNOLOGY CO LTD
- Filing Date
- 2026-03-17
- Publication Date
- 2026-07-10
AI Technical Summary
In existing technologies, processors bear a heavy load when performing data transmission tasks, resulting in low data transmission efficiency and high power consumption.
A collaborative control mechanism is adopted. The microprocessor receives the control task information of the data transmission controller sent by the main processor and continues to execute the control task based on the information. The main processor updates the task information to realize task migration, and the microprocessor updates and sends the task information for collaborative execution.
It significantly reduces the load on the main processor, improves data transfer efficiency, reduces power consumption and system overhead, optimizes user experience, and reduces chip area and manufacturing costs.
Smart Images

Figure CN122363883A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of communication technology, and in particular to a data transmission method, apparatus, chip, electronic device, storage medium, and computer program product. Background Technology
[0002] Currently, most data transmission tasks are performed by the processor controlling the data transmission controller. However, during operation, in addition to controlling the data transmission controller, the processor also needs to perform interrupt response, thread scheduling and other operations, resulting in a large processor load and low data transmission efficiency. In addition, the processor has a high power consumption problem, which also results in a large power consumption required for data transmission. Summary of the Invention
[0003] This disclosure provides a data transmission method, apparatus, electronic device, chip, storage medium, and computer program product to at least solve the problems of low data transmission efficiency and high power consumption in related technologies. The technical solution of this disclosure is as follows:
[0004] According to a first aspect of the present disclosure, a data transmission method is provided, applicable to a microprocessor, the method comprising: receiving task information of a control task of a data transmission controller sent by a main processor; wherein the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to perform the data transmission task; continuing to execute the control task based on the task information; updating the task information and sending the updated task information to the main processor; wherein the updated task information is used by the main processor to continue executing the control task.
[0005] According to a second aspect of the present disclosure, another data transmission method is provided, applicable to a main processor. The method includes: executing a control task of a data transmission controller; wherein the control task is used to control the data transmission controller to execute the data transmission task; before the control task is completed, sending task information of the control task to a microprocessor; wherein the task information is used by the microprocessor to continue executing the control task; receiving updated task information sent by the microprocessor; and continuing to execute the control task based on the updated task information.
[0006] According to a third aspect of the present disclosure, a data transmission apparatus is provided, suitable for a microprocessor. The apparatus includes: a receiving module configured to receive task information of a control task of a data transmission controller sent by a main processor; wherein the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to perform a data transmission task; an execution module configured to continue executing the control task based on the task information; and a sending module configured to update the task information and send the updated task information to the main processor; wherein the updated task information is used by the main processor to continue executing the control task.
[0007] According to a fourth aspect of the present disclosure, another data transmission apparatus is provided, suitable for a main processor. The apparatus includes: a first execution module configured to execute a control task of a data transmission controller; wherein the control task is used to control the data transmission controller to execute a data transmission task; a sending module configured to send task information of the control task to a microprocessor before the control task is completed; wherein the task information is used by the microprocessor to continue executing the control task; a receiving module configured to receive updated task information sent by the microprocessor; and a second execution module configured to continue executing the control task based on the updated task information.
[0008] According to a fifth aspect of the present disclosure, a chip is provided, comprising: a main processor, a microprocessor, and a data transmission controller; The main processor is used to execute the steps of the data transmission method described in the second aspect of the present disclosure. The microprocessor is used to execute the steps of the data transmission method described in the first aspect of the embodiments of this disclosure; The data transmission controller is used to perform data transmission tasks.
[0009] According to a sixth aspect of the present disclosure, an electronic device is provided, including the chip described in the fifth aspect of the present disclosure.
[0010] According to a seventh aspect of the present disclosure, a non-transitory computer-readable storage medium is provided, having stored thereon computer program instructions that, when executed by a processor, implement the steps of the data transmission method described in the first aspect of the present disclosure, and / or implement the steps of the data transmission method described in the second aspect of the present disclosure.
[0011] According to an eighth aspect of the present disclosure, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps of the data transmission method described in the first aspect of the present disclosure, and / or implements the steps of the data transmission method described in the second aspect of the present disclosure.
[0012] The technical solution provided by the embodiments of this disclosure brings at least the following beneficial effects: receiving task information of the control task of the data transmission controller sent by the main processor; wherein, the task information is sent before the control task is completed, the control task is used to control the data transmission controller to execute the data transmission task, continue to execute the control task based on the task information, update the task information, and send the updated task information to the main processor; wherein, the updated task information is used by the main processor to continue to execute the control task. Therefore, this disclosure proposes a cooperative control mechanism, in which the microprocessor receives the task information of the control task of the data transmission controller sent by the main processor, and continues to execute the control task based on the task information. Thus, the main processor and the microprocessor can cooperate in executing the control task, which can significantly reduce the load on the main processor. Furthermore, the microprocessor, with its low-power, lightweight architecture, can significantly improve data transmission efficiency and significantly reduce the power consumption and system overhead required for data transmission.
[0013] In addition, the microprocessor can continue to execute control tasks based on task information, which means that control tasks can be automatically migrated from the main processor to the microprocessor without the user having to manually switch to the microprocessor to execute control tasks, thus optimizing the user experience.
[0014] In addition, the microprocessor can update the task information and send the updated task information to the main processor, so that the main processor can continue to execute the control task based on the updated task information, thus realizing the migration of the control task from the microprocessor to the main processor.
[0015] In addition, this solution can significantly reduce the load on the main processor, thereby significantly reducing the performance requirements, power consumption and system overhead of the main processor. The main processor can adopt a lighter architecture design, which helps to reduce chip area, increase chip integration and reduce chip manufacturing costs.
[0016] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.
[0018] Figure 1This is a flowchart illustrating a data transmission method according to an exemplary embodiment.
[0019] Figure 2 This is a flowchart illustrating a data transmission method according to another exemplary embodiment.
[0020] Figure 3 This is a flowchart illustrating a data transmission method according to another exemplary embodiment.
[0021] Figure 4 This is a flowchart illustrating a data transmission method according to another exemplary embodiment.
[0022] Figure 5 This is a flowchart illustrating a data transmission method according to another exemplary embodiment.
[0023] Figure 6 This is a flowchart illustrating a data transmission method according to another exemplary embodiment.
[0024] Figure 7 This is a schematic diagram of the structure of a chip according to an exemplary embodiment.
[0025] Figure 8 This is a schematic diagram of the structure of a data transmission device according to an exemplary embodiment.
[0026] Figure 9 This is a schematic diagram illustrating the structure of another data transmission device according to an exemplary embodiment.
[0027] Figure 10 This is a schematic diagram of the structure of an electronic device according to an exemplary embodiment.
[0028] Figure 11 This is a schematic diagram of the structure of a chip according to another exemplary embodiment. Detailed Implementation
[0029] To enable those skilled in the art to better understand the technical solutions of this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings.
[0030] It should be noted that the terms "first," "second," etc., used in this disclosure and the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this disclosure.
[0031] The following description, with reference to the accompanying drawings, outlines a data transmission method, apparatus, chip, electronic device, storage medium, and computer program product according to embodiments of the present disclosure.
[0032] Figure 1 This is a flowchart illustrating a data transmission method according to an exemplary embodiment, such as... Figure 1 As shown, the data transmission method of this disclosure includes the following steps.
[0033] S101, receive task information of the control task of the data transmission controller sent by the main processor; wherein, the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to execute the data transmission task.
[0034] S102, continue executing the control task based on the task information.
[0035] It should be noted that the data transmission method of this embodiment is executed by a microcontroller. The data transmission method of this embodiment can be executed by the data transmission device of this embodiment, which can be configured in any microcontroller to execute the data transmission method of this embodiment.
[0036] The main processor, also known as a general-purpose processor, is a high-performance, fully functional processor designed to run complex operating systems and multitasking applications. It includes the main CPU, which has stronger computing power and a more complex architecture than a microprocessor, but also consumes more power and has higher system overhead.
[0037] A microprocessor, also called a microprocessor, is a processor composed of one or a few large-scale integrated circuits, such as a microCPU (Central Processing Unit). Compared with the main processor, it has advantages such as low power consumption and low system overhead.
[0038] In this embodiment of the disclosure, the processor controls the data transmission controller to perform data transmission tasks. However, during operation, in addition to controlling the data transmission controller, the processor also needs to perform operations such as interrupt response and thread scheduling, resulting in a large processor load and low data transmission efficiency. In addition, the processor has a high power consumption problem, which results in a large power consumption required for data transmission.
[0039] To address the aforementioned issues, this disclosure proposes a collaborative control mechanism. The microprocessor receives task information from the data transmission controller sent by the main processor and continues to execute the control task based on the task information. Thus, the main processor and the microprocessor can collaboratively execute the control task, which can significantly reduce the load on the main processor. In addition, the microprocessor, with its low power consumption and lightweight architecture, can significantly improve data transmission efficiency and significantly reduce the power consumption and system overhead required for data transmission.
[0040] In addition, the microprocessor can continue to execute control tasks based on task information, which means that control tasks can be automatically migrated from the main processor to the microprocessor without the user having to manually switch to the microprocessor to execute control tasks, thus optimizing the user experience.
[0041] like Figure 7 As shown, chip 700 includes a main processor 701, a microprocessor 702, and a data transfer controller 703. This solution can significantly reduce the load on the main processor, thereby significantly reducing the performance requirements, power consumption, and system overhead of the main processor. The main processor can adopt a more lightweight architecture design, which helps to reduce chip area, increase chip integration, and reduce chip manufacturing costs.
[0042] It should be noted that the control task can include any step of the processor controlling the data transmission controller in related technologies. The control task is not overly limited; it may include data transmission controller initialization, triggering transmission startup, status monitoring and interrupt handling, and exception handling for the data transmission task. Initialization includes setting transmission parameters, configuring the operating mode, and enabling relevant peripherals and the clock. Triggering transmission startup includes writing a startup command to the control register of the data transmission controller. Status monitoring and interrupt handling includes periodically reading the status register of the data transmission controller, checking whether the transmission is complete, and handling interrupt requests sent by the data transmission controller. Exception handling for the data transmission task includes checking for transmission errors and, if errors are found, executing the exception handling procedure.
[0043] The task information for control tasks is not subject to many restrictions, but may include the execution progress of control tasks, executed steps, steps to be executed, the operation information of data transmission controllers, and the execution information of data transmission tasks.
[0044] There are no strict limitations on data transmission controllers, such as USB (Universal Serial Bus) controllers, network card controllers, PCIe (Peripheral Component Interconnect Express) controllers, etc.
[0045] In some possible implementations, before continuing to execute the control task based on the task information, the process further includes receiving a sixth instruction message sent by the main processor; wherein the sixth instruction message is used to instruct the microprocessor to continue executing the control task. Thus, the microprocessor only continues to execute the control task based on the task information after receiving the sixth instruction message sent by the main processor.
[0046] S103, update the task information and send the updated task information to the main processor; the updated task information is used by the main processor to continue executing the control task.
[0047] In this disclosure, the microprocessor can update the task information and send the updated task information to the main processor, so that the main processor can continue to execute the control task based on the updated task information, that is, the control task can be migrated from the microprocessor to the main processor.
[0048] In some possible implementations, after continuing to execute the control task based on the task information, a fifth instruction message is sent to the main processor; wherein the fifth instruction message is used to instruct the main processor to continue executing the control task. Thus, the microprocessor can notify the main processor to continue executing the control task.
[0049] It should be noted that this disclosure does not impose any restrictions on the execution sequence of steps S101-S103. Figure 1 The example only demonstrates the sequential execution of steps S101-S103. For instance, steps S101-S102 can be implemented as a standalone embodiment.
[0050] The data transmission method provided in the embodiments of this disclosure receives task information of a data transmission controller sent by a main processor. The task information is sent before the control task is completed. The control task is used to control the data transmission controller to execute the data transmission task. Based on the task information, the control task continues to be executed, the task information is updated, and the updated task information is sent to the main processor. The updated task information is used by the main processor to continue executing the control task. Therefore, this disclosure proposes a cooperative control mechanism whereby the microprocessor receives the task information of the data transmission controller sent by the main processor and continues to execute the control task based on the task information. This allows the main processor and the microprocessor to collaboratively execute the control task, significantly reducing the load on the main processor. Furthermore, the microprocessor, with its low-power, lightweight architecture, can significantly improve data transmission efficiency and significantly reduce the power consumption and system overhead required for data transmission.
[0051] In addition, the microprocessor can continue to execute control tasks based on task information, which means that control tasks can be automatically migrated from the main processor to the microprocessor without the user having to manually switch to the microprocessor to execute control tasks, thus optimizing the user experience.
[0052] In addition, the microprocessor can update the task information and send the updated task information to the main processor, so that the main processor can continue to execute the control task based on the updated task information, thus realizing the migration of the control task from the microprocessor to the main processor.
[0053] In addition, this solution can significantly reduce the load on the main processor, thereby significantly reducing the performance requirements, power consumption and system overhead of the main processor. The main processor can adopt a lighter architecture design, which helps to reduce chip area, increase chip integration and reduce chip manufacturing costs.
[0054] Figure 2 This is a flowchart illustrating a data transmission method according to another exemplary embodiment, such as... Figure 2 As shown, the data transmission method of this disclosure includes the following steps.
[0055] S201, receive task information of the control task of the data transmission controller sent by the main processor; wherein, the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to execute the data transmission task.
[0056] The details of step S201 can be found in the above embodiments and will not be repeated here.
[0057] S202, based on task information, activate or disable the transmission function of the data transmission controller.
[0058] In some possible implementations, the transmission function of the data transmission controller is activated or disabled based on task information. This includes activating the data transmission controller's transmission function in response to task information indicating that the transmission link corresponding to the data transmission controller is in a connected state, and disabling the data transmission controller's transmission function in response to task information indicating that the transmission link corresponding to the data transmission controller is in a disconnected state. Thus, the data transmission controller's transmission function can be activated when the transmission link corresponding to the data transmission controller is in a connected state, and disabled when the transmission link corresponding to the data transmission controller is in a disconnected state.
[0059] In some possible implementations, activating or disabling the transmission function of the data transmission controller based on task information includes determining whether the transmission function of the data transmission controller meets activation or disabling conditions based on the task information; activating the transmission function of the data transmission controller in response to meeting the activation conditions; and disabling the transmission function of the data transmission controller in response to meeting the disabling conditions. Thus, the determination of whether the transmission function of the data transmission controller meets activation or disabling conditions can be taken into account with task information; the transmission function of the data transmission controller is activated when it meets the activation conditions, and disabled when it meets the disabling conditions.
[0060] It should be noted that activating or disabling the transmission function of the data transmission controller can be achieved using any data transmission controller control method in the relevant technology, without further limitations. For example, activating the transmission function of the data transmission controller includes enabling the endpoints, channels, or queues of the data transmission controller, while disabling the transmission function of the data transmission controller includes disabling the endpoints, channels, or queues of the data transmission controller.
[0061] S203, based on task information, allocates and reclaims target resources; where target resources are the resources required by the data transmission controller to execute data transmission tasks.
[0062] It should be noted that there are no excessive restrictions on the target resources, such as including descriptors and memory.
[0063] In some possible implementations, the target resources are allocated and reclaimed based on task information, including determining the resource allocation requirements of the data transmission controller based on the task information, and allocating the target resources to the data transmission controller based on the resource allocation requirements.
[0064] In some possible implementations, the allocation and reclamation of target resources are based on task information, including determining the resource reclamation requirements of the data transmission controller based on the task information, and reclaiming the target resources allocated to the data transmission controller based on the resource reclamation requirements.
[0065] S204, update the task information and send the updated task information to the main processor; the updated task information is used by the main processor to continue executing the control task.
[0066] The details of step S204 can be found in the above embodiments and will not be repeated here.
[0067] It should be noted that this disclosure does not impose any restrictions on the execution sequence of steps S201-S204. Figure 2The example only demonstrates the sequential execution of steps S201-S204. For instance, steps S201, S202, and S204 can be implemented as standalone embodiments, and steps S201, S203, and S204 can also be implemented as standalone embodiments.
[0068] The data transmission method provided in the embodiments of this disclosure activates or disables the transmission function of the data transmission controller based on task information, and / or allocates and reclaims target resources based on task information; wherein, the target resources are the resources required by the data transmission controller to perform data transmission tasks. Thus, the microprocessor can undertake the control tasks of activating or disabling the transmission function of the data transmission controller, and / or can undertake the control tasks of resource allocation and reclamation. These two types of control tasks typically occur frequently during data transmission. The main processor does not need to frequently handle these two types of control tasks, which can significantly reduce the load on the main processor, significantly improve data transmission efficiency, and significantly reduce the power consumption and system overhead required for data transmission.
[0069] Figure 3 This is a flowchart illustrating a data transmission method according to another exemplary embodiment, such as... Figure 3 As shown, the data transmission method of this disclosure includes the following steps.
[0070] S301 receives task information from the main processor regarding the control task of the data transmission controller; the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to execute the data transmission task.
[0071] The details of step S301 can be found in the above embodiments and will not be repeated here.
[0072] S302, in response to the task information indicating that the transmission link corresponding to the data transmission controller is in a connected state, allocates target memory to the data transmission controller; wherein, the target memory is used by the data transmission controller for read and write operations.
[0073] It should be noted that allocating target memory to the data transmission controller can be achieved using any memory allocation method of the data transmission controller in the relevant technologies, and no further restrictions are imposed here.
[0074] In some possible implementations, the method further includes, in response to a data transmission task, using memory for storing data to be transmitted as target memory for a data transmission task; wherein the target memory is used by the data transmission controller to perform read operations to obtain the data to be transmitted.
[0075] In some possible implementations, the method further includes, in response to a data transmission task as a data receiving task, using memory for storing data to be received as target memory; wherein the target memory is used by the data transmission controller to perform write operations on the received data.
[0076] S303, Based on the description information of the data transmission task, generate a target descriptor; wherein, the target descriptor is used to indicate the description information.
[0077] S304, Write the target descriptor to the descriptor queue of the data transmission controller; wherein, the descriptor queue is used to store the descriptors to be read by the data transmission controller.
[0078] It should be noted that the target descriptor can be generated using any descriptor generation method in the relevant technologies, and no further restrictions are imposed here.
[0079] In some possible implementations, a target descriptor is generated based on the description information of the data transmission task, including filling idle descriptors with information based on the description information of the data transmission task to generate the target descriptor.
[0080] It should be noted that there are no excessive restrictions on the target descriptor or description information.
[0081] In some possible implementations, the descriptive information includes at least one of the following: The memory address of the target memory; The amount of data to be transmitted; The source address and destination address of the data to be transmitted.
[0082] S305, in response to the successful execution of the data transmission task, reclaims the target descriptor.
[0083] It should be noted that the target descriptor can be reclaimed using any descriptor reclamation method in the relevant technologies, and no particular limitation is made here. For example, the target descriptor can be marked as an idle descriptor, and / or the target descriptor can be written to an idle descriptor queue for reclamation.
[0084] S306, in response to the data transmission task being converted to a data sending task and the data transmission task being executed successfully, performs a reclaiming process on the target memory.
[0085] It is understandable that a data transmission task is a data sending task, and if the data transmission task is executed successfully, it means that the data to be sent has been retrieved from the target memory, and the target memory can then be reclaimed.
[0086] It should be noted that the target memory can be reclaimed using any memory reclamation method available in the relevant technologies; no particular limitation is made here. For example, the target memory can be marked as free memory for reclamation.
[0087] S307, in response to the data transmission task being a data receiving task, and the data transmission task being successfully executed, and the data received by the data transmission controller being retrieved from the target memory, the target memory is reclaimed.
[0088] It is understandable that the data transmission task is a data receiving task, and the data transmission task is executed successfully. The data received by the data transmission controller has been retrieved from the target memory, indicating that after the data received by the data transmission controller is successfully stored in the target memory, it is retrieved from the target memory by the data usage module, and the target memory can then be reclaimed.
[0089] In some possible implementations, the method further includes receiving first indication information sent by a data transmission controller, wherein the first indication information is used to indicate that the data transmission task was successfully executed.
[0090] In response to the first indication information indicating successful execution of the data receiving task, a second indication information is sent to the data usage module; wherein the second indication information indicates the memory address of the target memory so that the data usage module can perform a read operation on the target memory.
[0091] The receiving data module sends a third indication message; wherein the third indication message is used to indicate that the data using module has retrieved the data received by the data transmission controller from the target memory.
[0092] Therefore, the microprocessor can receive the first instruction information sent by the data transmission controller and determine that the data transmission task has been successfully executed based on the first instruction information.
[0093] When the first indication message indicates that the data receiving task has been successfully executed, the microprocessor sends a second indication message to the data usage module to inform the data usage module of the memory address of the target memory, so that the data usage module can read data from the target memory.
[0094] The microprocessor can receive third indication information sent by the data usage module and determine, based on the third indication information, that the data received by the data transmission controller has been retrieved from the target memory.
[0095] S308 updates the task information and sends the updated task information to the main processor; the updated task information is used by the main processor to continue executing the control task.
[0096] The details of step S308 can be found in the above embodiments and will not be repeated here.
[0097] It should be noted that this disclosure does not limit the execution sequence of steps S301-S308. For example, steps S301-S302 and S308 can be implemented as independent embodiments, steps S301-S303 and S308 can be implemented as independent embodiments, steps S301-S304 and S308 can be implemented as independent embodiments, steps S301-S305 and S308 can be implemented as independent embodiments, steps S301-S304, S306 and S308 can be implemented as independent embodiments, and steps S301-S304, S307 and S308 can be implemented as independent embodiments.
[0098] The data transmission method provided in the embodiments of this disclosure allocates target memory to the data transmission controller in response to task information indicating that the transmission link corresponding to the data transmission controller is in a connected state. The target memory is used by the data transmission controller for read and write operations. A target descriptor is generated based on the description information of the data transmission task. The target descriptor is used to indicate the description information and is written to the descriptor queue of the data transmission controller. The descriptor queue stores descriptors to be read by the data transmission controller. Therefore, when the transmission link corresponding to the data transmission controller is in a connected state, the microprocessor can allocate target memory to the data transmission controller, generate a target descriptor based on the description information of the data transmission task, and write the target descriptor to the descriptor queue of the data transmission controller.
[0099] Furthermore, in response to a successful data transfer task, the target descriptor is reclaimed; in response to a successful data transfer task (e.g., a data sending task), the target memory is reclaimed; and in response to a successful data transfer task (e.g., a data receiving task), the memory allocated to the data transfer controller is reclaimed after the data received by the data transfer controller has been retrieved from the target memory. Thus, after a successful data transfer task, the microprocessor can reclaim both the target descriptor and the target memory.
[0100] Figure 4 This is a flowchart illustrating a data transmission method according to another exemplary embodiment, such as... Figure 4 As shown, the data transmission method of this disclosure includes the following steps.
[0101] S401 receives task information from the main processor regarding the control task of the data transmission controller; wherein, the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to execute the data transmission task.
[0102] The details of step S401 can be found in the above embodiments and will not be repeated here.
[0103] S402, in response to the task information indicating that the transmission link corresponding to the data transmission controller is disconnected, the target memory allocated to the data transmission controller is reclaimed; wherein, the target memory is used by the data transmission controller for read and write operations.
[0104] S403, perform the recycling process on the target descriptor; wherein, the target descriptor is used to indicate the description information of the data transmission task.
[0105] It should be noted that the relevant content on the recycling of target memory and target descriptors can be found in the above embodiments, and will not be repeated here.
[0106] S404, update the task information and send the updated task information to the main processor; the updated task information is used by the main processor to continue executing the control task.
[0107] The details of step S404 can be found in the above embodiments and will not be repeated here.
[0108] It should be noted that this disclosure does not impose any restrictions on the execution sequence of steps S401-S404. Figure 4 The example only demonstrates the execution of steps S401-S404 in sequence.
[0109] The data transmission method provided in the embodiments of this disclosure, in response to task information indicating that the transmission link corresponding to the data transmission controller is in a disconnected state, reclaims the target memory allocated to the data transmission controller; wherein the target memory is used by the data transmission controller for read and write operations, and the target descriptor is reclaimed; wherein the target descriptor is used to indicate the description information of the data transmission task. Thus, after the transmission link corresponding to the data transmission controller is in a disconnected state, the microprocessor can reclaim the target descriptor and the target memory.
[0110] Figure 5 This is a flowchart illustrating a data transmission method according to another exemplary embodiment, such as... Figure 5 As shown, the data transmission method of this disclosure includes the following steps.
[0111] S501, receive the fourth indication information sent by the data transmission controller; wherein the fourth indication information is used to indicate that an abnormality has occurred in the data transmission task.
[0112] S502, based on the fourth instruction information, performs exception handling on the data transmission task.
[0113] In this disclosure, the microprocessor can receive a fourth indication message sent by the data transmission controller, wherein the fourth indication message is used to indicate that an abnormality has occurred in the data transmission task, and performs abnormal handling on the data transmission task based on the fourth indication message. That is, the microprocessor can undertake the abnormal handling of the data transmission task. The abnormal handling of the data transmission task usually involves complex processing logic, which can significantly reduce the load on the main processor, significantly improve the data transmission efficiency, and significantly reduce the power consumption and system overhead required for data transmission.
[0114] It should be noted that exception handling for data transmission tasks can be achieved using any of the exception handling methods for data transmission tasks in the relevant technologies.
[0115] In some possible implementations, the data transmission task is handled abnormally based on the fourth indication information, including determining abnormal information of the data transmission task based on the fourth indication information, and handling the data transmission task abnormally based on the abnormal information of the data transmission task.
[0116] In some possible implementations, the abnormal information of the data transmission task is used to perform abnormal handling on the data transmission task. This includes determining the cause of the abnormality of the data transmission task based on the abnormal information, determining the abnormal handling process of the data transmission task based on the cause of the abnormality, and executing the abnormal handling process of the data transmission task to perform abnormal handling on the data transmission task.
[0117] S503 indicates that the exception handling for the data transmission task has failed.
[0118] S504 updates the task information based on the exception information of the data transmission task and sends the updated task information to the main processor; the updated task information is used by the main processor to handle the exception of the data transmission task.
[0119] In this disclosure, after determining that the data transmission task has failed to handle an anomaly, the microprocessor can take into account the anomaly information of the data transmission task, update the task information, and send the updated task information to the main processor. This allows the main processor to handle the data transmission task based on the updated task information, thus enabling the main processor to have stronger computing power, which helps to improve the success rate of anomaly handling and the reliability of data transmission.
[0120] It should be noted that this disclosure does not impose any restrictions on the execution sequence of steps S501-S504. Figure 5 The example only demonstrates the sequential execution of steps S501-S504. For instance, steps S501-S502 can be implemented as a standalone embodiment.
[0121] The data transmission method provided in the embodiments of this disclosure allows a microprocessor to receive a fourth indication message sent by a data transmission controller. The fourth indication message indicates that an anomaly has occurred in the data transmission task, and the microprocessor performs anomaly handling on the data transmission task based on the fourth indication message. In other words, the microprocessor can handle the anomaly handling of the data transmission task. The anomaly handling of the data transmission task usually involves complex processing logic, which can significantly reduce the load on the main processor, significantly improve the data transmission efficiency, and significantly reduce the power consumption and system overhead required for data transmission.
[0122] In addition, after the microprocessor determines that the data transmission task has failed to handle an anomaly, it can take into account the anomaly information of the data transmission task, update the task information, and send the updated task information to the main processor. This allows the main processor to handle the data transmission task based on the updated task information. The main processor has stronger computing power, which helps to improve the success rate of anomaly handling and the reliability of data transmission.
[0123] Figure 6 This is a flowchart illustrating a data transmission method according to another exemplary embodiment, such as... Figure 6 As shown, the data transmission method of this disclosure includes the following steps.
[0124] S601 executes the control task of the data transmission controller; wherein, the control task is used to control the data transmission controller to execute the data transmission task.
[0125] S602, before the control task is completed, sends the control task information to the microprocessor; the task information is used by the microprocessor to continue executing the control task.
[0126] It should be noted that the main processor is the execution entity of the data transmission method in this embodiment of the disclosure. The data transmission method in this embodiment of the disclosure can be executed by the data transmission device in this embodiment of the disclosure, and the data transmission device in this embodiment of the disclosure can be configured in any main processor to execute the data transmission method in this embodiment of the disclosure.
[0127] This disclosure proposes a collaborative control mechanism in which the main processor sends task information of the control task to the microprocessor before the control task is completed, so that the microprocessor can continue to execute the control task based on the task information. Thus, the main processor and the microprocessor can collaboratively execute the control task, which can significantly reduce the load on the main processor. In addition, the microprocessor, with its low power consumption and lightweight architecture, can significantly improve data transmission efficiency and significantly reduce the power consumption and system overhead required for data transmission.
[0128] In addition, the microprocessor can continue to execute control tasks based on task information, which means that control tasks can be automatically migrated from the main processor to the microprocessor without the user having to manually switch to the microprocessor to execute control tasks, thus optimizing the user experience.
[0129] In addition, this solution can significantly reduce the load on the main processor, thereby significantly reducing the performance requirements, power consumption and system overhead of the main processor. The main processor can adopt a lighter architecture design, which helps to reduce chip area, increase chip integration and reduce chip manufacturing costs.
[0130] In some possible implementations, before the control task is completed, the method further includes sending a sixth instruction message to the microprocessor; wherein the sixth instruction message is used to instruct the microprocessor to continue executing the control task. Thus, the main processor can notify the microprocessor to continue executing the control task.
[0131] S603 receives updated task information sent by the microprocessor.
[0132] S604, continue executing the control task based on the updated task information.
[0133] In this disclosure, the main processor can receive updated task information sent by the microprocessor and continue to execute the control task based on the updated task information. This enables the control task to be automatically migrated from the microprocessor to the main processor without requiring the user to manually switch to the main processor to execute the control task, thus optimizing the user experience.
[0134] In some possible implementations, the updated task information is generated based on the exception information of the data transmission task. Control tasks continue to be executed based on the updated task information, including exception handling for the data transmission task. Therefore, when an exception occurs in the data transmission task, the main processor can handle the exception based on the updated task information. The main processor has stronger computing power, which helps improve the success rate of exception handling and enhances the reliability of data transmission.
[0135] In some possible implementations, before continuing to execute the control task based on the updated task information, the process further includes receiving a fifth instruction message sent by the microprocessor; wherein the fifth instruction message is used to instruct the main processor to continue executing the control task. Thus, the main processor only continues to execute the control task based on the updated task information after receiving the fifth instruction message.
[0136] It should be noted that this disclosure does not impose any restrictions on the execution sequence of steps S601-S604. Figure 6 The example only demonstrates the sequential execution of steps S601-S604. For instance, steps S601-S602 can be implemented as a standalone embodiment.
[0137] The data transmission method provided in the embodiments of this disclosure executes the control task of a data transmission controller. The control task is used to control the data transmission controller to execute the data transmission task. Before the control task is completed, task information of the control task is sent to the microprocessor. The task information is used by the microprocessor to continue executing the control task. The microprocessor receives updated task information sent by the microprocessor and continues to execute the control task based on the updated task information. Therefore, this disclosure proposes a cooperative control mechanism. Before the control task is completed, the main processor sends the task information of the control task to the microprocessor, so that the microprocessor can continue to execute the control task based on the task information. Thus, the main processor and the microprocessor can cooperate in executing the control task, significantly reducing the load on the main processor. Furthermore, the microprocessor, with its low-power, lightweight architecture, can significantly improve data transmission efficiency and significantly reduce the power consumption and system overhead required for data transmission.
[0138] In addition, the microprocessor can continue to execute control tasks based on task information, which means that control tasks can be automatically migrated from the main processor to the microprocessor without the user having to manually switch to the microprocessor to execute control tasks, thus optimizing the user experience.
[0139] In addition, the main processor can receive updated task information sent by the microprocessor and continue to execute control tasks based on the updated task information. This enables control tasks to be automatically migrated from the microprocessor to the main processor without requiring the user to manually switch to the main processor to execute control tasks, thus optimizing the user experience.
[0140] In addition, this solution can significantly reduce the load on the main processor, thereby significantly reducing the performance requirements, power consumption and system overhead of the main processor. The main processor can adopt a lighter architecture design, which helps to reduce chip area, increase chip integration and reduce chip manufacturing costs.
[0141] For ease of understanding, an exemplary embodiment is provided: Step 1: The main processor executes the control task of the data transmission controller; wherein, the control task is used to control the data transmission controller to execute the data transmission task.
[0142] Step 2: Before the control task is completed, the main processor sends the control task information to the microprocessor; the task information is used by the microprocessor to continue executing the control task.
[0143] Step 3: The microprocessor receives the task information sent by the main processor.
[0144] Step 4: Based on the task information, the microprocessor activates or disables the data transmission controller's transmission function.
[0145] Step 5: The microprocessor allocates and reclaims target resources based on task information; where target resources are the resources required by the data transmission controller to execute data transmission tasks.
[0146] Step 6: The microprocessor updates the task information and sends the updated task information to the main processor.
[0147] Step 7: The main processor receives the updated task information sent by the microprocessor.
[0148] Step 8: The main processor continues to execute the control task based on the updated task information.
[0149] Figure 8 This is a schematic diagram of the structure of a data transmission device according to an exemplary embodiment.
[0150] Reference Figure 8 The data transmission device 800 of this embodiment includes: a receiving module 801, an execution module 802, and a sending module 803.
[0151] The receiving module 801 is configured to receive task information of the control task of the data transmission controller sent by the main processor; wherein the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to perform the data transmission task. Execution module 802 is configured to continue executing the control task based on the task information; The sending module 803 is configured to update the task information and send the updated task information to the main processor; wherein the updated task information is used by the main processor to continue executing the control task.
[0152] In some possible implementations, the execution module 802 is further configured to perform at least one of the following: Based on the task information, activate or disable the transmission function of the data transmission controller; Based on the task information, target resources are allocated and reclaimed; wherein, the target resources are the resources required by the data transmission controller to execute the data transmission task.
[0153] In some possible implementations, the execution module 802 is further configured to: activate the transmission function of the data transmission controller in response to the task information indicating that the transmission link corresponding to the data transmission controller is in a connected state; and disable the transmission function of the data transmission controller in response to the task information indicating that the transmission link corresponding to the data transmission controller is in a disconnected state.
[0154] In some possible implementations, the execution module 802 is further configured to: allocate target memory to the data transmission controller in response to the task information indicating that the transmission link corresponding to the data transmission controller is in a connected state; wherein the target memory is used by the data transmission controller for read and write operations; generate a target descriptor based on the description information of the data transmission task; wherein the target descriptor is used to indicate the description information; and write the target descriptor into the descriptor queue of the data transmission controller; wherein the descriptor queue is used to store descriptors to be read by the data transmission controller.
[0155] In some possible implementations, after writing the target descriptor into the descriptor queue of the data transmission controller, the execution module 802 is further configured to perform at least one of the following: In response to the successful execution of the data transmission task, the target descriptor is recycled. In response to the data transmission task being a data sending task and the data transmission task being executed successfully, the target memory is reclaimed. In response to the data transmission task being a data receiving task, and the data transmission task being executed successfully, and the data received by the data transmission controller having been retrieved from the target memory, the target memory is reclaimed.
[0156] In some possible implementations, the execution module 802 is further configured to: receive a first indication message sent by the data transmission controller, wherein the first indication message is used to indicate that the data transmission task has been successfully executed; in response to the first indication message indicating that the data receiving task has been successfully executed, send a second indication message to the data usage module; wherein the second indication message is used to indicate the memory address of the target memory so that the data usage module can perform a read operation on the target memory; and receive a third indication message sent by the data usage module; wherein the third indication message is used to indicate that the data usage module has retrieved the data received by the data transmission controller from the target memory.
[0157] In some possible implementations, the execution module 802 is further configured to: in response to the task information indicating that the transmission link corresponding to the data transmission controller is disconnected, reclaim the target memory allocated to the data transmission controller; wherein the target memory is used by the data transmission controller for read and write operations; and reclaim the target descriptor; wherein the target descriptor is used to indicate the description information of the data transmission task.
[0158] In some possible implementations, the execution module 802 is further configured to: receive a fourth indication message sent by the data transmission controller; wherein the fourth indication message is used to indicate that the data transmission task has encountered an anomaly; and perform anomaly handling on the data transmission task based on the fourth indication message.
[0159] In some possible implementations, before updating the task information, the sending module 803 is further configured to: determine that the abnormal handling of the data transmission task has failed; The sending module 803 is further configured to: update the task information based on the abnormal information of the data transmission task; wherein the updated task information is used by the main processor to perform abnormal handling on the data transmission task.
[0160] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.
[0161] The data transmission apparatus provided in the embodiments of this disclosure receives task information of a control task from a data transmission controller sent by a main processor. The task information is sent before the control task is completed. The control task is used to control the data transmission controller to execute the data transmission task. Based on the task information, the control task continues to be executed, the task information is updated, and the updated task information is sent to the main processor. The updated task information is used by the main processor to continue executing the control task. Therefore, this disclosure proposes a cooperative control mechanism whereby the microprocessor receives the task information of the control task from the data transmission controller sent by the main processor and continues to execute the control task based on the task information. This allows the main processor and the microprocessor to collaboratively execute the control task, significantly reducing the load on the main processor. Furthermore, the microprocessor, with its low-power, lightweight architecture, can significantly improve data transmission efficiency and significantly reduce the power consumption and system overhead required for data transmission.
[0162] In addition, the microprocessor can continue to execute control tasks based on task information, which means that control tasks can be automatically migrated from the main processor to the microprocessor without the user having to manually switch to the microprocessor to execute control tasks, thus optimizing the user experience.
[0163] In addition, the microprocessor can update the task information and send the updated task information to the main processor, so that the main processor can continue to execute the control task based on the updated task information, thus realizing the migration of the control task from the microprocessor to the main processor.
[0164] In addition, this solution can significantly reduce the load on the main processor, thereby significantly reducing the performance requirements, power consumption and system overhead of the main processor. The main processor can adopt a lighter architecture design, which helps to reduce chip area, increase chip integration and reduce chip manufacturing costs.
[0165] Figure 9 This is a schematic diagram of the structure of a data transmission device according to another exemplary embodiment.
[0166] Reference Figure 9 The data transmission device 900 of this embodiment includes: a first execution module 901, a sending module 902, a receiving module 903, and a second execution module 904.
[0167] The first execution module 901 is configured to execute the control task of the data transmission controller; wherein, the control task is used to control the data transmission controller to execute the data transmission task; The sending module 902 is configured to send task information of the control task to the microprocessor before the control task is completed; wherein the task information is used by the microprocessor to continue executing the control task. The receiving module 903 is configured to receive the updated task information sent by the microprocessor; The second execution module 904 is configured to continue executing the control task based on the updated task information.
[0168] In some possible implementations, the updated task information is generated based on the anomaly information of the data transmission task; The second execution module 904 is further configured to: perform exception handling on the data transmission task based on the updated task information.
[0169] In some possible implementations, before continuing to execute the control task based on the updated task information, the receiving module 903 is further configured to: receive a fifth indication message sent by the microprocessor; wherein the fifth indication message is used to instruct the main processor to continue executing the control task.
[0170] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.
[0171] The data transmission apparatus provided in the embodiments of this disclosure executes the control task of a data transmission controller. The control task is used to control the data transmission controller to execute the data transmission task. Before the control task is completed, task information of the control task is sent to the microprocessor. The task information is used by the microprocessor to continue executing the control task. The microprocessor receives updated task information sent by the microprocessor and continues to execute the control task based on the updated task information. Therefore, this disclosure proposes a cooperative control mechanism. Before the control task is completed, the main processor sends task information of the control task to the microprocessor, so that the microprocessor continues to execute the control task based on the task information. Thus, the main processor and the microprocessor can cooperate in executing the control task, significantly reducing the load on the main processor. Furthermore, the microprocessor, with its low-power, lightweight architecture, can significantly improve data transmission efficiency and significantly reduce the power consumption and system overhead required for data transmission.
[0172] In addition, the microprocessor can continue to execute control tasks based on task information, which means that control tasks can be automatically migrated from the main processor to the microprocessor without the user having to manually switch to the microprocessor to execute control tasks, thus optimizing the user experience.
[0173] In addition, the main processor can receive updated task information sent by the microprocessor and continue to execute control tasks based on the updated task information. This enables control tasks to be automatically migrated from the microprocessor to the main processor without requiring the user to manually switch to the main processor to execute control tasks, thus optimizing the user experience.
[0174] In addition, this solution can significantly reduce the load on the main processor, thereby significantly reducing the performance requirements, power consumption and system overhead of the main processor. The main processor can adopt a lighter architecture design, which helps to reduce chip area, increase chip integration and reduce chip manufacturing costs.
[0175] To achieve the above embodiments, this disclosure also proposes a chip, such as... Figure 7 As shown, chip 700 includes: a main processor 701, a microprocessor 702, and a data transmission controller 703; The main processor 701 is used to execute Figure 6 The steps of the data transmission method shown; The microprocessor 702 is used to execute Figure 1-5 The steps of the data transmission method shown; The data transmission controller 703 is used to perform data transmission tasks.
[0176] In some possible implementations, the data transmission controller 703 includes at least one of the following: Universal Serial Bus (USB) controller; Network interface card controller; High-speed serial expansion bus PCIe controller.
[0177] To implement the above embodiments, this disclosure also proposes an electronic device, including the chip provided in this disclosure.
[0178] To implement the above embodiments, this disclosure also proposes an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements the steps of the data transmission method provided in this disclosure.
[0179] Figure 10 This is a schematic diagram illustrating the structure of an electronic device according to an exemplary embodiment. For example, the electronic device 1000 may be a vehicle, mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.
[0180] Reference Figure 10 The electronic device 1000 may include one or more of the following components: a processing component 1002, a memory 1004, a power component 1006, a multimedia component 1008, an audio component 1010, an input / output (I / O) interface 1012, a sensor component 1014, and a communication component 1016.
[0181] Processing component 1002 typically controls the overall operation of electronic device 1000, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 1002 may include one or more processors 1020 to execute instructions to complete all or part of the steps of the data transmission method described above. Furthermore, processing component 1002 may include one or more modules to facilitate interaction between processing component 1002 and other components. For example, processing component 1002 may include a multimedia module to facilitate interaction between multimedia component 1008 and processing component 1002.
[0182] Memory 1004 is configured to store various types of data to support the operation of electronic device 1000. Examples of this data include instructions for any application or method operating on electronic device 1000, contact data, phonebook data, messages, pictures, videos, etc. Memory 1004 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.
[0183] Power component 1006 provides power to various components of electronic device 1000. Power component 1006 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 1000.
[0184] Multimedia component 1008 includes a screen that provides an output interface between electronic device 1000 and user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a Touch Panel, the screen may be implemented as a touchscreen to receive input signals from the user. The Touch Panel includes one or more touch sensors to sense touches, swipes, and gestures on the Touch Panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 1008 includes a front-facing camera and / or a rear-facing camera. When electronic device 1000 is in an operating mode, such as a shooting mode or video mode, the front-facing camera and / or rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.
[0185] Audio component 1010 is configured to output and / or input audio signals. For example, audio component 1010 includes a microphone (MIC) configured to receive external audio signals when electronic device 1000 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 1004 or transmitted via communication component 1016. In some embodiments, audio component 1010 also includes a speaker for outputting audio signals.
[0186] I / O interface 1012 provides an interface between processing component 1002 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, start buttons, and lock buttons.
[0187] Sensor assembly 1014 includes one or more sensors for providing state assessment of various aspects of electronic device 1000. For example, sensor assembly 1014 may detect the on / off state of electronic device 1000, the relative positioning of components such as the display and keypad of electronic device 1000, changes in position of electronic device 1000 or a component of electronic device 1000, the presence or absence of user contact with electronic device 1000, orientation or acceleration / deceleration of electronic device 1000, and temperature changes of electronic device 1000. Sensor assembly 1014 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 1014 may also include an optical sensor, such as a complementary metal-oxide-semiconductor (CMOS) or charge-coupled device (CCD) image sensor, for use in imaging applications. In some embodiments, sensor assembly 1014 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.
[0188] Communication component 1016 is configured to facilitate wired or wireless communication between electronic device 1000 and other devices. Electronic device 1000 can access wireless networks based on communication standards, such as WiFi, 4G, or 5G, or combinations thereof. In one exemplary embodiment, communication component 1016 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 1016 also includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID), Infrared Data Association (IrDA), Ultra-Wideband (UWB), Bluetooth, and other technologies.
[0189] In an exemplary embodiment, the electronic device 1000 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the steps of the data transmission method described above.
[0190] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 1004 including instructions, which can be executed by a processor 1020 of an electronic device 1000 to complete the aforementioned data transmission method. For example, the non-transitory computer-readable storage medium may be a read-only memory (ROM), a compact disc read-only memory (CD-ROM), magnetic tape, floppy disk, and optical data storage device, etc.
[0191] To implement the above embodiments, this disclosure also proposes a non-transitory computer-readable storage medium storing computer program instructions thereon, which, when executed by a processor, implement the steps of the data transmission method provided in this disclosure.
[0192] To implement the above embodiments, this disclosure also proposes a chip including an interface circuit and a processing circuit coupled to each other. The interface circuit is used to input or output signals, and the processing circuit is configured to implement the steps of the data transmission method provided in this disclosure.
[0193] Figure 11 This is a schematic diagram illustrating the structure of a chip according to another exemplary embodiment. See also... Figure 11 The diagram shown is a schematic representation of the structure of chip 1100, but it is not limited to this.
[0194] Chip 1100 includes processing circuit 1101, which is configured to perform the steps of any of the above data transmission methods.
[0195] In some embodiments, chip 1100 further includes one or more interface circuits 1102. In some possible embodiments, interface circuit 1102 is connected to memory 1103, and interface circuit 1102 can be used to receive signals from memory 1103 or other devices, and interface circuit 1102 can be used to send signals to memory 1103 or other devices. For example, interface circuit 1102 can read instructions stored in memory 1103 and send the instructions to processing circuit 1101.
[0196] In some embodiments, the interface circuit 1102 performs at least one of the communication steps such as sending and / or receiving in the above method, while the processing circuit 1101 performs other steps.
[0197] In some embodiments, the terms interface circuit, interface, transceiver pin, transceiver, etc., can be used interchangeably.
[0198] In some embodiments, chip 1100 further includes one or more memories 1103 for storing instructions. In some possible implementations, all or part of the memories 1103 may be located outside of chip 1100.
[0199] To implement the above embodiments, this disclosure also proposes a computer program product, including a computer program, which, when executed by a processor, implements the steps of the data transmission method provided in this disclosure.
[0200] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only.
[0201] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope.
Claims
1. A data transmission method, characterized in that, Suitable for microprocessors, the method includes: The system receives task information from the main processor regarding the control task of the data transmission controller; wherein the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to execute the data transmission task. The control task will continue to be executed based on the task information. The task information is updated, and the updated task information is sent to the main processor; wherein the updated task information is used by the main processor to continue executing the control task.
2. The method according to claim 1, characterized in that, The step of continuing to execute the control task based on the task information includes at least one of the following: Based on the task information, activate or disable the transmission function of the data transmission controller; Based on the task information, target resources are allocated and reclaimed; wherein, the target resources are the resources required by the data transmission controller to execute the data transmission task.
3. The method according to claim 2, characterized in that, The step of activating or disabling the transmission function of the data transmission controller based on the task information includes: In response to the task information indicating that the transmission link corresponding to the data transmission controller is in a connected state, the transmission function of the data transmission controller is activated; In response to the task information indicating that the transmission link corresponding to the data transmission controller is disconnected, the transmission function of the data transmission controller is disabled.
4. The method according to claim 2, characterized in that, The allocation and recycling of target resources based on the task information includes: In response to the task information indicating that the transmission link corresponding to the data transmission controller is in a connected state, target memory is allocated to the data transmission controller; wherein, the target memory is used by the data transmission controller for read and write operations; Based on the description information of the data transmission task, a target descriptor is generated; wherein, the target descriptor is used to indicate the description information; The target descriptor is written into the descriptor queue of the data transmission controller; wherein the descriptor queue is used to store descriptors to be read by the data transmission controller.
5. The method according to claim 4, characterized in that, After writing the target descriptor into the descriptor queue of the data transmission controller, the method further includes at least one of the following: In response to the successful execution of the data transmission task, the target descriptor is recycled. In response to the data transmission task being a data sending task and the data transmission task being executed successfully, the target memory is reclaimed. In response to the data transmission task being a data receiving task, and the data transmission task being executed successfully, and the data received by the data transmission controller having been retrieved from the target memory, the target memory is reclaimed.
6. The method according to claim 5, characterized in that, The method further includes: Receive first indication information sent by the data transmission controller, wherein the first indication information is used to indicate that the data transmission task was successfully executed; In response to the first indication information indicating successful execution of the data receiving task, a second indication information is sent to the data usage module; wherein, the second indication information indicates the memory address of the target memory, so that the data usage module can perform a read operation on the target memory; The system receives a third indication message sent by the data usage module; wherein the third indication message is used to indicate that the data usage module has retrieved the data received by the data transmission controller from the target memory.
7. The method according to claim 2, characterized in that, The allocation and recycling of target resources based on the task information includes: In response to the task information indicating that the transmission link corresponding to the data transmission controller is disconnected, the target memory allocated to the data transmission controller is reclaimed; wherein, the target memory is used by the data transmission controller for read and write operations; The target descriptor is recycled; wherein the target descriptor is used to indicate the description information of the data transmission task.
8. The method according to any one of claims 1-7, characterized in that, The method further includes: The system receives a fourth indication message sent by the data transmission controller; wherein the fourth indication message is used to indicate that the data transmission task has encountered an abnormality. Based on the fourth indication information, the data transmission task is handled abnormally.
9. The method according to claim 8, characterized in that, Before updating the task information, the method further includes: The exception handling for the data transmission task has been determined to have failed. The updating of the task information includes: Based on the abnormal information of the data transmission task, the task information is updated; wherein, the updated task information is used by the main processor to perform abnormal handling on the data transmission task.
10. A data transmission method, characterized in that, Applicable to a main processor, the method includes: The control task of the data transmission controller is executed; wherein the control task is used to control the data transmission controller to execute data transmission tasks. Before the control task is completed, task information of the control task is sent to the microprocessor; wherein, the task information is used by the microprocessor to continue executing the control task; Receive the updated task information sent by the microprocessor; The control task continues to be executed based on the updated task information.
11. The method according to claim 10, characterized in that, The updated task information was generated based on the anomaly information of the data transmission task; The step of continuing to execute the control task based on the updated task information includes: Based on the updated task information, the data transmission task is handled with exception handling.
12. The method according to claim 10, characterized in that, Before continuing to execute the control task based on the updated task information, the method further includes: The system receives a fifth instruction message sent by the microprocessor; wherein the fifth instruction message is used to instruct the main processor to continue executing the control task.
13. A data transmission device, characterized in that, Suitable for microprocessors, the device includes: The receiving module is configured to receive task information of the control task of the data transmission controller sent by the main processor; wherein the task information is sent before the control task is completed, and the control task is used to control the data transmission controller to execute the data transmission task; The execution module is configured to continue executing the control task based on the task information; The sending module is configured to update the task information and send the updated task information to the main processor; wherein the updated task information is used by the main processor to continue executing the control task.
14. The apparatus according to claim 13, characterized in that, The execution module is also configured to execute at least one of the following: Based on the task information, activate or disable the transmission function of the data transmission controller; Based on the task information, target resources are allocated and reclaimed; wherein, the target resources are the resources required by the data transmission controller to execute the data transmission task.
15. The apparatus according to claim 14, characterized in that, The execution module is further configured as follows: In response to the task information indicating that the transmission link corresponding to the data transmission controller is in a connected state, the transmission function of the data transmission controller is activated; In response to the task information indicating that the transmission link corresponding to the data transmission controller is disconnected, the transmission function of the data transmission controller is disabled.
16. A data transmission device, characterized in that, Suitable for a main processor, the device includes: The first execution module is configured to execute the control task of the data transmission controller; wherein the control task is used to control the data transmission controller to execute the data transmission task; The sending module is configured to send task information of the control task to the microprocessor before the control task is completed; wherein the task information is used by the microprocessor to continue executing the control task. The receiving module is configured to receive the updated task information sent by the microprocessor; The second execution module is configured to continue executing the control task based on the updated task information.
17. The apparatus according to claim 16, characterized in that, The updated task information was generated based on the anomaly information of the data transmission task; The second execution module is also configured as follows: Based on the updated task information, the data transmission task is handled with exception handling.
18. The apparatus according to claim 16, characterized in that, Before continuing to execute the control task based on the updated task information, the receiving module is further configured to: The system receives a fifth instruction message sent by the microprocessor; wherein the fifth instruction message is used to instruct the main processor to continue executing the control task.
19. A chip, characterized in that, include: Main processor, microprocessor, and data transfer controller; The main processor is used to execute the steps of the method according to any one of claims 10-12; The microprocessor is used to perform the steps of the method according to any one of claims 1-9; The data transmission controller is used to perform data transmission tasks.
20. The chip according to claim 19, characterized in that, The data transmission controller includes at least one of the following: Universal Serial Bus (USB) controller; Network interface card controller; High-speed serial expansion bus PCIe controller.
21. An electronic device, characterized in that, Includes the chip described in claim 19 or 20.
22. A non-transitory computer-readable storage medium having computer program instructions stored thereon, characterized in that, When executed by a processor, the program instructions implement the steps of the method described in any one of claims 1-12.
23. A computer program product, characterized in that, Includes a computer program, which, when executed by a processor, implements the steps of the method according to any one of claims 1-12.