Display panel and driving method thereof
By setting preset detection lines on the display panel, sampling and mapping voltage differences into grayscale difference values, the problem of bright and dark lines on the display panel is solved, achieving accurate compensation and real-time improvement.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HKC CORP LTD
- Filing Date
- 2026-06-09
- Publication Date
- 2026-07-10
AI Technical Summary
In existing technologies, display panels suffer from bright and dark line phenomena due to signal attenuation of internal traces and manufacturing process issues. Furthermore, external equipment compensation methods are costly, have poor real-time performance, and are susceptible to environmental interference, making it difficult to achieve accurate compensation.
By setting a preset detection row on the display panel, the first sub-pixel and the second sub-pixel are sampled respectively to obtain feedback signals. The voltage difference value is mapped to the gray level difference value using the light transmittance-voltage curve and the light transmittance-grayscale curve to perform display compensation, thereby realizing data output compensation for the target sub-pixel in the next frame.
It achieves precise compensation for bright and dark lines, improves the display uniformity and real-time performance of the display panel, and reduces equipment costs and the impact of environmental interference.
Smart Images

Figure CN122369372A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a display panel and its driving method. Background Technology
[0002] In display panels, bright and dark lines may appear due to signal attenuation from internal traces or issues with the manufacturing process. Currently, compensation for bright and dark lines typically relies on external imaging equipment to acquire images of these lines, followed by software algorithms to calculate compensation values. However, this method suffers from high equipment costs, poor real-time performance, and susceptibility to environmental interference. Furthermore, panel trace impedance and signal interference can cause discrepancies between the detected and actual voltages, making accurate compensation for bright and dark lines difficult to achieve.
[0003] There is currently no effective solution to the above problems. Summary of the Invention
[0004] This application provides a display panel and its driving method to solve the aforementioned technical problem of difficulty in achieving accurate compensation for bright and dark lines.
[0005] According to one aspect of the embodiments of this application, this application provides a driving method for a display panel, comprising: charging each sub-pixel on the display panel, and sampling a first sub-pixel and a second sub-pixel on a preset detection row after charging is completed to obtain a feedback signal, wherein the first sub-pixel and the second sub-pixel input the same data signal, the feedback signal includes a first voltage signal and a second voltage signal, the first sub-pixel and the second sub-pixel have a preset positional relationship on the display panel, and the preset detection row does not participate in the display; determining a voltage difference value between the first sub-pixel and the second sub-pixel in the current frame based on the first voltage signal and the second voltage signal; determining a display compensation value corresponding to the voltage difference value according to a preset matching strategy, wherein the preset matching strategy is to map the voltage difference value to a light transmittance difference through a light transmittance-voltage curve, and then map the light transmittance difference to a grayscale difference value through a light transmittance-grayscale curve, and use the grayscale difference value as the display compensation value; and using the display compensation value to compensate the data output of a target sub-pixel in the next frame, wherein the target sub-pixel is determined by the preset matching strategy.
[0006] Optionally, after charging is completed, the first sub-pixel and the second sub-pixel on the preset detection line are sampled respectively to obtain a first voltage signal and a second voltage signal, including: detecting the level state of the first scan line and the second scan line, wherein the first scan line is used to charge the first sub-pixel and the second scan line is used to charge the second sub-pixel; when the level state of the first scan line and the second scan line is both low, it is determined that the charging of the first sub-pixel and the second sub-pixel is completed; the detection is started by timing control switching element, and the charging voltage of the first sub-pixel and the second sub-pixel is sampled by the trace, and the first voltage signal and the second voltage signal are output.
[0007] Optionally, determining the voltage difference value between the first sub-pixel and the second sub-pixel of the current frame based on the first voltage signal and the second voltage signal includes: inputting the first voltage signal into the negative input terminal of the operational amplifier module and inputting the second voltage signal into the positive input terminal of the operational amplifier module, wherein the operational amplifier module includes a first adjustable resistor disposed on the input path of the positive input terminal and a second adjustable resistor disposed between the positive input terminal and ground; processing the first voltage signal and the second voltage signal through the operational amplifier module to obtain an output voltage, and adjusting the resistance values of the first adjustable resistor and / or the second adjustable resistor to calibrate the error of the output voltage; and determining the calibrated output voltage as the voltage difference value.
[0008] Optionally, determining the display compensation value corresponding to the voltage difference value according to a preset matching strategy includes: acquiring a pre-stored light transmittance-voltage curve; using a first voltage value corresponding to a first voltage signal or a second voltage value corresponding to a second voltage signal as a reference voltage value, and calculating a third voltage value based on the voltage difference value and the reference voltage; searching for a first light transmittance value corresponding to the third voltage value and a second light transmittance value corresponding to the reference voltage value on the light transmittance-voltage curve, and determining the first light transmittance value and the second light transmittance value as a light transmittance value pair; acquiring a pre-stored light transmittance-grayscale curve, and matching the grayscale difference value corresponding to the light transmittance value pair through the light transmittance-grayscale curve; and determining the grayscale difference value as the display compensation value.
[0009] Optionally, after compensating the data output of the target sub-pixel in the next frame using the display compensation value, the method further includes: monitoring the change in voltage difference value; when the change in voltage difference value is detected to be greater than a preset threshold, recalculating the display compensation value; and compensating the data output of the target sub-pixel in the next frame based on the recalculated display compensation value to match the voltage attenuation during actual use.
[0010] According to another aspect of the embodiments of this application, this application provides a display panel, including: a pixel array including a plurality of sub-pixels; a preset detection row including a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel having a preset positional relationship, and the data signals input to the first sub-pixel and the second sub-pixel being the same, the preset detection row not participating in the display; a driving circuit, the driving circuit being electrically connected to the pixel array and the preset detection row, and being used to input data signals to the pixel array and the preset detection row and drive them; the driving circuit is also used to receive a feedback signal from the preset detection row, and determine a display compensation value according to the feedback signal, and use the display compensation value to compensate the data output of the target sub-pixel; the feedback signal includes a first voltage signal and a second voltage signal, the driving circuit is also used to determine a voltage difference value between the first sub-pixel and the second sub-pixel of the current frame according to the first voltage signal and the second voltage signal; and determine a display compensation value corresponding to the voltage difference value according to a preset matching strategy, wherein the preset matching strategy is to map the voltage difference value to a light transmittance difference through a light transmittance-voltage curve, and then map the light transmittance difference to a grayscale difference value through a light transmittance-grayscale curve, and use the grayscale difference value as the display compensation value.
[0011] Optionally, the display panel includes a display area and a non-display area, with the non-display area surrounding the display area; a pixel array is disposed within the display area, and a preset detection row is disposed in either the display area or the non-display area, located above or below the pixel array, with the preset detection row and the pixel array being column-aligned; both the pixel array and the preset detection row are controlled by dual scan lines; in the pixel array, the data lines of the pixel column located in the same column as the first sub-pixel are connected to the data lines of the pixel column located in the same column as the second sub-pixel, and they share the same data signal.
[0012] Optionally, the driving circuit includes: an operational amplifier module, whose negative input terminal receives a first voltage signal fed back by a first sub-pixel, and whose positive input terminal receives a second voltage signal fed back by a second sub-pixel; the output terminal of the operational amplifier module is used to output a voltage difference value corresponding to the difference between the first voltage signal and the second voltage signal; an analog-to-digital converter module, connected to the output terminal of the operational amplifier module, used to convert the voltage difference value into a digital signal; a first switch and a second switch, the first switch and the second switch being connected in series between the output terminal of the operational amplifier module and the analog-to-digital converter module; the control terminal of the first switch being connected to a scan line of a preset detection row, and the control terminal of the second switch being connected to another scan line of the preset detection row; and a timing control chip, connected to the analog-to-digital converter module, used to determine a display compensation value based on the digital signal.
[0013] Optionally, the operational amplifier module includes at least one adjustable resistor, which is disposed in the voltage divider circuit at the positive input terminal to calibrate the error introduced by the first voltage signal and the second voltage signal during transmission.
[0014] Optionally, the display panel also includes a filter capacitor connected between the output of the operational amplifier module and ground to smooth the output voltage waveform.
[0015] Compared with related technologies, the technical solutions provided in this application have the following advantages: This application provides a driving method for a display panel, comprising: charging each sub-pixel on the display panel, and sampling a first sub-pixel and a second sub-pixel on a preset detection row after charging is completed to obtain a feedback signal, wherein the first sub-pixel and the second sub-pixel input the same data signal, the feedback signal includes a first voltage signal and a second voltage signal, the first sub-pixel and the second sub-pixel have a preset positional relationship on the display panel, and the preset detection row does not participate in the display; determining a voltage difference value between the first sub-pixel and the second sub-pixel in the current frame based on the first voltage signal and the second voltage signal; determining a display compensation value corresponding to the voltage difference value according to a preset matching strategy, wherein the preset matching strategy is to map the voltage difference value to a light transmittance difference through a light transmittance-voltage curve, and then map the light transmittance difference to a grayscale difference value through a light transmittance-grayscale curve, and use the grayscale difference value as the display compensation value; and using the display compensation value to compensate the data output of a target sub-pixel in the next frame, wherein the target sub-pixel is determined by the preset matching strategy. By detecting the charging voltage of different sub-pixels in the current frame, and then subtracting the charging voltages to obtain the voltage difference, a corresponding display compensation value is determined using a preset matching strategy and the voltage difference. Finally, this display compensation value is output to the target sub-pixel on the display panel in the next frame. This solves the problem of accurately compensating for bright and dark lines. Attached Figure Description
[0016] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0017] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without creative effort.
[0018] Figure 1 This is a schematic diagram of a display panel provided according to this application; Figure 2 for Figure 1 A diagram illustrating the bright and dark lines that appear on the display panel. Figure 3 A flowchart illustrating a driving method for a display panel according to this application; Figure 4This is a schematic diagram of a display panel provided according to an embodiment of this application; Figure 5 This is a schematic diagram of a driving circuit according to this application; Figure 6 A schematic diagram of an optional light transmittance-voltage curve provided for an embodiment of this application; Figure 7 A schematic diagram of an optional light transmittance-grayscale curve provided for an embodiment of this application; Figure 8 This is a schematic diagram of a display device provided in an embodiment of this application.
[0019] Reference numerals: U - Operational amplifier; R1 - Input resistor; R2 - Feedback resistor; R3 - First adjustable resistor; R4 - Second adjustable resistor; C1 - First capacitor; C2 - Second capacitor; M1 - First switching transistor; M2 - Second switching transistor; D1 to D2880 - Data line array; G1 to G2160 - Conventional scan line sequence; G2161 - First scan line; G2162 - Second scan line; SL1 - First sampling line; SL2 - Second sampling line; V1 - First voltage signal; V2 - Second voltage signal; Vo - Output voltage; ΔV - Voltage difference value; 1 - Preset detection line; 2 - Gamma chip; 3 - Timing control chip; 800 - Display device; 801 - Display panel; 802 - Driver circuit. Detailed Implementation
[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0021] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustration and has no specific meaning in itself. Therefore, "module" and "part" may be used interchangeably.
[0022] In display panels, bright and dark lines may appear due to signal attenuation from internal traces or issues with the manufacturing process. Currently, compensation for bright and dark lines typically relies on external imaging equipment to acquire images of these lines, followed by software algorithms to calculate compensation values. However, this method suffers from high equipment costs, poor real-time performance, and susceptibility to environmental interference. Furthermore, panel trace impedance and signal interference can cause discrepancies between the detected and actual voltages, making accurate compensation for bright and dark lines difficult to achieve.
[0023] Figure 1 This is a schematic diagram of a display panel. Figure 1 The diagram also shows the fanout area and the source line layer. Data lines are routed in the fanout area by switching between layers. Impedance differences at different locations can cause inconsistent signal attenuation on the data lines.
[0024] Figure 1 The display panel uses an H-type pixel architecture. In this display panel, the pixel array consists of multiple rows of sub-pixels, each row corresponding to two rows of scan lines. A cycle consists of 12 sub-pixels horizontally. In each cycle, the first column contains red sub-pixels (R), the second column contains green sub-pixels (G), and the third column contains blue sub-pixels (B), arranged cyclically in this pattern. Odd-numbered scan lines control the on / off state of the first six TFTs (Thin Film Transistors), while even-numbered scan lines control the on / off state of the last six TFTs. In other words, within a cycle, odd-numbered scan lines control the on / off state of the first six sub-pixels, and even-numbered scan lines control the on / off state of the last six sub-pixels. From a horizontal perspective, data line D1 is used for data input of the pixels in columns 1 and 7, and data line D2 is used for data input of the pixels in columns 2 and 8. In other words, the data lines in columns 1 and 7 are connected together and input the same data signal, and the data lines in columns 2 and 8 are connected together and input the same data signal; and so on. Data line D2880 is responsible for the data input of the pixel electrodes in columns 5754 and 5760.
[0025] Taking the sub-pixels in columns 1 to 12 of the first and second rows as an example, when scan line G1 is closed, the scan line voltage jumps from gate high level (VGH) to gate low level (VGL). Due to the capacitive coupling effect, the voltage of sub-pixels in columns 1 to 6 decreases, resulting in a darker display. Sub-pixels in columns 7 to 12 are recharged after scan line G2 is opened. Since scan line G2 is farther from sub-pixels in columns 7 to 12, the effect of capacitive coupling is smaller, and the final charging voltage is higher than that of sub-pixels in columns 1 to 6. Visually, this results in vertical bright and dark lines, with the first 6 columns dark and the last 6 columns bright. This cycle repeats, creating a visual effect similar to... Figure 2 The phenomenon of bright and dark lines is shown.
[0026] To address the issue of bright and dark lines appearing on display panels in existing technologies, embodiments of this application provide a driving method for a display panel, such as... Figure 3 As shown, it includes: Step 301: Charge each sub-pixel on the display panel, and after charging is completed, sample the first sub-pixel and the second sub-pixel on the preset detection row to obtain a feedback signal. The first sub-pixel and the second sub-pixel input the same data signal. The feedback signal includes a first voltage signal and a second voltage signal. The first sub-pixel and the second sub-pixel have a preset positional relationship on the display panel. The preset detection row does not participate in the display. Step 302: Determine the voltage difference value between the first sub-pixel and the second sub-pixel of the current frame based on the first voltage signal and the second voltage signal; Step 303: Determine the display compensation value corresponding to the voltage difference value according to the preset matching strategy. The preset matching strategy is to map the voltage difference value to the light transmittance difference through the light transmittance-voltage curve, then map the light transmittance difference to the grayscale difference value through the light transmittance-grayscale curve, and use the grayscale difference value as the display compensation value. Step 304: Use the display compensation value to compensate the data output of the target sub-pixel in the next frame, wherein the target sub-pixel is determined by a preset matching strategy.
[0027] The embodiments provided in this application are applicable to the field of panel manufacturing and driving, especially for panels using the H-type architecture. Therefore, this application mainly describes the bright and dark line compensation method for H-type architecture panels.
[0028] In this embodiment, the display panel adopting the H-type architecture includes multiple sub-pixels arranged in an array; each column of sub-pixels corresponds to a data line, and multiple data lines are arranged in parallel; each row of sub-pixels corresponds to two scan lines, and multiple scan lines are arranged in parallel; the first column is a first color sub-pixel, the second column is a second color sub-pixel, the third column is a third color sub-pixel, and so on; for example, the first color can be red, the second color can be green, and the third color can be blue.
[0029] Figure 4This application provides a schematic diagram of a display panel, wherein the pixel array structure includes a pixel matrix formed by the intersection of multiple rows of scan lines (such as G1, G2, ... G2162) and multiple columns of data lines (such as D1, D2, ... D2880, constituting a data line array). G1 to G2160 are conventional scan line sequences, G2161 and G2162 are scan lines corresponding to preset detection rows, G2161 is a first scan line used to enable or disable the sub-pixels of the first to sixth preset detection rows, and G2162 is a second scan line used to enable or disable the sub-pixels of the seventh to twelfth preset detection rows. Each scan line extends horizontally, connecting to the switching transistors of all pixel units in the corresponding row. Each data line extends vertically, connecting to all sub-pixels in the corresponding column, used to transmit data voltages for the corresponding color. Rectangular blocks marked R, G, and B represent red, green, and blue sub-pixels, respectively. Each sub-pixel is marked with a "+" or "-" symbol, where "+" indicates positive polarity and "-" indicates negative polarity. The polarities of adjacent pixels are arranged in a checkerboard pattern, representing the dot-inversion driving method commonly used in display panels to prevent liquid crystal material aging and reduce flicker. The driving circuit is located in the non-display area and / or non-active display area of the display panel. Figure 4 The bottom row of sub-pixels (marked as 1) corresponds to the preset detection row set in the display area (effective display area or ineffective display area) or non-display area of this application. The preset detection row is not used for display, but only for detection. The driving circuit includes a gamma chip (marked as 2) for adjusting grayscale voltage and a timing control chip (marked as 3) for controlling data transmission timing. The driving circuit controls the charging and sampling process of the sub-pixels used for detection through the preset detection row. V1 and V2 in the figure are the first voltage signal and the second voltage signal obtained by sampling through the first sampling line SL1 and the second sampling line SL2, respectively.
[0030] The first sub-pixel and the second sub-pixel are two sub-pixels that are separated by a preset number of columns and have the same polarity and color. The color can be any one of red, blue, or green.
[0031] The preset detection row is set in the non-display area of the display panel; it can also be set in the display area. In this embodiment, it is preferable to set the preset detection row in the ineffective display area or the non-display area within the display area, and the preset detection row can be set above or below the pixel array. Figure 4 As shown, the preset detection row is set at the bottom of the display area. The preset detection row includes detection row sub-pixels and detection row scan lines. The detection row scan lines include a first scan line and a second scan line. The first scan line can be... Figure 2 The second scan line is marked G2161. Figure 2The G2162 designation indicates that the detection row sub-pixels and the normally illuminated sub-pixels are aligned in the column direction. Each detection row sub-pixel and its corresponding column sub-pixel have the same color and polarity. Each detection row sub-pixel and its corresponding column sub-pixel share the same data line, and their data signals are identical.
[0032] This application transmits the same display data to two sub-pixels that are separated by a preset number of columns and have the same polarity and color through different scan lines and completes the charging. After the charging is completed, the voltage signals of the two sub-pixels are collected and the voltage difference value between the two sub-pixels is calculated, thereby obtaining voltage difference data that reflects the degree of brightness and darkness of the lines.
[0033] In this embodiment, in the application scenario of the H-type architecture panel, the preset number of columns is 6. The first sub-pixel refers to the sub-pixel in the first 6 columns (such as the 1st column), and the second sub-pixel refers to the sub-pixel in the last 6 columns (such as the 7th column). They are separated by 6 columns, which conforms to the 12-column cycle characteristic of the H-type architecture.
[0034] The first and second sub-pixels have the same polarity and color, for example, both being red and positive. For other combinations of polarity and color, the calculation method for the display compensation value is also the same.
[0035] By converting the voltage difference value into a corresponding display compensation value, and using this display compensation value to compensate for the target sub-pixel data output of the next frame in the display area, automatic correction of bright and dark line defects is achieved.
[0036] As an optional embodiment, after charging is completed, the first sub-pixel and the second sub-pixel on the preset detection line are sampled to obtain a first voltage signal and a second voltage signal, including: detecting the level state of the first scan line and the second scan line, wherein the first scan line is used to charge the first sub-pixel and the second scan line is used to charge the second sub-pixel; when the level state of the first scan line and the second scan line is both low, it is determined that the charging of the first sub-pixel and the second sub-pixel is completed; the detection is started by a timing control switching element, and the charging voltage of the first sub-pixel and the second sub-pixel is sampled through the traces, and the first voltage signal and the second voltage signal are output.
[0037] During non-display periods, the driving circuit transmits a driving signal to the scanning driving circuit. The scanning driving circuit sequentially activates the first and second scan lines, meaning it sequentially sets both scan lines to high level, charging the first and second sub-pixels respectively, and sending identical display data. Subsequently, the timing control chip detects the level states of the first and second scan lines. When both scan lines are at low level, it indicates that their corresponding TFTs are off. At this time, the first and second sub-pixels on the preset detection line have completed the charging process and entered the voltage holding stage, allowing for voltage detection under a unified reference condition. Sampling is chosen when both scan lines are at low level because the pixel node voltage tends to stabilize after the scan lines are turned off. This avoids the transient fluctuations caused by capacitive coupling during scan line activation or deactivation affecting the detection results, ensuring that the sampling results accurately reflect the final charging voltage differences of the sub-pixels.
[0038] After charging is completed, a timing-controlled switching element initiates the detection process, causing the voltages of the first and second sub-pixels extracted from the preset detection rows to be output through traces. The first and second sub-pixels are located in the preset detection rows within the non-display area of the display panel, and are driven by the first and second scan lines respectively during the charging phase. Simultaneously, identical display data is transmitted to both sub-pixels, ensuring they are under the same input conditions. Due to the different capacitive coupling effects generated when the scan lines are closed in the H-type architecture, the actual voltages of two sub-pixels separated by a preset number of columns differ after charging. Therefore, by extracting the voltages of the two sub-pixel nodes through traces, the first and second voltage signals can be obtained. Both the first and second voltage signals are the actual charging voltage signals at the corresponding sub-pixel nodes.
[0039] This embodiment allows voltage sampling to be performed when the sub-pixel voltage is stable after the scan line is closed, so that the first voltage signal and the second voltage signal can accurately reflect the actual charging voltage difference between sub-pixels (of the same color) separated by a preset number of columns.
[0040] As an optional embodiment, determining the voltage difference value between the first sub-pixel and the second sub-pixel of the current frame based on the first voltage signal and the second voltage signal includes: inputting the first voltage signal into the negative input terminal of the operational amplifier module and inputting the second voltage signal into the positive input terminal of the operational amplifier module, wherein the operational amplifier module includes a first adjustable resistor disposed on the input path of the positive input terminal and a second adjustable resistor disposed between the positive input terminal and ground; processing the first voltage signal and the second voltage signal through the operational amplifier module to obtain an output voltage, and adjusting the resistance values of the first adjustable resistor and / or the second adjustable resistor to calibrate the error of the output voltage; and determining the calibrated output voltage as the voltage difference value.
[0041] Figure 5 The schematic diagram of the driving circuit provided in this application is shown in the figure. It includes: an operational amplifier module, multiple adjustable resistors, two capacitors, and two switching transistors. The multiple adjustable resistors include an input resistor R1 with adjustable resistance, a feedback resistor R2, a first adjustable resistor R3, and a second adjustable resistor R4. The core component of the operational amplifier module is an operational amplifier U. Its negative input terminal receives a first voltage signal V1 through the input resistor R1, and its positive input terminal receives a second voltage signal V2 through the first adjustable resistor R3. The feedback resistor R2 connects the output terminal and the negative input terminal, and the second adjustable resistor R4 connects the positive input terminal and ground, forming a differential amplifier structure. Based on the principle of virtual short and virtual open of operational amplifiers, the voltages at the positive and negative input terminals of the amplifier are the same. R4*V2 / (R3+R4)=V1-(V1-Vo)*R1 / (R1+R2), and Vo is calculated to be V2*R4 / (R3+R4)*(1+R2 / R1)-V1*R2 / R1. When the resistance values of R1, R2, R3, and R4 are set to be the same, Vo can be calculated to be V2-V1.
[0042] To improve detection accuracy, an adjustable resistor calibration mechanism is introduced into the operational amplifier circuit: the first adjustable resistor R3 and the second adjustable resistor R4 can compensate for voltage errors caused by panel trace impedance by adjusting their resistance values (e.g., increasing R4 or decreasing R3 when Vo is low). In addition, the output is connected to the first capacitor C1 and the second capacitor C2 to smooth the voltage waveform and prevent abnormal fluctuations from interfering with the detection results. The circuit also includes a first switching transistor M1 and a second switching transistor M2, controlled by the first scan line G2161 and the second scan line G2162. These transistors conduct after charging and output the calibrated Vo signal to the analog-to-digital converter chip and the timing control chip or microcontroller unit for further processing. This hardware circuitry enables precise calculation of voltage differences and noise suppression, providing a stable and reliable input signal for bright and dark line compensation.
[0043] The at least one adjustable resistor involved in this application includes a first adjustable resistor R3 and a second adjustable resistor R4. The first adjustable resistor R3 and the second adjustable resistor R4 form a voltage divider circuit, which is used to divide the second voltage signal V2 and provide it to the positive input terminal of the operational amplifier module. When the voltage difference value is too low, the second adjustable resistor is increased or the first adjustable resistor is decreased; when the voltage difference value is too large, the second adjustable resistor is decreased or the first adjustable resistor is increased. Transmission errors can be offset simply by hardware adjustment.
[0044] The at least one adjustable resistor involved in this application also includes an input resistor R1 and a feedback resistor R2, wherein the input resistor R1 is connected to the input path of the negative input terminal, and the feedback resistor R2 is connected between the negative input terminal and the output terminal.
[0045] A first voltage signal is input to the negative input terminal of the operational amplifier circuit, and a second voltage signal is input to the positive input terminal. Based on the virtual short and virtual open operating principles of the operational amplifier, under normal operating conditions, the voltages at its positive and negative input terminals tend to be equal, and the input current is approximately zero. Therefore, by setting the resistor parameters in the operational amplifier circuit, a correspondence can be established between the output voltage and the difference between the first and second voltage signals. When all resistor values in the operational amplifier circuit are set to the same value, the output voltage of the operational amplifier circuit equals the second voltage signal minus the first voltage signal, thus obtaining the voltage difference between the two sub-pixel node voltages.
[0046] Since the first voltage signal and the second voltage signal are respectively led out through the sampling lines on the display panel, they are easily affected by the trace impedance and other signal interference during signal transmission, which causes the led-out voltage value to deviate from the actual voltage of the sub-pixel node inside the panel. Therefore, an adjustable resistor is set in the operational amplifier circuit. By adjusting the resistance value of the adjustable resistor in the operational amplifier circuit, the voltage deviation caused by the panel trace impedance and signal interference can be calibrated.
[0047] While obtaining the calibrated voltage difference value, the output voltage is filtered by setting a first capacitor and a second capacitor at the output of the operational amplifier circuit to smooth the voltage waveform at the output terminal and avoid unstable detection results caused by transient fluctuations or abnormal interference. The first capacitor and the second capacitor are connected in parallel between the output terminal of the operational amplifier circuit and ground. The smoothed output voltage is output as the voltage difference value.
[0048] After adjustable resistor calibration and capacitor smoothing, the output terminal outputs the calibrated voltage difference value, which is then input to the analog-to-digital converter (ADCIC) chip to be converted into a digital signal.
[0049] This embodiment can calibrate the voltage error caused by trace impedance and signal interference while calculating the difference between the first voltage signal and the second voltage signal, and improve the stability of the output voltage through capacitor filtering, so that the output voltage difference value can more accurately reflect the actual charging voltage difference between sub-pixels separated by a preset number of columns, thereby improving the accuracy and reliability of bright and dark line compensation.
[0050] As an optional embodiment, determining the display compensation value corresponding to the voltage difference value according to a preset matching strategy includes: acquiring a pre-stored light transmittance-voltage curve; using a first voltage value corresponding to a first voltage signal or a second voltage value corresponding to a second voltage signal as a reference voltage value, and calculating a third voltage value based on the voltage difference value and the reference voltage; searching for a first light transmittance value corresponding to the third voltage value and a second light transmittance value corresponding to the reference voltage value on the light transmittance-voltage curve, and determining the first light transmittance value and the second light transmittance value as a light transmittance value pair; acquiring a pre-stored light transmittance-grayscale curve, and matching the grayscale difference value corresponding to the light transmittance value pair through the light transmittance-grayscale curve; and determining the grayscale difference value as the display compensation value.
[0051] A pre-stored light transmittance-voltage curve is acquired, and a pair of light transmittance values corresponding to the voltage difference value is matched on the light transmittance-voltage curve according to a preset matching strategy. In this embodiment, the voltage difference value is obtained from the output of the operational amplifier circuit, and this voltage difference value reflects the actual charging voltage difference between the first sub-pixel and the second sub-pixel under the condition of inputting the same display data. According to the preset matching strategy, the voltage value of one sub-pixel is used as the reference voltage value, and the voltage value corresponding to the other sub-pixel is determined by combining it with the voltage difference value. Then, the light transmittance values corresponding to the two voltage values are searched on the light transmittance-voltage curve respectively, thereby obtaining the light transmittance value pair. The light transmittance value pair represents the difference in light transmittance between the first sub-pixel and the second sub-pixel under the actual charging voltage condition.
[0052] If the second voltage value is used as the reference voltage value, then the third voltage value is the second voltage value minus the voltage difference value. The first light transmittance value corresponding to the third voltage value is located on the light transmittance-voltage curve. It should be noted that the third voltage value and the first voltage value are not necessarily the same.
[0053] Using the voltage of the second sub-pixel as the reference voltage value for matching calculations is because in the H-type architecture, the last six columns of sub-pixels typically have higher charging voltages, which can serve as a reference voltage for the higher brightness side. This allows for the calculation of the voltage value of the corresponding sub-pixel, enabling optical characteristic matching between the two sub-pixels under the same input conditions. By establishing a correspondence between voltage and light transmittance on the light transmittance-voltage curve, voltage differences can be converted into light transmittance differences, improving the accuracy of grayscale compensation calculations.
[0054] If the first voltage value is taken as the reference voltage value, then the third voltage value is the sum of the second voltage value and the voltage difference value. The first light transmittance value corresponding to the third voltage value is located on the light transmittance-voltage curve. It should be noted that the third voltage value is not necessarily the same as the second voltage value.
[0055] By using the first voltage value as a reference voltage value for matching, the light transmittance value corresponding to the second sub-pixel can be simulated based on the actual charging voltage of the first sub-pixel, thus obtaining another light transmittance matching method. This matching method corresponds to a compensation strategy that uses the first sub-pixel as a compensation reference, allowing the optical output of the two sub-pixels to tend to be consistent by adjusting the grayscale value of the other sub-pixel during subsequent compensation processes.
[0056] Figure 6 The schematic diagram of the light transmittance-voltage curve provided in this application is shown in the figure. This curve depicts the change in light transmittance of VA (Vertical Alignment) type liquid crystal under different voltages. The horizontal axis represents the charging voltage, from negative to positive, with the V2 point (i.e., the point corresponding to the second voltage value) marked in the middle. The vertical axis represents the light transmittance.
[0057] Find the first light transmittance value corresponding to the third voltage value on the light transmittance-voltage curve, and find the second light transmittance value corresponding to the reference voltage value on the light transmittance-voltage curve. Determine the first light transmittance value and the second light transmittance value as a light transmittance value pair. This light transmittance value pair can also be used to calculate the difference in light transmittance between the first sub-pixel and the second sub-pixel.
[0058] The system retrieves a pre-stored light transmittance-grayscale curve and matches the grayscale difference value corresponding to each light transmittance value pair. The light transmittance-grayscale curve describes the correspondence between display grayscale values and light transmittance. By finding the grayscale value corresponding to each light transmittance value pair on the light transmittance-grayscale curve, the grayscale difference value between two sub-pixels under the same optical output conditions can be obtained. This grayscale difference value represents the amount of grayscale change that needs to be compensated under the current voltage difference condition. This grayscale difference value is determined as the display compensation value and used to subsequently compensate the data output of the target sub-pixels in the display area.
[0059] Figure 7 The light transmittance-grayscale curve provided in this application is shown in the figure. This curve illustrates the trend of light transmittance as grayscale changes. The horizontal axis represents the grayscale value, and the vertical axis represents the light transmittance. Starting from the lower left corner, the light transmittance gradually increases with the increase of grayscale, exhibiting a non-linear growth trend. In the figure, V2 grayscale represents the grayscale value corresponding to the second voltage signal V2, and Δ grayscale represents the difference between different grayscale levels.
[0060] This embodiment can convert the voltage difference between the first sub-pixel and the second sub-pixel into a corresponding grayscale compensation value through the light transmittance-voltage curve and the light transmittance-grayscale curve. This allows the compensation process to directly reflect the actual optical output difference of the sub-pixels, thereby improving the accuracy of bright and dark line compensation and making the compensation result closer to the actual display effect.
[0061] Specifically, if the preset matching strategy is to use the first voltage value as the reference voltage value, then each column of sub-pixels in the column group where the first sub-pixel is located is determined as the target sub-pixel; if the preset matching strategy is to use the second voltage value as the reference voltage value, then each column of sub-pixels in the column group where the second sub-pixel is located is determined as the target sub-pixel.
[0062] In the H-type architecture, a loop unit consists of 12 sub-pixels horizontally. The first 6 columns of sub-pixels have lower charging voltages due to capacitive coupling, while the last 6 columns have higher charging voltages.
[0063] If the preset matching strategy uses the first voltage value as the reference voltage value, then the column group containing the first sub-pixel, i.e., the first 6 columns, is determined as the target sub-pixel. The first voltage value corresponds to the charging voltage of the first 6 columns of sub-pixels, and the first voltage value is less than the second voltage value, meaning that the first 6 columns are darker. Therefore, it is necessary to output compensated data for the first 6 columns to increase their brightness in order to achieve uniform display.
[0064] If the preset matching strategy uses the second voltage value as the reference voltage value, then the column group containing the second sub-pixel, i.e., the last 6 columns, is determined as the target sub-pixel. The second voltage value corresponds to the charging voltage of the last 6 columns of sub-pixels, and the second voltage value is greater than the first voltage value, meaning that the last 6 columns are brighter. Therefore, it is necessary to output compensated data for the last 6 columns to reduce their brightness in order to achieve uniform display.
[0065] This embodiment sets a reference voltage value matching strategy and determines the target sub-pixel range accordingly, so that the compensation calculation can use the actual voltage level as a reference to perform single-sided region compensation, avoiding the introduction of new voltage deviations by compensating both sides at the same time.
[0066] This application provides different preset matching strategies, enabling the system to select a suitable reference voltage for calculation based on actual needs. One strategy uses the sub-pixel with the higher voltage as the reference, reducing the grayscale value of the corresponding sub-pixel to make the optical output of the other sub-pixel consistent with the reference sub-pixel. Another strategy uses the sub-pixel with the lower voltage as the reference, increasing the grayscale value of the corresponding sub-pixel to make the optical output of the other sub-pixel consistent with the reference sub-pixel. This improves the applicability of the brightness and darkness line compensation method while maintaining compensation accuracy, allowing the compensation method to flexibly adapt to the actual working conditions of different display panels.
[0067] As an optional embodiment, after compensating the data output of the target sub-pixel in the next frame using the display compensation value, the method further includes: monitoring the change value of the voltage difference value; when the change value of the voltage difference value is detected to be greater than a preset threshold, recalculating the display compensation value; and compensating the data output of the target sub-pixel in the next frame according to the recalculated display compensation value to match the voltage attenuation during actual use.
[0068] After the data output of the target sub-pixel in the next frame of the display area is compensated using the display compensation value, the voltage of the first sub-pixel and the second sub-pixel is continuously sampled and a new voltage difference value is calculated during the display of subsequent frames.
[0069] The voltage difference value of the current frame is compared with the voltage difference value of the previous frame to obtain the change value of the voltage difference value. When the change value of the voltage difference value is less than a preset threshold, it is determined that the current working state of the display panel is stable, and the original display compensation value continues to be used to compensate the target sub-pixels of subsequent frames. When the change value of the voltage difference value is detected to be greater than the preset threshold, it is determined that the driving voltage state of the display panel has changed significantly, and the display compensation value needs to be recalculated. The calculation method of the new display compensation value has been explained above and will not be repeated here.
[0070] In H-type architecture display panels, the scan line drive voltage and pixel charging voltage may drift over time during long-term operation, causing the originally calculated display compensation value to gradually deviate from the actual requirements. By continuously monitoring the changes in voltage differences and recalculating the display compensation value when the changes exceed a preset threshold, the compensation parameters can always be matched with the current voltage state, thereby achieving dynamic tracking and compensation for the voltage attenuation process.
[0071] As an optional embodiment, the display area of the display panel is divided into different compensation areas in the horizontal direction; a sub-detection line is set for each compensation area; the regional display compensation value of the current frame of the compensation area is calculated on each sub-detection line; and the data output of the next frame of each compensation area is compensated according to the regional display compensation value.
[0072] The display area will be divided into different compensation areas in the horizontal direction, such as the left area, the middle area, and the right area. Each area needs to have its own sub-detection row set to avoid the inability of a single global compensation value to adapt to local characteristics.
[0073] Perform the same steps as described above on each sub-detection line to obtain the region display compensation value of the current frame of the corresponding compensation region.
[0074] Based on the regional display compensation value for each region, the target sub-pixel data output of the next frame for each compensation region is compensated to ensure that the bright and dark line problems caused by manufacturing or signal differences in different regions are resolved independently.
[0075] This embodiment independently detects and compensates for potential voltage deviations in the left, center, and right areas of the display panel, thereby improving overall display uniformity.
[0076] This application provides a driving method for a display panel, comprising: charging each sub-pixel on the display panel, wherein a first sub-pixel and a second sub-pixel input the same data signal, and sampling the first sub-pixel and the second sub-pixel on a preset detection row after charging is completed to obtain a feedback signal, wherein the feedback signal includes a first voltage signal and a second voltage signal, and the first sub-pixel and the second sub-pixel have a preset positional relationship on the display panel; determining a voltage difference value between the first sub-pixel and the second sub-pixel in the current frame based on the first voltage signal and the second voltage signal; determining a display compensation value corresponding to the voltage difference value according to a preset matching strategy; and compensating the data output of a target sub-pixel in the next frame using the display compensation value, wherein the target sub-pixel is determined by the preset matching strategy. By detecting the charging voltage of different sub-pixels in the current frame, and then subtracting the charging voltages to obtain the voltage difference, the corresponding display compensation value is determined by the preset matching strategy and the voltage difference. Finally, the display compensation value is output to the target sub-pixel of the display panel in the next frame. This solves the problem of difficulty in achieving accurate compensation for bright and dark lines.
[0077] According to another aspect of the embodiments of this application, this application provides a display panel, including: a pixel array including a plurality of sub-pixels; a preset detection row including a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel having a preset positional relationship, and the data signals input to the first sub-pixel and the second sub-pixel being the same, the preset detection row not participating in the display; a driving circuit, the driving circuit being electrically connected to the pixel array and the preset detection row, and being used to input data signals to the pixel array and the preset detection row and drive them; the driving circuit is also used to receive a feedback signal from the preset detection row, and determine a display compensation value according to the feedback signal, and use the display compensation value to compensate the data output of the target sub-pixel; the feedback signal includes a first voltage signal and a second voltage signal, the driving circuit is also used to determine a voltage difference value between the first sub-pixel and the second sub-pixel of the current frame according to the first voltage signal and the second voltage signal; and determine a display compensation value corresponding to the voltage difference value according to a preset matching strategy, wherein the preset matching strategy is to map the voltage difference value to a light transmittance difference through a light transmittance-voltage curve, and then map the light transmittance difference to a grayscale difference value through a light transmittance-grayscale curve, and use the grayscale difference value as the display compensation value.
[0078] The display panel structure diagram in this embodiment can be directly referred to. Figure 4 The pixel array corresponds to the areas corresponding to scan lines G1~G6 and G2155~G2160 in the diagram; multiple sub-pixels correspond to the squares arranged alternately with R, G, and B in the diagram; the preset detection row corresponds to the row labeled 2 in the diagram; the first sub-pixel corresponds to the sub-pixel in row G2161 in the diagram; the second sub-pixel corresponds to the sub-pixel in row G2162 in the diagram; the feedback signal is the signal drawn from the first sampling line SL1 and the second sampling line SL2; the driving circuit includes the gamma chip labeled 2 and the timing control chip labeled 3 in the diagram.
[0079] The display panel provided in this application has a preset detection row for detection. The preset detection row includes a first sub-pixel and a second sub-pixel. The two sub-pixels have a preset positional relationship. For example, the two sub-pixels are 6 columns apart and have the same polarity and color.
[0080] During operation, the timing control chip charges the first sub-pixel and the second sub-pixel respectively through the first scan line and the second scan line during non-display time, and sends in the same display data.
[0081] After charging is complete, the first sampling line SL1 and the second sampling line SL2 respectively lead out the first voltage signal V1 of the first sub-pixel and the second voltage signal V2 of the second sub-pixel. Due to the difference in capacitive coupling effect in the H-type architecture, V2 is greater than V1.
[0082] The driving circuit receives these two voltage signals, calculates the voltage difference (ΔV = V2 - V1), and then determines the grayscale value to be compensated based on the voltage difference, thus obtaining the display compensation value. The driving circuit uses the display compensation value to compensate the data output of the target sub-pixels in the next frame, making the display of bright and dark areas more consistent.
[0083] As an optional embodiment, the display panel includes a display area and a non-display area, with the non-display area surrounding the display area; a pixel array is disposed within the display area, and a preset detection row is disposed in either the display area or the non-display area, located above or below the pixel array, with the preset detection row and the pixel array being column-aligned; both the pixel array and the preset detection row are controlled by dual scan lines; in the pixel array, the data lines of the pixel column located in the same column as the first sub-pixel are connected to the data lines of the pixel column located in the same column as the second sub-pixel, and they share the same data signal.
[0084] The preset detection row can be set at the top or bottom of the display area, or it can be set in the non-display area, as long as it can maintain column alignment with the pixel array, so as to ensure that the sub-pixels used for detection receive the same data signals as the display sub-pixels in the same column.
[0085] Both the pixel array and the preset detection rows adopt a dual scan line control method, that is, each row of sub-pixels corresponds to two scan lines, one of which controls the charging of the first 6 columns of sub-pixels and the other controls the charging of the last 6 columns of sub-pixels.
[0086] In the pixel array, all display sub-pixels located in the same column as the first sub-pixel, and all display sub-pixels located in the same column as the second sub-pixel, are connected to the same data line, thus sharing the same data signal with the corresponding sub-pixels.
[0087] By aligning the preset detection row with the pixel array column, controlling the dual scan line, and ensuring that sub-pixels in the same column share the same data line and the same data signal, it can be ensured that the charging environment of the sub-pixels used for detection is consistent with that of the normal display sub-pixels, so that the detected voltage difference can truly reflect the bright and dark lines of the display area.
[0088] As an optional embodiment, the driving circuit includes: an operational amplifier module, whose negative input terminal receives a first voltage signal fed back by a first sub-pixel, and whose positive input terminal receives a second voltage signal fed back by a second sub-pixel; the output terminal of the operational amplifier module is used to output a voltage difference value corresponding to the difference between the first voltage signal and the second voltage signal; an analog-to-digital converter module, connected to the output terminal of the operational amplifier module, used to convert the voltage difference value into a digital signal; a first switch and a second switch, the first switch and the second switch being connected in series between the output terminal of the operational amplifier module and the analog-to-digital converter module; the control terminal of the first switch is connected to a scan line of a preset detection row, and the control terminal of the second switch is connected to another scan line of the preset detection row; and a timing control chip, connected to the analog-to-digital converter module, used to determine a display compensation value based on the digital signal.
[0089] The first voltage signal is input to the negative input terminal of the operational amplifier module via the first sampling line, and the second voltage signal is input to the positive input terminal of the operational amplifier module via the second sampling line. Based on the principle of virtual short and virtual open circuits in operational amplifiers, the operational amplifier module performs differential processing on the two voltage signals and outputs a voltage difference value corresponding to the difference between the two signals.
[0090] The first and second switching transistors are connected in series between the output of the operational amplifier module and the analog-to-digital converter module. The control terminal of the first switching transistor is connected to the first scan line G2161, and the control terminal of the second switching transistor is connected to the second scan line G2162. When both the first and second scan lines are at a low level, it indicates that the preset detection line has been fully charged. At this time, the first and second switching transistors are turned on, detection is initiated, and the voltage difference value is sent to the analog-to-digital converter module.
[0091] The analog-to-digital converter (ADC) converts the analog voltage difference into a digital signal, which is then sent to the timing control chip. The timing control chip determines the display compensation value based on the digital signal, which is used to compensate the target sub-pixels in the next frame.
[0092] As an optional embodiment, the operational amplifier module includes at least one adjustable resistor, which is disposed in the voltage divider circuit at the positive input terminal for calibrating errors introduced by the first voltage signal and the second voltage signal during transmission.
[0093] The operational amplifier module includes at least one adjustable resistor, which can be set between the negative input terminal and the output terminal, between the positive input terminal and ground, or both.
[0094] When the first voltage signal and the second voltage signal are led out from inside the display panel through the sampling line, the impedance of the sampling line itself will cause voltage attenuation. At the same time, it may be affected by interference from other signals, causing the led-out voltage value to deviate from the actual voltage value inside the panel.
[0095] By setting an adjustable resistor in the operational amplifier module and adjusting its resistance value, the errors introduced during the transmission process can be calibrated. Specifically, when the output voltage is too low, the output voltage can be increased by decreasing the first adjustable resistor R3 on the positive input path or increasing the second adjustable resistor R4 between the positive input and ground; when the output voltage is too high, the output voltage can be decreased by increasing the first adjustable resistor R3 on the positive input path or decreasing the second adjustable resistor R4 between the positive input and ground.
[0096] Through the above adjustments, the voltage difference value output by the operational amplifier module can accurately reflect the real voltage difference between the first sub-pixel and the second sub-pixel inside the panel.
[0097] As an optional embodiment, the display panel also includes a filter capacitor connected between the output of the operational amplifier module and ground to smooth the output voltage waveform.
[0098] During transmission, the voltage difference value output by the operational amplifier module may be affected by factors such as noise interference or signal reflection in the circuit, resulting in abnormal voltage fluctuations. If these abnormal fluctuations are directly sent to the subsequent analog-to-digital converter module, the converted digital signal will be inaccurate, thus affecting the accuracy of the calculation of the display compensation value.
[0099] By placing a filter capacitor between the output terminal of the operational amplifier module and ground, the output voltage waveform can be smoothed by utilizing the charging and discharging characteristics of the capacitor. When abnormal fluctuations such as spikes or glitches occur in the output voltage, the filter capacitor can absorb or release charge, making the output voltage waveform smoother and more stable, thereby avoiding interference from abnormal fluctuations with the detection results.
[0100] According to another aspect of the embodiments of this application, this application provides a display device, such as... Figure 8 As shown, the device includes a display panel 801 and a driving circuit 802, the driving circuit 802 being used to perform the steps of the above method.
[0101] Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments, and will not be repeated here.
[0102] In specific implementation, the embodiments of this application can be referred to the above embodiments and have corresponding technical effects.
[0103] It is understood that the embodiments described herein can be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit can be implemented in one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described herein, or combinations thereof.
[0104] For software implementation, the techniques described herein can be implemented by units that perform the functions described herein. The software code can be stored in memory and executed by a processor. The memory can be implemented in the processor or external to the processor.
[0105] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0106] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0107] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.
[0108] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0109] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0110] If the aforementioned function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks. It should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. In the absence of further restrictions, an element defined by the phrase "comprising a..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0111] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.
Claims
1. A driving method for a display panel, characterized in that, include: Each sub-pixel on the display panel is charged, and after charging is completed, the first sub-pixel and the second sub-pixel on the preset detection row are sampled to obtain a feedback signal. The first sub-pixel and the second sub-pixel input the same data signal. The feedback signal includes a first voltage signal and a second voltage signal. The first sub-pixel and the second sub-pixel have a preset positional relationship on the display panel. The preset detection row does not participate in the display. The voltage difference value between the first sub-pixel and the second sub-pixel in the current frame is determined based on the first voltage signal and the second voltage signal; The display compensation value corresponding to the voltage difference value is determined according to a preset matching strategy. The preset matching strategy is to map the voltage difference value to a light transmittance difference through a light transmittance-voltage curve, then map the light transmittance difference to a grayscale difference value through a light transmittance-grayscale curve, and use the grayscale difference value as the display compensation value. The display compensation value is used to compensate the data output of the target sub-pixel in the next frame, wherein the target sub-pixel is determined by the preset matching strategy.
2. The method according to claim 1, characterized in that, The step of sampling the first sub-pixel and the second sub-pixel on the preset detection row after charging is completed to obtain the first voltage signal and the second voltage signal includes: The level states of the first scan line and the second scan line are detected, wherein the first scan line is used to charge the first sub-pixel, and the second scan line is used to charge the second sub-pixel; When the level states of the first scan line and the second scan line are both low, it is determined that the first sub-pixel and the second sub-pixel have completed charging. Detection is initiated by a timing control switching element, and the charging voltages of the first sub-pixel and the second sub-pixel are sampled through the traces, and the first voltage signal and the second voltage signal are output.
3. The method according to claim 1, characterized in that, Determining the voltage difference value between the first sub-pixel and the second sub-pixel of the current frame based on the first voltage signal and the second voltage signal includes: The first voltage signal is input to the negative input terminal of the operational amplifier module, and the second voltage signal is input to the positive input terminal of the operational amplifier module. The operational amplifier module includes a first adjustable resistor disposed on the input path of the positive input terminal, and a second adjustable resistor disposed between the positive input terminal and ground. The operational amplifier module processes the first voltage signal and the second voltage signal to obtain an output voltage, and adjusts the resistance values of the first adjustable resistor and / or the second adjustable resistor to calibrate the error of the output voltage. The calibrated output voltage is determined as the voltage difference value.
4. The method according to claim 1, characterized in that, The step of determining the display compensation value corresponding to the voltage difference value according to a preset matching strategy includes: Obtain the pre-stored light transmittance-voltage curve; The first voltage value corresponding to the first voltage signal or the second voltage value corresponding to the second voltage signal is used as the reference voltage value, and the third voltage value is calculated based on the voltage difference value and the reference voltage. On the light transmittance-voltage curve, find the first light transmittance value corresponding to the third voltage value and the second light transmittance value corresponding to the reference voltage value, and determine the first light transmittance value and the second light transmittance value as a light transmittance value pair; Obtain the pre-stored light transmittance-grayscale curve, and match the grayscale difference value corresponding to the light transmittance value with the light transmittance value using the light transmittance-grayscale curve; The grayscale difference value is determined as the display compensation value.
5. The method according to claim 1, characterized in that, After compensating the data output of the target sub-pixels in the next frame using the display compensation value, the method further includes: Monitor the change in the voltage difference value; When the change in the voltage difference value is detected to be greater than a preset threshold, the display compensation value is recalculated; The data output of the target sub-pixel in the next frame is compensated based on the recalculated display compensation value to match the voltage attenuation during actual use.
6. A display panel, characterized in that, include: A pixel array, comprising multiple sub-pixels; The preset detection row includes a first sub-pixel and a second sub-pixel. The first sub-pixel and the second sub-pixel have a preset positional relationship, and the data signals input to the first sub-pixel and the second sub-pixel are the same. The preset detection row does not participate in the display. A driving circuit, which is electrically connected to the pixel array and the preset detection row, is used to input data signals to the pixel array and the preset detection row and drive them. The driving circuit is also used to receive the feedback signal of the preset detection line, determine the display compensation value according to the feedback signal, and use the display compensation value to compensate the data output of the target sub-pixel; The feedback signal includes a first voltage signal and a second voltage signal. The driving circuit is further configured to determine the voltage difference value between the first sub-pixel and the second sub-pixel in the current frame based on the first voltage signal and the second voltage signal; and to determine the display compensation value corresponding to the voltage difference value according to a preset matching strategy. The preset matching strategy is to map the voltage difference value to a light transmittance difference through a light transmittance-voltage curve, then map the light transmittance difference to a grayscale difference value through a light transmittance-grayscale curve, and use the grayscale difference value as the display compensation value.
7. The display panel according to claim 6, characterized in that, The display panel includes a display area and a non-display area, with the non-display area surrounding the display area; the pixel array is disposed within the display area, and the preset detection row is disposed in the display area or the non-display area, and is located above or below the pixel array; the preset detection row and the pixel array are column-aligned; both the pixel array and the preset detection row are controlled by dual scan lines. In the pixel array, the pixel column located in the same column as the first sub-pixel is connected to the pixel column located in the same column as the second sub-pixel, and they share the same data signal.
8. The display panel according to claim 7, characterized in that, The driving circuit includes: The operational amplifier module receives a first voltage signal fed back by the first sub-pixel at its negative input terminal and a second voltage signal fed back by the second sub-pixel at its positive input terminal. The output terminal of the operational amplifier module is used to output a voltage difference value corresponding to the difference between the first voltage signal and the second voltage signal. An analog-to-digital converter module is connected to the output of the operational amplifier module and is used to convert the voltage difference value into a digital signal. A first switching transistor and a second switching transistor are connected in series between the output of the operational amplifier module and the analog-to-digital converter module. The control terminal of the first switching transistor is connected to one scan line of the preset detection row, and the control terminal of the second switching transistor is connected to another scan line of the preset detection row. A timing control chip is connected to the analog-to-digital converter module and is used to determine the display compensation value based on the digital signal.
9. The display panel according to claim 8, characterized in that, The operational amplifier module includes at least one adjustable resistor, which is disposed in the voltage divider circuit at the positive input terminal to calibrate the error introduced by the first voltage signal and the second voltage signal during transmission.
10. The display panel according to claim 8, characterized in that, The display panel also includes a filter capacitor connected between the output terminal of the operational amplifier module and ground, for smoothing the output voltage waveform.