Test structure and method for testing short circuit window, contact resistance, sheet resistance

Abstract

This disclosure provides a test structure and a test method for short-circuit window, contact resistance, and sheet resistance. The test structure includes: a substrate with an isolation structure therein; a gate structure located above the isolation structure; an active region located above the substrate; multiple contact plugs located above the active region and electrically connected to the active region, the contact plugs being arranged in an array; the gate structure being arranged in a serpentine pattern, the gate structure being adjacent to and spaced apart from the sidewalls of each contact plug; a first pad electrically connected to the gate structure; a second pad and a third pad electrically connected to different contact plugs, respectively; a fourth pad electrically connected to the gate structure, and the fourth pad and the first pad being located at opposite ends of the gate structure; the width of the isolation structure is greater than or equal to the width of the gate structure, and the shortest distance from the contact plug to the gate structure is the test distance. Using the above technical solution, the test requirements for short-circuit window, contact resistance, and sheet resistance can be met, and the test accuracy can be improved.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a test structure and a test method for short-circuit window, contact resistance, and sheet resistance. Background Technology

[0002] In semiconductor manufacturing processes, as process nodes shrink and transistor sizes become increasingly miniaturized, the size of the contact plugs also decreases. The shrinking gap between the contact plugs and the gate structure significantly increases the risk of short circuits, thus placing higher demands on the critical dimensional control of the gate structure and the alignment accuracy between the contact plugs and the gate structure.

[0003] However, conventional leakage current testing methods typically involve applying a high potential to one end of the contact plug and a low potential to the other end of the gate structure to measure the leakage current between them. Because a gate oxide tunneling leakage path exists between the active region and the gate structure, the leakage current generated by this path is superimposed on the target leakage current between the contact plug and the gate structure. This results in the measurement results failing to accurately reflect the true physical distance between the contact plug and the gate structure, thus affecting the accurate assessment of short-circuit risk.

[0004] Therefore, how to provide technical solutions to meet the testing requirements for short-circuit window, contact resistance, and sheet resistance, and improve testing accuracy, has become an urgent technical problem to be solved. Summary of the Invention

[0005] In view of this, the present disclosure provides a test structure and a test method for short-circuit window, contact resistance, and sheet resistance, which can meet the test requirements for short-circuit window, contact resistance, and sheet resistance, and improve test accuracy.

[0006] To address the aforementioned technical problems, this disclosure provides a test structure comprising: a substrate having an isolation structure; a gate structure located above the isolation structure; an active region located above the substrate and spaced apart from the gate structure; a plurality of contact plugs located above the active region and electrically connected to the active region, the contact plugs being arranged in an array, wherein the gate structure is arranged in a serpentine pattern, sequentially surrounding each contact plug, the gate structure being adjacent to and spaced apart from the sidewalls of each contact plug; a first pad electrically connected to the gate structure; a second pad and a third pad electrically connected to different contact plugs, respectively; and a fourth pad electrically connected to the gate structure, wherein the fourth pad and the first pad are located at opposite ends of the gate structure; wherein the width of the isolation structure is greater than or equal to the width of the gate structure, and the shortest distance from the contact plug to the gate structure is the test distance.

[0007] Optionally, the projection of the gate structure onto the top surface of the isolation structure coincides with the isolation structure.

[0008] Optionally, the test distance includes: the minimum spacing value between the contact plug and the gate structure allowed by the design rules; at least one spacing value less than the minimum spacing value; and at least one negative spacing value in which the contact plug partially overlaps with the gate structure.

[0009] Optionally, the active region has a source-drain structure; the source-drain structure includes a source and a drain located on both sides of the gate structure; the contact plug is electrically connected to the source and drain of the source-drain structure respectively.

[0010] This disclosure also provides a method for testing a short-circuit window for any of the above-described test structures. The method includes: applying a test voltage between the first pad and the third pad, or between the second pad and the fourth pad; measuring the leakage current between the first pad and the third pad, or between the second pad and the fourth pad; and obtaining the test distance when a short circuit occurs between the contact plug and the gate structure based on the leakage current.

[0011] Optionally, the testing method further includes: providing multiple test structures, each with a different test distance; measuring the leakage current between the first pad and the third pad, or between the second pad and the fourth pad, for each test structure; and determining the minimum safe distance between the contact plug and the gate structure based on the abrupt change point of the leakage current with the test distance.

[0012] Optionally, the test voltage is greater than 0V and less than or equal to 5V; the test voltage includes a first voltage and a second voltage, and the second voltage is greater than the first voltage.

[0013] Optionally, the method further includes: measuring the leakage current at a first temperature and a second temperature, wherein the second temperature is higher than the first temperature.

[0014] This disclosure also provides a method for testing contact resistance for any of the test structures described above. The method includes: applying a first test current between the second pad and the third pad; measuring the voltage between the second pad and the third pad; and calculating the contact resistance based on the first test current, the voltage, and the number of contact plugs.

[0015] This disclosure also provides a method for testing sheet resistance, for any of the test structures described above, the method comprising: applying a second test current between the first pad and the fourth pad; measuring the voltage between the first pad and the fourth pad; obtaining the length and width of the gate structure; and calculating the sheet resistance of the gate structure based on the second test current, the voltage, the length, and the width.

[0016] Compared with the prior art, the technical solution of the present disclosure has the following advantages: In the test structure and test methods for short-circuit window, contact resistance, and sheet resistance provided in the embodiments of this disclosure, a substrate has an isolation structure; a gate structure is located above the isolation structure; an active region is located above the substrate; multiple contact plugs are located above the active region and electrically connected to the active region, and the contact plugs are arranged in an array; the gate structure is arranged in a serpentine pattern, and the gate structure is adjacent to and spaced from the sidewall of each contact plug; a first pad is electrically connected to the gate structure; a second pad and a third pad are electrically connected to different contact plugs, respectively; a fourth pad is electrically connected to the gate structure, and the fourth pad and the first pad are located at opposite ends of the gate structure; the width of the isolation structure is greater than or equal to the width of the gate structure, and the shortest distance from the contact plug to the gate structure is the test distance. By placing the gate structure above the isolation structure, with the width of the isolation structure being greater than or equal to the width of the gate structure, the isolation structure effectively blocks the gate oxide tunneling leakage path from the active region to the gate through the channel. This eliminates the interference of the gate oxide tunneling leakage path on the test results, allowing the measured leakage current to accurately reflect the physical distance between the contact plug and the gate structure. By arranging the gate structure in a serpentine pattern and sequentially surrounding multiple contact plugs arranged in an array, multiple detection points adjacent to the gate and contact plugs are formed within a limited chip area, significantly amplifying the leakage signal and improving the detection sensitivity for weak leakage defects. By setting the first, second, third, and fourth pads, the same test structure can be used for short-circuit window testing, contact resistance testing, and gate structure sheet resistance testing, respectively, eliminating the need to prepare multiple different types of test structures, simplifying the testing process, and reducing testing costs. By defining the shortest distance from the contact plug to the gate structure as the test distance, and combining multiple test structures with different test distances, the abrupt change point of the leakage current with the test distance can be accurately obtained, thereby accurately defining the minimum safe distance window between the contact plug and the gate structure. Therefore, the test structure can meet the testing requirements for short-circuit window, contact resistance and sheet resistance, and improve the test accuracy. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments disclosed in this specification, the drawings used in the description of the embodiments disclosed in this specification or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic cross-sectional view of a test structure. Figure 2 This is a cross-sectional structural diagram of a test structure according to an embodiment of this disclosure; Figure 3 This is a schematic diagram of a contact plug and gate structure according to an embodiment of the present disclosure; Figure 4 This is a schematic diagram of the structure of a contact plug according to an embodiment of this disclosure; Figure 5 This is a schematic diagram of a gate structure in an embodiment of this disclosure. Detailed Implementation

[0019] The technical solutions described herein will be described in detail below with reference to specific embodiments and accompanying drawings. The embodiments described herein are specific implementations of this disclosure and are used to illustrate the concept of this disclosure. These descriptions are illustrative and exemplary and should not be construed as limiting the implementation methods or the scope of protection of this disclosure. In addition to the embodiments described herein, those skilled in the art can employ other obvious technical solutions based on the content disclosed in the claims and specification of this application. These technical solutions include those that make any obvious substitutions and modifications to the embodiments described herein.

[0020] It should be noted that the accompanying drawings in this embodiment are schematic diagrams used to illustrate the concept of this disclosure, and to schematically show the shape and interrelationship of each part. It should be understood that, in order to clearly show the structure of each component of this disclosure, the drawings are not drawn to the same scale, and the same reference numerals are used to indicate the same parts in the drawings.

[0021] As described in the background section, in semiconductor manufacturing processes, semiconductor process nodes are gradually decreasing, transistor sizes are continuously shrinking, and the size of the contact plugs is also decreasing accordingly. The continuously shrinking gap between the contact plugs and the gate structure significantly increases the risk of short circuits between them, thus placing higher demands on the critical dimension control of the gate structure and the alignment accuracy between the contact plugs and the gate structure.

[0022] See Figure 1 , Figure 1 This is a schematic diagram of the cross-sectional structure of a test structure.

[0023] Specifically, in conventional leakage current testing methods, the leakage current between the contact plug 14 and the gate structure 12 is typically measured by applying a high potential at one end and a low potential at the other end. This is the leakage current of the leakage path L1 between the contact plug 14 and the gate structure 12. However, because a gate oxide tunneling leakage path L2 exists between the active region 11 and the gate structure 12, the leakage current generated by this path is superimposed on the target leakage current of the leakage path L1 between the contact plug 14 and the gate structure 12. This results in the measurement results failing to accurately reflect the true physical distance between the contact plug 14 and the gate structure 12, thus affecting the accurate assessment of short-circuit risk.

[0024] Therefore, how to provide technical solutions to meet the testing requirements for short-circuit window, contact resistance, and sheet resistance, and improve testing accuracy, has become an urgent technical problem to be solved.

[0025] To address the aforementioned technical problems, the test structure and test methods for short-circuit windows, contact resistance, and sheet resistance provided in this disclosure include: a substrate with an isolation structure; a gate structure located above the isolation structure; an active region located above the substrate; multiple contact plugs located above the active region and electrically connected to it, the contact plugs being arranged in an array; a gate structure arranged in a serpentine pattern, the gate structure being adjacent to and spaced apart from the sidewalls of each contact plug; a first pad electrically connected to the gate structure; a second and a third pad electrically connected to different contact plugs; a fourth pad electrically connected to the gate structure, and the fourth pad and the first pad being located at opposite ends of the gate structure; the width of the isolation structure being greater than or equal to the width of the gate structure, and the shortest distance from the contact plug to the gate structure being the test distance. By placing the gate structure above the isolation structure, with the width of the isolation structure being greater than or equal to the width of the gate structure, the isolation structure effectively blocks the gate oxide tunneling leakage path from the active region to the gate through the channel. This eliminates the interference of the gate oxide tunneling leakage path on the test results, allowing the measured leakage current to accurately reflect the physical distance between the contact plug and the gate structure. By arranging the gate structure in a serpentine pattern and sequentially surrounding multiple contact plugs arranged in an array, multiple detection points adjacent to the gate and contact plugs are formed within a limited chip area, significantly amplifying the leakage signal and improving the detection sensitivity for weak leakage defects. By setting the first, second, third, and fourth pads, the same test structure can be used for short-circuit window testing, contact resistance testing, and gate structure sheet resistance testing, respectively, eliminating the need to prepare multiple different types of test structures, simplifying the testing process, and reducing testing costs. By defining the shortest distance from the contact plug to the gate structure as the test distance, and combining multiple test structures with different test distances, the abrupt change point of the leakage current with the test distance can be accurately obtained, thereby accurately defining the minimum safe distance window between the contact plug and the gate structure. Therefore, the test structure can meet the testing requirements for short-circuit window, contact resistance and sheet resistance, and improve the test accuracy.

[0026] To make the above-described objects, features and advantages of this disclosure more apparent and understandable, the disclosure is illustrated below with reference to the accompanying drawings.

[0027] See Figure 2 , Figure 2 This is a cross-sectional schematic diagram of a test structure according to an embodiment of this disclosure.

[0028] This disclosure provides a test structure for monitoring leakage current between contact plugs and gate structures in semiconductor devices, and can perform short-circuit window testing, contact resistance testing, and gate structure sheet resistance testing.

[0029] like Figure 2As shown, in this embodiment, the test structure includes a substrate 100.

[0030] The substrate 100 is made of single-crystal silicon. In other embodiments, the substrate 100 may also be made of one or more of germanium, silicon germanide, silicon carbide, gallium nitride, gallium arsenide, and indium gallium dihydrogen nitride. The substrate 100 may also be other types of substrates, such as a silicon-on-insulator substrate or a germanium-on-insulator substrate. In other embodiments, an epitaxial layer with the same crystal structure as the first silicon layer may be formed on the surface of the substrate 100 to improve the pattern transfer quality.

[0031] The substrate 100 is used to provide a process platform for the formation of the test structure.

[0032] The substrate 100 has an isolation structure 120.

[0033] In some embodiments, the isolation structure 120 and the shallow trench isolation structure 160 are formed in the same step and are made of the same material, for defining the position of the gate structure 130 in the substrate 100 and achieving electrical isolation between the source and drain structures 140.

[0034] The shallow trench isolation structure 160 is used to define the location of the active region in the substrate 100 and to achieve electrical isolation between different devices.

[0035] The gate structure 130 is located above the isolation structure 120.

[0036] Specifically, the vertical projection of the gate structure 130 falls entirely within the area of ​​the isolation structure 120, meaning that the area below the gate structure 130 is the isolation structure 120, not the active region 110. The bottom of the gate structure 130 contacts the isolation structure 120 but not the active region 110.

[0037] In some embodiments, the projection of the gate structure 130 onto the top surface of the isolation structure 120 coincides with the isolation structure 120.

[0038] In a direction parallel to the surface of the substrate 100, and in the direction from the source 141 to the drain 142 of the source-drain structure 140, the width of the isolation structure 120 is greater than or equal to the width of the gate structure 130, so that the isolation structure 120 can block the gate oxide tunneling leakage path from the active region 110 to the gate structure 130 through the channel, thereby eliminating the interference of gate oxide tunneling leakage on the test results.

[0039] In this embodiment, the active region 110, the isolation structure 120, and the gate structure 130 have a specific spatial positional relationship.

[0040] The active region 110 is located above the substrate 100.

[0041] The active region 110 and the gate structure 130 are spatially separated, meaning that the active region 110 and the gate structure 130 are not in contact.

[0042] In the vertical direction (i.e., perpendicular to the surface of the substrate 100), the active region 110 is located above the substrate 100, the isolation structure 120 is located above the active region 110, and the gate structure 130 is located above the isolation structure 120. The gate structure 130 is located above the isolation structure 120, and the bottom of the gate structure 130 is in contact with or separated from the top of the isolation structure 120 by a dielectric layer. The projection of the gate structure 130 in the vertical direction falls entirely within the area of ​​the isolation structure 120, so that the gate structure 130 does not contact the active region 110.

[0043] In the horizontal direction (i.e., parallel to the surface of the substrate 100, in the direction from the source 141 of the source-drain structure 140 to the drain 142), the width of the active region 110 is greater than the width of the isolation structure 120, and the width of the isolation structure 120 is greater than or equal to the width of the gate structure 130, ensuring that the entire area below the gate structure 130 is the isolation structure 120, so that the gate structure 130 is not adjacent to or overlaps with the active region 110.

[0044] With the above-mentioned positional relationship, the isolation structure 120 together forms a physical isolation barrier between the active region 110 and the gate structure 130 in the vertical and horizontal directions, so that there is no direct contact or electrical path formed through the channel between the two, thereby structurally eliminating the gate oxide tunneling leakage path from the active region 110 to the gate structure 130 through the channel.

[0045] An active drain structure 140 is formed in the active region 110. The source drain structure 140 includes a source 141 and a drain 142, which are located on both sides of the isolation structure 120, respectively. The top surface of the source drain structure 140 is lower than or flush with the top surface of the isolation structure 120, so that the isolation structure 120 can separate the source drain structure 140 from the gate structure 130 and prevent the generation of a gate oxide tunneling leakage path between them.

[0046] It should be noted that in this test structure, since the gate structure 130 is located above the isolation structure 120, and the width of the isolation structure 120 is greater than or equal to the width of the gate structure 130, the source 141 and the drain 142 are completely separated in the vertical direction by the isolation structure 120, and there is no active channel region. Therefore, the source-drain structure 140 in this test structure is mainly used to provide the electrical connection basis for the contact plug 150 and to simulate the contact environment between the contact plug 150 and the active region 110 in an actual device.

[0047] See also Figures 2 to 5 , Figure 3 This is a schematic diagram of a contact plug and gate structure according to an embodiment of the present disclosure; Figure 4 This is a schematic diagram of the structure of a contact plug according to an embodiment of this disclosure; Figure 5 This is a schematic diagram of a gate structure in an embodiment of this disclosure.

[0048] It should be noted that, Figure 2 It can be Figure 3 The schematic diagram of the cross-sectional structure of the test structure obtained by cutting along the location of line segment A is not derived from... Figure 3 The diagram shown is obtained by directly cutting the structure. This correspondence is only an example of the position of the contact plug.

[0049] Multiple contact plugs 150 are located above the active area 110 and are electrically connected to the active area 110.

[0050] Specifically, the contact plug 150 passes through the interlayer dielectric layer and its bottom contacts the active region 110 (or the source-drain structure 140) to lead the electrical signal of the active region 110 to the upper metal interconnect.

[0051] In this embodiment, the contact plug 150 is electrically connected to the source 141 and drain 142 of the source-drain structure 140, respectively.

[0052] The contact plugs 150 are located on both sides of the gate structure 130.

[0053] The contact plugs 150 are arranged in an array.

[0054] In this embodiment, the contact plugs 150 are arranged according to a preset number of rows and columns to form a contact plug array. For example, the contact plugs 150 can be arranged as a 2-row × N-column array, or an array with more rows. The specific arrangement can be designed according to the test requirements, where N is a positive integer greater than or equal to 2.

[0055] The contact plug 150 may be made of conductive metals such as tungsten, cobalt, copper, or ruthenium, or alloys of the above metals. In some embodiments, a metal silicide layer is further provided between the contact plug 150 and the active region 110 to reduce contact resistance.

[0056] In some embodiments, the contact plug 150 and the interlayer medium further have a metal barrier layer, the material of which may be one or more of titanium, titanium nitride, tantalum, tantalum nitride, or a combination thereof.

[0057] The metal barrier layer is used to prevent metal atoms in the contact plug 150 from diffusing into the interlayer dielectric layer, thus avoiding increased leakage current or device performance degradation caused by metal diffusion. Simultaneously, the metal barrier layer also improves the adhesion between the contact plug 150 and the interlayer dielectric layer, thereby improving the filling quality of the contact plug 150.

[0058] The test structure also includes: metal wire 170.

[0059] The metal wire 170 is located above the contact plug 150 and is electrically connected to the adjacent contact plug 150.

[0060] Specifically, the metal interconnect 170 is located above the contact plug 150 and / or the gate structure 130. The metal interconnect 170 above the contact plug 150 connects to adjacent contact plugs 150, wherein adjacent contact plugs 150 are respectively connected to the active region 110 in adjacent devices, or the source 141 or drain 142 in the source-drain structure 140, that is, adjacent contact plugs 150 are respectively connected to the source 141 in adjacent devices, and adjacent contact plugs 150 are respectively connected to the drain 142 in adjacent devices. The metal interconnect 170 above the gate structure 130 connects to adjacent contact plugs 150, wherein adjacent contact plugs 150 are respectively connected to the source 141 and drain 142 in the source-drain structure 140.

[0061] The gate structure 130 is arranged in a serpentine pattern, sequentially surrounding each contact plug 150.

[0062] Specifically, the gate structure 130 extends in a horizontal direction in a meandering manner to form a plurality of continuous bends, each bend being adjacent to the sidewall of a plurality of contact plugs 150.

[0063] In this embodiment, there is a gap between the gate structure 130 and the sidewall of each contact plug 150, which is the distance from the contact plug 150 to the edge of the gate structure 130. By arranging the gate structure 130 in a serpentine pattern, multiple detection points adjacent to the contact plugs 150 can be formed within a limited chip area. When a short-circuit defect occurs at a certain detection point, the overall leakage signal is significantly amplified due to the parallel connection of multiple detection points, thereby improving the detection sensitivity of weak leakage defects.

[0064] The shortest distance from the contact plug 150 to the gate structure 130 is defined as the test distance D.

[0065] In this embodiment, in the direction from the source 141 of the source-drain structure 140 to the drain 142, the test distance D refers to the minimum distance from the sidewall of the contact plug 150 to the edge of the adjacent gate structure 130.

[0066] To establish a mapping relationship between the test distance D and the leakage current, multiple test structures can be set on the same wafer, with different test structures having different test distances D.

[0067] The test distance D can include: the minimum spacing between the contact plug 150 and the gate structure 130 allowed by design rules; at least one spacing value smaller than the minimum spacing value; and at least one negative spacing value where the contact plug 150 and the gate structure 130 partially overlap. By testing the leakage current under different D values, the abrupt change point of the leakage current as a function of D can be obtained, thereby determining the minimum safe distance window between the contact plug 150 and the gate structure 130.

[0068] The test structure also includes: a first pad 161, a second pad 162, a third pad 163, and a fourth pad 164, for electrical connection with external test equipment.

[0069] The first pad 161 and the fourth pad 164 are electrically connected to the gate structure 130 through the contact plug 150.

[0070] The first pad 161 is electrically connected to one end of the gate structure 130, and the fourth pad 164 is electrically connected to the other end of the gate structure 130. The fourth pad 164 and the first pad 161 are located at the two ends of the gate structure 130, so that current can be applied to the gate structure 130 and voltage can be measured through the first pad 161 and the fourth pad 164, thereby obtaining the sheet resistance of the gate structure 130.

[0071] The second pad 162 and the third pad 163 are electrically connected to the contact plug 150 via the metal connection 170.

[0072] The second pad 162 is electrically connected to the first contact plug among the plurality of contact plugs 150, and the third pad 163 is electrically connected to the second contact plug among the plurality of contact plugs 150. The second contact plug is different from the first contact plug, so that current can be applied to the contact plug array and voltage can be measured through the second pad 162 and the third pad 163, thereby obtaining the contact resistance between the contact plug and the active region.

[0073] It should be noted that the illustrated embodiments only show a portion of the test structure. Those skilled in the art should understand that other implementations obtained by mirroring, flipping, rotating, or adapting the position, relative connection, or orientation of the various structures in the test structure based on the test structure shown in the figures, or by making adaptive adjustments to their shape and size, should all be considered within the scope of this disclosure.

[0074] Accordingly, this disclosure also provides a method for testing short-circuit windows.

[0075] The short-circuit window test method is used for the test structure as described in any of the above.

[0076] The test method is used to detect leakage between the contact plug and the gate structure, and to determine the minimum safe distance window between the contact plug and the gate structure.

[0077] See also Figure 2 and Figure 3 The shortest distance from the contact plug 150 to the gate structure 130 in the test structure is defined as the test distance D.

[0078] To establish the mapping relationship between the test distance D and the leakage current, in this embodiment, multiple test structures are provided on the same wafer, and different test structures have different test distances D. Exemplarily, the value of the test distance D includes: the minimum spacing value between the contact plug 150 and the gate structure 130 allowed by design rules (e.g., 30 nm); at least one spacing value smaller than the minimum spacing value (e.g., 20 nm, 15 nm, 10 nm, 5 nm); and at least one negative spacing value where the contact plug 150 partially overlaps with the gate structure 130 (e.g., -5 nm, -10 nm, representing the distance of overlap between the contact plug and the edge of the gate structure).

[0079] The different test distances D can form an arithmetic sequence.

[0080] In some embodiments, several additional test distances can be set between adjacent test distances D where the leakage current changes abruptly, in order to accurately locate the test distance D where the leakage current changes abruptly.

[0081] The specific steps of the short-circuit window test method are as follows: A test voltage is applied between the first and third pads, or between the second and fourth pads.

[0082] Specifically, the probes are placed in contact with the first pad 161 and the third pad 163, while the second pad 162 and the fourth pad 164 are left unattended. Alternatively, the probes can be placed in contact with the second pad 162 and the fourth pad 164, while the first pad 161 and the third pad 163 are left unattended. Both connection methods allow for the measurement of leakage current between the contact plug and the gate structure.

[0083] Measure the leakage current between the first pad and the third pad, or between the second pad and the fourth pad.

[0084] Specifically, a test voltage V_test is applied between the first pad 161 and the third pad 163, or between the second pad 162 and the fourth pad 164. The test voltage V_test is greater than 0V and less than or equal to 5V, and its specific value is determined based on the process node and device operating voltage. In this embodiment, the test voltage V_test can be set to 0.1V, 1V, 3V, 4V, or 5V.

[0085] Based on the leakage current, the test distance when a short circuit occurs between the contact plug and the gate structure is obtained.

[0086] Specifically, the leakage current I_leak between the first pad 161 and the third pad 163 is measured. For each test structure at each test distance D, the leakage current value under different test voltages is recorded.

[0087] Repeat the above steps to test multiple test structures with different test distances D, and obtain a dataset showing the change of leakage current I_leak as a function of test distance D.

[0088] In some embodiments, when a leakage current I_leak is detected, it is determined that a short circuit has occurred between the contact plug 150 and the gate structure 130.

[0089] Based on the measured data, a curve can be plotted showing the relationship between leakage current I_leak and test distance D. In this curve, when the test distance D is large (e.g., greater than the minimum spacing specified in the design rules), the leakage current I_leak is at a low level, indicating that there is no short circuit between the contact plug and the gate structure. As the test distance D gradually decreases, the leakage current I_leak remains at a low level. When the test distance D decreases to a certain critical value, the leakage current I_leak increases sharply (e.g., by more than one order of magnitude). This critical point indicates that physical contact or dielectric breakdown has occurred between the contact plug and the gate structure.

[0090] In some embodiments, the test voltage includes a first voltage and a second voltage, wherein the second voltage is greater than the first voltage. In this embodiment, the first voltage is set to 0.1V for detecting ohmic short circuits (physical bridging); the second voltage is set to 5V (or the device's maximum operating voltage) for detecting leakage at weak points in the dielectric (such as sidewall damage, defect-assisted tunneling caused by ILD defects).

[0091] By comparing the leakage current characteristics measured at the first and second voltages under the same test distance D, the type of short circuit can be distinguished: if linear leakage current has appeared at low voltage, it indicates the presence of metallic physical bridging; if the leakage current is very small at low voltage but increases sharply at high voltage, it indicates the presence of a weak point in the dielectric.

[0092] In some embodiments, the test method further includes measuring the leakage current at a first temperature and a second temperature, wherein the second temperature is higher than the first temperature. In this embodiment, the first temperature is set to 25°C (room temperature), and the second temperature is set to 125°C (operating temperature).

[0093] By comparing the leakage current-test distance curves at different temperatures, the reliability of the short-circuit window under different temperature conditions can be evaluated. If the critical distance increases significantly at high temperatures, it indicates that the dielectric leakage current has a positive temperature coefficient, requiring a more conservative process window.

[0094] Accordingly, this disclosure also provides a method for testing contact resistance.

[0095] The contact resistance test method is used for the test structure as described in any of the above.

[0096] The test method is used to detect the contact quality between the contact plug 150 and the active area 110 (or the source-drain structure 140).

[0097] See also Figures 2 to 4The test structure is provided as described in any of the above embodiments. In the test structure, a plurality of contact plugs 150 are arranged in an array. A second pad 162 is electrically connected to a first contact plug among the plurality of contact plugs 150, and a third pad 163 is electrically connected to a second contact plug among the plurality of contact plugs 150. The second contact plug and the first contact plug are different contact plugs. In this embodiment, the second pad 162 and the third pad 163 are respectively connected to the two ends of the contact plug array, and the number of contact plugs between the second pad 162 and the third pad 163 is num, where num is a multiple of 2.

[0098] The specific steps for testing contact resistance are as follows: A first test current is applied between the second pad and the third pad.

[0099] Specifically, the probes are brought into contact with the second pad 162 and the third pad 163, respectively. A first test current I_force is applied between the second pad 162 and the third pad 163. The magnitude of the first test current I_force is determined based on the expected contact resistance range. In this embodiment, the first test current I_force is set to 1mA. Optionally, I_force can also be set to 100μA, 500μA, or 5mA; the specific value should ensure that the measured voltage is within the range of the test equipment and does not damage the test structure.

[0100] Measure the voltage between the second pad and the third pad.

[0101] Specifically, the voltage V_meas between the second pad 162 and the third pad 163 is measured. In this embodiment, the four-terminal method is used for measurement. Since the second pad 162 and the third pad 163 are directly connected to the contact plug, the measured voltage V_meas reflects the voltage drop across the contact plug array.

[0102] The contact resistance R_cont is calculated based on the first test current I_force, the voltage V_meas, and the number of contact plugs num.

[0103] According to Ohm's law, the total resistance of the contact plug array is R_total = V_meas / I_force.

[0104] When num contact plugs are connected in parallel in the test structure (the second pad 162 and the third pad 163 are connected to the two ends of the array respectively, and the current path passes through all contact plugs), the contact resistance of a single contact plug is R_cont = R_total × num.

[0105] When num contact plugs are connected in series in the test structure (the second pad 162 and the third pad 163 are connected to the two ends of the array respectively, and the current path passes through all contact plugs), the contact resistance R_cont of a single contact plug is R_total / num.

[0106] When num contact plugs are connected in parallel in the test structure, forming parallel groups of K, and M parallel groups are connected in series (the second pad 162 and the third pad 163 are connected to the two ends of the array respectively, and the current path passes through all contact plugs), the contact resistance of a single contact plug is R_cont = R_total×K / M.

[0107] Compare the calculated contact resistance R_cont with a preset standard range: If R_cont is within the standard range, it indicates that the contact plug etching is fully open, the metal silicide formation is good, and the metal filling is sufficient. If R_cont is significantly high (e.g., exceeding twice the upper limit of the standard), it may indicate that the bottom of the contact plug is not fully open, the silicide formation is poor, or there are metal filling voids. If R_cont is significantly low (e.g., below 0.5 times the lower limit of the standard), it may indicate that the contact plug size is abnormally large or there are bridging defects.

[0108] In some embodiments, the magnitude of the first test current I_force can be changed to obtain the current dependence of the contact resistance in order to further analyze the characteristics of the contact interface (such as whether a Schottky contact exists).

[0109] Accordingly, this disclosure also provides a method for testing sheet resistance.

[0110] The test method for sheet resistance is used for the test structure as described in any of the above.

[0111] The test method is used to detect the linewidth uniformity, doping concentration, and silicide formation quality of the gate structure 130.

[0112] See also Figure 2 , Figure 3 and Figure 5 In the test structure, the first pad 161 is electrically connected to one end of the gate structure 130, the fourth pad 164 is electrically connected to the other end of the gate structure 130, and the fourth pad 164 and the first pad 161 are located at the two ends of the gate structure 130 respectively.

[0113] The gate structure 130 is arranged in a serpentine pattern and has a preset length L and width W.

[0114] The width W is the linewidth of the gate structure 130 perpendicular to the current direction, which is determined by the layout design.

[0115] The length L is the total length of the gate structure 130 between the first pad 161 and the fourth pad 164, including the sum of the lengths of all straight segments arranged in a serpentine pattern.

[0116] In some embodiments, the width W and length L can be directly read from the design layout of the test structure, or they can be actually measured by an online measurement device (such as CD-SEM) and then input into the test program.

[0117] The specific steps for testing sheet resistance are as follows: A second test current is applied between the first pad and the fourth pad.

[0118] Specifically, the probes are contacted with the first pad 161 and the fourth pad 164, respectively. A second test current I_force2 is applied between the first pad 161 and the fourth pad 164. The magnitude of the second test current I_force2 should be determined based on the expected sheet resistance of the gate structure and its withstand capability. In this embodiment, I_force2 is set to 100μA. Alternatively, a voltage application and current measurement method can also be used.

[0119] Measure the voltage between the first pad and the fourth pad.

[0120] Specifically, the voltage V_meas2 between the first pad 161 and the fourth pad 164 is measured. In this embodiment, the four-terminal method is used for measurement. Since the first pad 161 and the fourth pad 164 are directly connected to the two ends of the gate structure 130, the measured voltage V_meas2 reflects the voltage drop across the gate structure 130.

[0121] The sheet resistance R_poly of the gate structure is calculated based on the second test current I_force2, the voltage V_meas2, the length L, and the width W.

[0122] The total resistance of the gate structure 130 is: R_total2=V_meas2 / I_force2.

[0123] The relationship between the total resistance R_total2 and the sheet resistance R_poly is: R_poly = R_total2 × W / L.

[0124] Therefore, the formula for calculating the sheet resistance R_poly is: R_poly = (V_meas2 / I_force2) × (W / L).

[0125] The calculated sheet resistance R_poly can be compared with a preset standard range: if R_poly is within the standard range, it indicates that the doping concentration of the gate structure and the silicide formation quality meet the requirements. If R_poly is significantly high, it may indicate insufficient gate doping concentration, poor silicide formation, or a small gate linewidth (CD). If R_poly is significantly low, it may indicate that the gate linewidth (CD) is too large, which increases the risk of short circuit between the contact plug and the gate structure, requiring a comprehensive judgment based on the short-circuit window test results.

[0126] In some embodiments, different test currents can be applied between the first pad 161 and the fourth pad 164 to obtain the current dependence of the sheet resistance, so as to analyze the contact characteristics of the gate structure or determine whether there are local defects.

[0127] The foregoing describes several embodiments of the test structure and test methods for short-circuit window, contact resistance, and sheet resistance. The optional methods described in each embodiment can be combined and cross-referenced without conflict, thereby extending to a variety of possible embodiments. These can all be considered as embodiments disclosed in this publication.

[0128] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article indicates that the preceding and following related objects have an "or" relationship.

[0129] In the embodiments of this application, "multiple" refers to two or more.

[0130] The descriptions of "first," "second," etc., appearing in the embodiments of this application are for illustrative purposes and to distinguish the objects being described. They have no order and do not indicate any special limitation on the number of objects in the embodiments of this application. They cannot constitute any limitation on the embodiments of this application.

[0131] While the embodiments disclosed herein are as described above, this disclosure is not limited thereto. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this disclosure; therefore, the scope of protection of this disclosure should be determined by the scope defined in the claims.

Claims

1. A test structure, characterized in that, include: Substrate, wherein the substrate has an isolation structure; A gate structure is located above the isolation structure; An active region is located above the substrate and is spaced apart from the gate structure; Multiple contact plugs are located above the active region and electrically connected to the active region. The contact plugs are arranged in an array, wherein the gate structure is arranged in a serpentine pattern and surrounds each contact plug in sequence. The gate structure is adjacent to and spaced from the sidewall of each contact plug. The first pad is electrically connected to the gate structure; The second and third pads are electrically connected to different contact plugs, respectively; The fourth pad is electrically connected to the gate structure, and the fourth pad and the first pad are respectively located at both ends of the gate structure; Wherein, the width of the isolation structure is greater than or equal to the width of the gate structure, and the shortest distance from the contact plug to the gate structure is the test distance.

2. The test structure according to claim 1, characterized in that, The projection of the gate structure onto the top surface of the isolation structure coincides with the isolation structure.

3. The test structure according to claim 1, characterized in that, The test distance includes: The minimum spacing value between the contact plug and the gate structure allowed by the design rules; At least one spacing value that is smaller than the minimum spacing value; At least one of the contact plugs has a negative spacing value that partially overlaps with the gate structure.

4. The test structure according to claim 1, characterized in that, The active region has a source-drain structure; The source-drain structure includes a source and a drain located on both sides of the gate structure, respectively; The contact plugs are electrically connected to the source and drain of the source-drain structure, respectively.

5. A method for testing a short-circuit window, used in the test structure as described in any one of claims 1 to 4, characterized in that, The testing method includes: A test voltage is applied between the first pad and the third pad, or between the second pad and the fourth pad; Measure the leakage current between the first pad and the third pad, or between the second pad and the fourth pad; Based on the leakage current, the test distance when a short circuit occurs between the contact plug and the gate structure is obtained.

6. The test method according to claim 5, characterized in that, Also includes: Multiple test structures are provided, and different test structures have different test distances; Measure the leakage current between the first pad and the third pad, or between the second pad and the fourth pad, for each of the test structures. The minimum safe distance between the contact plug and the gate structure is determined based on the abrupt change point of the leakage current as a function of the test distance.

7. The test method according to claim 5, characterized in that, The test voltage is greater than 0V and less than or equal to 5V; The test voltage includes a first voltage and a second voltage, wherein the second voltage is greater than the first voltage.

8. The method according to claim 5, characterized in that, Also includes: The leakage current was measured at a first temperature and a second temperature, respectively, where the second temperature was higher than the first temperature.

9. A method for testing contact resistance, used in the test structure as described in any one of claims 1 to 4, characterized in that, The testing method includes: A first test current is applied between the second pad and the third pad; Measure the voltage between the second pad and the third pad; The contact resistance is calculated based on the first test current, the voltage, and the number of contact plugs.

10. A method for testing sheet resistance, used in the test structure according to any one of claims 1 to 4, characterized in that, The testing method includes: A second test current is applied between the first pad and the fourth pad; Measure the voltage between the first pad and the fourth pad; Obtain the length and width of the gate structure; The sheet resistance of the gate structure is calculated based on the second test current, the voltage, the length, and the width.

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