A method for the preparation and optimization of oxide semiconductor thin film devices
By combining continuous laser annealing with PID isothermal control, the problem of uneven densification of oxide semiconductor thin films has been solved, achieving performance improvement and full wafer consistency of oxide semiconductor thin film transistors, which is suitable for mass production of DRAM memory.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANDONG UNIV
- Filing Date
- 2026-04-15
- Publication Date
- 2026-07-10
AI Technical Summary
Temperature fluctuations in existing laser annealing processes lead to uneven densification of oxide semiconductor films, resulting in poor device performance consistency and making it difficult to meet the requirements for large-scale mass production of DRAM memories.
By employing continuous laser annealing combined with PID isothermal control, the temperature consistency and performance stability across the entire wafer range are ensured by real-time monitoring of the active layer temperature and dynamic adjustment of the laser output power.
It significantly improves the mobility, subthreshold swing, and threshold voltage stability of oxide semiconductor thin-film transistors, ensuring process consistency and mass production yield of DRAM memory arrays, and is suitable for advanced memory manufacturing that includes flexible substrates or three-dimensional stacked structures.
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Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor device manufacturing technology, specifically relating to a method for improving the performance of thin-film devices by using continuous laser annealing to process oxide semiconductor thin films. This method can introduce a laser annealing process with PID isothermal control, which is suitable for access transistors and peripheral circuits in DRAM memory, and is especially suitable for oxide semiconductors represented by IGZO. Background Technology
[0002] As semiconductor process nodes continue to shrink, the application of traditional silicon-based channel materials in DRAM memories faces increasingly severe challenges. In particular, leakage current control and data retention capabilities of channel transistors have become key bottlenecks restricting memory reliability and refresh power consumption. Oxide semiconductor materials, especially amorphous indium gallium zinc oxide (IGZO), have been widely studied in recent years as candidate solutions for access transistors and peripheral circuit channel materials in DRAM memory cells due to their extremely low off-state current, high electron mobility, and good three-dimensional integration compatibility. Compared to traditional silicon-based transistors, oxide semiconductor thin-film transistors can significantly reduce leakage losses in memory nodes and extend data retention time, thereby reducing refresh frequency and power consumption, providing a new technological path to improve the reliability, energy efficiency, and integration density of DRAM memories.
[0003] However, during physical vapor deposition or atomic layer deposition (ALD) of oxide semiconductor thin films (such as IGZO films), defect states such as oxygen vacancies are inevitably introduced. These defect states, located in the band gap, act as carrier traps or additional conductive paths, leading to problems in transistors such as negative threshold voltage drift, subthreshold swing degradation, increased off-state current, and decreased bias stability. In DRAM applications, these problems directly degrade the charge retention capability of memory cells, increase the frequency of refresh operations, and in severe cases, even cause data loss, thus restricting the large-scale mass production and reliability compliance of oxide semiconductor-based DRAM memories.
[0004] To eliminate defect states in oxide semiconductor thin films, common post-processing methods include furnace annealing, rapid thermal annealing (RTA), and microwave annealing. Furnace annealing typically involves prolonged processing at high temperatures, resulting in high energy consumption, long cycle times, and a tendency for substrate thermal damage and metal interconnect layer oxidation, making it particularly unsuitable for DRAM back-end integration processes containing temperature-sensitive materials. While RTA shortens processing time, it still suffers from high thermal budgets and poor temperature uniformity within the wafer. In recent years, continuous laser annealing (CLA) technology has emerged as an advanced annealing solution suitable for high-performance oxide semiconductor thin films due to its advantages such as localized heating, small heat-affected zone, low thermal budget, and high processing speed.
[0005] While continuous laser annealing has shown promise for improving the performance of oxide semiconductor thin-film transistors (TFTs), existing methods mostly employ open-loop control with fixed output power or fixed scan speed. In actual processes, due to differences in pattern density, material reflectivity, and heat dissipation conditions across different regions of the wafer surface, open-loop control can easily lead to unexpected temperature fluctuations during annealing. This results in uneven densification of the oxide semiconductor thin film, incomplete elimination of oxygen defects, and ultimately, divergent device performance distribution within and between wafers, manifested as increased coefficients of variation for key parameters such as mobility, threshold voltage, and subthreshold swing. This performance inconsistency is fatal for the mass production of DRAM memories, as memory arrays require highly consistent electrical characteristics across thousands of access transistors; otherwise, the memory window and yield will be severely degraded.
[0006] Therefore, there is an urgent need to develop a laser annealing method that can effectively eliminate defect states in oxide semiconductor thin films, significantly improve the electrical performance of thin film transistors (TFTs), and ensure process stability and performance consistency across the entire wafer, so as to promote the large-scale industrial application of oxide semiconductor-based DRAM memory. Summary of the Invention
[0007] The present invention aims to provide a method for improving the performance of oxide semiconductor thin film devices by combining continuous laser annealing with temperature control, which significantly improves the mobility, subthreshold swing and threshold voltage stability of thin film transistor devices, in order to solve the problems of uneven film densification and poor device performance consistency caused by temperature fluctuations in the existing laser annealing process.
[0008] The method for fabricating and optimizing oxide semiconductor thin-film devices of the present invention includes the following steps:
[0009] (1) Scanning annealing of the active layer (such as IGZO active layer) of oxide semiconductor thin film device by continuous laser;
[0010] (2) During the scanning annealing process, the temperature of the active layer is monitored in real time, and the laser output power is dynamically adjusted according to the deviation between the monitored temperature and the target temperature so that the temperature of the active layer is maintained within the target temperature.
[0011] The atmosphere for scanning annealing in step (1) can be air, nitrogen, oxygen or argon.
[0012] In step (1), the continuous laser is a near-infrared wavelength continuous laser or a pulsed laser.
[0013] The wavelength of the continuous laser in step (1) is 1080nm.
[0014] In step (1), the scanning speed of the laser during the scanning annealing process is 50 to 500 mm / s, and the preferred laser scanning speed is 100 mm / s to 300 mm / s.
[0015] In step (2), the dynamic adjustment of laser output power is achieved through a PID controller.
[0016] In step (2), the target temperature is 100℃ to 500℃, preferably 350℃ ± 10℃. The temperature control accuracy of the target temperature is ± 5℃. Under this PID constant temperature control, even if the scanning speed varies within the range of 100mm / s to 300mm / s, the fabricated thin-film transistor (TFT) device can still maintain highly consistent performance.
[0017] After the above annealing, the oxygen vacancy and defect or adsorbed oxygen content in the oxide semiconductor thin film (such as IGZO thin film) decreases, while the metal oxygen content increases. In the XPS O1s energy spectrum of the thin film, the proportion of metal-oxygen bonds is ≥55%, the proportion of oxygen vacancies is ≤40%, and the proportion of defect adsorbed oxygen is ≤7%. The thin film becomes denser, thereby obtaining an oxide semiconductor thin film transistor device with improved electrical performance.
[0018] The present invention also provides an oxide semiconductor thin film transistor, which is prepared by the above method; the oxide semiconductor thin film transistor is preferably an IGZO thin film transistor, which has an electron mobility ≥25cm² / V·s, a subthreshold swing ≤140mV / decade, and an electron mobility fluctuation ≤10%.
[0019] The present invention also provides a DRAM memory, wherein an oxide semiconductor thin film transistor prepared by the above method is used as an access transistor, and the oxide semiconductor thin film transistor is preferably an IGZO thin film transistor.
[0020] This invention optimizes laser wavelength and scanning speed parameters and further introduces a PID isothermal control strategy to effectively eliminate defect states in oxide semiconductor thin films. This significantly improves the mobility, subthreshold swing, and threshold voltage stability of thin-film transistor devices, ensuring process consistency and mass production yield of DRAM memory arrays. Compared with existing technologies, this invention has the following advantages:
[0021] (1) Significantly improves the key electrical performance of oxide semiconductor thin-film transistors;
[0022] After annealing the oxide semiconductor thin film (taking IGZO as an example) using the method of this invention, the performance of the TFT device is significantly improved. Specific experimental data are shown in Table 1.
[0023]
[0024] As can be seen from Table 1, after processing by the method of the present invention:
[0025] Electron mobility increased from an untreated 11.06 cm² / V·s to a maximum of 28.62 cm² / V·s, an improvement of over 150%; subthreshold swing decreased from 268.82 mV / decade to a minimum of 120.15 mV / decade, indicating a significant reduction in interface state and bulk defect state density; threshold voltage was adjusted from negative (-0.12 V) to positive (0.36~0.47 V), which is beneficial for realizing enhancement-mode devices, reducing off-state current, and improving the data retention capability of DRAM memory nodes.
[0026] Furthermore, X-ray photoelectron spectroscopy (XPS) analysis further confirmed the reduction in defect states. Referring to Table 2, after laser annealing, the proportion of metal-oxygen bonds in the IGZO film increased from 47.27% to 55.23%, the proportion of oxygen vacancies decreased from 40.18% to 38.45%, and the proportion of defective or adsorbed oxygen decreased from 12.55% to 6.32%. This indicates that the laser thermal effect induced film densification, effectively filling oxygen vacancies and reducing the defect state density.
[0027]
[0028] (2) Achieve performance consistency within a wide scanning speed window to ensure mass production stability;
[0029] Within a scanning speed range of 100 mm / s to 300 mm / s, the device mobility fluctuation is less than 12%, the subthreshold swing fluctuation is less than 13%, and the threshold voltage remains stable between 0.36 and 0.47 V. This indicates that the method of the present invention has a wide process window, is insensitive to changes in scanning speed, and is beneficial for ensuring that minor drifts in equipment parameters during large-scale production do not affect the final device performance.
[0030] (3) Further introduction of PID constant temperature control can compensate for differences in heat input and improve the uniformity of the entire wafer;
[0031] In a preferred embodiment of the invention, the surface temperature of the oxide semiconductor thin film is stabilized at 350℃±5℃ using PID closed-loop control. Even if different areas of the wafer differ due to variations in pattern density or heat dissipation conditions, PID control can dynamically adjust the laser power to ensure consistent effective heat input. Experiments show that in PID isothermal mode, when the scanning speed varies within the range of 100~300mm / s, device mobility fluctuations can be further reduced to within ±5%, significantly better than the open-loop fixed power method. This is crucial for the electrical characteristic consistency of tens of thousands of access transistors in DRAM memory, effectively improving the memory window and mass production yield.
[0032] (4) Simple process, low thermal budget, and compatible with DRAM back-end integration;
[0033] This invention employs a 1080nm continuous laser, which has a shallow penetration depth into silicon substrates and metal interconnect layers. The heat-affected zone is limited to the oxide semiconductor thin film and its adjacent layers, without damaging existing temperature-sensitive structures such as high-k dielectrics and metal electrodes in DRAM chips. The annealing time is short, eliminating the need for high-temperature furnace tube processes, making it suitable for advanced memory manufacturing involving flexible substrates or three-dimensional stacked structures.
[0034] In summary, this invention provides an efficient, stable, and mass-producible laser annealing solution for oxide semiconductor-based DRAM memory, which improves device performance while ensuring wafer-wide consistency, laying a key technological foundation for improving memory reliability and low-power operation. Attached Figure Description
[0035] Figure 1 This is a schematic diagram illustrating the principle of the method for improving the performance of oxide semiconductor thin film devices by combining continuous laser annealing with temperature control according to the present invention.
[0036] Figure 2 This is a schematic diagram of the structure of an oxide semiconductor thin-film transistor (specifically an IGZO thin-film transistor) in an embodiment of the present invention.
[0037] Figure 3 The XPS O1s energy spectrum comparison (comparison of oxygen content) of IGZO thin films before and after annealing is shown in the figure; (a) is the untreated sample and (b) is the sample treated by the method of the present invention, showing that the proportion of metal-oxygen bonds increases and the proportion of oxygen vacancies and defects or adsorbed oxygen decreases.
[0038] Figure 4 The graph shows the change in electron mobility of IGZO thin film transistors under different laser scanning speeds; the horizontal axis represents the scanning speed (mm / s), and the vertical axis represents the mobility (cm² / V·s).
[0039] Figure 5 The graph shows the subthreshold swing variation of IGZO thin film transistors under different laser scanning speeds; the horizontal axis represents the scanning speed (mm / s), and the vertical axis represents the subthreshold swing (mV / decade). Detailed Implementation
[0040] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in detail below with reference to the accompanying drawings and specific embodiments. These embodiments are only used to explain the invention and do not constitute a limitation on the scope of protection of the invention. It should be noted that the following embodiments use IGZO as a typical representative of oxide semiconductors, but the invention is equally applicable to other oxide semiconductor materials.
[0041] The present invention provides a method for improving the performance of oxide semiconductor thin film devices through continuous laser annealing combined with temperature control, such as... Figure 1 As shown, the active layer of the oxide semiconductor thin film (IGZO active layer in this embodiment) is scanned and annealed by a continuous laser emitted from a laser. During the scanning annealing process, the surface temperature of the active layer of the oxide semiconductor thin film is monitored in real time by a thermometer, and the monitored temperature is sent to a PID controller (PID module). The PID controller compares the received monitored temperature with the target temperature, and dynamically adjusts the laser output power of the laser according to the deviation between the monitored temperature and the target temperature, so that the temperature of the oxide semiconductor thin film is maintained within the target temperature.
[0042] Example 1
[0043] This embodiment provides a structure as follows: Figure 2 The method for fabricating an oxide semiconductor thin-film transistor (specifically an IGZO thin-film transistor) is shown. The oxide semiconductor thin-film transistor includes a substrate, a gate, an aluminum oxide dielectric layer, an oxide semiconductor active layer (IGZO active layer), and source / drain electrodes.
[0044] First, a 40nm thick titanium nitride gate is deposited on a silicon substrate by magnetron sputtering, followed by an atomic layer deposition of a 20nm aluminum oxide dielectric layer. Then, the dielectric layer is rapidly thermally annealed for 30 minutes in an oxygen atmosphere. Next, a 24nm thick IGZO active layer is deposited by magnetron sputtering.
[0045] Subsequently, the IGZO active layer was scanned and annealed using a continuous laser with a wavelength of 1080 nm. The laser temperature was set to 350 °C and the scanning speed was set to 200 mm / s. The annealing was carried out in a nitrogen atmosphere.
[0046] After annealing, 40nm titanium nitride source and drain electrodes were formed using magnetron sputtering and lift-off processes, completing the fabrication of the IGZO thin-film transistor device. The electrical performance of the device was tested, and the results are as follows: mobility 28.62 cm² / V·s, subthreshold swing 130.76 mV / decade, and threshold voltage 0.36 V. Simultaneously, XPS analysis was performed on the annealed IGZO thin film, as shown... Figure 3 As shown in (b), the metal-oxygen bond ratio is 55.23%, the oxygen vacancy ratio is 38.45%, and the defect-adsorbed oxygen ratio is 6.32%. Figure 3 Compared to the untreated XPS sample shown in (a) (mobility 11.06 cm² / V·s, subthreshold swing 268.82 mV / decade, threshold voltage -0.12 V), this embodiment shows an increased proportion of metal-oxygen bonds and a decreased proportion of oxygen vacancies, defects, or adsorbed oxygen. This embodiment significantly improves device performance and effectively reduces thin film defect states.
[0047] Example 2
[0048] To verify the performance stability of the method of the present invention within a wide scanning speed window, laser annealing was performed on the IGZO active layer of the IGZO thin film prepared in the example at scanning speeds of 100 mm / s, 200 mm / s, and 300 mm / s, respectively, with the remaining process conditions being the same as in Example 1. The electrical properties of the prepared TFT devices are summarized in Table 1. The results show that:
[0049] At 100 mm / s, the mobility is 25.13 cm² / V·s, the subthreshold swing is 120.15 mV / decade, and the threshold voltage is 0.39 V; at 200 mm / s, the mobility is 28.62 cm² / V·s, the subthreshold swing is 130.76 mV / decade, and the threshold voltage is 0.36 V; at 300 mm / s, the mobility is 28.02 cm² / V·s, the subthreshold swing is 135.71 mV / decade, and the threshold voltage is 0.47 V.
[0050] Figure 4 The electron mobility variation of IGZO thin-film transistors under different laser scanning speeds is presented. Figure 5 The subthreshold swing variation of IGZOTFTs under different laser scanning speeds is presented. Figure 4 and Figure 5 As can be seen, within a scanning speed range of 100–300 mm / s, the mobility remains at 25–29 cm² / V·s, the subthreshold swing remains at 120–136 mV / decade, and the threshold voltage is positive in all cases. All treated devices exhibit significantly better performance than untreated samples, and the performance fluctuations at different scanning speeds are small, indicating that the method of this invention has a wide process window and is suitable for mass production.
[0051] Example 3
[0052] Based on Example 1, this example further introduces a PID closed-loop temperature control system, such as... Figure 2 As shown. During the laser scanning annealing process, an infrared temperature sensor is used to monitor the temperature of the IGZO film surface in real time, and the temperature signal is fed back to the PID controller (proportional-integral-derivative controller). The PID controller dynamically adjusts the output power of the continuous laser according to the deviation between the measured temperature and the target temperature (set to 350℃), so that the film surface temperature is stabilized within the range of 350℃±5℃.
[0053] PID isothermal annealing was performed at scan speeds of 100 mm / s, 200 mm / s, and 300 mm / s. The results show that under PID control, the electrical performance of the devices exhibits extremely high consistency even with different scan speeds: mobility fluctuations are less than 5% (mobility of all samples is between 27.5 and 28.8 cm² / V·s), subthreshold swing fluctuations are less than 8%, and the threshold voltage remains stable at around 0.4 V. In contrast, with open-loop fixed-power annealing without temperature feedback, mobility fluctuations exceed 20% at different scan speeds, the threshold voltage exhibits negative drift, and device performance varies significantly across different regions.
[0054] Therefore, the PID constant temperature control of the present invention can effectively compensate for the changes in heat input caused by the changes in scanning speed and the differences in heat dissipation in different areas of the wafer, ensuring a high degree of consistency in device performance across the entire wafer, and is especially suitable for array manufacturing in DRAM memory where the matching requirements for transistor characteristics are extremely high.
[0055] Comparative Example
[0056] In contrast, IGZO thin films were annealed using a fixed laser output power (open-loop control) without temperature feedback. Scanning speeds were set to 100 mm / s, 200 mm / s, and 300 mm / s, with other conditions identical to Example 1. Test results showed that, due to the lack of temperature feedback compensation, the actual surface temperature of the wafer increased as the scanning speed decreased. At 100 mm / s, the film overheated, resulting in surface damage. At 300 mm / s, annealing was insufficient, with the mobility only increasing to 15.2 cm² / V·s, and the subthreshold swing still exceeding 200 mV / decade. This indicates that open-loop control cannot achieve stable and consistent device performance across a wide scanning speed window, making it difficult to meet the requirements for DRAM mass production.
[0057] Those skilled in the art should understand that the oxide semiconductor thin film described in this invention is not limited to magnetron sputtering deposition, but can also be prepared using processes such as atomic layer deposition, chemical vapor deposition, or solution spin coating. Furthermore, the continuous laser annealing and PID isothermal control method proposed in this invention is also applicable to other oxide semiconductor systems; the laser power and target temperature window only need to be adjusted according to the material's light absorption characteristics and thermal stability. The temperature setpoint for PID control is not limited to 350°C and can be optimized within the range of 100°C to 500°C based on the oxide semiconductor thin film thickness, substrate thermal conductivity, and desired defect repair level. In addition, the atmosphere for laser scanning annealing can be air, nitrogen, oxygen, or argon. An oxygen atmosphere helps to further fill oxygen vacancies, while an inert atmosphere helps to maintain the stoichiometry of the thin film. The 1080nm continuous laser wavelength used in this invention is a preferred example, but the use of other near-infrared wavelengths of continuous laser or pulsed laser is not excluded, provided that the thin film effectively absorbs the laser energy and the heat-affected zone is controllable. In practical applications, the scanning speed range of 100–300 mm / s can be appropriately extended according to the actual equipment capabilities and wafer size, for example, to 50–500 mm / s, while maintaining a constant temperature through PID control to ensure consistency. Furthermore, the range of metal-oxygen bonds, oxygen vacancies, and defects or adsorbed oxygen ratios measured by XPS in this invention are only typical values. Depending on the device application requirements, the oxygen vacancy ratio can be varied between 20% and 45% by adjusting the annealing temperature or scanning speed.
[0058] The above description is merely a few preferred embodiments of the present invention and is not intended to limit the scope of protection of the present invention. Any equivalent substitutions, parameter adjustments, or material extensions made based on the technical concept provided by the present invention, as well as any modifications or improvements made without departing from the principles of the present invention, should fall within the scope of protection of the present invention.
Claims
1. A method for fabricating and optimizing an oxide semiconductor thin-film device, characterized in that, Includes the following steps: (1) Scanning annealing of the active layer of an oxide semiconductor thin film device by continuous laser; (2) During the scanning annealing process, the temperature of the active layer is monitored in real time, and the laser output power is dynamically adjusted according to the deviation between the monitored temperature and the target temperature so that the temperature of the active layer is maintained within the target temperature.
2. The method for fabricating and optimizing oxide semiconductor thin-film devices according to claim 1, characterized in that, In step (1), the continuous laser is a near-infrared wavelength continuous laser or a pulsed laser, and the wavelength of the continuous laser is 1080nm.
3. The method for fabricating and optimizing oxide semiconductor thin-film devices according to claim 1, characterized in that, The atmosphere for scanning annealing in step (1) is air, nitrogen, oxygen or argon.
4. The method for fabricating and optimizing oxide semiconductor thin-film devices according to claim 1, characterized in that, The scanning speed of the laser during the scanning annealing process in step (1) is 100mm / s to 300mm / s.
5. The method for fabricating and optimizing an oxide semiconductor thin-film device according to claim 1, characterized in that, In step (2), the dynamic adjustment of laser output power is achieved through a PID controller.
6. The method for fabricating and optimizing an oxide semiconductor thin-film device according to claim 1, characterized in that, In step (2), the target temperature is 100℃~500℃, and the temperature control accuracy of the target temperature is ±5℃.
7. The method for fabricating and optimizing an oxide semiconductor thin-film device according to claim 1, characterized in that, The target temperature in step (2) is 350℃±10℃.
8. An oxide semiconductor thin-film device, characterized in that, Prepared by the method described in any one of claims 1-7.
9. The oxide semiconductor thin film device according to claim 8, characterized in that, The device has an electron mobility ≥25cm² / V·s, a subthreshold swing ≤140mV / decade, and an electron mobility fluctuation ≤10%.
10. A DRAM memory, characterized in that, The oxide semiconductor thin film device prepared by the method according to any one of claims 1-7 is used as an access transistor.